1 /* 2 * QEMU model of the Xilinx usb subsystem 3 * 4 * Copyright (c) 2020 Xilinx Inc. Sai Pavan Boddu <sai.pava.boddu@xilinx.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "hw/sysbus.h" 27 #include "hw/register.h" 28 #include "qemu/bitops.h" 29 #include "qemu/log.h" 30 #include "qom/object.h" 31 #include "qapi/error.h" 32 #include "hw/qdev-properties.h" 33 #include "hw/usb/xlnx-usb-subsystem.h" 34 35 static void versal_usb2_realize(DeviceState *dev, Error **errp) 36 { 37 VersalUsb2 *s = VERSAL_USB2(dev); 38 SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 39 Error *err = NULL; 40 41 sysbus_realize(SYS_BUS_DEVICE(&s->dwc3), &err); 42 if (err) { 43 error_propagate(errp, err); 44 return; 45 } 46 sysbus_realize(SYS_BUS_DEVICE(&s->usb2Ctrl), &err); 47 if (err) { 48 error_propagate(errp, err); 49 return; 50 } 51 sysbus_init_mmio(sbd, &s->dwc3_mr); 52 sysbus_init_mmio(sbd, &s->usb2Ctrl_mr); 53 qdev_pass_gpios(DEVICE(&s->dwc3.sysbus_xhci), dev, SYSBUS_DEVICE_GPIO_IRQ); 54 } 55 56 static void versal_usb2_init(Object *obj) 57 { 58 VersalUsb2 *s = VERSAL_USB2(obj); 59 60 object_initialize_child(obj, "versal.dwc3", &s->dwc3, 61 TYPE_USB_DWC3); 62 object_initialize_child(obj, "versal.usb2-ctrl", &s->usb2Ctrl, 63 TYPE_XILINX_VERSAL_USB2_CTRL_REGS); 64 memory_region_init_alias(&s->dwc3_mr, obj, "versal.dwc3_alias", 65 &s->dwc3.iomem, 0, DWC3_SIZE); 66 memory_region_init_alias(&s->usb2Ctrl_mr, obj, "versal.usb2Ctrl_alias", 67 &s->usb2Ctrl.iomem, 0, USB2_REGS_R_MAX * 4); 68 qdev_alias_all_properties(DEVICE(&s->dwc3), obj); 69 qdev_alias_all_properties(DEVICE(&s->dwc3.sysbus_xhci), obj); 70 object_property_add_alias(obj, "dma", OBJECT(&s->dwc3.sysbus_xhci), "dma"); 71 } 72 73 static void versal_usb2_class_init(ObjectClass *klass, void *data) 74 { 75 DeviceClass *dc = DEVICE_CLASS(klass); 76 77 dc->realize = versal_usb2_realize; 78 } 79 80 static const TypeInfo versal_usb2_info = { 81 .name = TYPE_XILINX_VERSAL_USB2, 82 .parent = TYPE_SYS_BUS_DEVICE, 83 .instance_size = sizeof(VersalUsb2), 84 .class_init = versal_usb2_class_init, 85 .instance_init = versal_usb2_init, 86 }; 87 88 static void versal_usb_types(void) 89 { 90 type_register_static(&versal_usb2_info); 91 } 92 93 type_init(versal_usb_types) 94