1 /* 2 * USB xHCI controller emulation 3 * 4 * Copyright (c) 2011 Securiforest 5 * Date: 2011-05-11 ; Author: Hector Martin <hector@marcansoft.com> 6 * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 7 * 8 * This library is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU Lesser General Public 10 * License as published by the Free Software Foundation; either 11 * version 2.1 of the License, or (at your option) any later version. 12 * 13 * This library is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * Lesser General Public License for more details. 17 * 18 * You should have received a copy of the GNU Lesser General Public 19 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #ifndef HW_USB_HCD_XHCI_H 23 #define HW_USB_HCD_XHCI_H 24 #include "qom/object.h" 25 26 #include "hw/usb.h" 27 #include "hw/usb/xhci.h" 28 #include "sysemu/dma.h" 29 30 OBJECT_DECLARE_SIMPLE_TYPE(XHCIState, XHCI) 31 32 /* Very pessimistic, let's hope it's enough for all cases */ 33 #define EV_QUEUE (((3 * 24) + 16) * XHCI_MAXSLOTS) 34 35 typedef struct XHCIStreamContext XHCIStreamContext; 36 typedef struct XHCIEPContext XHCIEPContext; 37 38 enum xhci_flags { 39 XHCI_FLAG_ENABLE_STREAMS = 1, 40 }; 41 42 typedef enum TRBType { 43 TRB_RESERVED = 0, 44 TR_NORMAL, 45 TR_SETUP, 46 TR_DATA, 47 TR_STATUS, 48 TR_ISOCH, 49 TR_LINK, 50 TR_EVDATA, 51 TR_NOOP, 52 CR_ENABLE_SLOT, 53 CR_DISABLE_SLOT, 54 CR_ADDRESS_DEVICE, 55 CR_CONFIGURE_ENDPOINT, 56 CR_EVALUATE_CONTEXT, 57 CR_RESET_ENDPOINT, 58 CR_STOP_ENDPOINT, 59 CR_SET_TR_DEQUEUE, 60 CR_RESET_DEVICE, 61 CR_FORCE_EVENT, 62 CR_NEGOTIATE_BW, 63 CR_SET_LATENCY_TOLERANCE, 64 CR_GET_PORT_BANDWIDTH, 65 CR_FORCE_HEADER, 66 CR_NOOP, 67 ER_TRANSFER = 32, 68 ER_COMMAND_COMPLETE, 69 ER_PORT_STATUS_CHANGE, 70 ER_BANDWIDTH_REQUEST, 71 ER_DOORBELL, 72 ER_HOST_CONTROLLER, 73 ER_DEVICE_NOTIFICATION, 74 ER_MFINDEX_WRAP, 75 /* vendor specific bits */ 76 CR_VENDOR_NEC_FIRMWARE_REVISION = 49, 77 CR_VENDOR_NEC_CHALLENGE_RESPONSE = 50, 78 } TRBType; 79 80 typedef enum TRBCCode { 81 CC_INVALID = 0, 82 CC_SUCCESS, 83 CC_DATA_BUFFER_ERROR, 84 CC_BABBLE_DETECTED, 85 CC_USB_TRANSACTION_ERROR, 86 CC_TRB_ERROR, 87 CC_STALL_ERROR, 88 CC_RESOURCE_ERROR, 89 CC_BANDWIDTH_ERROR, 90 CC_NO_SLOTS_ERROR, 91 CC_INVALID_STREAM_TYPE_ERROR, 92 CC_SLOT_NOT_ENABLED_ERROR, 93 CC_EP_NOT_ENABLED_ERROR, 94 CC_SHORT_PACKET, 95 CC_RING_UNDERRUN, 96 CC_RING_OVERRUN, 97 CC_VF_ER_FULL, 98 CC_PARAMETER_ERROR, 99 CC_BANDWIDTH_OVERRUN, 100 CC_CONTEXT_STATE_ERROR, 101 CC_NO_PING_RESPONSE_ERROR, 102 CC_EVENT_RING_FULL_ERROR, 103 CC_INCOMPATIBLE_DEVICE_ERROR, 104 CC_MISSED_SERVICE_ERROR, 105 CC_COMMAND_RING_STOPPED, 106 CC_COMMAND_ABORTED, 107 CC_STOPPED, 108 CC_STOPPED_LENGTH_INVALID, 109 CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29, 110 CC_ISOCH_BUFFER_OVERRUN = 31, 111 CC_EVENT_LOST_ERROR, 112 CC_UNDEFINED_ERROR, 113 CC_INVALID_STREAM_ID_ERROR, 114 CC_SECONDARY_BANDWIDTH_ERROR, 115 CC_SPLIT_TRANSACTION_ERROR 116 } TRBCCode; 117 118 typedef struct XHCIRing { 119 dma_addr_t dequeue; 120 bool ccs; 121 } XHCIRing; 122 123 typedef struct XHCIPort { 124 XHCIState *xhci; 125 uint32_t portsc; 126 uint32_t portnr; 127 USBPort *uport; 128 uint32_t speedmask; 129 char name[20]; 130 MemoryRegion mem; 131 } XHCIPort; 132 133 typedef struct XHCISlot { 134 bool enabled; 135 bool addressed; 136 uint16_t intr; 137 dma_addr_t ctx; 138 USBPort *uport; 139 XHCIEPContext *eps[31]; 140 } XHCISlot; 141 142 typedef struct XHCIEvent { 143 TRBType type; 144 TRBCCode ccode; 145 uint64_t ptr; 146 uint32_t length; 147 uint32_t flags; 148 uint8_t slotid; 149 uint8_t epid; 150 } XHCIEvent; 151 152 typedef struct XHCIInterrupter { 153 uint32_t iman; 154 uint32_t imod; 155 uint32_t erstsz; 156 uint32_t erstba_low; 157 uint32_t erstba_high; 158 uint32_t erdp_low; 159 uint32_t erdp_high; 160 161 bool msix_used, er_pcs; 162 163 dma_addr_t er_start; 164 uint32_t er_size; 165 unsigned int er_ep_idx; 166 167 /* kept for live migration compat only */ 168 bool er_full_unused; 169 XHCIEvent ev_buffer[EV_QUEUE]; 170 unsigned int ev_buffer_put; 171 unsigned int ev_buffer_get; 172 173 } XHCIInterrupter; 174 175 typedef struct XHCIState { 176 DeviceState parent; 177 178 USBBus bus; 179 MemoryRegion mem; 180 MemoryRegion *dma_mr; 181 AddressSpace *as; 182 MemoryRegion mem_cap; 183 MemoryRegion mem_oper; 184 MemoryRegion mem_runtime; 185 MemoryRegion mem_doorbell; 186 187 /* properties */ 188 uint32_t numports_2; 189 uint32_t numports_3; 190 uint32_t numintrs; 191 uint32_t numslots; 192 uint32_t flags; 193 uint32_t max_pstreams_mask; 194 void (*intr_update)(XHCIState *s, int n, bool enable); 195 bool (*intr_raise)(XHCIState *s, int n, bool level); 196 DeviceState *hostOpaque; 197 198 /* Operational Registers */ 199 uint32_t usbcmd; 200 uint32_t usbsts; 201 uint32_t dnctrl; 202 uint32_t crcr_low; 203 uint32_t crcr_high; 204 uint32_t dcbaap_low; 205 uint32_t dcbaap_high; 206 uint32_t config; 207 208 USBPort uports[MAX_CONST(XHCI_MAXPORTS_2, XHCI_MAXPORTS_3)]; 209 XHCIPort ports[XHCI_MAXPORTS]; 210 XHCISlot slots[XHCI_MAXSLOTS]; 211 uint32_t numports; 212 213 /* Runtime Registers */ 214 int64_t mfindex_start; 215 QEMUTimer *mfwrap_timer; 216 XHCIInterrupter intr[XHCI_MAXINTRS]; 217 218 XHCIRing cmd_ring; 219 220 bool nec_quirks; 221 } XHCIState; 222 223 extern const VMStateDescription vmstate_xhci; 224 bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit); 225 void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit); 226 #endif 227