1f1ae32a1SGerd Hoffmann /* 2f1ae32a1SGerd Hoffmann * USB xHCI controller emulation 3f1ae32a1SGerd Hoffmann * 4f1ae32a1SGerd Hoffmann * Copyright (c) 2011 Securiforest 5f1ae32a1SGerd Hoffmann * Date: 2011-05-11 ; Author: Hector Martin <hector@marcansoft.com> 6f1ae32a1SGerd Hoffmann * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 7f1ae32a1SGerd Hoffmann * 8f1ae32a1SGerd Hoffmann * This library is free software; you can redistribute it and/or 9f1ae32a1SGerd Hoffmann * modify it under the terms of the GNU Lesser General Public 10f1ae32a1SGerd Hoffmann * License as published by the Free Software Foundation; either 11f1ae32a1SGerd Hoffmann * version 2 of the License, or (at your option) any later version. 12f1ae32a1SGerd Hoffmann * 13f1ae32a1SGerd Hoffmann * This library is distributed in the hope that it will be useful, 14f1ae32a1SGerd Hoffmann * but WITHOUT ANY WARRANTY; without even the implied warranty of 15f1ae32a1SGerd Hoffmann * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16f1ae32a1SGerd Hoffmann * Lesser General Public License for more details. 17f1ae32a1SGerd Hoffmann * 18f1ae32a1SGerd Hoffmann * You should have received a copy of the GNU Lesser General Public 19f1ae32a1SGerd Hoffmann * License along with this library; if not, see <http://www.gnu.org/licenses/>. 20f1ae32a1SGerd Hoffmann */ 21f1ae32a1SGerd Hoffmann #include "hw/hw.h" 22f1ae32a1SGerd Hoffmann #include "qemu-timer.h" 23f1ae32a1SGerd Hoffmann #include "hw/usb.h" 24f1ae32a1SGerd Hoffmann #include "hw/pci.h" 25f1ae32a1SGerd Hoffmann #include "hw/msi.h" 262d754a10SGerd Hoffmann #include "trace.h" 27f1ae32a1SGerd Hoffmann 28f1ae32a1SGerd Hoffmann //#define DEBUG_XHCI 29f1ae32a1SGerd Hoffmann //#define DEBUG_DATA 30f1ae32a1SGerd Hoffmann 31f1ae32a1SGerd Hoffmann #ifdef DEBUG_XHCI 32f1ae32a1SGerd Hoffmann #define DPRINTF(...) fprintf(stderr, __VA_ARGS__) 33f1ae32a1SGerd Hoffmann #else 34f1ae32a1SGerd Hoffmann #define DPRINTF(...) do {} while (0) 35f1ae32a1SGerd Hoffmann #endif 36f1ae32a1SGerd Hoffmann #define FIXME() do { fprintf(stderr, "FIXME %s:%d\n", \ 37f1ae32a1SGerd Hoffmann __func__, __LINE__); abort(); } while (0) 38f1ae32a1SGerd Hoffmann 39f1ae32a1SGerd Hoffmann #define MAXSLOTS 8 40f1ae32a1SGerd Hoffmann #define MAXINTRS 1 41f1ae32a1SGerd Hoffmann 42f1ae32a1SGerd Hoffmann #define USB2_PORTS 4 43f1ae32a1SGerd Hoffmann #define USB3_PORTS 4 44f1ae32a1SGerd Hoffmann 45f1ae32a1SGerd Hoffmann #define MAXPORTS (USB2_PORTS+USB3_PORTS) 46f1ae32a1SGerd Hoffmann 47f1ae32a1SGerd Hoffmann #define TD_QUEUE 24 48f1ae32a1SGerd Hoffmann #define BG_XFERS 8 49f1ae32a1SGerd Hoffmann #define BG_PKTS 8 50f1ae32a1SGerd Hoffmann 51f1ae32a1SGerd Hoffmann /* Very pessimistic, let's hope it's enough for all cases */ 52f1ae32a1SGerd Hoffmann #define EV_QUEUE (((3*TD_QUEUE)+16)*MAXSLOTS) 53f1ae32a1SGerd Hoffmann /* Do not deliver ER Full events. NEC's driver does some things not bound 54f1ae32a1SGerd Hoffmann * to the specs when it gets them */ 55f1ae32a1SGerd Hoffmann #define ER_FULL_HACK 56f1ae32a1SGerd Hoffmann 57f1ae32a1SGerd Hoffmann #define LEN_CAP 0x40 58f1ae32a1SGerd Hoffmann #define OFF_OPER LEN_CAP 59f1ae32a1SGerd Hoffmann #define LEN_OPER (0x400 + 0x10 * MAXPORTS) 60f1ae32a1SGerd Hoffmann #define OFF_RUNTIME ((OFF_OPER + LEN_OPER + 0x20) & ~0x1f) 61f1ae32a1SGerd Hoffmann #define LEN_RUNTIME (0x20 + MAXINTRS * 0x20) 62f1ae32a1SGerd Hoffmann #define OFF_DOORBELL (OFF_RUNTIME + LEN_RUNTIME) 63f1ae32a1SGerd Hoffmann #define LEN_DOORBELL ((MAXSLOTS + 1) * 0x20) 64f1ae32a1SGerd Hoffmann 65f1ae32a1SGerd Hoffmann /* must be power of 2 */ 66f1ae32a1SGerd Hoffmann #define LEN_REGS 0x2000 67f1ae32a1SGerd Hoffmann 68f1ae32a1SGerd Hoffmann #if (OFF_DOORBELL + LEN_DOORBELL) > LEN_REGS 69f1ae32a1SGerd Hoffmann # error Increase LEN_REGS 70f1ae32a1SGerd Hoffmann #endif 71f1ae32a1SGerd Hoffmann 72f1ae32a1SGerd Hoffmann #if MAXINTRS > 1 73f1ae32a1SGerd Hoffmann # error TODO: only one interrupter supported 74f1ae32a1SGerd Hoffmann #endif 75f1ae32a1SGerd Hoffmann 76f1ae32a1SGerd Hoffmann /* bit definitions */ 77f1ae32a1SGerd Hoffmann #define USBCMD_RS (1<<0) 78f1ae32a1SGerd Hoffmann #define USBCMD_HCRST (1<<1) 79f1ae32a1SGerd Hoffmann #define USBCMD_INTE (1<<2) 80f1ae32a1SGerd Hoffmann #define USBCMD_HSEE (1<<3) 81f1ae32a1SGerd Hoffmann #define USBCMD_LHCRST (1<<7) 82f1ae32a1SGerd Hoffmann #define USBCMD_CSS (1<<8) 83f1ae32a1SGerd Hoffmann #define USBCMD_CRS (1<<9) 84f1ae32a1SGerd Hoffmann #define USBCMD_EWE (1<<10) 85f1ae32a1SGerd Hoffmann #define USBCMD_EU3S (1<<11) 86f1ae32a1SGerd Hoffmann 87f1ae32a1SGerd Hoffmann #define USBSTS_HCH (1<<0) 88f1ae32a1SGerd Hoffmann #define USBSTS_HSE (1<<2) 89f1ae32a1SGerd Hoffmann #define USBSTS_EINT (1<<3) 90f1ae32a1SGerd Hoffmann #define USBSTS_PCD (1<<4) 91f1ae32a1SGerd Hoffmann #define USBSTS_SSS (1<<8) 92f1ae32a1SGerd Hoffmann #define USBSTS_RSS (1<<9) 93f1ae32a1SGerd Hoffmann #define USBSTS_SRE (1<<10) 94f1ae32a1SGerd Hoffmann #define USBSTS_CNR (1<<11) 95f1ae32a1SGerd Hoffmann #define USBSTS_HCE (1<<12) 96f1ae32a1SGerd Hoffmann 97f1ae32a1SGerd Hoffmann 98f1ae32a1SGerd Hoffmann #define PORTSC_CCS (1<<0) 99f1ae32a1SGerd Hoffmann #define PORTSC_PED (1<<1) 100f1ae32a1SGerd Hoffmann #define PORTSC_OCA (1<<3) 101f1ae32a1SGerd Hoffmann #define PORTSC_PR (1<<4) 102f1ae32a1SGerd Hoffmann #define PORTSC_PLS_SHIFT 5 103f1ae32a1SGerd Hoffmann #define PORTSC_PLS_MASK 0xf 104f1ae32a1SGerd Hoffmann #define PORTSC_PP (1<<9) 105f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_SHIFT 10 106f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_MASK 0xf 107f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_FULL (1<<10) 108f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_LOW (2<<10) 109f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_HIGH (3<<10) 110f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_SUPER (4<<10) 111f1ae32a1SGerd Hoffmann #define PORTSC_PIC_SHIFT 14 112f1ae32a1SGerd Hoffmann #define PORTSC_PIC_MASK 0x3 113f1ae32a1SGerd Hoffmann #define PORTSC_LWS (1<<16) 114f1ae32a1SGerd Hoffmann #define PORTSC_CSC (1<<17) 115f1ae32a1SGerd Hoffmann #define PORTSC_PEC (1<<18) 116f1ae32a1SGerd Hoffmann #define PORTSC_WRC (1<<19) 117f1ae32a1SGerd Hoffmann #define PORTSC_OCC (1<<20) 118f1ae32a1SGerd Hoffmann #define PORTSC_PRC (1<<21) 119f1ae32a1SGerd Hoffmann #define PORTSC_PLC (1<<22) 120f1ae32a1SGerd Hoffmann #define PORTSC_CEC (1<<23) 121f1ae32a1SGerd Hoffmann #define PORTSC_CAS (1<<24) 122f1ae32a1SGerd Hoffmann #define PORTSC_WCE (1<<25) 123f1ae32a1SGerd Hoffmann #define PORTSC_WDE (1<<26) 124f1ae32a1SGerd Hoffmann #define PORTSC_WOE (1<<27) 125f1ae32a1SGerd Hoffmann #define PORTSC_DR (1<<30) 126f1ae32a1SGerd Hoffmann #define PORTSC_WPR (1<<31) 127f1ae32a1SGerd Hoffmann 128f1ae32a1SGerd Hoffmann #define CRCR_RCS (1<<0) 129f1ae32a1SGerd Hoffmann #define CRCR_CS (1<<1) 130f1ae32a1SGerd Hoffmann #define CRCR_CA (1<<2) 131f1ae32a1SGerd Hoffmann #define CRCR_CRR (1<<3) 132f1ae32a1SGerd Hoffmann 133f1ae32a1SGerd Hoffmann #define IMAN_IP (1<<0) 134f1ae32a1SGerd Hoffmann #define IMAN_IE (1<<1) 135f1ae32a1SGerd Hoffmann 136f1ae32a1SGerd Hoffmann #define ERDP_EHB (1<<3) 137f1ae32a1SGerd Hoffmann 138f1ae32a1SGerd Hoffmann #define TRB_SIZE 16 139f1ae32a1SGerd Hoffmann typedef struct XHCITRB { 140f1ae32a1SGerd Hoffmann uint64_t parameter; 141f1ae32a1SGerd Hoffmann uint32_t status; 142f1ae32a1SGerd Hoffmann uint32_t control; 14359a70ccdSDavid Gibson dma_addr_t addr; 144f1ae32a1SGerd Hoffmann bool ccs; 145f1ae32a1SGerd Hoffmann } XHCITRB; 146f1ae32a1SGerd Hoffmann 147f1ae32a1SGerd Hoffmann 148f1ae32a1SGerd Hoffmann typedef enum TRBType { 149f1ae32a1SGerd Hoffmann TRB_RESERVED = 0, 150f1ae32a1SGerd Hoffmann TR_NORMAL, 151f1ae32a1SGerd Hoffmann TR_SETUP, 152f1ae32a1SGerd Hoffmann TR_DATA, 153f1ae32a1SGerd Hoffmann TR_STATUS, 154f1ae32a1SGerd Hoffmann TR_ISOCH, 155f1ae32a1SGerd Hoffmann TR_LINK, 156f1ae32a1SGerd Hoffmann TR_EVDATA, 157f1ae32a1SGerd Hoffmann TR_NOOP, 158f1ae32a1SGerd Hoffmann CR_ENABLE_SLOT, 159f1ae32a1SGerd Hoffmann CR_DISABLE_SLOT, 160f1ae32a1SGerd Hoffmann CR_ADDRESS_DEVICE, 161f1ae32a1SGerd Hoffmann CR_CONFIGURE_ENDPOINT, 162f1ae32a1SGerd Hoffmann CR_EVALUATE_CONTEXT, 163f1ae32a1SGerd Hoffmann CR_RESET_ENDPOINT, 164f1ae32a1SGerd Hoffmann CR_STOP_ENDPOINT, 165f1ae32a1SGerd Hoffmann CR_SET_TR_DEQUEUE, 166f1ae32a1SGerd Hoffmann CR_RESET_DEVICE, 167f1ae32a1SGerd Hoffmann CR_FORCE_EVENT, 168f1ae32a1SGerd Hoffmann CR_NEGOTIATE_BW, 169f1ae32a1SGerd Hoffmann CR_SET_LATENCY_TOLERANCE, 170f1ae32a1SGerd Hoffmann CR_GET_PORT_BANDWIDTH, 171f1ae32a1SGerd Hoffmann CR_FORCE_HEADER, 172f1ae32a1SGerd Hoffmann CR_NOOP, 173f1ae32a1SGerd Hoffmann ER_TRANSFER = 32, 174f1ae32a1SGerd Hoffmann ER_COMMAND_COMPLETE, 175f1ae32a1SGerd Hoffmann ER_PORT_STATUS_CHANGE, 176f1ae32a1SGerd Hoffmann ER_BANDWIDTH_REQUEST, 177f1ae32a1SGerd Hoffmann ER_DOORBELL, 178f1ae32a1SGerd Hoffmann ER_HOST_CONTROLLER, 179f1ae32a1SGerd Hoffmann ER_DEVICE_NOTIFICATION, 180f1ae32a1SGerd Hoffmann ER_MFINDEX_WRAP, 181f1ae32a1SGerd Hoffmann /* vendor specific bits */ 182f1ae32a1SGerd Hoffmann CR_VENDOR_VIA_CHALLENGE_RESPONSE = 48, 183f1ae32a1SGerd Hoffmann CR_VENDOR_NEC_FIRMWARE_REVISION = 49, 184f1ae32a1SGerd Hoffmann CR_VENDOR_NEC_CHALLENGE_RESPONSE = 50, 185f1ae32a1SGerd Hoffmann } TRBType; 186f1ae32a1SGerd Hoffmann 187f1ae32a1SGerd Hoffmann #define CR_LINK TR_LINK 188f1ae32a1SGerd Hoffmann 189f1ae32a1SGerd Hoffmann typedef enum TRBCCode { 190f1ae32a1SGerd Hoffmann CC_INVALID = 0, 191f1ae32a1SGerd Hoffmann CC_SUCCESS, 192f1ae32a1SGerd Hoffmann CC_DATA_BUFFER_ERROR, 193f1ae32a1SGerd Hoffmann CC_BABBLE_DETECTED, 194f1ae32a1SGerd Hoffmann CC_USB_TRANSACTION_ERROR, 195f1ae32a1SGerd Hoffmann CC_TRB_ERROR, 196f1ae32a1SGerd Hoffmann CC_STALL_ERROR, 197f1ae32a1SGerd Hoffmann CC_RESOURCE_ERROR, 198f1ae32a1SGerd Hoffmann CC_BANDWIDTH_ERROR, 199f1ae32a1SGerd Hoffmann CC_NO_SLOTS_ERROR, 200f1ae32a1SGerd Hoffmann CC_INVALID_STREAM_TYPE_ERROR, 201f1ae32a1SGerd Hoffmann CC_SLOT_NOT_ENABLED_ERROR, 202f1ae32a1SGerd Hoffmann CC_EP_NOT_ENABLED_ERROR, 203f1ae32a1SGerd Hoffmann CC_SHORT_PACKET, 204f1ae32a1SGerd Hoffmann CC_RING_UNDERRUN, 205f1ae32a1SGerd Hoffmann CC_RING_OVERRUN, 206f1ae32a1SGerd Hoffmann CC_VF_ER_FULL, 207f1ae32a1SGerd Hoffmann CC_PARAMETER_ERROR, 208f1ae32a1SGerd Hoffmann CC_BANDWIDTH_OVERRUN, 209f1ae32a1SGerd Hoffmann CC_CONTEXT_STATE_ERROR, 210f1ae32a1SGerd Hoffmann CC_NO_PING_RESPONSE_ERROR, 211f1ae32a1SGerd Hoffmann CC_EVENT_RING_FULL_ERROR, 212f1ae32a1SGerd Hoffmann CC_INCOMPATIBLE_DEVICE_ERROR, 213f1ae32a1SGerd Hoffmann CC_MISSED_SERVICE_ERROR, 214f1ae32a1SGerd Hoffmann CC_COMMAND_RING_STOPPED, 215f1ae32a1SGerd Hoffmann CC_COMMAND_ABORTED, 216f1ae32a1SGerd Hoffmann CC_STOPPED, 217f1ae32a1SGerd Hoffmann CC_STOPPED_LENGTH_INVALID, 218f1ae32a1SGerd Hoffmann CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29, 219f1ae32a1SGerd Hoffmann CC_ISOCH_BUFFER_OVERRUN = 31, 220f1ae32a1SGerd Hoffmann CC_EVENT_LOST_ERROR, 221f1ae32a1SGerd Hoffmann CC_UNDEFINED_ERROR, 222f1ae32a1SGerd Hoffmann CC_INVALID_STREAM_ID_ERROR, 223f1ae32a1SGerd Hoffmann CC_SECONDARY_BANDWIDTH_ERROR, 224f1ae32a1SGerd Hoffmann CC_SPLIT_TRANSACTION_ERROR 225f1ae32a1SGerd Hoffmann } TRBCCode; 226f1ae32a1SGerd Hoffmann 227f1ae32a1SGerd Hoffmann #define TRB_C (1<<0) 228f1ae32a1SGerd Hoffmann #define TRB_TYPE_SHIFT 10 229f1ae32a1SGerd Hoffmann #define TRB_TYPE_MASK 0x3f 230f1ae32a1SGerd Hoffmann #define TRB_TYPE(t) (((t).control >> TRB_TYPE_SHIFT) & TRB_TYPE_MASK) 231f1ae32a1SGerd Hoffmann 232f1ae32a1SGerd Hoffmann #define TRB_EV_ED (1<<2) 233f1ae32a1SGerd Hoffmann 234f1ae32a1SGerd Hoffmann #define TRB_TR_ENT (1<<1) 235f1ae32a1SGerd Hoffmann #define TRB_TR_ISP (1<<2) 236f1ae32a1SGerd Hoffmann #define TRB_TR_NS (1<<3) 237f1ae32a1SGerd Hoffmann #define TRB_TR_CH (1<<4) 238f1ae32a1SGerd Hoffmann #define TRB_TR_IOC (1<<5) 239f1ae32a1SGerd Hoffmann #define TRB_TR_IDT (1<<6) 240f1ae32a1SGerd Hoffmann #define TRB_TR_TBC_SHIFT 7 241f1ae32a1SGerd Hoffmann #define TRB_TR_TBC_MASK 0x3 242f1ae32a1SGerd Hoffmann #define TRB_TR_BEI (1<<9) 243f1ae32a1SGerd Hoffmann #define TRB_TR_TLBPC_SHIFT 16 244f1ae32a1SGerd Hoffmann #define TRB_TR_TLBPC_MASK 0xf 245f1ae32a1SGerd Hoffmann #define TRB_TR_FRAMEID_SHIFT 20 246f1ae32a1SGerd Hoffmann #define TRB_TR_FRAMEID_MASK 0x7ff 247f1ae32a1SGerd Hoffmann #define TRB_TR_SIA (1<<31) 248f1ae32a1SGerd Hoffmann 249f1ae32a1SGerd Hoffmann #define TRB_TR_DIR (1<<16) 250f1ae32a1SGerd Hoffmann 251f1ae32a1SGerd Hoffmann #define TRB_CR_SLOTID_SHIFT 24 252f1ae32a1SGerd Hoffmann #define TRB_CR_SLOTID_MASK 0xff 253f1ae32a1SGerd Hoffmann #define TRB_CR_EPID_SHIFT 16 254f1ae32a1SGerd Hoffmann #define TRB_CR_EPID_MASK 0x1f 255f1ae32a1SGerd Hoffmann 256f1ae32a1SGerd Hoffmann #define TRB_CR_BSR (1<<9) 257f1ae32a1SGerd Hoffmann #define TRB_CR_DC (1<<9) 258f1ae32a1SGerd Hoffmann 259f1ae32a1SGerd Hoffmann #define TRB_LK_TC (1<<1) 260f1ae32a1SGerd Hoffmann 261f1ae32a1SGerd Hoffmann #define EP_TYPE_MASK 0x7 262f1ae32a1SGerd Hoffmann #define EP_TYPE_SHIFT 3 263f1ae32a1SGerd Hoffmann 264f1ae32a1SGerd Hoffmann #define EP_STATE_MASK 0x7 265f1ae32a1SGerd Hoffmann #define EP_DISABLED (0<<0) 266f1ae32a1SGerd Hoffmann #define EP_RUNNING (1<<0) 267f1ae32a1SGerd Hoffmann #define EP_HALTED (2<<0) 268f1ae32a1SGerd Hoffmann #define EP_STOPPED (3<<0) 269f1ae32a1SGerd Hoffmann #define EP_ERROR (4<<0) 270f1ae32a1SGerd Hoffmann 271f1ae32a1SGerd Hoffmann #define SLOT_STATE_MASK 0x1f 272f1ae32a1SGerd Hoffmann #define SLOT_STATE_SHIFT 27 273f1ae32a1SGerd Hoffmann #define SLOT_STATE(s) (((s)>>SLOT_STATE_SHIFT)&SLOT_STATE_MASK) 274f1ae32a1SGerd Hoffmann #define SLOT_ENABLED 0 275f1ae32a1SGerd Hoffmann #define SLOT_DEFAULT 1 276f1ae32a1SGerd Hoffmann #define SLOT_ADDRESSED 2 277f1ae32a1SGerd Hoffmann #define SLOT_CONFIGURED 3 278f1ae32a1SGerd Hoffmann 279f1ae32a1SGerd Hoffmann #define SLOT_CONTEXT_ENTRIES_MASK 0x1f 280f1ae32a1SGerd Hoffmann #define SLOT_CONTEXT_ENTRIES_SHIFT 27 281f1ae32a1SGerd Hoffmann 282f1ae32a1SGerd Hoffmann typedef enum EPType { 283f1ae32a1SGerd Hoffmann ET_INVALID = 0, 284f1ae32a1SGerd Hoffmann ET_ISO_OUT, 285f1ae32a1SGerd Hoffmann ET_BULK_OUT, 286f1ae32a1SGerd Hoffmann ET_INTR_OUT, 287f1ae32a1SGerd Hoffmann ET_CONTROL, 288f1ae32a1SGerd Hoffmann ET_ISO_IN, 289f1ae32a1SGerd Hoffmann ET_BULK_IN, 290f1ae32a1SGerd Hoffmann ET_INTR_IN, 291f1ae32a1SGerd Hoffmann } EPType; 292f1ae32a1SGerd Hoffmann 293f1ae32a1SGerd Hoffmann typedef struct XHCIRing { 29459a70ccdSDavid Gibson dma_addr_t base; 29559a70ccdSDavid Gibson dma_addr_t dequeue; 296f1ae32a1SGerd Hoffmann bool ccs; 297f1ae32a1SGerd Hoffmann } XHCIRing; 298f1ae32a1SGerd Hoffmann 299f1ae32a1SGerd Hoffmann typedef struct XHCIPort { 300f1ae32a1SGerd Hoffmann USBPort port; 301f1ae32a1SGerd Hoffmann uint32_t portsc; 302f1ae32a1SGerd Hoffmann } XHCIPort; 303f1ae32a1SGerd Hoffmann 304f1ae32a1SGerd Hoffmann struct XHCIState; 305f1ae32a1SGerd Hoffmann typedef struct XHCIState XHCIState; 306f1ae32a1SGerd Hoffmann 307f1ae32a1SGerd Hoffmann typedef struct XHCITransfer { 308f1ae32a1SGerd Hoffmann XHCIState *xhci; 309f1ae32a1SGerd Hoffmann USBPacket packet; 310f1ae32a1SGerd Hoffmann bool running_async; 311f1ae32a1SGerd Hoffmann bool running_retry; 312f1ae32a1SGerd Hoffmann bool cancelled; 313f1ae32a1SGerd Hoffmann bool complete; 314f1ae32a1SGerd Hoffmann bool backgrounded; 315f1ae32a1SGerd Hoffmann unsigned int iso_pkts; 316f1ae32a1SGerd Hoffmann unsigned int slotid; 317f1ae32a1SGerd Hoffmann unsigned int epid; 318f1ae32a1SGerd Hoffmann bool in_xfer; 319f1ae32a1SGerd Hoffmann bool iso_xfer; 320f1ae32a1SGerd Hoffmann bool bg_xfer; 321f1ae32a1SGerd Hoffmann 322f1ae32a1SGerd Hoffmann unsigned int trb_count; 323f1ae32a1SGerd Hoffmann unsigned int trb_alloced; 324f1ae32a1SGerd Hoffmann XHCITRB *trbs; 325f1ae32a1SGerd Hoffmann 326f1ae32a1SGerd Hoffmann unsigned int data_length; 327f1ae32a1SGerd Hoffmann unsigned int data_alloced; 328f1ae32a1SGerd Hoffmann uint8_t *data; 329f1ae32a1SGerd Hoffmann 330f1ae32a1SGerd Hoffmann TRBCCode status; 331f1ae32a1SGerd Hoffmann 332f1ae32a1SGerd Hoffmann unsigned int pkts; 333f1ae32a1SGerd Hoffmann unsigned int pktsize; 334f1ae32a1SGerd Hoffmann unsigned int cur_pkt; 335f1ae32a1SGerd Hoffmann } XHCITransfer; 336f1ae32a1SGerd Hoffmann 337f1ae32a1SGerd Hoffmann typedef struct XHCIEPContext { 338f1ae32a1SGerd Hoffmann XHCIRing ring; 339f1ae32a1SGerd Hoffmann unsigned int next_xfer; 340f1ae32a1SGerd Hoffmann unsigned int comp_xfer; 341f1ae32a1SGerd Hoffmann XHCITransfer transfers[TD_QUEUE]; 342f1ae32a1SGerd Hoffmann XHCITransfer *retry; 343f1ae32a1SGerd Hoffmann bool bg_running; 344f1ae32a1SGerd Hoffmann bool bg_updating; 345f1ae32a1SGerd Hoffmann unsigned int next_bg; 346f1ae32a1SGerd Hoffmann XHCITransfer bg_transfers[BG_XFERS]; 347f1ae32a1SGerd Hoffmann EPType type; 34859a70ccdSDavid Gibson dma_addr_t pctx; 349f1ae32a1SGerd Hoffmann unsigned int max_psize; 350f1ae32a1SGerd Hoffmann bool has_bg; 351f1ae32a1SGerd Hoffmann uint32_t state; 352f1ae32a1SGerd Hoffmann } XHCIEPContext; 353f1ae32a1SGerd Hoffmann 354f1ae32a1SGerd Hoffmann typedef struct XHCISlot { 355f1ae32a1SGerd Hoffmann bool enabled; 35659a70ccdSDavid Gibson dma_addr_t ctx; 357f1ae32a1SGerd Hoffmann unsigned int port; 358f1ae32a1SGerd Hoffmann unsigned int devaddr; 359f1ae32a1SGerd Hoffmann XHCIEPContext * eps[31]; 360f1ae32a1SGerd Hoffmann } XHCISlot; 361f1ae32a1SGerd Hoffmann 362f1ae32a1SGerd Hoffmann typedef struct XHCIEvent { 363f1ae32a1SGerd Hoffmann TRBType type; 364f1ae32a1SGerd Hoffmann TRBCCode ccode; 365f1ae32a1SGerd Hoffmann uint64_t ptr; 366f1ae32a1SGerd Hoffmann uint32_t length; 367f1ae32a1SGerd Hoffmann uint32_t flags; 368f1ae32a1SGerd Hoffmann uint8_t slotid; 369f1ae32a1SGerd Hoffmann uint8_t epid; 370f1ae32a1SGerd Hoffmann } XHCIEvent; 371f1ae32a1SGerd Hoffmann 372f1ae32a1SGerd Hoffmann struct XHCIState { 373f1ae32a1SGerd Hoffmann PCIDevice pci_dev; 374f1ae32a1SGerd Hoffmann USBBus bus; 375f1ae32a1SGerd Hoffmann qemu_irq irq; 376f1ae32a1SGerd Hoffmann MemoryRegion mem; 377f1ae32a1SGerd Hoffmann const char *name; 378f1ae32a1SGerd Hoffmann uint32_t msi; 379f1ae32a1SGerd Hoffmann unsigned int devaddr; 380f1ae32a1SGerd Hoffmann 381f1ae32a1SGerd Hoffmann /* Operational Registers */ 382f1ae32a1SGerd Hoffmann uint32_t usbcmd; 383f1ae32a1SGerd Hoffmann uint32_t usbsts; 384f1ae32a1SGerd Hoffmann uint32_t dnctrl; 385f1ae32a1SGerd Hoffmann uint32_t crcr_low; 386f1ae32a1SGerd Hoffmann uint32_t crcr_high; 387f1ae32a1SGerd Hoffmann uint32_t dcbaap_low; 388f1ae32a1SGerd Hoffmann uint32_t dcbaap_high; 389f1ae32a1SGerd Hoffmann uint32_t config; 390f1ae32a1SGerd Hoffmann 391f1ae32a1SGerd Hoffmann XHCIPort ports[MAXPORTS]; 392f1ae32a1SGerd Hoffmann XHCISlot slots[MAXSLOTS]; 393f1ae32a1SGerd Hoffmann 394f1ae32a1SGerd Hoffmann /* Runtime Registers */ 395f1ae32a1SGerd Hoffmann uint32_t mfindex; 396f1ae32a1SGerd Hoffmann /* note: we only support one interrupter */ 397f1ae32a1SGerd Hoffmann uint32_t iman; 398f1ae32a1SGerd Hoffmann uint32_t imod; 399f1ae32a1SGerd Hoffmann uint32_t erstsz; 400f1ae32a1SGerd Hoffmann uint32_t erstba_low; 401f1ae32a1SGerd Hoffmann uint32_t erstba_high; 402f1ae32a1SGerd Hoffmann uint32_t erdp_low; 403f1ae32a1SGerd Hoffmann uint32_t erdp_high; 404f1ae32a1SGerd Hoffmann 40559a70ccdSDavid Gibson dma_addr_t er_start; 406f1ae32a1SGerd Hoffmann uint32_t er_size; 407f1ae32a1SGerd Hoffmann bool er_pcs; 408f1ae32a1SGerd Hoffmann unsigned int er_ep_idx; 409f1ae32a1SGerd Hoffmann bool er_full; 410f1ae32a1SGerd Hoffmann 411f1ae32a1SGerd Hoffmann XHCIEvent ev_buffer[EV_QUEUE]; 412f1ae32a1SGerd Hoffmann unsigned int ev_buffer_put; 413f1ae32a1SGerd Hoffmann unsigned int ev_buffer_get; 414f1ae32a1SGerd Hoffmann 415f1ae32a1SGerd Hoffmann XHCIRing cmd_ring; 416f1ae32a1SGerd Hoffmann }; 417f1ae32a1SGerd Hoffmann 418f1ae32a1SGerd Hoffmann typedef struct XHCIEvRingSeg { 419f1ae32a1SGerd Hoffmann uint32_t addr_low; 420f1ae32a1SGerd Hoffmann uint32_t addr_high; 421f1ae32a1SGerd Hoffmann uint32_t size; 422f1ae32a1SGerd Hoffmann uint32_t rsvd; 423f1ae32a1SGerd Hoffmann } XHCIEvRingSeg; 424f1ae32a1SGerd Hoffmann 425f1ae32a1SGerd Hoffmann #ifdef DEBUG_XHCI 426f1ae32a1SGerd Hoffmann static const char *TRBType_names[] = { 427f1ae32a1SGerd Hoffmann [TRB_RESERVED] = "TRB_RESERVED", 428f1ae32a1SGerd Hoffmann [TR_NORMAL] = "TR_NORMAL", 429f1ae32a1SGerd Hoffmann [TR_SETUP] = "TR_SETUP", 430f1ae32a1SGerd Hoffmann [TR_DATA] = "TR_DATA", 431f1ae32a1SGerd Hoffmann [TR_STATUS] = "TR_STATUS", 432f1ae32a1SGerd Hoffmann [TR_ISOCH] = "TR_ISOCH", 433f1ae32a1SGerd Hoffmann [TR_LINK] = "TR_LINK", 434f1ae32a1SGerd Hoffmann [TR_EVDATA] = "TR_EVDATA", 435f1ae32a1SGerd Hoffmann [TR_NOOP] = "TR_NOOP", 436f1ae32a1SGerd Hoffmann [CR_ENABLE_SLOT] = "CR_ENABLE_SLOT", 437f1ae32a1SGerd Hoffmann [CR_DISABLE_SLOT] = "CR_DISABLE_SLOT", 438f1ae32a1SGerd Hoffmann [CR_ADDRESS_DEVICE] = "CR_ADDRESS_DEVICE", 439f1ae32a1SGerd Hoffmann [CR_CONFIGURE_ENDPOINT] = "CR_CONFIGURE_ENDPOINT", 440f1ae32a1SGerd Hoffmann [CR_EVALUATE_CONTEXT] = "CR_EVALUATE_CONTEXT", 441f1ae32a1SGerd Hoffmann [CR_RESET_ENDPOINT] = "CR_RESET_ENDPOINT", 442f1ae32a1SGerd Hoffmann [CR_STOP_ENDPOINT] = "CR_STOP_ENDPOINT", 443f1ae32a1SGerd Hoffmann [CR_SET_TR_DEQUEUE] = "CR_SET_TR_DEQUEUE", 444f1ae32a1SGerd Hoffmann [CR_RESET_DEVICE] = "CR_RESET_DEVICE", 445f1ae32a1SGerd Hoffmann [CR_FORCE_EVENT] = "CR_FORCE_EVENT", 446f1ae32a1SGerd Hoffmann [CR_NEGOTIATE_BW] = "CR_NEGOTIATE_BW", 447f1ae32a1SGerd Hoffmann [CR_SET_LATENCY_TOLERANCE] = "CR_SET_LATENCY_TOLERANCE", 448f1ae32a1SGerd Hoffmann [CR_GET_PORT_BANDWIDTH] = "CR_GET_PORT_BANDWIDTH", 449f1ae32a1SGerd Hoffmann [CR_FORCE_HEADER] = "CR_FORCE_HEADER", 450f1ae32a1SGerd Hoffmann [CR_NOOP] = "CR_NOOP", 451f1ae32a1SGerd Hoffmann [ER_TRANSFER] = "ER_TRANSFER", 452f1ae32a1SGerd Hoffmann [ER_COMMAND_COMPLETE] = "ER_COMMAND_COMPLETE", 453f1ae32a1SGerd Hoffmann [ER_PORT_STATUS_CHANGE] = "ER_PORT_STATUS_CHANGE", 454f1ae32a1SGerd Hoffmann [ER_BANDWIDTH_REQUEST] = "ER_BANDWIDTH_REQUEST", 455f1ae32a1SGerd Hoffmann [ER_DOORBELL] = "ER_DOORBELL", 456f1ae32a1SGerd Hoffmann [ER_HOST_CONTROLLER] = "ER_HOST_CONTROLLER", 457f1ae32a1SGerd Hoffmann [ER_DEVICE_NOTIFICATION] = "ER_DEVICE_NOTIFICATION", 458f1ae32a1SGerd Hoffmann [ER_MFINDEX_WRAP] = "ER_MFINDEX_WRAP", 459f1ae32a1SGerd Hoffmann [CR_VENDOR_VIA_CHALLENGE_RESPONSE] = "CR_VENDOR_VIA_CHALLENGE_RESPONSE", 460f1ae32a1SGerd Hoffmann [CR_VENDOR_NEC_FIRMWARE_REVISION] = "CR_VENDOR_NEC_FIRMWARE_REVISION", 461f1ae32a1SGerd Hoffmann [CR_VENDOR_NEC_CHALLENGE_RESPONSE] = "CR_VENDOR_NEC_CHALLENGE_RESPONSE", 462f1ae32a1SGerd Hoffmann }; 463f1ae32a1SGerd Hoffmann 464f1ae32a1SGerd Hoffmann static const char *lookup_name(uint32_t index, const char **list, uint32_t llen) 465f1ae32a1SGerd Hoffmann { 466f1ae32a1SGerd Hoffmann if (index >= llen || list[index] == NULL) { 467f1ae32a1SGerd Hoffmann return "???"; 468f1ae32a1SGerd Hoffmann } 469f1ae32a1SGerd Hoffmann return list[index]; 470f1ae32a1SGerd Hoffmann } 471f1ae32a1SGerd Hoffmann 472f1ae32a1SGerd Hoffmann static const char *trb_name(XHCITRB *trb) 473f1ae32a1SGerd Hoffmann { 474f1ae32a1SGerd Hoffmann return lookup_name(TRB_TYPE(*trb), TRBType_names, 475f1ae32a1SGerd Hoffmann ARRAY_SIZE(TRBType_names)); 476f1ae32a1SGerd Hoffmann } 477f1ae32a1SGerd Hoffmann #endif 478f1ae32a1SGerd Hoffmann 479f1ae32a1SGerd Hoffmann static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, 480f1ae32a1SGerd Hoffmann unsigned int epid); 481f1ae32a1SGerd Hoffmann 48259a70ccdSDavid Gibson static inline dma_addr_t xhci_addr64(uint32_t low, uint32_t high) 483f1ae32a1SGerd Hoffmann { 48459a70ccdSDavid Gibson if (sizeof(dma_addr_t) == 4) { 485f1ae32a1SGerd Hoffmann return low; 48659a70ccdSDavid Gibson } else { 48759a70ccdSDavid Gibson return low | (((dma_addr_t)high << 16) << 16); 48859a70ccdSDavid Gibson } 489f1ae32a1SGerd Hoffmann } 490f1ae32a1SGerd Hoffmann 49159a70ccdSDavid Gibson static inline dma_addr_t xhci_mask64(uint64_t addr) 492f1ae32a1SGerd Hoffmann { 49359a70ccdSDavid Gibson if (sizeof(dma_addr_t) == 4) { 494f1ae32a1SGerd Hoffmann return addr & 0xffffffff; 49559a70ccdSDavid Gibson } else { 49659a70ccdSDavid Gibson return addr; 49759a70ccdSDavid Gibson } 498f1ae32a1SGerd Hoffmann } 499f1ae32a1SGerd Hoffmann 500f1ae32a1SGerd Hoffmann static void xhci_irq_update(XHCIState *xhci) 501f1ae32a1SGerd Hoffmann { 502f1ae32a1SGerd Hoffmann int level = 0; 503f1ae32a1SGerd Hoffmann 504f1ae32a1SGerd Hoffmann if (xhci->iman & IMAN_IP && xhci->iman & IMAN_IE && 505215bff17SLai Jiangshan xhci->usbcmd & USBCMD_INTE) { 506f1ae32a1SGerd Hoffmann level = 1; 507f1ae32a1SGerd Hoffmann } 508f1ae32a1SGerd Hoffmann 509f1ae32a1SGerd Hoffmann DPRINTF("xhci_irq_update(): %d\n", level); 510f1ae32a1SGerd Hoffmann 511f1ae32a1SGerd Hoffmann if (xhci->msi && msi_enabled(&xhci->pci_dev)) { 512f1ae32a1SGerd Hoffmann if (level) { 513f1ae32a1SGerd Hoffmann DPRINTF("xhci_irq_update(): MSI signal\n"); 514f1ae32a1SGerd Hoffmann msi_notify(&xhci->pci_dev, 0); 515f1ae32a1SGerd Hoffmann } 516f1ae32a1SGerd Hoffmann } else { 517f1ae32a1SGerd Hoffmann qemu_set_irq(xhci->irq, level); 518f1ae32a1SGerd Hoffmann } 519f1ae32a1SGerd Hoffmann } 520f1ae32a1SGerd Hoffmann 521f1ae32a1SGerd Hoffmann static inline int xhci_running(XHCIState *xhci) 522f1ae32a1SGerd Hoffmann { 523f1ae32a1SGerd Hoffmann return !(xhci->usbsts & USBSTS_HCH) && !xhci->er_full; 524f1ae32a1SGerd Hoffmann } 525f1ae32a1SGerd Hoffmann 526f1ae32a1SGerd Hoffmann static void xhci_die(XHCIState *xhci) 527f1ae32a1SGerd Hoffmann { 528f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_HCE; 529f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: asserted controller error\n"); 530f1ae32a1SGerd Hoffmann } 531f1ae32a1SGerd Hoffmann 532f1ae32a1SGerd Hoffmann static void xhci_write_event(XHCIState *xhci, XHCIEvent *event) 533f1ae32a1SGerd Hoffmann { 534f1ae32a1SGerd Hoffmann XHCITRB ev_trb; 53559a70ccdSDavid Gibson dma_addr_t addr; 536f1ae32a1SGerd Hoffmann 537f1ae32a1SGerd Hoffmann ev_trb.parameter = cpu_to_le64(event->ptr); 538f1ae32a1SGerd Hoffmann ev_trb.status = cpu_to_le32(event->length | (event->ccode << 24)); 539f1ae32a1SGerd Hoffmann ev_trb.control = (event->slotid << 24) | (event->epid << 16) | 540f1ae32a1SGerd Hoffmann event->flags | (event->type << TRB_TYPE_SHIFT); 541f1ae32a1SGerd Hoffmann if (xhci->er_pcs) { 542f1ae32a1SGerd Hoffmann ev_trb.control |= TRB_C; 543f1ae32a1SGerd Hoffmann } 544f1ae32a1SGerd Hoffmann ev_trb.control = cpu_to_le32(ev_trb.control); 545f1ae32a1SGerd Hoffmann 546f1ae32a1SGerd Hoffmann DPRINTF("xhci_write_event(): [%d] %016"PRIx64" %08x %08x %s\n", 547f1ae32a1SGerd Hoffmann xhci->er_ep_idx, ev_trb.parameter, ev_trb.status, ev_trb.control, 548f1ae32a1SGerd Hoffmann trb_name(&ev_trb)); 549f1ae32a1SGerd Hoffmann 550f1ae32a1SGerd Hoffmann addr = xhci->er_start + TRB_SIZE*xhci->er_ep_idx; 55159a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, addr, &ev_trb, TRB_SIZE); 552f1ae32a1SGerd Hoffmann 553f1ae32a1SGerd Hoffmann xhci->er_ep_idx++; 554f1ae32a1SGerd Hoffmann if (xhci->er_ep_idx >= xhci->er_size) { 555f1ae32a1SGerd Hoffmann xhci->er_ep_idx = 0; 556f1ae32a1SGerd Hoffmann xhci->er_pcs = !xhci->er_pcs; 557f1ae32a1SGerd Hoffmann } 558f1ae32a1SGerd Hoffmann } 559f1ae32a1SGerd Hoffmann 560f1ae32a1SGerd Hoffmann static void xhci_events_update(XHCIState *xhci) 561f1ae32a1SGerd Hoffmann { 56259a70ccdSDavid Gibson dma_addr_t erdp; 563f1ae32a1SGerd Hoffmann unsigned int dp_idx; 564f1ae32a1SGerd Hoffmann bool do_irq = 0; 565f1ae32a1SGerd Hoffmann 566f1ae32a1SGerd Hoffmann if (xhci->usbsts & USBSTS_HCH) { 567f1ae32a1SGerd Hoffmann return; 568f1ae32a1SGerd Hoffmann } 569f1ae32a1SGerd Hoffmann 570f1ae32a1SGerd Hoffmann erdp = xhci_addr64(xhci->erdp_low, xhci->erdp_high); 571f1ae32a1SGerd Hoffmann if (erdp < xhci->er_start || 572f1ae32a1SGerd Hoffmann erdp >= (xhci->er_start + TRB_SIZE*xhci->er_size)) { 57359a70ccdSDavid Gibson fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); 57459a70ccdSDavid Gibson fprintf(stderr, "xhci: ER at "DMA_ADDR_FMT" len %d\n", 575f1ae32a1SGerd Hoffmann xhci->er_start, xhci->er_size); 576f1ae32a1SGerd Hoffmann xhci_die(xhci); 577f1ae32a1SGerd Hoffmann return; 578f1ae32a1SGerd Hoffmann } 579f1ae32a1SGerd Hoffmann dp_idx = (erdp - xhci->er_start) / TRB_SIZE; 580f1ae32a1SGerd Hoffmann assert(dp_idx < xhci->er_size); 581f1ae32a1SGerd Hoffmann 582f1ae32a1SGerd Hoffmann /* NEC didn't read section 4.9.4 of the spec (v1.0 p139 top Note) and thus 583f1ae32a1SGerd Hoffmann * deadlocks when the ER is full. Hack it by holding off events until 584f1ae32a1SGerd Hoffmann * the driver decides to free at least half of the ring */ 585f1ae32a1SGerd Hoffmann if (xhci->er_full) { 586f1ae32a1SGerd Hoffmann int er_free = dp_idx - xhci->er_ep_idx; 587f1ae32a1SGerd Hoffmann if (er_free <= 0) { 588f1ae32a1SGerd Hoffmann er_free += xhci->er_size; 589f1ae32a1SGerd Hoffmann } 590f1ae32a1SGerd Hoffmann if (er_free < (xhci->er_size/2)) { 591f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring still " 592f1ae32a1SGerd Hoffmann "more than half full (hack)\n"); 593f1ae32a1SGerd Hoffmann return; 594f1ae32a1SGerd Hoffmann } 595f1ae32a1SGerd Hoffmann } 596f1ae32a1SGerd Hoffmann 597f1ae32a1SGerd Hoffmann while (xhci->ev_buffer_put != xhci->ev_buffer_get) { 598f1ae32a1SGerd Hoffmann assert(xhci->er_full); 599f1ae32a1SGerd Hoffmann if (((xhci->er_ep_idx+1) % xhci->er_size) == dp_idx) { 600f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring full again\n"); 601f1ae32a1SGerd Hoffmann #ifndef ER_FULL_HACK 602f1ae32a1SGerd Hoffmann XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR}; 603f1ae32a1SGerd Hoffmann xhci_write_event(xhci, &full); 604f1ae32a1SGerd Hoffmann #endif 605f1ae32a1SGerd Hoffmann do_irq = 1; 606f1ae32a1SGerd Hoffmann break; 607f1ae32a1SGerd Hoffmann } 608f1ae32a1SGerd Hoffmann XHCIEvent *event = &xhci->ev_buffer[xhci->ev_buffer_get]; 609f1ae32a1SGerd Hoffmann xhci_write_event(xhci, event); 610f1ae32a1SGerd Hoffmann xhci->ev_buffer_get++; 611f1ae32a1SGerd Hoffmann do_irq = 1; 612f1ae32a1SGerd Hoffmann if (xhci->ev_buffer_get == EV_QUEUE) { 613f1ae32a1SGerd Hoffmann xhci->ev_buffer_get = 0; 614f1ae32a1SGerd Hoffmann } 615f1ae32a1SGerd Hoffmann } 616f1ae32a1SGerd Hoffmann 617f1ae32a1SGerd Hoffmann if (do_irq) { 618f1ae32a1SGerd Hoffmann xhci->erdp_low |= ERDP_EHB; 619f1ae32a1SGerd Hoffmann xhci->iman |= IMAN_IP; 620f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_EINT; 621f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 622f1ae32a1SGerd Hoffmann } 623f1ae32a1SGerd Hoffmann 624f1ae32a1SGerd Hoffmann if (xhci->er_full && xhci->ev_buffer_put == xhci->ev_buffer_get) { 625f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring no longer full\n"); 626f1ae32a1SGerd Hoffmann xhci->er_full = 0; 627f1ae32a1SGerd Hoffmann } 628f1ae32a1SGerd Hoffmann return; 629f1ae32a1SGerd Hoffmann } 630f1ae32a1SGerd Hoffmann 631f1ae32a1SGerd Hoffmann static void xhci_event(XHCIState *xhci, XHCIEvent *event) 632f1ae32a1SGerd Hoffmann { 63359a70ccdSDavid Gibson dma_addr_t erdp; 634f1ae32a1SGerd Hoffmann unsigned int dp_idx; 635f1ae32a1SGerd Hoffmann 636f1ae32a1SGerd Hoffmann if (xhci->er_full) { 637f1ae32a1SGerd Hoffmann DPRINTF("xhci_event(): ER full, queueing\n"); 638f1ae32a1SGerd Hoffmann if (((xhci->ev_buffer_put+1) % EV_QUEUE) == xhci->ev_buffer_get) { 639f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: event queue full, dropping event!\n"); 640f1ae32a1SGerd Hoffmann return; 641f1ae32a1SGerd Hoffmann } 642f1ae32a1SGerd Hoffmann xhci->ev_buffer[xhci->ev_buffer_put++] = *event; 643f1ae32a1SGerd Hoffmann if (xhci->ev_buffer_put == EV_QUEUE) { 644f1ae32a1SGerd Hoffmann xhci->ev_buffer_put = 0; 645f1ae32a1SGerd Hoffmann } 646f1ae32a1SGerd Hoffmann return; 647f1ae32a1SGerd Hoffmann } 648f1ae32a1SGerd Hoffmann 649f1ae32a1SGerd Hoffmann erdp = xhci_addr64(xhci->erdp_low, xhci->erdp_high); 650f1ae32a1SGerd Hoffmann if (erdp < xhci->er_start || 651f1ae32a1SGerd Hoffmann erdp >= (xhci->er_start + TRB_SIZE*xhci->er_size)) { 65259a70ccdSDavid Gibson fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); 65359a70ccdSDavid Gibson fprintf(stderr, "xhci: ER at "DMA_ADDR_FMT" len %d\n", 654f1ae32a1SGerd Hoffmann xhci->er_start, xhci->er_size); 655f1ae32a1SGerd Hoffmann xhci_die(xhci); 656f1ae32a1SGerd Hoffmann return; 657f1ae32a1SGerd Hoffmann } 658f1ae32a1SGerd Hoffmann 659f1ae32a1SGerd Hoffmann dp_idx = (erdp - xhci->er_start) / TRB_SIZE; 660f1ae32a1SGerd Hoffmann assert(dp_idx < xhci->er_size); 661f1ae32a1SGerd Hoffmann 662f1ae32a1SGerd Hoffmann if ((xhci->er_ep_idx+1) % xhci->er_size == dp_idx) { 663f1ae32a1SGerd Hoffmann DPRINTF("xhci_event(): ER full, queueing\n"); 664f1ae32a1SGerd Hoffmann #ifndef ER_FULL_HACK 665f1ae32a1SGerd Hoffmann XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR}; 666f1ae32a1SGerd Hoffmann xhci_write_event(xhci, &full); 667f1ae32a1SGerd Hoffmann #endif 668f1ae32a1SGerd Hoffmann xhci->er_full = 1; 669f1ae32a1SGerd Hoffmann if (((xhci->ev_buffer_put+1) % EV_QUEUE) == xhci->ev_buffer_get) { 670f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: event queue full, dropping event!\n"); 671f1ae32a1SGerd Hoffmann return; 672f1ae32a1SGerd Hoffmann } 673f1ae32a1SGerd Hoffmann xhci->ev_buffer[xhci->ev_buffer_put++] = *event; 674f1ae32a1SGerd Hoffmann if (xhci->ev_buffer_put == EV_QUEUE) { 675f1ae32a1SGerd Hoffmann xhci->ev_buffer_put = 0; 676f1ae32a1SGerd Hoffmann } 677f1ae32a1SGerd Hoffmann } else { 678f1ae32a1SGerd Hoffmann xhci_write_event(xhci, event); 679f1ae32a1SGerd Hoffmann } 680f1ae32a1SGerd Hoffmann 681f1ae32a1SGerd Hoffmann xhci->erdp_low |= ERDP_EHB; 682f1ae32a1SGerd Hoffmann xhci->iman |= IMAN_IP; 683f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_EINT; 684f1ae32a1SGerd Hoffmann 685f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 686f1ae32a1SGerd Hoffmann } 687f1ae32a1SGerd Hoffmann 688f1ae32a1SGerd Hoffmann static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring, 68959a70ccdSDavid Gibson dma_addr_t base) 690f1ae32a1SGerd Hoffmann { 691f1ae32a1SGerd Hoffmann ring->base = base; 692f1ae32a1SGerd Hoffmann ring->dequeue = base; 693f1ae32a1SGerd Hoffmann ring->ccs = 1; 694f1ae32a1SGerd Hoffmann } 695f1ae32a1SGerd Hoffmann 696f1ae32a1SGerd Hoffmann static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb, 69759a70ccdSDavid Gibson dma_addr_t *addr) 698f1ae32a1SGerd Hoffmann { 699f1ae32a1SGerd Hoffmann while (1) { 700f1ae32a1SGerd Hoffmann TRBType type; 70159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ring->dequeue, trb, TRB_SIZE); 702f1ae32a1SGerd Hoffmann trb->addr = ring->dequeue; 703f1ae32a1SGerd Hoffmann trb->ccs = ring->ccs; 704f1ae32a1SGerd Hoffmann le64_to_cpus(&trb->parameter); 705f1ae32a1SGerd Hoffmann le32_to_cpus(&trb->status); 706f1ae32a1SGerd Hoffmann le32_to_cpus(&trb->control); 707f1ae32a1SGerd Hoffmann 70859a70ccdSDavid Gibson DPRINTF("xhci: TRB fetched [" DMA_ADDR_FMT "]: " 709f1ae32a1SGerd Hoffmann "%016" PRIx64 " %08x %08x %s\n", 710f1ae32a1SGerd Hoffmann ring->dequeue, trb->parameter, trb->status, trb->control, 711f1ae32a1SGerd Hoffmann trb_name(trb)); 712f1ae32a1SGerd Hoffmann 713f1ae32a1SGerd Hoffmann if ((trb->control & TRB_C) != ring->ccs) { 714f1ae32a1SGerd Hoffmann return 0; 715f1ae32a1SGerd Hoffmann } 716f1ae32a1SGerd Hoffmann 717f1ae32a1SGerd Hoffmann type = TRB_TYPE(*trb); 718f1ae32a1SGerd Hoffmann 719f1ae32a1SGerd Hoffmann if (type != TR_LINK) { 720f1ae32a1SGerd Hoffmann if (addr) { 721f1ae32a1SGerd Hoffmann *addr = ring->dequeue; 722f1ae32a1SGerd Hoffmann } 723f1ae32a1SGerd Hoffmann ring->dequeue += TRB_SIZE; 724f1ae32a1SGerd Hoffmann return type; 725f1ae32a1SGerd Hoffmann } else { 726f1ae32a1SGerd Hoffmann ring->dequeue = xhci_mask64(trb->parameter); 727f1ae32a1SGerd Hoffmann if (trb->control & TRB_LK_TC) { 728f1ae32a1SGerd Hoffmann ring->ccs = !ring->ccs; 729f1ae32a1SGerd Hoffmann } 730f1ae32a1SGerd Hoffmann } 731f1ae32a1SGerd Hoffmann } 732f1ae32a1SGerd Hoffmann } 733f1ae32a1SGerd Hoffmann 734f1ae32a1SGerd Hoffmann static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) 735f1ae32a1SGerd Hoffmann { 736f1ae32a1SGerd Hoffmann XHCITRB trb; 737f1ae32a1SGerd Hoffmann int length = 0; 73859a70ccdSDavid Gibson dma_addr_t dequeue = ring->dequeue; 739f1ae32a1SGerd Hoffmann bool ccs = ring->ccs; 740f1ae32a1SGerd Hoffmann /* hack to bundle together the two/three TDs that make a setup transfer */ 741f1ae32a1SGerd Hoffmann bool control_td_set = 0; 742f1ae32a1SGerd Hoffmann 743f1ae32a1SGerd Hoffmann while (1) { 744f1ae32a1SGerd Hoffmann TRBType type; 74559a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, dequeue, &trb, TRB_SIZE); 746f1ae32a1SGerd Hoffmann le64_to_cpus(&trb.parameter); 747f1ae32a1SGerd Hoffmann le32_to_cpus(&trb.status); 748f1ae32a1SGerd Hoffmann le32_to_cpus(&trb.control); 749f1ae32a1SGerd Hoffmann 75059a70ccdSDavid Gibson DPRINTF("xhci: TRB peeked [" DMA_ADDR_FMT "]: " 751f1ae32a1SGerd Hoffmann "%016" PRIx64 " %08x %08x\n", 752f1ae32a1SGerd Hoffmann dequeue, trb.parameter, trb.status, trb.control); 753f1ae32a1SGerd Hoffmann 754f1ae32a1SGerd Hoffmann if ((trb.control & TRB_C) != ccs) { 755f1ae32a1SGerd Hoffmann return -length; 756f1ae32a1SGerd Hoffmann } 757f1ae32a1SGerd Hoffmann 758f1ae32a1SGerd Hoffmann type = TRB_TYPE(trb); 759f1ae32a1SGerd Hoffmann 760f1ae32a1SGerd Hoffmann if (type == TR_LINK) { 761f1ae32a1SGerd Hoffmann dequeue = xhci_mask64(trb.parameter); 762f1ae32a1SGerd Hoffmann if (trb.control & TRB_LK_TC) { 763f1ae32a1SGerd Hoffmann ccs = !ccs; 764f1ae32a1SGerd Hoffmann } 765f1ae32a1SGerd Hoffmann continue; 766f1ae32a1SGerd Hoffmann } 767f1ae32a1SGerd Hoffmann 768f1ae32a1SGerd Hoffmann length += 1; 769f1ae32a1SGerd Hoffmann dequeue += TRB_SIZE; 770f1ae32a1SGerd Hoffmann 771f1ae32a1SGerd Hoffmann if (type == TR_SETUP) { 772f1ae32a1SGerd Hoffmann control_td_set = 1; 773f1ae32a1SGerd Hoffmann } else if (type == TR_STATUS) { 774f1ae32a1SGerd Hoffmann control_td_set = 0; 775f1ae32a1SGerd Hoffmann } 776f1ae32a1SGerd Hoffmann 777f1ae32a1SGerd Hoffmann if (!control_td_set && !(trb.control & TRB_TR_CH)) { 778f1ae32a1SGerd Hoffmann return length; 779f1ae32a1SGerd Hoffmann } 780f1ae32a1SGerd Hoffmann } 781f1ae32a1SGerd Hoffmann } 782f1ae32a1SGerd Hoffmann 783f1ae32a1SGerd Hoffmann static void xhci_er_reset(XHCIState *xhci) 784f1ae32a1SGerd Hoffmann { 785f1ae32a1SGerd Hoffmann XHCIEvRingSeg seg; 786f1ae32a1SGerd Hoffmann 787f1ae32a1SGerd Hoffmann /* cache the (sole) event ring segment location */ 788f1ae32a1SGerd Hoffmann if (xhci->erstsz != 1) { 789f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid value for ERSTSZ: %d\n", xhci->erstsz); 790f1ae32a1SGerd Hoffmann xhci_die(xhci); 791f1ae32a1SGerd Hoffmann return; 792f1ae32a1SGerd Hoffmann } 79359a70ccdSDavid Gibson dma_addr_t erstba = xhci_addr64(xhci->erstba_low, xhci->erstba_high); 79459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, erstba, &seg, sizeof(seg)); 795f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.addr_low); 796f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.addr_high); 797f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.size); 798f1ae32a1SGerd Hoffmann if (seg.size < 16 || seg.size > 4096) { 799f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid value for segment size: %d\n", seg.size); 800f1ae32a1SGerd Hoffmann xhci_die(xhci); 801f1ae32a1SGerd Hoffmann return; 802f1ae32a1SGerd Hoffmann } 803f1ae32a1SGerd Hoffmann xhci->er_start = xhci_addr64(seg.addr_low, seg.addr_high); 804f1ae32a1SGerd Hoffmann xhci->er_size = seg.size; 805f1ae32a1SGerd Hoffmann 806f1ae32a1SGerd Hoffmann xhci->er_ep_idx = 0; 807f1ae32a1SGerd Hoffmann xhci->er_pcs = 1; 808f1ae32a1SGerd Hoffmann xhci->er_full = 0; 809f1ae32a1SGerd Hoffmann 81059a70ccdSDavid Gibson DPRINTF("xhci: event ring:" DMA_ADDR_FMT " [%d]\n", 811f1ae32a1SGerd Hoffmann xhci->er_start, xhci->er_size); 812f1ae32a1SGerd Hoffmann } 813f1ae32a1SGerd Hoffmann 814f1ae32a1SGerd Hoffmann static void xhci_run(XHCIState *xhci) 815f1ae32a1SGerd Hoffmann { 816*fc0ddacaSGerd Hoffmann trace_usb_xhci_run(); 817f1ae32a1SGerd Hoffmann xhci->usbsts &= ~USBSTS_HCH; 818f1ae32a1SGerd Hoffmann } 819f1ae32a1SGerd Hoffmann 820f1ae32a1SGerd Hoffmann static void xhci_stop(XHCIState *xhci) 821f1ae32a1SGerd Hoffmann { 822*fc0ddacaSGerd Hoffmann trace_usb_xhci_stop(); 823f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_HCH; 824f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~CRCR_CRR; 825f1ae32a1SGerd Hoffmann } 826f1ae32a1SGerd Hoffmann 827f1ae32a1SGerd Hoffmann static void xhci_set_ep_state(XHCIState *xhci, XHCIEPContext *epctx, 828f1ae32a1SGerd Hoffmann uint32_t state) 829f1ae32a1SGerd Hoffmann { 830f1ae32a1SGerd Hoffmann uint32_t ctx[5]; 831f1ae32a1SGerd Hoffmann if (epctx->state == state) { 832f1ae32a1SGerd Hoffmann return; 833f1ae32a1SGerd Hoffmann } 834f1ae32a1SGerd Hoffmann 83559a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, epctx->pctx, ctx, sizeof(ctx)); 836f1ae32a1SGerd Hoffmann ctx[0] &= ~EP_STATE_MASK; 837f1ae32a1SGerd Hoffmann ctx[0] |= state; 838f1ae32a1SGerd Hoffmann ctx[2] = epctx->ring.dequeue | epctx->ring.ccs; 839f1ae32a1SGerd Hoffmann ctx[3] = (epctx->ring.dequeue >> 16) >> 16; 84059a70ccdSDavid Gibson DPRINTF("xhci: set epctx: " DMA_ADDR_FMT " state=%d dequeue=%08x%08x\n", 841f1ae32a1SGerd Hoffmann epctx->pctx, state, ctx[3], ctx[2]); 84259a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, epctx->pctx, ctx, sizeof(ctx)); 843f1ae32a1SGerd Hoffmann epctx->state = state; 844f1ae32a1SGerd Hoffmann } 845f1ae32a1SGerd Hoffmann 846f1ae32a1SGerd Hoffmann static TRBCCode xhci_enable_ep(XHCIState *xhci, unsigned int slotid, 84759a70ccdSDavid Gibson unsigned int epid, dma_addr_t pctx, 848f1ae32a1SGerd Hoffmann uint32_t *ctx) 849f1ae32a1SGerd Hoffmann { 850f1ae32a1SGerd Hoffmann XHCISlot *slot; 851f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 85259a70ccdSDavid Gibson dma_addr_t dequeue; 853f1ae32a1SGerd Hoffmann int i; 854f1ae32a1SGerd Hoffmann 855f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 856f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 857f1ae32a1SGerd Hoffmann 858f1ae32a1SGerd Hoffmann DPRINTF("xhci_enable_ep(%d, %d)\n", slotid, epid); 859f1ae32a1SGerd Hoffmann 860f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 861f1ae32a1SGerd Hoffmann if (slot->eps[epid-1]) { 862f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot %d ep %d already enabled!\n", slotid, epid); 863f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 864f1ae32a1SGerd Hoffmann } 865f1ae32a1SGerd Hoffmann 866f1ae32a1SGerd Hoffmann epctx = g_malloc(sizeof(XHCIEPContext)); 867f1ae32a1SGerd Hoffmann memset(epctx, 0, sizeof(XHCIEPContext)); 868f1ae32a1SGerd Hoffmann 869f1ae32a1SGerd Hoffmann slot->eps[epid-1] = epctx; 870f1ae32a1SGerd Hoffmann 871f1ae32a1SGerd Hoffmann dequeue = xhci_addr64(ctx[2] & ~0xf, ctx[3]); 872f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &epctx->ring, dequeue); 873f1ae32a1SGerd Hoffmann epctx->ring.ccs = ctx[2] & 1; 874f1ae32a1SGerd Hoffmann 875f1ae32a1SGerd Hoffmann epctx->type = (ctx[1] >> EP_TYPE_SHIFT) & EP_TYPE_MASK; 876f1ae32a1SGerd Hoffmann DPRINTF("xhci: endpoint %d.%d type is %d\n", epid/2, epid%2, epctx->type); 877f1ae32a1SGerd Hoffmann epctx->pctx = pctx; 878f1ae32a1SGerd Hoffmann epctx->max_psize = ctx[1]>>16; 879f1ae32a1SGerd Hoffmann epctx->max_psize *= 1+((ctx[1]>>8)&0xff); 880f1ae32a1SGerd Hoffmann epctx->has_bg = false; 881f1ae32a1SGerd Hoffmann if (epctx->type == ET_ISO_IN) { 882f1ae32a1SGerd Hoffmann epctx->has_bg = true; 883f1ae32a1SGerd Hoffmann } 884f1ae32a1SGerd Hoffmann DPRINTF("xhci: endpoint %d.%d max transaction (burst) size is %d\n", 885f1ae32a1SGerd Hoffmann epid/2, epid%2, epctx->max_psize); 886f1ae32a1SGerd Hoffmann for (i = 0; i < ARRAY_SIZE(epctx->transfers); i++) { 887f1ae32a1SGerd Hoffmann usb_packet_init(&epctx->transfers[i].packet); 888f1ae32a1SGerd Hoffmann } 889f1ae32a1SGerd Hoffmann 890f1ae32a1SGerd Hoffmann epctx->state = EP_RUNNING; 891f1ae32a1SGerd Hoffmann ctx[0] &= ~EP_STATE_MASK; 892f1ae32a1SGerd Hoffmann ctx[0] |= EP_RUNNING; 893f1ae32a1SGerd Hoffmann 894f1ae32a1SGerd Hoffmann return CC_SUCCESS; 895f1ae32a1SGerd Hoffmann } 896f1ae32a1SGerd Hoffmann 897f1ae32a1SGerd Hoffmann static int xhci_ep_nuke_xfers(XHCIState *xhci, unsigned int slotid, 898f1ae32a1SGerd Hoffmann unsigned int epid) 899f1ae32a1SGerd Hoffmann { 900f1ae32a1SGerd Hoffmann XHCISlot *slot; 901f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 902f1ae32a1SGerd Hoffmann int i, xferi, killed = 0; 903f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 904f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 905f1ae32a1SGerd Hoffmann 906f1ae32a1SGerd Hoffmann DPRINTF("xhci_ep_nuke_xfers(%d, %d)\n", slotid, epid); 907f1ae32a1SGerd Hoffmann 908f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 909f1ae32a1SGerd Hoffmann 910f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 911f1ae32a1SGerd Hoffmann return 0; 912f1ae32a1SGerd Hoffmann } 913f1ae32a1SGerd Hoffmann 914f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 915f1ae32a1SGerd Hoffmann 916f1ae32a1SGerd Hoffmann xferi = epctx->next_xfer; 917f1ae32a1SGerd Hoffmann for (i = 0; i < TD_QUEUE; i++) { 918f1ae32a1SGerd Hoffmann XHCITransfer *t = &epctx->transfers[xferi]; 919f1ae32a1SGerd Hoffmann if (t->running_async) { 920f1ae32a1SGerd Hoffmann usb_cancel_packet(&t->packet); 921f1ae32a1SGerd Hoffmann t->running_async = 0; 922f1ae32a1SGerd Hoffmann t->cancelled = 1; 923f1ae32a1SGerd Hoffmann DPRINTF("xhci: cancelling transfer %d, waiting for it to complete...\n", i); 924f1ae32a1SGerd Hoffmann killed++; 925f1ae32a1SGerd Hoffmann } 926f1ae32a1SGerd Hoffmann if (t->running_retry) { 927f1ae32a1SGerd Hoffmann t->running_retry = 0; 928f1ae32a1SGerd Hoffmann epctx->retry = NULL; 929f1ae32a1SGerd Hoffmann } 930f1ae32a1SGerd Hoffmann if (t->backgrounded) { 931f1ae32a1SGerd Hoffmann t->backgrounded = 0; 932f1ae32a1SGerd Hoffmann } 933f1ae32a1SGerd Hoffmann if (t->trbs) { 934f1ae32a1SGerd Hoffmann g_free(t->trbs); 935f1ae32a1SGerd Hoffmann } 936f1ae32a1SGerd Hoffmann if (t->data) { 937f1ae32a1SGerd Hoffmann g_free(t->data); 938f1ae32a1SGerd Hoffmann } 939f1ae32a1SGerd Hoffmann 940f1ae32a1SGerd Hoffmann t->trbs = NULL; 941f1ae32a1SGerd Hoffmann t->data = NULL; 942f1ae32a1SGerd Hoffmann t->trb_count = t->trb_alloced = 0; 943f1ae32a1SGerd Hoffmann t->data_length = t->data_alloced = 0; 944f1ae32a1SGerd Hoffmann xferi = (xferi + 1) % TD_QUEUE; 945f1ae32a1SGerd Hoffmann } 946f1ae32a1SGerd Hoffmann if (epctx->has_bg) { 947f1ae32a1SGerd Hoffmann xferi = epctx->next_bg; 948f1ae32a1SGerd Hoffmann for (i = 0; i < BG_XFERS; i++) { 949f1ae32a1SGerd Hoffmann XHCITransfer *t = &epctx->bg_transfers[xferi]; 950f1ae32a1SGerd Hoffmann if (t->running_async) { 951f1ae32a1SGerd Hoffmann usb_cancel_packet(&t->packet); 952f1ae32a1SGerd Hoffmann t->running_async = 0; 953f1ae32a1SGerd Hoffmann t->cancelled = 1; 954f1ae32a1SGerd Hoffmann DPRINTF("xhci: cancelling bg transfer %d, waiting for it to complete...\n", i); 955f1ae32a1SGerd Hoffmann killed++; 956f1ae32a1SGerd Hoffmann } 957f1ae32a1SGerd Hoffmann if (t->data) { 958f1ae32a1SGerd Hoffmann g_free(t->data); 959f1ae32a1SGerd Hoffmann } 960f1ae32a1SGerd Hoffmann 961f1ae32a1SGerd Hoffmann t->data = NULL; 962f1ae32a1SGerd Hoffmann xferi = (xferi + 1) % BG_XFERS; 963f1ae32a1SGerd Hoffmann } 964f1ae32a1SGerd Hoffmann } 965f1ae32a1SGerd Hoffmann return killed; 966f1ae32a1SGerd Hoffmann } 967f1ae32a1SGerd Hoffmann 968f1ae32a1SGerd Hoffmann static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid, 969f1ae32a1SGerd Hoffmann unsigned int epid) 970f1ae32a1SGerd Hoffmann { 971f1ae32a1SGerd Hoffmann XHCISlot *slot; 972f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 973f1ae32a1SGerd Hoffmann 974f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 975f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 976f1ae32a1SGerd Hoffmann 977f1ae32a1SGerd Hoffmann DPRINTF("xhci_disable_ep(%d, %d)\n", slotid, epid); 978f1ae32a1SGerd Hoffmann 979f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 980f1ae32a1SGerd Hoffmann 981f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 982f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d already disabled\n", slotid, epid); 983f1ae32a1SGerd Hoffmann return CC_SUCCESS; 984f1ae32a1SGerd Hoffmann } 985f1ae32a1SGerd Hoffmann 986f1ae32a1SGerd Hoffmann xhci_ep_nuke_xfers(xhci, slotid, epid); 987f1ae32a1SGerd Hoffmann 988f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 989f1ae32a1SGerd Hoffmann 990f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_DISABLED); 991f1ae32a1SGerd Hoffmann 992f1ae32a1SGerd Hoffmann g_free(epctx); 993f1ae32a1SGerd Hoffmann slot->eps[epid-1] = NULL; 994f1ae32a1SGerd Hoffmann 995f1ae32a1SGerd Hoffmann return CC_SUCCESS; 996f1ae32a1SGerd Hoffmann } 997f1ae32a1SGerd Hoffmann 998f1ae32a1SGerd Hoffmann static TRBCCode xhci_stop_ep(XHCIState *xhci, unsigned int slotid, 999f1ae32a1SGerd Hoffmann unsigned int epid) 1000f1ae32a1SGerd Hoffmann { 1001f1ae32a1SGerd Hoffmann XHCISlot *slot; 1002f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1003f1ae32a1SGerd Hoffmann 1004f1ae32a1SGerd Hoffmann DPRINTF("xhci_stop_ep(%d, %d)\n", slotid, epid); 1005f1ae32a1SGerd Hoffmann 1006f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1007f1ae32a1SGerd Hoffmann 1008f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1009f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1010f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1011f1ae32a1SGerd Hoffmann } 1012f1ae32a1SGerd Hoffmann 1013f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1014f1ae32a1SGerd Hoffmann 1015f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1016f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1017f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1018f1ae32a1SGerd Hoffmann } 1019f1ae32a1SGerd Hoffmann 1020f1ae32a1SGerd Hoffmann if (xhci_ep_nuke_xfers(xhci, slotid, epid) > 0) { 1021f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: FIXME: endpoint stopped w/ xfers running, " 1022f1ae32a1SGerd Hoffmann "data might be lost\n"); 1023f1ae32a1SGerd Hoffmann } 1024f1ae32a1SGerd Hoffmann 1025f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1026f1ae32a1SGerd Hoffmann 1027f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1028f1ae32a1SGerd Hoffmann 1029f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1030f1ae32a1SGerd Hoffmann } 1031f1ae32a1SGerd Hoffmann 1032f1ae32a1SGerd Hoffmann static TRBCCode xhci_reset_ep(XHCIState *xhci, unsigned int slotid, 1033f1ae32a1SGerd Hoffmann unsigned int epid) 1034f1ae32a1SGerd Hoffmann { 1035f1ae32a1SGerd Hoffmann XHCISlot *slot; 1036f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1037f1ae32a1SGerd Hoffmann USBDevice *dev; 1038f1ae32a1SGerd Hoffmann 1039f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1040f1ae32a1SGerd Hoffmann 1041f1ae32a1SGerd Hoffmann DPRINTF("xhci_reset_ep(%d, %d)\n", slotid, epid); 1042f1ae32a1SGerd Hoffmann 1043f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1044f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1045f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1046f1ae32a1SGerd Hoffmann } 1047f1ae32a1SGerd Hoffmann 1048f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1049f1ae32a1SGerd Hoffmann 1050f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1051f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1052f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1053f1ae32a1SGerd Hoffmann } 1054f1ae32a1SGerd Hoffmann 1055f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1056f1ae32a1SGerd Hoffmann 1057f1ae32a1SGerd Hoffmann if (epctx->state != EP_HALTED) { 1058f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: reset EP while EP %d not halted (%d)\n", 1059f1ae32a1SGerd Hoffmann epid, epctx->state); 1060f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1061f1ae32a1SGerd Hoffmann } 1062f1ae32a1SGerd Hoffmann 1063f1ae32a1SGerd Hoffmann if (xhci_ep_nuke_xfers(xhci, slotid, epid) > 0) { 1064f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: FIXME: endpoint reset w/ xfers running, " 1065f1ae32a1SGerd Hoffmann "data might be lost\n"); 1066f1ae32a1SGerd Hoffmann } 1067f1ae32a1SGerd Hoffmann 1068f1ae32a1SGerd Hoffmann uint8_t ep = epid>>1; 1069f1ae32a1SGerd Hoffmann 1070f1ae32a1SGerd Hoffmann if (epid & 1) { 1071f1ae32a1SGerd Hoffmann ep |= 0x80; 1072f1ae32a1SGerd Hoffmann } 1073f1ae32a1SGerd Hoffmann 1074f1ae32a1SGerd Hoffmann dev = xhci->ports[xhci->slots[slotid-1].port-1].port.dev; 1075f1ae32a1SGerd Hoffmann if (!dev) { 1076f1ae32a1SGerd Hoffmann return CC_USB_TRANSACTION_ERROR; 1077f1ae32a1SGerd Hoffmann } 1078f1ae32a1SGerd Hoffmann 1079f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1080f1ae32a1SGerd Hoffmann 1081f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1082f1ae32a1SGerd Hoffmann } 1083f1ae32a1SGerd Hoffmann 1084f1ae32a1SGerd Hoffmann static TRBCCode xhci_set_ep_dequeue(XHCIState *xhci, unsigned int slotid, 1085f1ae32a1SGerd Hoffmann unsigned int epid, uint64_t pdequeue) 1086f1ae32a1SGerd Hoffmann { 1087f1ae32a1SGerd Hoffmann XHCISlot *slot; 1088f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 108959a70ccdSDavid Gibson dma_addr_t dequeue; 1090f1ae32a1SGerd Hoffmann 1091f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1092f1ae32a1SGerd Hoffmann 1093f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1094f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1095f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1096f1ae32a1SGerd Hoffmann } 1097f1ae32a1SGerd Hoffmann 1098f1ae32a1SGerd Hoffmann DPRINTF("xhci_set_ep_dequeue(%d, %d, %016"PRIx64")\n", slotid, epid, pdequeue); 1099f1ae32a1SGerd Hoffmann dequeue = xhci_mask64(pdequeue); 1100f1ae32a1SGerd Hoffmann 1101f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1102f1ae32a1SGerd Hoffmann 1103f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1104f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1105f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1106f1ae32a1SGerd Hoffmann } 1107f1ae32a1SGerd Hoffmann 1108f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1109f1ae32a1SGerd Hoffmann 1110f1ae32a1SGerd Hoffmann 1111f1ae32a1SGerd Hoffmann if (epctx->state != EP_STOPPED) { 1112f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: set EP dequeue pointer while EP %d not stopped\n", epid); 1113f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1114f1ae32a1SGerd Hoffmann } 1115f1ae32a1SGerd Hoffmann 1116f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &epctx->ring, dequeue & ~0xF); 1117f1ae32a1SGerd Hoffmann epctx->ring.ccs = dequeue & 1; 1118f1ae32a1SGerd Hoffmann 1119f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1120f1ae32a1SGerd Hoffmann 1121f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1122f1ae32a1SGerd Hoffmann } 1123f1ae32a1SGerd Hoffmann 1124f1ae32a1SGerd Hoffmann static int xhci_xfer_data(XHCITransfer *xfer, uint8_t *data, 1125f1ae32a1SGerd Hoffmann unsigned int length, bool in_xfer, bool out_xfer, 1126f1ae32a1SGerd Hoffmann bool report) 1127f1ae32a1SGerd Hoffmann { 1128f1ae32a1SGerd Hoffmann int i; 1129f1ae32a1SGerd Hoffmann uint32_t edtla = 0; 1130f1ae32a1SGerd Hoffmann unsigned int transferred = 0; 1131f1ae32a1SGerd Hoffmann unsigned int left = length; 1132f1ae32a1SGerd Hoffmann bool reported = 0; 1133f1ae32a1SGerd Hoffmann bool shortpkt = 0; 1134f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_TRANSFER, CC_SUCCESS}; 1135f1ae32a1SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1136f1ae32a1SGerd Hoffmann 1137f1ae32a1SGerd Hoffmann DPRINTF("xhci_xfer_data(len=%d, in_xfer=%d, out_xfer=%d, report=%d)\n", 1138f1ae32a1SGerd Hoffmann length, in_xfer, out_xfer, report); 1139f1ae32a1SGerd Hoffmann 1140f1ae32a1SGerd Hoffmann assert(!(in_xfer && out_xfer)); 1141f1ae32a1SGerd Hoffmann 1142f1ae32a1SGerd Hoffmann for (i = 0; i < xfer->trb_count; i++) { 1143f1ae32a1SGerd Hoffmann XHCITRB *trb = &xfer->trbs[i]; 114459a70ccdSDavid Gibson dma_addr_t addr; 1145f1ae32a1SGerd Hoffmann unsigned int chunk = 0; 1146f1ae32a1SGerd Hoffmann 1147f1ae32a1SGerd Hoffmann switch (TRB_TYPE(*trb)) { 1148f1ae32a1SGerd Hoffmann case TR_DATA: 1149f1ae32a1SGerd Hoffmann if ((!(trb->control & TRB_TR_DIR)) != (!in_xfer)) { 1150f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: data direction mismatch for TR_DATA\n"); 1151f1ae32a1SGerd Hoffmann xhci_die(xhci); 1152f1ae32a1SGerd Hoffmann return transferred; 1153f1ae32a1SGerd Hoffmann } 1154f1ae32a1SGerd Hoffmann /* fallthrough */ 1155f1ae32a1SGerd Hoffmann case TR_NORMAL: 1156f1ae32a1SGerd Hoffmann case TR_ISOCH: 1157f1ae32a1SGerd Hoffmann addr = xhci_mask64(trb->parameter); 1158f1ae32a1SGerd Hoffmann chunk = trb->status & 0x1ffff; 1159f1ae32a1SGerd Hoffmann if (chunk > left) { 1160f1ae32a1SGerd Hoffmann chunk = left; 1161f1ae32a1SGerd Hoffmann shortpkt = 1; 1162f1ae32a1SGerd Hoffmann } 1163f1ae32a1SGerd Hoffmann if (in_xfer || out_xfer) { 1164f1ae32a1SGerd Hoffmann if (trb->control & TRB_TR_IDT) { 1165f1ae32a1SGerd Hoffmann uint64_t idata; 1166f1ae32a1SGerd Hoffmann if (chunk > 8 || in_xfer) { 1167f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid immediate data TRB\n"); 1168f1ae32a1SGerd Hoffmann xhci_die(xhci); 1169f1ae32a1SGerd Hoffmann return transferred; 1170f1ae32a1SGerd Hoffmann } 1171f1ae32a1SGerd Hoffmann idata = le64_to_cpu(trb->parameter); 1172f1ae32a1SGerd Hoffmann memcpy(data, &idata, chunk); 1173f1ae32a1SGerd Hoffmann } else { 1174f1ae32a1SGerd Hoffmann DPRINTF("xhci_xfer_data: r/w(%d) %d bytes at " 117559a70ccdSDavid Gibson DMA_ADDR_FMT "\n", in_xfer, chunk, addr); 1176f1ae32a1SGerd Hoffmann if (in_xfer) { 117759a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, addr, data, chunk); 1178f1ae32a1SGerd Hoffmann } else { 117959a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, addr, data, chunk); 1180f1ae32a1SGerd Hoffmann } 1181f1ae32a1SGerd Hoffmann #ifdef DEBUG_DATA 1182f1ae32a1SGerd Hoffmann unsigned int count = chunk; 1183f1ae32a1SGerd Hoffmann int i; 1184f1ae32a1SGerd Hoffmann if (count > 16) { 1185f1ae32a1SGerd Hoffmann count = 16; 1186f1ae32a1SGerd Hoffmann } 1187f1ae32a1SGerd Hoffmann DPRINTF(" ::"); 1188f1ae32a1SGerd Hoffmann for (i = 0; i < count; i++) { 1189f1ae32a1SGerd Hoffmann DPRINTF(" %02x", data[i]); 1190f1ae32a1SGerd Hoffmann } 1191f1ae32a1SGerd Hoffmann DPRINTF("\n"); 1192f1ae32a1SGerd Hoffmann #endif 1193f1ae32a1SGerd Hoffmann } 1194f1ae32a1SGerd Hoffmann } 1195f1ae32a1SGerd Hoffmann left -= chunk; 1196f1ae32a1SGerd Hoffmann data += chunk; 1197f1ae32a1SGerd Hoffmann edtla += chunk; 1198f1ae32a1SGerd Hoffmann transferred += chunk; 1199f1ae32a1SGerd Hoffmann break; 1200f1ae32a1SGerd Hoffmann case TR_STATUS: 1201f1ae32a1SGerd Hoffmann reported = 0; 1202f1ae32a1SGerd Hoffmann shortpkt = 0; 1203f1ae32a1SGerd Hoffmann break; 1204f1ae32a1SGerd Hoffmann } 1205f1ae32a1SGerd Hoffmann 1206f1ae32a1SGerd Hoffmann if (report && !reported && (trb->control & TRB_TR_IOC || 1207f1ae32a1SGerd Hoffmann (shortpkt && (trb->control & TRB_TR_ISP)))) { 1208f1ae32a1SGerd Hoffmann event.slotid = xfer->slotid; 1209f1ae32a1SGerd Hoffmann event.epid = xfer->epid; 1210f1ae32a1SGerd Hoffmann event.length = (trb->status & 0x1ffff) - chunk; 1211f1ae32a1SGerd Hoffmann event.flags = 0; 1212f1ae32a1SGerd Hoffmann event.ptr = trb->addr; 1213f1ae32a1SGerd Hoffmann if (xfer->status == CC_SUCCESS) { 1214f1ae32a1SGerd Hoffmann event.ccode = shortpkt ? CC_SHORT_PACKET : CC_SUCCESS; 1215f1ae32a1SGerd Hoffmann } else { 1216f1ae32a1SGerd Hoffmann event.ccode = xfer->status; 1217f1ae32a1SGerd Hoffmann } 1218f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb) == TR_EVDATA) { 1219f1ae32a1SGerd Hoffmann event.ptr = trb->parameter; 1220f1ae32a1SGerd Hoffmann event.flags |= TRB_EV_ED; 1221f1ae32a1SGerd Hoffmann event.length = edtla & 0xffffff; 1222f1ae32a1SGerd Hoffmann DPRINTF("xhci_xfer_data: EDTLA=%d\n", event.length); 1223f1ae32a1SGerd Hoffmann edtla = 0; 1224f1ae32a1SGerd Hoffmann } 1225f1ae32a1SGerd Hoffmann xhci_event(xhci, &event); 1226f1ae32a1SGerd Hoffmann reported = 1; 1227f1ae32a1SGerd Hoffmann } 1228f1ae32a1SGerd Hoffmann } 1229f1ae32a1SGerd Hoffmann return transferred; 1230f1ae32a1SGerd Hoffmann } 1231f1ae32a1SGerd Hoffmann 1232f1ae32a1SGerd Hoffmann static void xhci_stall_ep(XHCITransfer *xfer) 1233f1ae32a1SGerd Hoffmann { 1234f1ae32a1SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1235f1ae32a1SGerd Hoffmann XHCISlot *slot = &xhci->slots[xfer->slotid-1]; 1236f1ae32a1SGerd Hoffmann XHCIEPContext *epctx = slot->eps[xfer->epid-1]; 1237f1ae32a1SGerd Hoffmann 1238f1ae32a1SGerd Hoffmann epctx->ring.dequeue = xfer->trbs[0].addr; 1239f1ae32a1SGerd Hoffmann epctx->ring.ccs = xfer->trbs[0].ccs; 1240f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_HALTED); 1241f1ae32a1SGerd Hoffmann DPRINTF("xhci: stalled slot %d ep %d\n", xfer->slotid, xfer->epid); 124259a70ccdSDavid Gibson DPRINTF("xhci: will continue at "DMA_ADDR_FMT"\n", epctx->ring.dequeue); 1243f1ae32a1SGerd Hoffmann } 1244f1ae32a1SGerd Hoffmann 1245f1ae32a1SGerd Hoffmann static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, 1246f1ae32a1SGerd Hoffmann XHCIEPContext *epctx); 1247f1ae32a1SGerd Hoffmann 1248f1ae32a1SGerd Hoffmann static void xhci_bg_update(XHCIState *xhci, XHCIEPContext *epctx) 1249f1ae32a1SGerd Hoffmann { 1250f1ae32a1SGerd Hoffmann if (epctx->bg_updating) { 1251f1ae32a1SGerd Hoffmann return; 1252f1ae32a1SGerd Hoffmann } 1253f1ae32a1SGerd Hoffmann DPRINTF("xhci_bg_update(%p, %p)\n", xhci, epctx); 1254f1ae32a1SGerd Hoffmann assert(epctx->has_bg); 1255f1ae32a1SGerd Hoffmann DPRINTF("xhci: fg=%d bg=%d\n", epctx->comp_xfer, epctx->next_bg); 1256f1ae32a1SGerd Hoffmann epctx->bg_updating = 1; 1257f1ae32a1SGerd Hoffmann while (epctx->transfers[epctx->comp_xfer].backgrounded && 1258f1ae32a1SGerd Hoffmann epctx->bg_transfers[epctx->next_bg].complete) { 1259f1ae32a1SGerd Hoffmann XHCITransfer *fg = &epctx->transfers[epctx->comp_xfer]; 1260f1ae32a1SGerd Hoffmann XHCITransfer *bg = &epctx->bg_transfers[epctx->next_bg]; 1261f1ae32a1SGerd Hoffmann #if 0 1262f1ae32a1SGerd Hoffmann DPRINTF("xhci: completing fg %d from bg %d.%d (stat: %d)\n", 1263f1ae32a1SGerd Hoffmann epctx->comp_xfer, epctx->next_bg, bg->cur_pkt, 1264f1ae32a1SGerd Hoffmann bg->usbxfer->iso_packet_desc[bg->cur_pkt].status 1265f1ae32a1SGerd Hoffmann ); 1266f1ae32a1SGerd Hoffmann #endif 1267f1ae32a1SGerd Hoffmann assert(epctx->type == ET_ISO_IN); 1268f1ae32a1SGerd Hoffmann assert(bg->iso_xfer); 1269f1ae32a1SGerd Hoffmann assert(bg->in_xfer); 1270f1ae32a1SGerd Hoffmann uint8_t *p = bg->data + bg->cur_pkt * bg->pktsize; 1271f1ae32a1SGerd Hoffmann #if 0 1272f1ae32a1SGerd Hoffmann int len = bg->usbxfer->iso_packet_desc[bg->cur_pkt].actual_length; 1273f1ae32a1SGerd Hoffmann fg->status = libusb_to_ccode(bg->usbxfer->iso_packet_desc[bg->cur_pkt].status); 1274f1ae32a1SGerd Hoffmann #else 1275f1ae32a1SGerd Hoffmann int len = 0; 1276f1ae32a1SGerd Hoffmann FIXME(); 1277f1ae32a1SGerd Hoffmann #endif 1278f1ae32a1SGerd Hoffmann fg->complete = 1; 1279f1ae32a1SGerd Hoffmann fg->backgrounded = 0; 1280f1ae32a1SGerd Hoffmann 1281f1ae32a1SGerd Hoffmann if (fg->status == CC_STALL_ERROR) { 1282f1ae32a1SGerd Hoffmann xhci_stall_ep(fg); 1283f1ae32a1SGerd Hoffmann } 1284f1ae32a1SGerd Hoffmann 1285f1ae32a1SGerd Hoffmann xhci_xfer_data(fg, p, len, 1, 0, 1); 1286f1ae32a1SGerd Hoffmann 1287f1ae32a1SGerd Hoffmann epctx->comp_xfer++; 1288f1ae32a1SGerd Hoffmann if (epctx->comp_xfer == TD_QUEUE) { 1289f1ae32a1SGerd Hoffmann epctx->comp_xfer = 0; 1290f1ae32a1SGerd Hoffmann } 1291f1ae32a1SGerd Hoffmann DPRINTF("next fg xfer: %d\n", epctx->comp_xfer); 1292f1ae32a1SGerd Hoffmann bg->cur_pkt++; 1293f1ae32a1SGerd Hoffmann if (bg->cur_pkt == bg->pkts) { 1294f1ae32a1SGerd Hoffmann bg->complete = 0; 1295f1ae32a1SGerd Hoffmann if (xhci_submit(xhci, bg, epctx) < 0) { 1296f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bg resubmit failed\n"); 1297f1ae32a1SGerd Hoffmann } 1298f1ae32a1SGerd Hoffmann epctx->next_bg++; 1299f1ae32a1SGerd Hoffmann if (epctx->next_bg == BG_XFERS) { 1300f1ae32a1SGerd Hoffmann epctx->next_bg = 0; 1301f1ae32a1SGerd Hoffmann } 1302f1ae32a1SGerd Hoffmann DPRINTF("next bg xfer: %d\n", epctx->next_bg); 1303f1ae32a1SGerd Hoffmann 1304f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, fg->slotid, fg->epid); 1305f1ae32a1SGerd Hoffmann } 1306f1ae32a1SGerd Hoffmann } 1307f1ae32a1SGerd Hoffmann epctx->bg_updating = 0; 1308f1ae32a1SGerd Hoffmann } 1309f1ae32a1SGerd Hoffmann 1310f1ae32a1SGerd Hoffmann #if 0 1311f1ae32a1SGerd Hoffmann static void xhci_xfer_cb(struct libusb_transfer *transfer) 1312f1ae32a1SGerd Hoffmann { 1313f1ae32a1SGerd Hoffmann XHCIState *xhci; 1314f1ae32a1SGerd Hoffmann XHCITransfer *xfer; 1315f1ae32a1SGerd Hoffmann 1316f1ae32a1SGerd Hoffmann xfer = (XHCITransfer *)transfer->user_data; 1317f1ae32a1SGerd Hoffmann xhci = xfer->xhci; 1318f1ae32a1SGerd Hoffmann 1319f1ae32a1SGerd Hoffmann DPRINTF("xhci_xfer_cb(slot=%d, ep=%d, status=%d)\n", xfer->slotid, 1320f1ae32a1SGerd Hoffmann xfer->epid, transfer->status); 1321f1ae32a1SGerd Hoffmann 1322f1ae32a1SGerd Hoffmann assert(xfer->slotid >= 1 && xfer->slotid <= MAXSLOTS); 1323f1ae32a1SGerd Hoffmann assert(xfer->epid >= 1 && xfer->epid <= 31); 1324f1ae32a1SGerd Hoffmann 1325f1ae32a1SGerd Hoffmann if (xfer->cancelled) { 1326f1ae32a1SGerd Hoffmann DPRINTF("xhci: transfer cancelled, not reporting anything\n"); 1327f1ae32a1SGerd Hoffmann xfer->running = 0; 1328f1ae32a1SGerd Hoffmann return; 1329f1ae32a1SGerd Hoffmann } 1330f1ae32a1SGerd Hoffmann 1331f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1332f1ae32a1SGerd Hoffmann XHCISlot *slot; 1333f1ae32a1SGerd Hoffmann slot = &xhci->slots[xfer->slotid-1]; 1334f1ae32a1SGerd Hoffmann assert(slot->eps[xfer->epid-1]); 1335f1ae32a1SGerd Hoffmann epctx = slot->eps[xfer->epid-1]; 1336f1ae32a1SGerd Hoffmann 1337f1ae32a1SGerd Hoffmann if (xfer->bg_xfer) { 1338f1ae32a1SGerd Hoffmann DPRINTF("xhci: background transfer, updating\n"); 1339f1ae32a1SGerd Hoffmann xfer->complete = 1; 1340f1ae32a1SGerd Hoffmann xfer->running = 0; 1341f1ae32a1SGerd Hoffmann xhci_bg_update(xhci, epctx); 1342f1ae32a1SGerd Hoffmann return; 1343f1ae32a1SGerd Hoffmann } 1344f1ae32a1SGerd Hoffmann 1345f1ae32a1SGerd Hoffmann if (xfer->iso_xfer) { 1346f1ae32a1SGerd Hoffmann transfer->status = transfer->iso_packet_desc[0].status; 1347f1ae32a1SGerd Hoffmann transfer->actual_length = transfer->iso_packet_desc[0].actual_length; 1348f1ae32a1SGerd Hoffmann } 1349f1ae32a1SGerd Hoffmann 1350f1ae32a1SGerd Hoffmann xfer->status = libusb_to_ccode(transfer->status); 1351f1ae32a1SGerd Hoffmann 1352f1ae32a1SGerd Hoffmann xfer->complete = 1; 1353f1ae32a1SGerd Hoffmann xfer->running = 0; 1354f1ae32a1SGerd Hoffmann 1355f1ae32a1SGerd Hoffmann if (transfer->status == LIBUSB_TRANSFER_STALL) 1356f1ae32a1SGerd Hoffmann xhci_stall_ep(xhci, epctx, xfer); 1357f1ae32a1SGerd Hoffmann 1358f1ae32a1SGerd Hoffmann DPRINTF("xhci: transfer actual length = %d\n", transfer->actual_length); 1359f1ae32a1SGerd Hoffmann 1360f1ae32a1SGerd Hoffmann if (xfer->in_xfer) { 1361f1ae32a1SGerd Hoffmann if (xfer->epid == 1) { 1362f1ae32a1SGerd Hoffmann xhci_xfer_data(xhci, xfer, xfer->data + 8, 1363f1ae32a1SGerd Hoffmann transfer->actual_length, 1, 0, 1); 1364f1ae32a1SGerd Hoffmann } else { 1365f1ae32a1SGerd Hoffmann xhci_xfer_data(xhci, xfer, xfer->data, 1366f1ae32a1SGerd Hoffmann transfer->actual_length, 1, 0, 1); 1367f1ae32a1SGerd Hoffmann } 1368f1ae32a1SGerd Hoffmann } else { 1369f1ae32a1SGerd Hoffmann xhci_xfer_data(xhci, xfer, NULL, transfer->actual_length, 0, 0, 1); 1370f1ae32a1SGerd Hoffmann } 1371f1ae32a1SGerd Hoffmann 1372f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid); 1373f1ae32a1SGerd Hoffmann } 1374f1ae32a1SGerd Hoffmann 1375f1ae32a1SGerd Hoffmann static int xhci_hle_control(XHCIState *xhci, XHCITransfer *xfer, 1376f1ae32a1SGerd Hoffmann uint8_t bmRequestType, uint8_t bRequest, 1377f1ae32a1SGerd Hoffmann uint16_t wValue, uint16_t wIndex, uint16_t wLength) 1378f1ae32a1SGerd Hoffmann { 1379f1ae32a1SGerd Hoffmann uint16_t type_req = (bmRequestType << 8) | bRequest; 1380f1ae32a1SGerd Hoffmann 1381f1ae32a1SGerd Hoffmann switch (type_req) { 1382f1ae32a1SGerd Hoffmann case 0x0000 | USB_REQ_SET_CONFIGURATION: 1383f1ae32a1SGerd Hoffmann DPRINTF("xhci: HLE switch configuration\n"); 1384f1ae32a1SGerd Hoffmann return xhci_switch_config(xhci, xfer->slotid, wValue) == 0; 1385f1ae32a1SGerd Hoffmann case 0x0100 | USB_REQ_SET_INTERFACE: 1386f1ae32a1SGerd Hoffmann DPRINTF("xhci: HLE set interface altsetting\n"); 1387f1ae32a1SGerd Hoffmann return xhci_set_iface_alt(xhci, xfer->slotid, wIndex, wValue) == 0; 1388f1ae32a1SGerd Hoffmann case 0x0200 | USB_REQ_CLEAR_FEATURE: 1389f1ae32a1SGerd Hoffmann if (wValue == 0) { // endpoint halt 1390f1ae32a1SGerd Hoffmann DPRINTF("xhci: HLE clear halt\n"); 1391f1ae32a1SGerd Hoffmann return xhci_clear_halt(xhci, xfer->slotid, wIndex); 1392f1ae32a1SGerd Hoffmann } 1393f1ae32a1SGerd Hoffmann case 0x0000 | USB_REQ_SET_ADDRESS: 1394f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: warn: illegal SET_ADDRESS request\n"); 1395f1ae32a1SGerd Hoffmann return 0; 1396f1ae32a1SGerd Hoffmann default: 1397f1ae32a1SGerd Hoffmann return 0; 1398f1ae32a1SGerd Hoffmann } 1399f1ae32a1SGerd Hoffmann } 1400f1ae32a1SGerd Hoffmann #endif 1401f1ae32a1SGerd Hoffmann 1402f1ae32a1SGerd Hoffmann static int xhci_setup_packet(XHCITransfer *xfer, USBDevice *dev) 1403f1ae32a1SGerd Hoffmann { 1404f1ae32a1SGerd Hoffmann USBEndpoint *ep; 1405f1ae32a1SGerd Hoffmann int dir; 1406f1ae32a1SGerd Hoffmann 1407f1ae32a1SGerd Hoffmann dir = xfer->in_xfer ? USB_TOKEN_IN : USB_TOKEN_OUT; 1408f1ae32a1SGerd Hoffmann ep = usb_ep_get(dev, dir, xfer->epid >> 1); 1409f1ae32a1SGerd Hoffmann usb_packet_setup(&xfer->packet, dir, ep); 1410f1ae32a1SGerd Hoffmann usb_packet_addbuf(&xfer->packet, xfer->data, xfer->data_length); 1411f1ae32a1SGerd Hoffmann DPRINTF("xhci: setup packet pid 0x%x addr %d ep %d\n", 1412f1ae32a1SGerd Hoffmann xfer->packet.pid, dev->addr, ep->nr); 1413f1ae32a1SGerd Hoffmann return 0; 1414f1ae32a1SGerd Hoffmann } 1415f1ae32a1SGerd Hoffmann 1416f1ae32a1SGerd Hoffmann static int xhci_complete_packet(XHCITransfer *xfer, int ret) 1417f1ae32a1SGerd Hoffmann { 1418f1ae32a1SGerd Hoffmann if (ret == USB_RET_ASYNC) { 1419f1ae32a1SGerd Hoffmann xfer->running_async = 1; 1420f1ae32a1SGerd Hoffmann xfer->running_retry = 0; 1421f1ae32a1SGerd Hoffmann xfer->complete = 0; 1422f1ae32a1SGerd Hoffmann xfer->cancelled = 0; 1423f1ae32a1SGerd Hoffmann return 0; 1424f1ae32a1SGerd Hoffmann } else if (ret == USB_RET_NAK) { 1425f1ae32a1SGerd Hoffmann xfer->running_async = 0; 1426f1ae32a1SGerd Hoffmann xfer->running_retry = 1; 1427f1ae32a1SGerd Hoffmann xfer->complete = 0; 1428f1ae32a1SGerd Hoffmann xfer->cancelled = 0; 1429f1ae32a1SGerd Hoffmann return 0; 1430f1ae32a1SGerd Hoffmann } else { 1431f1ae32a1SGerd Hoffmann xfer->running_async = 0; 1432f1ae32a1SGerd Hoffmann xfer->running_retry = 0; 1433f1ae32a1SGerd Hoffmann xfer->complete = 1; 1434f1ae32a1SGerd Hoffmann } 1435f1ae32a1SGerd Hoffmann 1436f1ae32a1SGerd Hoffmann if (ret >= 0) { 1437f1ae32a1SGerd Hoffmann xfer->status = CC_SUCCESS; 1438f1ae32a1SGerd Hoffmann xhci_xfer_data(xfer, xfer->data, ret, xfer->in_xfer, 0, 1); 1439f1ae32a1SGerd Hoffmann return 0; 1440f1ae32a1SGerd Hoffmann } 1441f1ae32a1SGerd Hoffmann 1442f1ae32a1SGerd Hoffmann /* error */ 1443f1ae32a1SGerd Hoffmann switch (ret) { 1444f1ae32a1SGerd Hoffmann case USB_RET_NODEV: 1445f1ae32a1SGerd Hoffmann xfer->status = CC_USB_TRANSACTION_ERROR; 1446f1ae32a1SGerd Hoffmann xhci_xfer_data(xfer, xfer->data, 0, xfer->in_xfer, 0, 1); 1447f1ae32a1SGerd Hoffmann xhci_stall_ep(xfer); 1448f1ae32a1SGerd Hoffmann break; 1449f1ae32a1SGerd Hoffmann case USB_RET_STALL: 1450f1ae32a1SGerd Hoffmann xfer->status = CC_STALL_ERROR; 1451f1ae32a1SGerd Hoffmann xhci_xfer_data(xfer, xfer->data, 0, xfer->in_xfer, 0, 1); 1452f1ae32a1SGerd Hoffmann xhci_stall_ep(xfer); 1453f1ae32a1SGerd Hoffmann break; 1454f1ae32a1SGerd Hoffmann default: 1455f1ae32a1SGerd Hoffmann fprintf(stderr, "%s: FIXME: ret = %d\n", __FUNCTION__, ret); 1456f1ae32a1SGerd Hoffmann FIXME(); 1457f1ae32a1SGerd Hoffmann } 1458f1ae32a1SGerd Hoffmann return 0; 1459f1ae32a1SGerd Hoffmann } 1460f1ae32a1SGerd Hoffmann 1461f1ae32a1SGerd Hoffmann static USBDevice *xhci_find_device(XHCIPort *port, uint8_t addr) 1462f1ae32a1SGerd Hoffmann { 1463f1ae32a1SGerd Hoffmann if (!(port->portsc & PORTSC_PED)) { 1464f1ae32a1SGerd Hoffmann return NULL; 1465f1ae32a1SGerd Hoffmann } 1466f1ae32a1SGerd Hoffmann return usb_find_device(&port->port, addr); 1467f1ae32a1SGerd Hoffmann } 1468f1ae32a1SGerd Hoffmann 1469f1ae32a1SGerd Hoffmann static int xhci_fire_ctl_transfer(XHCIState *xhci, XHCITransfer *xfer) 1470f1ae32a1SGerd Hoffmann { 1471f1ae32a1SGerd Hoffmann XHCITRB *trb_setup, *trb_status; 1472f1ae32a1SGerd Hoffmann uint8_t bmRequestType; 1473f1ae32a1SGerd Hoffmann uint16_t wLength; 1474f1ae32a1SGerd Hoffmann XHCIPort *port; 1475f1ae32a1SGerd Hoffmann USBDevice *dev; 1476f1ae32a1SGerd Hoffmann int ret; 1477f1ae32a1SGerd Hoffmann 1478f1ae32a1SGerd Hoffmann DPRINTF("xhci_fire_ctl_transfer(slot=%d)\n", xfer->slotid); 1479f1ae32a1SGerd Hoffmann 1480f1ae32a1SGerd Hoffmann trb_setup = &xfer->trbs[0]; 1481f1ae32a1SGerd Hoffmann trb_status = &xfer->trbs[xfer->trb_count-1]; 1482f1ae32a1SGerd Hoffmann 1483f1ae32a1SGerd Hoffmann /* at most one Event Data TRB allowed after STATUS */ 1484f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_status) == TR_EVDATA && xfer->trb_count > 2) { 1485f1ae32a1SGerd Hoffmann trb_status--; 1486f1ae32a1SGerd Hoffmann } 1487f1ae32a1SGerd Hoffmann 1488f1ae32a1SGerd Hoffmann /* do some sanity checks */ 1489f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_setup) != TR_SETUP) { 1490f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: ep0 first TD not SETUP: %d\n", 1491f1ae32a1SGerd Hoffmann TRB_TYPE(*trb_setup)); 1492f1ae32a1SGerd Hoffmann return -1; 1493f1ae32a1SGerd Hoffmann } 1494f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_status) != TR_STATUS) { 1495f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: ep0 last TD not STATUS: %d\n", 1496f1ae32a1SGerd Hoffmann TRB_TYPE(*trb_status)); 1497f1ae32a1SGerd Hoffmann return -1; 1498f1ae32a1SGerd Hoffmann } 1499f1ae32a1SGerd Hoffmann if (!(trb_setup->control & TRB_TR_IDT)) { 1500f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: Setup TRB doesn't have IDT set\n"); 1501f1ae32a1SGerd Hoffmann return -1; 1502f1ae32a1SGerd Hoffmann } 1503f1ae32a1SGerd Hoffmann if ((trb_setup->status & 0x1ffff) != 8) { 1504f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: Setup TRB has bad length (%d)\n", 1505f1ae32a1SGerd Hoffmann (trb_setup->status & 0x1ffff)); 1506f1ae32a1SGerd Hoffmann return -1; 1507f1ae32a1SGerd Hoffmann } 1508f1ae32a1SGerd Hoffmann 1509f1ae32a1SGerd Hoffmann bmRequestType = trb_setup->parameter; 1510f1ae32a1SGerd Hoffmann wLength = trb_setup->parameter >> 48; 1511f1ae32a1SGerd Hoffmann 1512f1ae32a1SGerd Hoffmann if (xfer->data && xfer->data_alloced < wLength) { 1513f1ae32a1SGerd Hoffmann xfer->data_alloced = 0; 1514f1ae32a1SGerd Hoffmann g_free(xfer->data); 1515f1ae32a1SGerd Hoffmann xfer->data = NULL; 1516f1ae32a1SGerd Hoffmann } 1517f1ae32a1SGerd Hoffmann if (!xfer->data) { 1518f1ae32a1SGerd Hoffmann DPRINTF("xhci: alloc %d bytes data\n", wLength); 1519f1ae32a1SGerd Hoffmann xfer->data = g_malloc(wLength+1); 1520f1ae32a1SGerd Hoffmann xfer->data_alloced = wLength; 1521f1ae32a1SGerd Hoffmann } 1522f1ae32a1SGerd Hoffmann xfer->data_length = wLength; 1523f1ae32a1SGerd Hoffmann 1524f1ae32a1SGerd Hoffmann port = &xhci->ports[xhci->slots[xfer->slotid-1].port-1]; 1525f1ae32a1SGerd Hoffmann dev = xhci_find_device(port, xhci->slots[xfer->slotid-1].devaddr); 1526f1ae32a1SGerd Hoffmann if (!dev) { 1527f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot %d port %d has no device\n", xfer->slotid, 1528f1ae32a1SGerd Hoffmann xhci->slots[xfer->slotid-1].port); 1529f1ae32a1SGerd Hoffmann return -1; 1530f1ae32a1SGerd Hoffmann } 1531f1ae32a1SGerd Hoffmann 1532f1ae32a1SGerd Hoffmann xfer->in_xfer = bmRequestType & USB_DIR_IN; 1533f1ae32a1SGerd Hoffmann xfer->iso_xfer = false; 1534f1ae32a1SGerd Hoffmann 1535f1ae32a1SGerd Hoffmann xhci_setup_packet(xfer, dev); 1536f1ae32a1SGerd Hoffmann xfer->packet.parameter = trb_setup->parameter; 1537f1ae32a1SGerd Hoffmann if (!xfer->in_xfer) { 1538f1ae32a1SGerd Hoffmann xhci_xfer_data(xfer, xfer->data, wLength, 0, 1, 0); 1539f1ae32a1SGerd Hoffmann } 1540f1ae32a1SGerd Hoffmann 1541f1ae32a1SGerd Hoffmann ret = usb_handle_packet(dev, &xfer->packet); 1542f1ae32a1SGerd Hoffmann 1543f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, ret); 1544f1ae32a1SGerd Hoffmann if (!xfer->running_async && !xfer->running_retry) { 1545f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid); 1546f1ae32a1SGerd Hoffmann } 1547f1ae32a1SGerd Hoffmann return 0; 1548f1ae32a1SGerd Hoffmann } 1549f1ae32a1SGerd Hoffmann 1550f1ae32a1SGerd Hoffmann static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) 1551f1ae32a1SGerd Hoffmann { 1552f1ae32a1SGerd Hoffmann XHCIPort *port; 1553f1ae32a1SGerd Hoffmann USBDevice *dev; 1554f1ae32a1SGerd Hoffmann int ret; 1555f1ae32a1SGerd Hoffmann 1556f1ae32a1SGerd Hoffmann DPRINTF("xhci_submit(slotid=%d,epid=%d)\n", xfer->slotid, xfer->epid); 1557f1ae32a1SGerd Hoffmann 1558f1ae32a1SGerd Hoffmann xfer->in_xfer = epctx->type>>2; 1559f1ae32a1SGerd Hoffmann 1560f1ae32a1SGerd Hoffmann if (xfer->data && xfer->data_alloced < xfer->data_length) { 1561f1ae32a1SGerd Hoffmann xfer->data_alloced = 0; 1562f1ae32a1SGerd Hoffmann g_free(xfer->data); 1563f1ae32a1SGerd Hoffmann xfer->data = NULL; 1564f1ae32a1SGerd Hoffmann } 1565f1ae32a1SGerd Hoffmann if (!xfer->data && xfer->data_length) { 1566f1ae32a1SGerd Hoffmann DPRINTF("xhci: alloc %d bytes data\n", xfer->data_length); 1567f1ae32a1SGerd Hoffmann xfer->data = g_malloc(xfer->data_length); 1568f1ae32a1SGerd Hoffmann xfer->data_alloced = xfer->data_length; 1569f1ae32a1SGerd Hoffmann } 1570f1ae32a1SGerd Hoffmann if (epctx->type == ET_ISO_IN || epctx->type == ET_ISO_OUT) { 1571f1ae32a1SGerd Hoffmann if (!xfer->bg_xfer) { 1572f1ae32a1SGerd Hoffmann xfer->pkts = 1; 1573f1ae32a1SGerd Hoffmann } 1574f1ae32a1SGerd Hoffmann } else { 1575f1ae32a1SGerd Hoffmann xfer->pkts = 0; 1576f1ae32a1SGerd Hoffmann } 1577f1ae32a1SGerd Hoffmann 1578f1ae32a1SGerd Hoffmann port = &xhci->ports[xhci->slots[xfer->slotid-1].port-1]; 1579f1ae32a1SGerd Hoffmann dev = xhci_find_device(port, xhci->slots[xfer->slotid-1].devaddr); 1580f1ae32a1SGerd Hoffmann if (!dev) { 1581f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot %d port %d has no device\n", xfer->slotid, 1582f1ae32a1SGerd Hoffmann xhci->slots[xfer->slotid-1].port); 1583f1ae32a1SGerd Hoffmann return -1; 1584f1ae32a1SGerd Hoffmann } 1585f1ae32a1SGerd Hoffmann 1586f1ae32a1SGerd Hoffmann xhci_setup_packet(xfer, dev); 1587f1ae32a1SGerd Hoffmann 1588f1ae32a1SGerd Hoffmann switch(epctx->type) { 1589f1ae32a1SGerd Hoffmann case ET_INTR_OUT: 1590f1ae32a1SGerd Hoffmann case ET_INTR_IN: 1591f1ae32a1SGerd Hoffmann case ET_BULK_OUT: 1592f1ae32a1SGerd Hoffmann case ET_BULK_IN: 1593f1ae32a1SGerd Hoffmann break; 1594f1ae32a1SGerd Hoffmann case ET_ISO_OUT: 1595f1ae32a1SGerd Hoffmann case ET_ISO_IN: 1596f1ae32a1SGerd Hoffmann FIXME(); 1597f1ae32a1SGerd Hoffmann break; 1598f1ae32a1SGerd Hoffmann default: 1599f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: unknown or unhandled EP " 1600f1ae32a1SGerd Hoffmann "(type %d, in %d, ep %02x)\n", 1601f1ae32a1SGerd Hoffmann epctx->type, xfer->in_xfer, xfer->epid); 1602f1ae32a1SGerd Hoffmann return -1; 1603f1ae32a1SGerd Hoffmann } 1604f1ae32a1SGerd Hoffmann 1605f1ae32a1SGerd Hoffmann if (!xfer->in_xfer) { 1606f1ae32a1SGerd Hoffmann xhci_xfer_data(xfer, xfer->data, xfer->data_length, 0, 1, 0); 1607f1ae32a1SGerd Hoffmann } 1608f1ae32a1SGerd Hoffmann ret = usb_handle_packet(dev, &xfer->packet); 1609f1ae32a1SGerd Hoffmann 1610f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, ret); 1611f1ae32a1SGerd Hoffmann if (!xfer->running_async && !xfer->running_retry) { 1612f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid); 1613f1ae32a1SGerd Hoffmann } 1614f1ae32a1SGerd Hoffmann return 0; 1615f1ae32a1SGerd Hoffmann } 1616f1ae32a1SGerd Hoffmann 1617f1ae32a1SGerd Hoffmann static int xhci_fire_transfer(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) 1618f1ae32a1SGerd Hoffmann { 1619f1ae32a1SGerd Hoffmann int i; 1620f1ae32a1SGerd Hoffmann unsigned int length = 0; 1621f1ae32a1SGerd Hoffmann XHCITRB *trb; 1622f1ae32a1SGerd Hoffmann 1623f1ae32a1SGerd Hoffmann DPRINTF("xhci_fire_transfer(slotid=%d,epid=%d)\n", xfer->slotid, xfer->epid); 1624f1ae32a1SGerd Hoffmann 1625f1ae32a1SGerd Hoffmann for (i = 0; i < xfer->trb_count; i++) { 1626f1ae32a1SGerd Hoffmann trb = &xfer->trbs[i]; 1627f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb) == TR_NORMAL || TRB_TYPE(*trb) == TR_ISOCH) { 1628f1ae32a1SGerd Hoffmann length += trb->status & 0x1ffff; 1629f1ae32a1SGerd Hoffmann } 1630f1ae32a1SGerd Hoffmann } 1631f1ae32a1SGerd Hoffmann DPRINTF("xhci: total TD length=%d\n", length); 1632f1ae32a1SGerd Hoffmann 1633f1ae32a1SGerd Hoffmann if (!epctx->has_bg) { 1634f1ae32a1SGerd Hoffmann xfer->data_length = length; 1635f1ae32a1SGerd Hoffmann xfer->backgrounded = 0; 1636f1ae32a1SGerd Hoffmann return xhci_submit(xhci, xfer, epctx); 1637f1ae32a1SGerd Hoffmann } else { 1638f1ae32a1SGerd Hoffmann if (!epctx->bg_running) { 1639f1ae32a1SGerd Hoffmann for (i = 0; i < BG_XFERS; i++) { 1640f1ae32a1SGerd Hoffmann XHCITransfer *t = &epctx->bg_transfers[i]; 1641f1ae32a1SGerd Hoffmann t->xhci = xhci; 1642f1ae32a1SGerd Hoffmann t->epid = xfer->epid; 1643f1ae32a1SGerd Hoffmann t->slotid = xfer->slotid; 1644f1ae32a1SGerd Hoffmann t->pkts = BG_PKTS; 1645f1ae32a1SGerd Hoffmann t->pktsize = epctx->max_psize; 1646f1ae32a1SGerd Hoffmann t->data_length = t->pkts * t->pktsize; 1647f1ae32a1SGerd Hoffmann t->bg_xfer = 1; 1648f1ae32a1SGerd Hoffmann if (xhci_submit(xhci, t, epctx) < 0) { 1649f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bg submit failed\n"); 1650f1ae32a1SGerd Hoffmann return -1; 1651f1ae32a1SGerd Hoffmann } 1652f1ae32a1SGerd Hoffmann } 1653f1ae32a1SGerd Hoffmann epctx->bg_running = 1; 1654f1ae32a1SGerd Hoffmann } 1655f1ae32a1SGerd Hoffmann xfer->backgrounded = 1; 1656f1ae32a1SGerd Hoffmann xhci_bg_update(xhci, epctx); 1657f1ae32a1SGerd Hoffmann return 0; 1658f1ae32a1SGerd Hoffmann } 1659f1ae32a1SGerd Hoffmann } 1660f1ae32a1SGerd Hoffmann 1661f1ae32a1SGerd Hoffmann static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, unsigned int epid) 1662f1ae32a1SGerd Hoffmann { 1663f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1664f1ae32a1SGerd Hoffmann int length; 1665f1ae32a1SGerd Hoffmann int i; 1666f1ae32a1SGerd Hoffmann 1667f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1668f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1669f1ae32a1SGerd Hoffmann DPRINTF("xhci_kick_ep(%d, %d)\n", slotid, epid); 1670f1ae32a1SGerd Hoffmann 1671f1ae32a1SGerd Hoffmann if (!xhci->slots[slotid-1].enabled) { 1672f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: xhci_kick_ep for disabled slot %d\n", slotid); 1673f1ae32a1SGerd Hoffmann return; 1674f1ae32a1SGerd Hoffmann } 1675f1ae32a1SGerd Hoffmann epctx = xhci->slots[slotid-1].eps[epid-1]; 1676f1ae32a1SGerd Hoffmann if (!epctx) { 1677f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: xhci_kick_ep for disabled endpoint %d,%d\n", 1678f1ae32a1SGerd Hoffmann epid, slotid); 1679f1ae32a1SGerd Hoffmann return; 1680f1ae32a1SGerd Hoffmann } 1681f1ae32a1SGerd Hoffmann 1682f1ae32a1SGerd Hoffmann if (epctx->retry) { 1683f1ae32a1SGerd Hoffmann /* retry nak'ed transfer */ 1684f1ae32a1SGerd Hoffmann XHCITransfer *xfer = epctx->retry; 1685f1ae32a1SGerd Hoffmann int result; 1686f1ae32a1SGerd Hoffmann 1687f1ae32a1SGerd Hoffmann DPRINTF("xhci: retry nack'ed transfer ...\n"); 1688f1ae32a1SGerd Hoffmann assert(xfer->running_retry); 1689f1ae32a1SGerd Hoffmann xhci_setup_packet(xfer, xfer->packet.ep->dev); 1690f1ae32a1SGerd Hoffmann result = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1691f1ae32a1SGerd Hoffmann if (result == USB_RET_NAK) { 1692f1ae32a1SGerd Hoffmann DPRINTF("xhci: ... xfer still nacked\n"); 1693f1ae32a1SGerd Hoffmann return; 1694f1ae32a1SGerd Hoffmann } 1695f1ae32a1SGerd Hoffmann DPRINTF("xhci: ... result %d\n", result); 1696f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, result); 1697f1ae32a1SGerd Hoffmann assert(!xfer->running_retry); 1698f1ae32a1SGerd Hoffmann epctx->retry = NULL; 1699f1ae32a1SGerd Hoffmann } 1700f1ae32a1SGerd Hoffmann 1701f1ae32a1SGerd Hoffmann if (epctx->state == EP_HALTED) { 1702f1ae32a1SGerd Hoffmann DPRINTF("xhci: ep halted, not running schedule\n"); 1703f1ae32a1SGerd Hoffmann return; 1704f1ae32a1SGerd Hoffmann } 1705f1ae32a1SGerd Hoffmann 1706f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_RUNNING); 1707f1ae32a1SGerd Hoffmann 1708f1ae32a1SGerd Hoffmann while (1) { 1709f1ae32a1SGerd Hoffmann XHCITransfer *xfer = &epctx->transfers[epctx->next_xfer]; 1710f1ae32a1SGerd Hoffmann if (xfer->running_async || xfer->running_retry || xfer->backgrounded) { 1711f1ae32a1SGerd Hoffmann DPRINTF("xhci: ep is busy (#%d,%d,%d,%d)\n", 1712f1ae32a1SGerd Hoffmann epctx->next_xfer, xfer->running_async, 1713f1ae32a1SGerd Hoffmann xfer->running_retry, xfer->backgrounded); 1714f1ae32a1SGerd Hoffmann break; 1715f1ae32a1SGerd Hoffmann } else { 1716f1ae32a1SGerd Hoffmann DPRINTF("xhci: ep: using #%d\n", epctx->next_xfer); 1717f1ae32a1SGerd Hoffmann } 1718f1ae32a1SGerd Hoffmann length = xhci_ring_chain_length(xhci, &epctx->ring); 1719f1ae32a1SGerd Hoffmann if (length < 0) { 1720f1ae32a1SGerd Hoffmann DPRINTF("xhci: incomplete TD (%d TRBs)\n", -length); 1721f1ae32a1SGerd Hoffmann break; 1722f1ae32a1SGerd Hoffmann } else if (length == 0) { 1723f1ae32a1SGerd Hoffmann break; 1724f1ae32a1SGerd Hoffmann } 1725f1ae32a1SGerd Hoffmann DPRINTF("xhci: fetching %d-TRB TD\n", length); 1726f1ae32a1SGerd Hoffmann if (xfer->trbs && xfer->trb_alloced < length) { 1727f1ae32a1SGerd Hoffmann xfer->trb_count = 0; 1728f1ae32a1SGerd Hoffmann xfer->trb_alloced = 0; 1729f1ae32a1SGerd Hoffmann g_free(xfer->trbs); 1730f1ae32a1SGerd Hoffmann xfer->trbs = NULL; 1731f1ae32a1SGerd Hoffmann } 1732f1ae32a1SGerd Hoffmann if (!xfer->trbs) { 1733f1ae32a1SGerd Hoffmann xfer->trbs = g_malloc(sizeof(XHCITRB) * length); 1734f1ae32a1SGerd Hoffmann xfer->trb_alloced = length; 1735f1ae32a1SGerd Hoffmann } 1736f1ae32a1SGerd Hoffmann xfer->trb_count = length; 1737f1ae32a1SGerd Hoffmann 1738f1ae32a1SGerd Hoffmann for (i = 0; i < length; i++) { 1739f1ae32a1SGerd Hoffmann assert(xhci_ring_fetch(xhci, &epctx->ring, &xfer->trbs[i], NULL)); 1740f1ae32a1SGerd Hoffmann } 1741f1ae32a1SGerd Hoffmann xfer->xhci = xhci; 1742f1ae32a1SGerd Hoffmann xfer->epid = epid; 1743f1ae32a1SGerd Hoffmann xfer->slotid = slotid; 1744f1ae32a1SGerd Hoffmann 1745f1ae32a1SGerd Hoffmann if (epid == 1) { 1746f1ae32a1SGerd Hoffmann if (xhci_fire_ctl_transfer(xhci, xfer) >= 0) { 1747f1ae32a1SGerd Hoffmann epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; 1748f1ae32a1SGerd Hoffmann } else { 1749f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: error firing CTL transfer\n"); 1750f1ae32a1SGerd Hoffmann } 1751f1ae32a1SGerd Hoffmann } else { 1752f1ae32a1SGerd Hoffmann if (xhci_fire_transfer(xhci, xfer, epctx) >= 0) { 1753f1ae32a1SGerd Hoffmann epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; 1754f1ae32a1SGerd Hoffmann } else { 1755f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: error firing data transfer\n"); 1756f1ae32a1SGerd Hoffmann } 1757f1ae32a1SGerd Hoffmann } 1758f1ae32a1SGerd Hoffmann 1759f1ae32a1SGerd Hoffmann if (epctx->state == EP_HALTED) { 1760f1ae32a1SGerd Hoffmann DPRINTF("xhci: ep halted, stopping schedule\n"); 1761f1ae32a1SGerd Hoffmann break; 1762f1ae32a1SGerd Hoffmann } 1763f1ae32a1SGerd Hoffmann if (xfer->running_retry) { 1764f1ae32a1SGerd Hoffmann DPRINTF("xhci: xfer nacked, stopping schedule\n"); 1765f1ae32a1SGerd Hoffmann epctx->retry = xfer; 1766f1ae32a1SGerd Hoffmann break; 1767f1ae32a1SGerd Hoffmann } 1768f1ae32a1SGerd Hoffmann } 1769f1ae32a1SGerd Hoffmann } 1770f1ae32a1SGerd Hoffmann 1771f1ae32a1SGerd Hoffmann static TRBCCode xhci_enable_slot(XHCIState *xhci, unsigned int slotid) 1772f1ae32a1SGerd Hoffmann { 1773f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1774f1ae32a1SGerd Hoffmann DPRINTF("xhci_enable_slot(%d)\n", slotid); 1775f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].enabled = 1; 1776f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].port = 0; 1777f1ae32a1SGerd Hoffmann memset(xhci->slots[slotid-1].eps, 0, sizeof(XHCIEPContext*)*31); 1778f1ae32a1SGerd Hoffmann 1779f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1780f1ae32a1SGerd Hoffmann } 1781f1ae32a1SGerd Hoffmann 1782f1ae32a1SGerd Hoffmann static TRBCCode xhci_disable_slot(XHCIState *xhci, unsigned int slotid) 1783f1ae32a1SGerd Hoffmann { 1784f1ae32a1SGerd Hoffmann int i; 1785f1ae32a1SGerd Hoffmann 1786f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1787f1ae32a1SGerd Hoffmann DPRINTF("xhci_disable_slot(%d)\n", slotid); 1788f1ae32a1SGerd Hoffmann 1789f1ae32a1SGerd Hoffmann for (i = 1; i <= 31; i++) { 1790f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 1791f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1792f1ae32a1SGerd Hoffmann } 1793f1ae32a1SGerd Hoffmann } 1794f1ae32a1SGerd Hoffmann 1795f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].enabled = 0; 1796f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1797f1ae32a1SGerd Hoffmann } 1798f1ae32a1SGerd Hoffmann 1799f1ae32a1SGerd Hoffmann static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid, 1800f1ae32a1SGerd Hoffmann uint64_t pictx, bool bsr) 1801f1ae32a1SGerd Hoffmann { 1802f1ae32a1SGerd Hoffmann XHCISlot *slot; 1803f1ae32a1SGerd Hoffmann USBDevice *dev; 180459a70ccdSDavid Gibson dma_addr_t ictx, octx, dcbaap; 1805f1ae32a1SGerd Hoffmann uint64_t poctx; 1806f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1807f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1808f1ae32a1SGerd Hoffmann uint32_t ep0_ctx[5]; 1809f1ae32a1SGerd Hoffmann unsigned int port; 1810f1ae32a1SGerd Hoffmann int i; 1811f1ae32a1SGerd Hoffmann TRBCCode res; 1812f1ae32a1SGerd Hoffmann 1813f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1814f1ae32a1SGerd Hoffmann DPRINTF("xhci_address_slot(%d)\n", slotid); 1815f1ae32a1SGerd Hoffmann 1816f1ae32a1SGerd Hoffmann dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); 181759a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, dcbaap + 8*slotid, &poctx, sizeof(poctx)); 1818f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1819f1ae32a1SGerd Hoffmann octx = xhci_mask64(le64_to_cpu(poctx)); 1820f1ae32a1SGerd Hoffmann 182159a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 182259a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1823f1ae32a1SGerd Hoffmann 182459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1825f1ae32a1SGerd Hoffmann 1826f1ae32a1SGerd Hoffmann if (ictl_ctx[0] != 0x0 || ictl_ctx[1] != 0x3) { 1827f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1828f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1829f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1830f1ae32a1SGerd Hoffmann } 1831f1ae32a1SGerd Hoffmann 183259a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, slot_ctx, sizeof(slot_ctx)); 183359a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+64, ep0_ctx, sizeof(ep0_ctx)); 1834f1ae32a1SGerd Hoffmann 1835f1ae32a1SGerd Hoffmann DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", 1836f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1837f1ae32a1SGerd Hoffmann 1838f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", 1839f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 1840f1ae32a1SGerd Hoffmann 1841f1ae32a1SGerd Hoffmann port = (slot_ctx[1]>>16) & 0xFF; 1842f1ae32a1SGerd Hoffmann dev = xhci->ports[port-1].port.dev; 1843f1ae32a1SGerd Hoffmann 1844f1ae32a1SGerd Hoffmann if (port < 1 || port > MAXPORTS) { 1845f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad port %d\n", port); 1846f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1847f1ae32a1SGerd Hoffmann } else if (!dev) { 1848f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: port %d not connected\n", port); 1849f1ae32a1SGerd Hoffmann return CC_USB_TRANSACTION_ERROR; 1850f1ae32a1SGerd Hoffmann } 1851f1ae32a1SGerd Hoffmann 1852f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 1853f1ae32a1SGerd Hoffmann if (xhci->slots[i].port == port) { 1854f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: port %d already assigned to slot %d\n", 1855f1ae32a1SGerd Hoffmann port, i+1); 1856f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1857f1ae32a1SGerd Hoffmann } 1858f1ae32a1SGerd Hoffmann } 1859f1ae32a1SGerd Hoffmann 1860f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1861f1ae32a1SGerd Hoffmann slot->port = port; 1862f1ae32a1SGerd Hoffmann slot->ctx = octx; 1863f1ae32a1SGerd Hoffmann 1864f1ae32a1SGerd Hoffmann if (bsr) { 1865f1ae32a1SGerd Hoffmann slot_ctx[3] = SLOT_DEFAULT << SLOT_STATE_SHIFT; 1866f1ae32a1SGerd Hoffmann } else { 1867f1ae32a1SGerd Hoffmann slot->devaddr = xhci->devaddr++; 1868f1ae32a1SGerd Hoffmann slot_ctx[3] = (SLOT_ADDRESSED << SLOT_STATE_SHIFT) | slot->devaddr; 1869f1ae32a1SGerd Hoffmann DPRINTF("xhci: device address is %d\n", slot->devaddr); 1870f1ae32a1SGerd Hoffmann usb_device_handle_control(dev, NULL, 1871f1ae32a1SGerd Hoffmann DeviceOutRequest | USB_REQ_SET_ADDRESS, 1872f1ae32a1SGerd Hoffmann slot->devaddr, 0, 0, NULL); 1873f1ae32a1SGerd Hoffmann } 1874f1ae32a1SGerd Hoffmann 1875f1ae32a1SGerd Hoffmann res = xhci_enable_ep(xhci, slotid, 1, octx+32, ep0_ctx); 1876f1ae32a1SGerd Hoffmann 1877f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1878f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1879f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", 1880f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 1881f1ae32a1SGerd Hoffmann 188259a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 188359a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 1884f1ae32a1SGerd Hoffmann 1885f1ae32a1SGerd Hoffmann return res; 1886f1ae32a1SGerd Hoffmann } 1887f1ae32a1SGerd Hoffmann 1888f1ae32a1SGerd Hoffmann 1889f1ae32a1SGerd Hoffmann static TRBCCode xhci_configure_slot(XHCIState *xhci, unsigned int slotid, 1890f1ae32a1SGerd Hoffmann uint64_t pictx, bool dc) 1891f1ae32a1SGerd Hoffmann { 189259a70ccdSDavid Gibson dma_addr_t ictx, octx; 1893f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1894f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1895f1ae32a1SGerd Hoffmann uint32_t islot_ctx[4]; 1896f1ae32a1SGerd Hoffmann uint32_t ep_ctx[5]; 1897f1ae32a1SGerd Hoffmann int i; 1898f1ae32a1SGerd Hoffmann TRBCCode res; 1899f1ae32a1SGerd Hoffmann 1900f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1901f1ae32a1SGerd Hoffmann DPRINTF("xhci_configure_slot(%d)\n", slotid); 1902f1ae32a1SGerd Hoffmann 1903f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1904f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 1905f1ae32a1SGerd Hoffmann 190659a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 190759a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1908f1ae32a1SGerd Hoffmann 1909f1ae32a1SGerd Hoffmann if (dc) { 1910f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 1911f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 1912f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1913f1ae32a1SGerd Hoffmann } 1914f1ae32a1SGerd Hoffmann } 1915f1ae32a1SGerd Hoffmann 191659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1917f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 1918f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_ADDRESSED << SLOT_STATE_SHIFT; 1919f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1920f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 192159a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1922f1ae32a1SGerd Hoffmann 1923f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1924f1ae32a1SGerd Hoffmann } 1925f1ae32a1SGerd Hoffmann 192659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1927f1ae32a1SGerd Hoffmann 1928f1ae32a1SGerd Hoffmann if ((ictl_ctx[0] & 0x3) != 0x0 || (ictl_ctx[1] & 0x3) != 0x1) { 1929f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1930f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1931f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1932f1ae32a1SGerd Hoffmann } 1933f1ae32a1SGerd Hoffmann 193459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, islot_ctx, sizeof(islot_ctx)); 193559a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1936f1ae32a1SGerd Hoffmann 1937f1ae32a1SGerd Hoffmann if (SLOT_STATE(slot_ctx[3]) < SLOT_ADDRESSED) { 1938f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid slot state %08x\n", slot_ctx[3]); 1939f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1940f1ae32a1SGerd Hoffmann } 1941f1ae32a1SGerd Hoffmann 1942f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 1943f1ae32a1SGerd Hoffmann if (ictl_ctx[0] & (1<<i)) { 1944f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1945f1ae32a1SGerd Hoffmann } 1946f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & (1<<i)) { 194759a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32+(32*i), ep_ctx, 194859a70ccdSDavid Gibson sizeof(ep_ctx)); 1949f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep%d.%d context: %08x %08x %08x %08x %08x\n", 1950f1ae32a1SGerd Hoffmann i/2, i%2, ep_ctx[0], ep_ctx[1], ep_ctx[2], 1951f1ae32a1SGerd Hoffmann ep_ctx[3], ep_ctx[4]); 1952f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1953f1ae32a1SGerd Hoffmann res = xhci_enable_ep(xhci, slotid, i, octx+(32*i), ep_ctx); 1954f1ae32a1SGerd Hoffmann if (res != CC_SUCCESS) { 1955f1ae32a1SGerd Hoffmann return res; 1956f1ae32a1SGerd Hoffmann } 1957f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep%d.%d context: %08x %08x %08x %08x %08x\n", 1958f1ae32a1SGerd Hoffmann i/2, i%2, ep_ctx[0], ep_ctx[1], ep_ctx[2], 1959f1ae32a1SGerd Hoffmann ep_ctx[3], ep_ctx[4]); 196059a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+(32*i), ep_ctx, sizeof(ep_ctx)); 1961f1ae32a1SGerd Hoffmann } 1962f1ae32a1SGerd Hoffmann } 1963f1ae32a1SGerd Hoffmann 1964f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 1965f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_CONFIGURED << SLOT_STATE_SHIFT; 1966f1ae32a1SGerd Hoffmann slot_ctx[0] &= ~(SLOT_CONTEXT_ENTRIES_MASK << SLOT_CONTEXT_ENTRIES_SHIFT); 1967f1ae32a1SGerd Hoffmann slot_ctx[0] |= islot_ctx[0] & (SLOT_CONTEXT_ENTRIES_MASK << 1968f1ae32a1SGerd Hoffmann SLOT_CONTEXT_ENTRIES_SHIFT); 1969f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1970f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1971f1ae32a1SGerd Hoffmann 197259a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1973f1ae32a1SGerd Hoffmann 1974f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1975f1ae32a1SGerd Hoffmann } 1976f1ae32a1SGerd Hoffmann 1977f1ae32a1SGerd Hoffmann 1978f1ae32a1SGerd Hoffmann static TRBCCode xhci_evaluate_slot(XHCIState *xhci, unsigned int slotid, 1979f1ae32a1SGerd Hoffmann uint64_t pictx) 1980f1ae32a1SGerd Hoffmann { 198159a70ccdSDavid Gibson dma_addr_t ictx, octx; 1982f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1983f1ae32a1SGerd Hoffmann uint32_t iep0_ctx[5]; 1984f1ae32a1SGerd Hoffmann uint32_t ep0_ctx[5]; 1985f1ae32a1SGerd Hoffmann uint32_t islot_ctx[4]; 1986f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1987f1ae32a1SGerd Hoffmann 1988f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1989f1ae32a1SGerd Hoffmann DPRINTF("xhci_evaluate_slot(%d)\n", slotid); 1990f1ae32a1SGerd Hoffmann 1991f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1992f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 1993f1ae32a1SGerd Hoffmann 199459a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 199559a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1996f1ae32a1SGerd Hoffmann 199759a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1998f1ae32a1SGerd Hoffmann 1999f1ae32a1SGerd Hoffmann if (ictl_ctx[0] != 0x0 || ictl_ctx[1] & ~0x3) { 2000f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 2001f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 2002f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 2003f1ae32a1SGerd Hoffmann } 2004f1ae32a1SGerd Hoffmann 2005f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & 0x1) { 200659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, islot_ctx, sizeof(islot_ctx)); 2007f1ae32a1SGerd Hoffmann 2008f1ae32a1SGerd Hoffmann DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", 2009f1ae32a1SGerd Hoffmann islot_ctx[0], islot_ctx[1], islot_ctx[2], islot_ctx[3]); 2010f1ae32a1SGerd Hoffmann 201159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 2012f1ae32a1SGerd Hoffmann 2013f1ae32a1SGerd Hoffmann slot_ctx[1] &= ~0xFFFF; /* max exit latency */ 2014f1ae32a1SGerd Hoffmann slot_ctx[1] |= islot_ctx[1] & 0xFFFF; 2015f1ae32a1SGerd Hoffmann slot_ctx[2] &= ~0xFF00000; /* interrupter target */ 2016f1ae32a1SGerd Hoffmann slot_ctx[2] |= islot_ctx[2] & 0xFF000000; 2017f1ae32a1SGerd Hoffmann 2018f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 2019f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 2020f1ae32a1SGerd Hoffmann 202159a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 2022f1ae32a1SGerd Hoffmann } 2023f1ae32a1SGerd Hoffmann 2024f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & 0x2) { 202559a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+64, iep0_ctx, sizeof(iep0_ctx)); 2026f1ae32a1SGerd Hoffmann 2027f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", 2028f1ae32a1SGerd Hoffmann iep0_ctx[0], iep0_ctx[1], iep0_ctx[2], 2029f1ae32a1SGerd Hoffmann iep0_ctx[3], iep0_ctx[4]); 2030f1ae32a1SGerd Hoffmann 203159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 2032f1ae32a1SGerd Hoffmann 2033f1ae32a1SGerd Hoffmann ep0_ctx[1] &= ~0xFFFF0000; /* max packet size*/ 2034f1ae32a1SGerd Hoffmann ep0_ctx[1] |= iep0_ctx[1] & 0xFFFF0000; 2035f1ae32a1SGerd Hoffmann 2036f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", 2037f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 2038f1ae32a1SGerd Hoffmann 203959a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 2040f1ae32a1SGerd Hoffmann } 2041f1ae32a1SGerd Hoffmann 2042f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2043f1ae32a1SGerd Hoffmann } 2044f1ae32a1SGerd Hoffmann 2045f1ae32a1SGerd Hoffmann static TRBCCode xhci_reset_slot(XHCIState *xhci, unsigned int slotid) 2046f1ae32a1SGerd Hoffmann { 2047f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 204859a70ccdSDavid Gibson dma_addr_t octx; 2049f1ae32a1SGerd Hoffmann int i; 2050f1ae32a1SGerd Hoffmann 2051f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 2052f1ae32a1SGerd Hoffmann DPRINTF("xhci_reset_slot(%d)\n", slotid); 2053f1ae32a1SGerd Hoffmann 2054f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 2055f1ae32a1SGerd Hoffmann 205659a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 2057f1ae32a1SGerd Hoffmann 2058f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 2059f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 2060f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 2061f1ae32a1SGerd Hoffmann } 2062f1ae32a1SGerd Hoffmann } 2063f1ae32a1SGerd Hoffmann 206459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 2065f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 2066f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_DEFAULT << SLOT_STATE_SHIFT; 2067f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 2068f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 206959a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 2070f1ae32a1SGerd Hoffmann 2071f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2072f1ae32a1SGerd Hoffmann } 2073f1ae32a1SGerd Hoffmann 2074f1ae32a1SGerd Hoffmann static unsigned int xhci_get_slot(XHCIState *xhci, XHCIEvent *event, XHCITRB *trb) 2075f1ae32a1SGerd Hoffmann { 2076f1ae32a1SGerd Hoffmann unsigned int slotid; 2077f1ae32a1SGerd Hoffmann slotid = (trb->control >> TRB_CR_SLOTID_SHIFT) & TRB_CR_SLOTID_MASK; 2078f1ae32a1SGerd Hoffmann if (slotid < 1 || slotid > MAXSLOTS) { 2079f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad slot id %d\n", slotid); 2080f1ae32a1SGerd Hoffmann event->ccode = CC_TRB_ERROR; 2081f1ae32a1SGerd Hoffmann return 0; 2082f1ae32a1SGerd Hoffmann } else if (!xhci->slots[slotid-1].enabled) { 2083f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot id %d not enabled\n", slotid); 2084f1ae32a1SGerd Hoffmann event->ccode = CC_SLOT_NOT_ENABLED_ERROR; 2085f1ae32a1SGerd Hoffmann return 0; 2086f1ae32a1SGerd Hoffmann } 2087f1ae32a1SGerd Hoffmann return slotid; 2088f1ae32a1SGerd Hoffmann } 2089f1ae32a1SGerd Hoffmann 2090f1ae32a1SGerd Hoffmann static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx) 2091f1ae32a1SGerd Hoffmann { 209259a70ccdSDavid Gibson dma_addr_t ctx; 2093f1ae32a1SGerd Hoffmann uint8_t bw_ctx[MAXPORTS+1]; 2094f1ae32a1SGerd Hoffmann 2095f1ae32a1SGerd Hoffmann DPRINTF("xhci_get_port_bandwidth()\n"); 2096f1ae32a1SGerd Hoffmann 2097f1ae32a1SGerd Hoffmann ctx = xhci_mask64(pctx); 2098f1ae32a1SGerd Hoffmann 209959a70ccdSDavid Gibson DPRINTF("xhci: bandwidth context at "DMA_ADDR_FMT"\n", ctx); 2100f1ae32a1SGerd Hoffmann 2101f1ae32a1SGerd Hoffmann /* TODO: actually implement real values here */ 2102f1ae32a1SGerd Hoffmann bw_ctx[0] = 0; 2103f1ae32a1SGerd Hoffmann memset(&bw_ctx[1], 80, MAXPORTS); /* 80% */ 210459a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, ctx, bw_ctx, sizeof(bw_ctx)); 2105f1ae32a1SGerd Hoffmann 2106f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2107f1ae32a1SGerd Hoffmann } 2108f1ae32a1SGerd Hoffmann 2109f1ae32a1SGerd Hoffmann static uint32_t rotl(uint32_t v, unsigned count) 2110f1ae32a1SGerd Hoffmann { 2111f1ae32a1SGerd Hoffmann count &= 31; 2112f1ae32a1SGerd Hoffmann return (v << count) | (v >> (32 - count)); 2113f1ae32a1SGerd Hoffmann } 2114f1ae32a1SGerd Hoffmann 2115f1ae32a1SGerd Hoffmann 2116f1ae32a1SGerd Hoffmann static uint32_t xhci_nec_challenge(uint32_t hi, uint32_t lo) 2117f1ae32a1SGerd Hoffmann { 2118f1ae32a1SGerd Hoffmann uint32_t val; 2119f1ae32a1SGerd Hoffmann val = rotl(lo - 0x49434878, 32 - ((hi>>8) & 0x1F)); 2120f1ae32a1SGerd Hoffmann val += rotl(lo + 0x49434878, hi & 0x1F); 2121f1ae32a1SGerd Hoffmann val -= rotl(hi ^ 0x49434878, (lo >> 16) & 0x1F); 2122f1ae32a1SGerd Hoffmann return ~val; 2123f1ae32a1SGerd Hoffmann } 2124f1ae32a1SGerd Hoffmann 212559a70ccdSDavid Gibson static void xhci_via_challenge(XHCIState *xhci, uint64_t addr) 2126f1ae32a1SGerd Hoffmann { 2127f1ae32a1SGerd Hoffmann uint32_t buf[8]; 2128f1ae32a1SGerd Hoffmann uint32_t obuf[8]; 212959a70ccdSDavid Gibson dma_addr_t paddr = xhci_mask64(addr); 2130f1ae32a1SGerd Hoffmann 213159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, paddr, &buf, 32); 2132f1ae32a1SGerd Hoffmann 2133f1ae32a1SGerd Hoffmann memcpy(obuf, buf, sizeof(obuf)); 2134f1ae32a1SGerd Hoffmann 2135f1ae32a1SGerd Hoffmann if ((buf[0] & 0xff) == 2) { 2136f1ae32a1SGerd Hoffmann obuf[0] = 0x49932000 + 0x54dc200 * buf[2] + 0x7429b578 * buf[3]; 2137f1ae32a1SGerd Hoffmann obuf[0] |= (buf[2] * buf[3]) & 0xff; 2138f1ae32a1SGerd Hoffmann obuf[1] = 0x0132bb37 + 0xe89 * buf[2] + 0xf09 * buf[3]; 2139f1ae32a1SGerd Hoffmann obuf[2] = 0x0066c2e9 + 0x2091 * buf[2] + 0x19bd * buf[3]; 2140f1ae32a1SGerd Hoffmann obuf[3] = 0xd5281342 + 0x2cc9691 * buf[2] + 0x2367662 * buf[3]; 2141f1ae32a1SGerd Hoffmann obuf[4] = 0x0123c75c + 0x1595 * buf[2] + 0x19ec * buf[3]; 2142f1ae32a1SGerd Hoffmann obuf[5] = 0x00f695de + 0x26fd * buf[2] + 0x3e9 * buf[3]; 2143f1ae32a1SGerd Hoffmann obuf[6] = obuf[2] ^ obuf[3] ^ 0x29472956; 2144f1ae32a1SGerd Hoffmann obuf[7] = obuf[2] ^ obuf[3] ^ 0x65866593; 2145f1ae32a1SGerd Hoffmann } 2146f1ae32a1SGerd Hoffmann 214759a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, paddr, &obuf, 32); 2148f1ae32a1SGerd Hoffmann } 2149f1ae32a1SGerd Hoffmann 2150f1ae32a1SGerd Hoffmann static void xhci_process_commands(XHCIState *xhci) 2151f1ae32a1SGerd Hoffmann { 2152f1ae32a1SGerd Hoffmann XHCITRB trb; 2153f1ae32a1SGerd Hoffmann TRBType type; 2154f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_COMMAND_COMPLETE, CC_SUCCESS}; 215559a70ccdSDavid Gibson dma_addr_t addr; 2156f1ae32a1SGerd Hoffmann unsigned int i, slotid = 0; 2157f1ae32a1SGerd Hoffmann 2158f1ae32a1SGerd Hoffmann DPRINTF("xhci_process_commands()\n"); 2159f1ae32a1SGerd Hoffmann if (!xhci_running(xhci)) { 2160f1ae32a1SGerd Hoffmann DPRINTF("xhci_process_commands() called while xHC stopped or paused\n"); 2161f1ae32a1SGerd Hoffmann return; 2162f1ae32a1SGerd Hoffmann } 2163f1ae32a1SGerd Hoffmann 2164f1ae32a1SGerd Hoffmann xhci->crcr_low |= CRCR_CRR; 2165f1ae32a1SGerd Hoffmann 2166f1ae32a1SGerd Hoffmann while ((type = xhci_ring_fetch(xhci, &xhci->cmd_ring, &trb, &addr))) { 2167f1ae32a1SGerd Hoffmann event.ptr = addr; 2168f1ae32a1SGerd Hoffmann switch (type) { 2169f1ae32a1SGerd Hoffmann case CR_ENABLE_SLOT: 2170f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 2171f1ae32a1SGerd Hoffmann if (!xhci->slots[i].enabled) { 2172f1ae32a1SGerd Hoffmann break; 2173f1ae32a1SGerd Hoffmann } 2174f1ae32a1SGerd Hoffmann } 2175f1ae32a1SGerd Hoffmann if (i >= MAXSLOTS) { 2176f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: no device slots available\n"); 2177f1ae32a1SGerd Hoffmann event.ccode = CC_NO_SLOTS_ERROR; 2178f1ae32a1SGerd Hoffmann } else { 2179f1ae32a1SGerd Hoffmann slotid = i+1; 2180f1ae32a1SGerd Hoffmann event.ccode = xhci_enable_slot(xhci, slotid); 2181f1ae32a1SGerd Hoffmann } 2182f1ae32a1SGerd Hoffmann break; 2183f1ae32a1SGerd Hoffmann case CR_DISABLE_SLOT: 2184f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2185f1ae32a1SGerd Hoffmann if (slotid) { 2186f1ae32a1SGerd Hoffmann event.ccode = xhci_disable_slot(xhci, slotid); 2187f1ae32a1SGerd Hoffmann } 2188f1ae32a1SGerd Hoffmann break; 2189f1ae32a1SGerd Hoffmann case CR_ADDRESS_DEVICE: 2190f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2191f1ae32a1SGerd Hoffmann if (slotid) { 2192f1ae32a1SGerd Hoffmann event.ccode = xhci_address_slot(xhci, slotid, trb.parameter, 2193f1ae32a1SGerd Hoffmann trb.control & TRB_CR_BSR); 2194f1ae32a1SGerd Hoffmann } 2195f1ae32a1SGerd Hoffmann break; 2196f1ae32a1SGerd Hoffmann case CR_CONFIGURE_ENDPOINT: 2197f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2198f1ae32a1SGerd Hoffmann if (slotid) { 2199f1ae32a1SGerd Hoffmann event.ccode = xhci_configure_slot(xhci, slotid, trb.parameter, 2200f1ae32a1SGerd Hoffmann trb.control & TRB_CR_DC); 2201f1ae32a1SGerd Hoffmann } 2202f1ae32a1SGerd Hoffmann break; 2203f1ae32a1SGerd Hoffmann case CR_EVALUATE_CONTEXT: 2204f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2205f1ae32a1SGerd Hoffmann if (slotid) { 2206f1ae32a1SGerd Hoffmann event.ccode = xhci_evaluate_slot(xhci, slotid, trb.parameter); 2207f1ae32a1SGerd Hoffmann } 2208f1ae32a1SGerd Hoffmann break; 2209f1ae32a1SGerd Hoffmann case CR_STOP_ENDPOINT: 2210f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2211f1ae32a1SGerd Hoffmann if (slotid) { 2212f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2213f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2214f1ae32a1SGerd Hoffmann event.ccode = xhci_stop_ep(xhci, slotid, epid); 2215f1ae32a1SGerd Hoffmann } 2216f1ae32a1SGerd Hoffmann break; 2217f1ae32a1SGerd Hoffmann case CR_RESET_ENDPOINT: 2218f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2219f1ae32a1SGerd Hoffmann if (slotid) { 2220f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2221f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2222f1ae32a1SGerd Hoffmann event.ccode = xhci_reset_ep(xhci, slotid, epid); 2223f1ae32a1SGerd Hoffmann } 2224f1ae32a1SGerd Hoffmann break; 2225f1ae32a1SGerd Hoffmann case CR_SET_TR_DEQUEUE: 2226f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2227f1ae32a1SGerd Hoffmann if (slotid) { 2228f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2229f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2230f1ae32a1SGerd Hoffmann event.ccode = xhci_set_ep_dequeue(xhci, slotid, epid, 2231f1ae32a1SGerd Hoffmann trb.parameter); 2232f1ae32a1SGerd Hoffmann } 2233f1ae32a1SGerd Hoffmann break; 2234f1ae32a1SGerd Hoffmann case CR_RESET_DEVICE: 2235f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2236f1ae32a1SGerd Hoffmann if (slotid) { 2237f1ae32a1SGerd Hoffmann event.ccode = xhci_reset_slot(xhci, slotid); 2238f1ae32a1SGerd Hoffmann } 2239f1ae32a1SGerd Hoffmann break; 2240f1ae32a1SGerd Hoffmann case CR_GET_PORT_BANDWIDTH: 2241f1ae32a1SGerd Hoffmann event.ccode = xhci_get_port_bandwidth(xhci, trb.parameter); 2242f1ae32a1SGerd Hoffmann break; 2243f1ae32a1SGerd Hoffmann case CR_VENDOR_VIA_CHALLENGE_RESPONSE: 224459a70ccdSDavid Gibson xhci_via_challenge(xhci, trb.parameter); 2245f1ae32a1SGerd Hoffmann break; 2246f1ae32a1SGerd Hoffmann case CR_VENDOR_NEC_FIRMWARE_REVISION: 2247f1ae32a1SGerd Hoffmann event.type = 48; /* NEC reply */ 2248f1ae32a1SGerd Hoffmann event.length = 0x3025; 2249f1ae32a1SGerd Hoffmann break; 2250f1ae32a1SGerd Hoffmann case CR_VENDOR_NEC_CHALLENGE_RESPONSE: 2251f1ae32a1SGerd Hoffmann { 2252f1ae32a1SGerd Hoffmann uint32_t chi = trb.parameter >> 32; 2253f1ae32a1SGerd Hoffmann uint32_t clo = trb.parameter; 2254f1ae32a1SGerd Hoffmann uint32_t val = xhci_nec_challenge(chi, clo); 2255f1ae32a1SGerd Hoffmann event.length = val & 0xFFFF; 2256f1ae32a1SGerd Hoffmann event.epid = val >> 16; 2257f1ae32a1SGerd Hoffmann slotid = val >> 24; 2258f1ae32a1SGerd Hoffmann event.type = 48; /* NEC reply */ 2259f1ae32a1SGerd Hoffmann } 2260f1ae32a1SGerd Hoffmann break; 2261f1ae32a1SGerd Hoffmann default: 2262f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: unimplemented command %d\n", type); 2263f1ae32a1SGerd Hoffmann event.ccode = CC_TRB_ERROR; 2264f1ae32a1SGerd Hoffmann break; 2265f1ae32a1SGerd Hoffmann } 2266f1ae32a1SGerd Hoffmann event.slotid = slotid; 2267f1ae32a1SGerd Hoffmann xhci_event(xhci, &event); 2268f1ae32a1SGerd Hoffmann } 2269f1ae32a1SGerd Hoffmann } 2270f1ae32a1SGerd Hoffmann 2271f1ae32a1SGerd Hoffmann static void xhci_update_port(XHCIState *xhci, XHCIPort *port, int is_detach) 2272f1ae32a1SGerd Hoffmann { 2273f1ae32a1SGerd Hoffmann int nr = port->port.index + 1; 2274f1ae32a1SGerd Hoffmann 2275f1ae32a1SGerd Hoffmann port->portsc = PORTSC_PP; 2276f1ae32a1SGerd Hoffmann if (port->port.dev && port->port.dev->attached && !is_detach) { 2277f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_CCS; 2278f1ae32a1SGerd Hoffmann switch (port->port.dev->speed) { 2279f1ae32a1SGerd Hoffmann case USB_SPEED_LOW: 2280f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_LOW; 2281f1ae32a1SGerd Hoffmann break; 2282f1ae32a1SGerd Hoffmann case USB_SPEED_FULL: 2283f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_FULL; 2284f1ae32a1SGerd Hoffmann break; 2285f1ae32a1SGerd Hoffmann case USB_SPEED_HIGH: 2286f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_HIGH; 2287f1ae32a1SGerd Hoffmann break; 2288f1ae32a1SGerd Hoffmann } 2289f1ae32a1SGerd Hoffmann } 2290f1ae32a1SGerd Hoffmann 2291f1ae32a1SGerd Hoffmann if (xhci_running(xhci)) { 2292f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_CSC; 2293f1ae32a1SGerd Hoffmann XHCIEvent ev = { ER_PORT_STATUS_CHANGE, CC_SUCCESS, nr << 24}; 2294f1ae32a1SGerd Hoffmann xhci_event(xhci, &ev); 2295f1ae32a1SGerd Hoffmann DPRINTF("xhci: port change event for port %d\n", nr); 2296f1ae32a1SGerd Hoffmann } 2297f1ae32a1SGerd Hoffmann } 2298f1ae32a1SGerd Hoffmann 229964619739SJan Kiszka static void xhci_reset(DeviceState *dev) 2300f1ae32a1SGerd Hoffmann { 230164619739SJan Kiszka XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev.qdev, dev); 2302f1ae32a1SGerd Hoffmann int i; 2303f1ae32a1SGerd Hoffmann 23042d754a10SGerd Hoffmann trace_usb_xhci_reset(); 2305f1ae32a1SGerd Hoffmann if (!(xhci->usbsts & USBSTS_HCH)) { 2306f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: reset while running!\n"); 2307f1ae32a1SGerd Hoffmann } 2308f1ae32a1SGerd Hoffmann 2309f1ae32a1SGerd Hoffmann xhci->usbcmd = 0; 2310f1ae32a1SGerd Hoffmann xhci->usbsts = USBSTS_HCH; 2311f1ae32a1SGerd Hoffmann xhci->dnctrl = 0; 2312f1ae32a1SGerd Hoffmann xhci->crcr_low = 0; 2313f1ae32a1SGerd Hoffmann xhci->crcr_high = 0; 2314f1ae32a1SGerd Hoffmann xhci->dcbaap_low = 0; 2315f1ae32a1SGerd Hoffmann xhci->dcbaap_high = 0; 2316f1ae32a1SGerd Hoffmann xhci->config = 0; 2317f1ae32a1SGerd Hoffmann xhci->devaddr = 2; 2318f1ae32a1SGerd Hoffmann 2319f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 2320f1ae32a1SGerd Hoffmann xhci_disable_slot(xhci, i+1); 2321f1ae32a1SGerd Hoffmann } 2322f1ae32a1SGerd Hoffmann 2323f1ae32a1SGerd Hoffmann for (i = 0; i < MAXPORTS; i++) { 2324f1ae32a1SGerd Hoffmann xhci_update_port(xhci, xhci->ports + i, 0); 2325f1ae32a1SGerd Hoffmann } 2326f1ae32a1SGerd Hoffmann 2327f1ae32a1SGerd Hoffmann xhci->mfindex = 0; 2328f1ae32a1SGerd Hoffmann xhci->iman = 0; 2329f1ae32a1SGerd Hoffmann xhci->imod = 0; 2330f1ae32a1SGerd Hoffmann xhci->erstsz = 0; 2331f1ae32a1SGerd Hoffmann xhci->erstba_low = 0; 2332f1ae32a1SGerd Hoffmann xhci->erstba_high = 0; 2333f1ae32a1SGerd Hoffmann xhci->erdp_low = 0; 2334f1ae32a1SGerd Hoffmann xhci->erdp_high = 0; 2335f1ae32a1SGerd Hoffmann 2336f1ae32a1SGerd Hoffmann xhci->er_ep_idx = 0; 2337f1ae32a1SGerd Hoffmann xhci->er_pcs = 1; 2338f1ae32a1SGerd Hoffmann xhci->er_full = 0; 2339f1ae32a1SGerd Hoffmann xhci->ev_buffer_put = 0; 2340f1ae32a1SGerd Hoffmann xhci->ev_buffer_get = 0; 2341f1ae32a1SGerd Hoffmann } 2342f1ae32a1SGerd Hoffmann 2343f1ae32a1SGerd Hoffmann static uint32_t xhci_cap_read(XHCIState *xhci, uint32_t reg) 2344f1ae32a1SGerd Hoffmann { 23452d754a10SGerd Hoffmann uint32_t ret; 2346f1ae32a1SGerd Hoffmann 2347f1ae32a1SGerd Hoffmann switch (reg) { 2348f1ae32a1SGerd Hoffmann case 0x00: /* HCIVERSION, CAPLENGTH */ 23492d754a10SGerd Hoffmann ret = 0x01000000 | LEN_CAP; 23502d754a10SGerd Hoffmann break; 2351f1ae32a1SGerd Hoffmann case 0x04: /* HCSPARAMS 1 */ 23522d754a10SGerd Hoffmann ret = (MAXPORTS<<24) | (MAXINTRS<<8) | MAXSLOTS; 23532d754a10SGerd Hoffmann break; 2354f1ae32a1SGerd Hoffmann case 0x08: /* HCSPARAMS 2 */ 23552d754a10SGerd Hoffmann ret = 0x0000000f; 23562d754a10SGerd Hoffmann break; 2357f1ae32a1SGerd Hoffmann case 0x0c: /* HCSPARAMS 3 */ 23582d754a10SGerd Hoffmann ret = 0x00000000; 23592d754a10SGerd Hoffmann break; 2360f1ae32a1SGerd Hoffmann case 0x10: /* HCCPARAMS */ 23612d754a10SGerd Hoffmann if (sizeof(dma_addr_t) == 4) { 23622d754a10SGerd Hoffmann ret = 0x00081000; 23632d754a10SGerd Hoffmann } else { 23642d754a10SGerd Hoffmann ret = 0x00081001; 23652d754a10SGerd Hoffmann } 23662d754a10SGerd Hoffmann break; 2367f1ae32a1SGerd Hoffmann case 0x14: /* DBOFF */ 23682d754a10SGerd Hoffmann ret = OFF_DOORBELL; 23692d754a10SGerd Hoffmann break; 2370f1ae32a1SGerd Hoffmann case 0x18: /* RTSOFF */ 23712d754a10SGerd Hoffmann ret = OFF_RUNTIME; 23722d754a10SGerd Hoffmann break; 2373f1ae32a1SGerd Hoffmann 2374f1ae32a1SGerd Hoffmann /* extended capabilities */ 2375f1ae32a1SGerd Hoffmann case 0x20: /* Supported Protocol:00 */ 23762d754a10SGerd Hoffmann ret = 0x02000402; /* USB 2.0 */ 23772d754a10SGerd Hoffmann break; 2378f1ae32a1SGerd Hoffmann case 0x24: /* Supported Protocol:04 */ 23792d754a10SGerd Hoffmann ret = 0x20425455; /* "USB " */ 23802d754a10SGerd Hoffmann break; 2381f1ae32a1SGerd Hoffmann case 0x28: /* Supported Protocol:08 */ 23822d754a10SGerd Hoffmann ret = 0x00000001 | (USB2_PORTS<<8); 23832d754a10SGerd Hoffmann break; 2384f1ae32a1SGerd Hoffmann case 0x2c: /* Supported Protocol:0c */ 23852d754a10SGerd Hoffmann ret = 0x00000000; /* reserved */ 23862d754a10SGerd Hoffmann break; 2387f1ae32a1SGerd Hoffmann case 0x30: /* Supported Protocol:00 */ 23882d754a10SGerd Hoffmann ret = 0x03000002; /* USB 3.0 */ 23892d754a10SGerd Hoffmann break; 2390f1ae32a1SGerd Hoffmann case 0x34: /* Supported Protocol:04 */ 23912d754a10SGerd Hoffmann ret = 0x20425455; /* "USB " */ 23922d754a10SGerd Hoffmann break; 2393f1ae32a1SGerd Hoffmann case 0x38: /* Supported Protocol:08 */ 23942d754a10SGerd Hoffmann ret = 0x00000000 | (USB2_PORTS+1) | (USB3_PORTS<<8); 23952d754a10SGerd Hoffmann break; 2396f1ae32a1SGerd Hoffmann case 0x3c: /* Supported Protocol:0c */ 23972d754a10SGerd Hoffmann ret = 0x00000000; /* reserved */ 23982d754a10SGerd Hoffmann break; 2399f1ae32a1SGerd Hoffmann default: 2400f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_cap_read: reg %d unimplemented\n", reg); 24012d754a10SGerd Hoffmann ret = 0; 2402f1ae32a1SGerd Hoffmann } 24032d754a10SGerd Hoffmann 24042d754a10SGerd Hoffmann trace_usb_xhci_cap_read(reg, ret); 24052d754a10SGerd Hoffmann return ret; 2406f1ae32a1SGerd Hoffmann } 2407f1ae32a1SGerd Hoffmann 2408f1ae32a1SGerd Hoffmann static uint32_t xhci_port_read(XHCIState *xhci, uint32_t reg) 2409f1ae32a1SGerd Hoffmann { 2410f1ae32a1SGerd Hoffmann uint32_t port = reg >> 4; 24112d754a10SGerd Hoffmann uint32_t ret; 24122d754a10SGerd Hoffmann 2413f1ae32a1SGerd Hoffmann if (port >= MAXPORTS) { 2414f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read: port %d out of bounds\n", port); 24152d754a10SGerd Hoffmann ret = 0; 24162d754a10SGerd Hoffmann goto out; 2417f1ae32a1SGerd Hoffmann } 2418f1ae32a1SGerd Hoffmann 2419f1ae32a1SGerd Hoffmann switch (reg & 0xf) { 2420f1ae32a1SGerd Hoffmann case 0x00: /* PORTSC */ 24212d754a10SGerd Hoffmann ret = xhci->ports[port].portsc; 24222d754a10SGerd Hoffmann break; 2423f1ae32a1SGerd Hoffmann case 0x04: /* PORTPMSC */ 2424f1ae32a1SGerd Hoffmann case 0x08: /* PORTLI */ 24252d754a10SGerd Hoffmann ret = 0; 24262d754a10SGerd Hoffmann break; 2427f1ae32a1SGerd Hoffmann case 0x0c: /* reserved */ 2428f1ae32a1SGerd Hoffmann default: 2429f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read (port %d): reg 0x%x unimplemented\n", 2430f1ae32a1SGerd Hoffmann port, reg); 24312d754a10SGerd Hoffmann ret = 0; 2432f1ae32a1SGerd Hoffmann } 24332d754a10SGerd Hoffmann 24342d754a10SGerd Hoffmann out: 24352d754a10SGerd Hoffmann trace_usb_xhci_port_read(port, reg & 0x0f, ret); 24362d754a10SGerd Hoffmann return ret; 2437f1ae32a1SGerd Hoffmann } 2438f1ae32a1SGerd Hoffmann 2439f1ae32a1SGerd Hoffmann static void xhci_port_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2440f1ae32a1SGerd Hoffmann { 2441f1ae32a1SGerd Hoffmann uint32_t port = reg >> 4; 2442f1ae32a1SGerd Hoffmann uint32_t portsc; 2443f1ae32a1SGerd Hoffmann 24442d754a10SGerd Hoffmann trace_usb_xhci_port_write(port, reg & 0x0f, val); 24452d754a10SGerd Hoffmann 2446f1ae32a1SGerd Hoffmann if (port >= MAXPORTS) { 2447f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read: port %d out of bounds\n", port); 2448f1ae32a1SGerd Hoffmann return; 2449f1ae32a1SGerd Hoffmann } 2450f1ae32a1SGerd Hoffmann 2451f1ae32a1SGerd Hoffmann switch (reg & 0xf) { 2452f1ae32a1SGerd Hoffmann case 0x00: /* PORTSC */ 2453f1ae32a1SGerd Hoffmann portsc = xhci->ports[port].portsc; 2454f1ae32a1SGerd Hoffmann /* write-1-to-clear bits*/ 2455f1ae32a1SGerd Hoffmann portsc &= ~(val & (PORTSC_CSC|PORTSC_PEC|PORTSC_WRC|PORTSC_OCC| 2456f1ae32a1SGerd Hoffmann PORTSC_PRC|PORTSC_PLC|PORTSC_CEC)); 2457f1ae32a1SGerd Hoffmann if (val & PORTSC_LWS) { 2458f1ae32a1SGerd Hoffmann /* overwrite PLS only when LWS=1 */ 2459f1ae32a1SGerd Hoffmann portsc &= ~(PORTSC_PLS_MASK << PORTSC_PLS_SHIFT); 2460f1ae32a1SGerd Hoffmann portsc |= val & (PORTSC_PLS_MASK << PORTSC_PLS_SHIFT); 2461f1ae32a1SGerd Hoffmann } 2462f1ae32a1SGerd Hoffmann /* read/write bits */ 2463f1ae32a1SGerd Hoffmann portsc &= ~(PORTSC_PP|PORTSC_WCE|PORTSC_WDE|PORTSC_WOE); 2464f1ae32a1SGerd Hoffmann portsc |= (val & (PORTSC_PP|PORTSC_WCE|PORTSC_WDE|PORTSC_WOE)); 2465f1ae32a1SGerd Hoffmann /* write-1-to-start bits */ 2466f1ae32a1SGerd Hoffmann if (val & PORTSC_PR) { 2467f1ae32a1SGerd Hoffmann DPRINTF("xhci: port %d reset\n", port); 2468f1ae32a1SGerd Hoffmann usb_device_reset(xhci->ports[port].port.dev); 2469f1ae32a1SGerd Hoffmann portsc |= PORTSC_PRC | PORTSC_PED; 2470f1ae32a1SGerd Hoffmann } 2471f1ae32a1SGerd Hoffmann xhci->ports[port].portsc = portsc; 2472f1ae32a1SGerd Hoffmann break; 2473f1ae32a1SGerd Hoffmann case 0x04: /* PORTPMSC */ 2474f1ae32a1SGerd Hoffmann case 0x08: /* PORTLI */ 2475f1ae32a1SGerd Hoffmann default: 2476f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_write (port %d): reg 0x%x unimplemented\n", 2477f1ae32a1SGerd Hoffmann port, reg); 2478f1ae32a1SGerd Hoffmann } 2479f1ae32a1SGerd Hoffmann } 2480f1ae32a1SGerd Hoffmann 2481f1ae32a1SGerd Hoffmann static uint32_t xhci_oper_read(XHCIState *xhci, uint32_t reg) 2482f1ae32a1SGerd Hoffmann { 24832d754a10SGerd Hoffmann uint32_t ret; 2484f1ae32a1SGerd Hoffmann 2485f1ae32a1SGerd Hoffmann if (reg >= 0x400) { 2486f1ae32a1SGerd Hoffmann return xhci_port_read(xhci, reg - 0x400); 2487f1ae32a1SGerd Hoffmann } 2488f1ae32a1SGerd Hoffmann 2489f1ae32a1SGerd Hoffmann switch (reg) { 2490f1ae32a1SGerd Hoffmann case 0x00: /* USBCMD */ 24912d754a10SGerd Hoffmann ret = xhci->usbcmd; 24922d754a10SGerd Hoffmann break; 2493f1ae32a1SGerd Hoffmann case 0x04: /* USBSTS */ 24942d754a10SGerd Hoffmann ret = xhci->usbsts; 24952d754a10SGerd Hoffmann break; 2496f1ae32a1SGerd Hoffmann case 0x08: /* PAGESIZE */ 24972d754a10SGerd Hoffmann ret = 1; /* 4KiB */ 24982d754a10SGerd Hoffmann break; 2499f1ae32a1SGerd Hoffmann case 0x14: /* DNCTRL */ 25002d754a10SGerd Hoffmann ret = xhci->dnctrl; 25012d754a10SGerd Hoffmann break; 2502f1ae32a1SGerd Hoffmann case 0x18: /* CRCR low */ 25032d754a10SGerd Hoffmann ret = xhci->crcr_low & ~0xe; 25042d754a10SGerd Hoffmann break; 2505f1ae32a1SGerd Hoffmann case 0x1c: /* CRCR high */ 25062d754a10SGerd Hoffmann ret = xhci->crcr_high; 25072d754a10SGerd Hoffmann break; 2508f1ae32a1SGerd Hoffmann case 0x30: /* DCBAAP low */ 25092d754a10SGerd Hoffmann ret = xhci->dcbaap_low; 25102d754a10SGerd Hoffmann break; 2511f1ae32a1SGerd Hoffmann case 0x34: /* DCBAAP high */ 25122d754a10SGerd Hoffmann ret = xhci->dcbaap_high; 25132d754a10SGerd Hoffmann break; 2514f1ae32a1SGerd Hoffmann case 0x38: /* CONFIG */ 25152d754a10SGerd Hoffmann ret = xhci->config; 25162d754a10SGerd Hoffmann break; 2517f1ae32a1SGerd Hoffmann default: 2518f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_read: reg 0x%x unimplemented\n", reg); 25192d754a10SGerd Hoffmann ret = 0; 2520f1ae32a1SGerd Hoffmann } 25212d754a10SGerd Hoffmann 25222d754a10SGerd Hoffmann trace_usb_xhci_oper_read(reg, ret); 25232d754a10SGerd Hoffmann return ret; 2524f1ae32a1SGerd Hoffmann } 2525f1ae32a1SGerd Hoffmann 2526f1ae32a1SGerd Hoffmann static void xhci_oper_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2527f1ae32a1SGerd Hoffmann { 2528f1ae32a1SGerd Hoffmann if (reg >= 0x400) { 2529f1ae32a1SGerd Hoffmann xhci_port_write(xhci, reg - 0x400, val); 2530f1ae32a1SGerd Hoffmann return; 2531f1ae32a1SGerd Hoffmann } 2532f1ae32a1SGerd Hoffmann 25332d754a10SGerd Hoffmann trace_usb_xhci_oper_write(reg, val); 25342d754a10SGerd Hoffmann 2535f1ae32a1SGerd Hoffmann switch (reg) { 2536f1ae32a1SGerd Hoffmann case 0x00: /* USBCMD */ 2537f1ae32a1SGerd Hoffmann if ((val & USBCMD_RS) && !(xhci->usbcmd & USBCMD_RS)) { 2538f1ae32a1SGerd Hoffmann xhci_run(xhci); 2539f1ae32a1SGerd Hoffmann } else if (!(val & USBCMD_RS) && (xhci->usbcmd & USBCMD_RS)) { 2540f1ae32a1SGerd Hoffmann xhci_stop(xhci); 2541f1ae32a1SGerd Hoffmann } 2542f1ae32a1SGerd Hoffmann xhci->usbcmd = val & 0xc0f; 2543f1ae32a1SGerd Hoffmann if (val & USBCMD_HCRST) { 254464619739SJan Kiszka xhci_reset(&xhci->pci_dev.qdev); 2545f1ae32a1SGerd Hoffmann } 2546f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 2547f1ae32a1SGerd Hoffmann break; 2548f1ae32a1SGerd Hoffmann 2549f1ae32a1SGerd Hoffmann case 0x04: /* USBSTS */ 2550f1ae32a1SGerd Hoffmann /* these bits are write-1-to-clear */ 2551f1ae32a1SGerd Hoffmann xhci->usbsts &= ~(val & (USBSTS_HSE|USBSTS_EINT|USBSTS_PCD|USBSTS_SRE)); 2552f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 2553f1ae32a1SGerd Hoffmann break; 2554f1ae32a1SGerd Hoffmann 2555f1ae32a1SGerd Hoffmann case 0x14: /* DNCTRL */ 2556f1ae32a1SGerd Hoffmann xhci->dnctrl = val & 0xffff; 2557f1ae32a1SGerd Hoffmann break; 2558f1ae32a1SGerd Hoffmann case 0x18: /* CRCR low */ 2559f1ae32a1SGerd Hoffmann xhci->crcr_low = (val & 0xffffffcf) | (xhci->crcr_low & CRCR_CRR); 2560f1ae32a1SGerd Hoffmann break; 2561f1ae32a1SGerd Hoffmann case 0x1c: /* CRCR high */ 2562f1ae32a1SGerd Hoffmann xhci->crcr_high = val; 2563f1ae32a1SGerd Hoffmann if (xhci->crcr_low & (CRCR_CA|CRCR_CS) && (xhci->crcr_low & CRCR_CRR)) { 2564f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_COMMAND_COMPLETE, CC_COMMAND_RING_STOPPED}; 2565f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~CRCR_CRR; 2566f1ae32a1SGerd Hoffmann xhci_event(xhci, &event); 2567f1ae32a1SGerd Hoffmann DPRINTF("xhci: command ring stopped (CRCR=%08x)\n", xhci->crcr_low); 2568f1ae32a1SGerd Hoffmann } else { 256959a70ccdSDavid Gibson dma_addr_t base = xhci_addr64(xhci->crcr_low & ~0x3f, val); 2570f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &xhci->cmd_ring, base); 2571f1ae32a1SGerd Hoffmann } 2572f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~(CRCR_CA | CRCR_CS); 2573f1ae32a1SGerd Hoffmann break; 2574f1ae32a1SGerd Hoffmann case 0x30: /* DCBAAP low */ 2575f1ae32a1SGerd Hoffmann xhci->dcbaap_low = val & 0xffffffc0; 2576f1ae32a1SGerd Hoffmann break; 2577f1ae32a1SGerd Hoffmann case 0x34: /* DCBAAP high */ 2578f1ae32a1SGerd Hoffmann xhci->dcbaap_high = val; 2579f1ae32a1SGerd Hoffmann break; 2580f1ae32a1SGerd Hoffmann case 0x38: /* CONFIG */ 2581f1ae32a1SGerd Hoffmann xhci->config = val & 0xff; 2582f1ae32a1SGerd Hoffmann break; 2583f1ae32a1SGerd Hoffmann default: 2584f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_write: reg 0x%x unimplemented\n", reg); 2585f1ae32a1SGerd Hoffmann } 2586f1ae32a1SGerd Hoffmann } 2587f1ae32a1SGerd Hoffmann 2588f1ae32a1SGerd Hoffmann static uint32_t xhci_runtime_read(XHCIState *xhci, uint32_t reg) 2589f1ae32a1SGerd Hoffmann { 25902d754a10SGerd Hoffmann uint32_t ret; 2591f1ae32a1SGerd Hoffmann 2592f1ae32a1SGerd Hoffmann switch (reg) { 2593f1ae32a1SGerd Hoffmann case 0x00: /* MFINDEX */ 2594f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_runtime_read: MFINDEX not yet implemented\n"); 25952d754a10SGerd Hoffmann ret = xhci->mfindex; 25962d754a10SGerd Hoffmann break; 2597f1ae32a1SGerd Hoffmann case 0x20: /* IMAN */ 25982d754a10SGerd Hoffmann ret = xhci->iman; 25992d754a10SGerd Hoffmann break; 2600f1ae32a1SGerd Hoffmann case 0x24: /* IMOD */ 26012d754a10SGerd Hoffmann ret = xhci->imod; 26022d754a10SGerd Hoffmann break; 2603f1ae32a1SGerd Hoffmann case 0x28: /* ERSTSZ */ 26042d754a10SGerd Hoffmann ret = xhci->erstsz; 26052d754a10SGerd Hoffmann break; 2606f1ae32a1SGerd Hoffmann case 0x30: /* ERSTBA low */ 26072d754a10SGerd Hoffmann ret = xhci->erstba_low; 26082d754a10SGerd Hoffmann break; 2609f1ae32a1SGerd Hoffmann case 0x34: /* ERSTBA high */ 26102d754a10SGerd Hoffmann ret = xhci->erstba_high; 26112d754a10SGerd Hoffmann break; 2612f1ae32a1SGerd Hoffmann case 0x38: /* ERDP low */ 26132d754a10SGerd Hoffmann ret = xhci->erdp_low; 26142d754a10SGerd Hoffmann break; 2615f1ae32a1SGerd Hoffmann case 0x3c: /* ERDP high */ 26162d754a10SGerd Hoffmann ret = xhci->erdp_high; 26172d754a10SGerd Hoffmann break; 2618f1ae32a1SGerd Hoffmann default: 2619f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_runtime_read: reg 0x%x unimplemented\n", reg); 26202d754a10SGerd Hoffmann ret = 0; 2621f1ae32a1SGerd Hoffmann } 26222d754a10SGerd Hoffmann 26232d754a10SGerd Hoffmann trace_usb_xhci_runtime_read(reg, ret); 26242d754a10SGerd Hoffmann return ret; 2625f1ae32a1SGerd Hoffmann } 2626f1ae32a1SGerd Hoffmann 2627f1ae32a1SGerd Hoffmann static void xhci_runtime_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2628f1ae32a1SGerd Hoffmann { 26292d754a10SGerd Hoffmann trace_usb_xhci_runtime_read(reg, val); 2630f1ae32a1SGerd Hoffmann 2631f1ae32a1SGerd Hoffmann switch (reg) { 2632f1ae32a1SGerd Hoffmann case 0x20: /* IMAN */ 2633f1ae32a1SGerd Hoffmann if (val & IMAN_IP) { 2634f1ae32a1SGerd Hoffmann xhci->iman &= ~IMAN_IP; 2635f1ae32a1SGerd Hoffmann } 2636f1ae32a1SGerd Hoffmann xhci->iman &= ~IMAN_IE; 2637f1ae32a1SGerd Hoffmann xhci->iman |= val & IMAN_IE; 2638f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 2639f1ae32a1SGerd Hoffmann break; 2640f1ae32a1SGerd Hoffmann case 0x24: /* IMOD */ 2641f1ae32a1SGerd Hoffmann xhci->imod = val; 2642f1ae32a1SGerd Hoffmann break; 2643f1ae32a1SGerd Hoffmann case 0x28: /* ERSTSZ */ 2644f1ae32a1SGerd Hoffmann xhci->erstsz = val & 0xffff; 2645f1ae32a1SGerd Hoffmann break; 2646f1ae32a1SGerd Hoffmann case 0x30: /* ERSTBA low */ 2647f1ae32a1SGerd Hoffmann /* XXX NEC driver bug: it doesn't align this to 64 bytes 2648f1ae32a1SGerd Hoffmann xhci->erstba_low = val & 0xffffffc0; */ 2649f1ae32a1SGerd Hoffmann xhci->erstba_low = val & 0xfffffff0; 2650f1ae32a1SGerd Hoffmann break; 2651f1ae32a1SGerd Hoffmann case 0x34: /* ERSTBA high */ 2652f1ae32a1SGerd Hoffmann xhci->erstba_high = val; 2653f1ae32a1SGerd Hoffmann xhci_er_reset(xhci); 2654f1ae32a1SGerd Hoffmann break; 2655f1ae32a1SGerd Hoffmann case 0x38: /* ERDP low */ 2656f1ae32a1SGerd Hoffmann if (val & ERDP_EHB) { 2657f1ae32a1SGerd Hoffmann xhci->erdp_low &= ~ERDP_EHB; 2658f1ae32a1SGerd Hoffmann } 2659f1ae32a1SGerd Hoffmann xhci->erdp_low = (val & ~ERDP_EHB) | (xhci->erdp_low & ERDP_EHB); 2660f1ae32a1SGerd Hoffmann break; 2661f1ae32a1SGerd Hoffmann case 0x3c: /* ERDP high */ 2662f1ae32a1SGerd Hoffmann xhci->erdp_high = val; 2663f1ae32a1SGerd Hoffmann xhci_events_update(xhci); 2664f1ae32a1SGerd Hoffmann break; 2665f1ae32a1SGerd Hoffmann default: 2666f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_write: reg 0x%x unimplemented\n", reg); 2667f1ae32a1SGerd Hoffmann } 2668f1ae32a1SGerd Hoffmann } 2669f1ae32a1SGerd Hoffmann 2670f1ae32a1SGerd Hoffmann static uint32_t xhci_doorbell_read(XHCIState *xhci, uint32_t reg) 2671f1ae32a1SGerd Hoffmann { 2672f1ae32a1SGerd Hoffmann /* doorbells always read as 0 */ 26732d754a10SGerd Hoffmann trace_usb_xhci_doorbell_read(reg, 0); 2674f1ae32a1SGerd Hoffmann return 0; 2675f1ae32a1SGerd Hoffmann } 2676f1ae32a1SGerd Hoffmann 2677f1ae32a1SGerd Hoffmann static void xhci_doorbell_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2678f1ae32a1SGerd Hoffmann { 26792d754a10SGerd Hoffmann trace_usb_xhci_doorbell_write(reg, val); 2680f1ae32a1SGerd Hoffmann 2681f1ae32a1SGerd Hoffmann if (!xhci_running(xhci)) { 2682f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: wrote doorbell while xHC stopped or paused\n"); 2683f1ae32a1SGerd Hoffmann return; 2684f1ae32a1SGerd Hoffmann } 2685f1ae32a1SGerd Hoffmann 2686f1ae32a1SGerd Hoffmann reg >>= 2; 2687f1ae32a1SGerd Hoffmann 2688f1ae32a1SGerd Hoffmann if (reg == 0) { 2689f1ae32a1SGerd Hoffmann if (val == 0) { 2690f1ae32a1SGerd Hoffmann xhci_process_commands(xhci); 2691f1ae32a1SGerd Hoffmann } else { 2692f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell 0 write: 0x%x\n", val); 2693f1ae32a1SGerd Hoffmann } 2694f1ae32a1SGerd Hoffmann } else { 2695f1ae32a1SGerd Hoffmann if (reg > MAXSLOTS) { 2696f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell %d\n", reg); 2697f1ae32a1SGerd Hoffmann } else if (val > 31) { 2698f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell %d write: 0x%x\n", reg, val); 2699f1ae32a1SGerd Hoffmann } else { 2700f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, reg, val); 2701f1ae32a1SGerd Hoffmann } 2702f1ae32a1SGerd Hoffmann } 2703f1ae32a1SGerd Hoffmann } 2704f1ae32a1SGerd Hoffmann 2705f1ae32a1SGerd Hoffmann static uint64_t xhci_mem_read(void *ptr, target_phys_addr_t addr, 2706f1ae32a1SGerd Hoffmann unsigned size) 2707f1ae32a1SGerd Hoffmann { 2708f1ae32a1SGerd Hoffmann XHCIState *xhci = ptr; 2709f1ae32a1SGerd Hoffmann 2710f1ae32a1SGerd Hoffmann /* Only aligned reads are allowed on xHCI */ 2711f1ae32a1SGerd Hoffmann if (addr & 3) { 2712f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_read: Mis-aligned read\n"); 2713f1ae32a1SGerd Hoffmann return 0; 2714f1ae32a1SGerd Hoffmann } 2715f1ae32a1SGerd Hoffmann 2716f1ae32a1SGerd Hoffmann if (addr < LEN_CAP) { 2717f1ae32a1SGerd Hoffmann return xhci_cap_read(xhci, addr); 2718f1ae32a1SGerd Hoffmann } else if (addr >= OFF_OPER && addr < (OFF_OPER + LEN_OPER)) { 2719f1ae32a1SGerd Hoffmann return xhci_oper_read(xhci, addr - OFF_OPER); 2720f1ae32a1SGerd Hoffmann } else if (addr >= OFF_RUNTIME && addr < (OFF_RUNTIME + LEN_RUNTIME)) { 2721f1ae32a1SGerd Hoffmann return xhci_runtime_read(xhci, addr - OFF_RUNTIME); 2722f1ae32a1SGerd Hoffmann } else if (addr >= OFF_DOORBELL && addr < (OFF_DOORBELL + LEN_DOORBELL)) { 2723f1ae32a1SGerd Hoffmann return xhci_doorbell_read(xhci, addr - OFF_DOORBELL); 2724f1ae32a1SGerd Hoffmann } else { 2725f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_read: Bad offset %x\n", (int)addr); 2726f1ae32a1SGerd Hoffmann return 0; 2727f1ae32a1SGerd Hoffmann } 2728f1ae32a1SGerd Hoffmann } 2729f1ae32a1SGerd Hoffmann 2730f1ae32a1SGerd Hoffmann static void xhci_mem_write(void *ptr, target_phys_addr_t addr, 2731f1ae32a1SGerd Hoffmann uint64_t val, unsigned size) 2732f1ae32a1SGerd Hoffmann { 2733f1ae32a1SGerd Hoffmann XHCIState *xhci = ptr; 2734f1ae32a1SGerd Hoffmann 2735f1ae32a1SGerd Hoffmann /* Only aligned writes are allowed on xHCI */ 2736f1ae32a1SGerd Hoffmann if (addr & 3) { 2737f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_write: Mis-aligned write\n"); 2738f1ae32a1SGerd Hoffmann return; 2739f1ae32a1SGerd Hoffmann } 2740f1ae32a1SGerd Hoffmann 2741f1ae32a1SGerd Hoffmann if (addr >= OFF_OPER && addr < (OFF_OPER + LEN_OPER)) { 2742f1ae32a1SGerd Hoffmann xhci_oper_write(xhci, addr - OFF_OPER, val); 2743f1ae32a1SGerd Hoffmann } else if (addr >= OFF_RUNTIME && addr < (OFF_RUNTIME + LEN_RUNTIME)) { 2744f1ae32a1SGerd Hoffmann xhci_runtime_write(xhci, addr - OFF_RUNTIME, val); 2745f1ae32a1SGerd Hoffmann } else if (addr >= OFF_DOORBELL && addr < (OFF_DOORBELL + LEN_DOORBELL)) { 2746f1ae32a1SGerd Hoffmann xhci_doorbell_write(xhci, addr - OFF_DOORBELL, val); 2747f1ae32a1SGerd Hoffmann } else { 2748f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_write: Bad offset %x\n", (int)addr); 2749f1ae32a1SGerd Hoffmann } 2750f1ae32a1SGerd Hoffmann } 2751f1ae32a1SGerd Hoffmann 2752f1ae32a1SGerd Hoffmann static const MemoryRegionOps xhci_mem_ops = { 2753f1ae32a1SGerd Hoffmann .read = xhci_mem_read, 2754f1ae32a1SGerd Hoffmann .write = xhci_mem_write, 2755f1ae32a1SGerd Hoffmann .valid.min_access_size = 4, 2756f1ae32a1SGerd Hoffmann .valid.max_access_size = 4, 2757f1ae32a1SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 2758f1ae32a1SGerd Hoffmann }; 2759f1ae32a1SGerd Hoffmann 2760f1ae32a1SGerd Hoffmann static void xhci_attach(USBPort *usbport) 2761f1ae32a1SGerd Hoffmann { 2762f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 2763f1ae32a1SGerd Hoffmann XHCIPort *port = &xhci->ports[usbport->index]; 2764f1ae32a1SGerd Hoffmann 2765f1ae32a1SGerd Hoffmann xhci_update_port(xhci, port, 0); 2766f1ae32a1SGerd Hoffmann } 2767f1ae32a1SGerd Hoffmann 2768f1ae32a1SGerd Hoffmann static void xhci_detach(USBPort *usbport) 2769f1ae32a1SGerd Hoffmann { 2770f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 2771f1ae32a1SGerd Hoffmann XHCIPort *port = &xhci->ports[usbport->index]; 2772f1ae32a1SGerd Hoffmann 2773f1ae32a1SGerd Hoffmann xhci_update_port(xhci, port, 1); 2774f1ae32a1SGerd Hoffmann } 2775f1ae32a1SGerd Hoffmann 2776f1ae32a1SGerd Hoffmann static void xhci_wakeup(USBPort *usbport) 2777f1ae32a1SGerd Hoffmann { 2778f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 2779f1ae32a1SGerd Hoffmann XHCIPort *port = &xhci->ports[usbport->index]; 2780f1ae32a1SGerd Hoffmann int nr = port->port.index + 1; 2781f1ae32a1SGerd Hoffmann XHCIEvent ev = { ER_PORT_STATUS_CHANGE, CC_SUCCESS, nr << 24}; 2782f1ae32a1SGerd Hoffmann uint32_t pls; 2783f1ae32a1SGerd Hoffmann 2784f1ae32a1SGerd Hoffmann pls = (port->portsc >> PORTSC_PLS_SHIFT) & PORTSC_PLS_MASK; 2785f1ae32a1SGerd Hoffmann if (pls != 3) { 2786f1ae32a1SGerd Hoffmann return; 2787f1ae32a1SGerd Hoffmann } 2788f1ae32a1SGerd Hoffmann port->portsc |= 0xf << PORTSC_PLS_SHIFT; 2789f1ae32a1SGerd Hoffmann if (port->portsc & PORTSC_PLC) { 2790f1ae32a1SGerd Hoffmann return; 2791f1ae32a1SGerd Hoffmann } 2792f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_PLC; 2793f1ae32a1SGerd Hoffmann xhci_event(xhci, &ev); 2794f1ae32a1SGerd Hoffmann } 2795f1ae32a1SGerd Hoffmann 2796f1ae32a1SGerd Hoffmann static void xhci_complete(USBPort *port, USBPacket *packet) 2797f1ae32a1SGerd Hoffmann { 2798f1ae32a1SGerd Hoffmann XHCITransfer *xfer = container_of(packet, XHCITransfer, packet); 2799f1ae32a1SGerd Hoffmann 2800f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, packet->result); 2801f1ae32a1SGerd Hoffmann xhci_kick_ep(xfer->xhci, xfer->slotid, xfer->epid); 2802f1ae32a1SGerd Hoffmann } 2803f1ae32a1SGerd Hoffmann 2804f1ae32a1SGerd Hoffmann static void xhci_child_detach(USBPort *port, USBDevice *child) 2805f1ae32a1SGerd Hoffmann { 2806f1ae32a1SGerd Hoffmann FIXME(); 2807f1ae32a1SGerd Hoffmann } 2808f1ae32a1SGerd Hoffmann 2809f1ae32a1SGerd Hoffmann static USBPortOps xhci_port_ops = { 2810f1ae32a1SGerd Hoffmann .attach = xhci_attach, 2811f1ae32a1SGerd Hoffmann .detach = xhci_detach, 2812f1ae32a1SGerd Hoffmann .wakeup = xhci_wakeup, 2813f1ae32a1SGerd Hoffmann .complete = xhci_complete, 2814f1ae32a1SGerd Hoffmann .child_detach = xhci_child_detach, 2815f1ae32a1SGerd Hoffmann }; 2816f1ae32a1SGerd Hoffmann 2817f1ae32a1SGerd Hoffmann static int xhci_find_slotid(XHCIState *xhci, USBDevice *dev) 2818f1ae32a1SGerd Hoffmann { 2819f1ae32a1SGerd Hoffmann XHCISlot *slot; 2820f1ae32a1SGerd Hoffmann int slotid; 2821f1ae32a1SGerd Hoffmann 2822f1ae32a1SGerd Hoffmann for (slotid = 1; slotid <= MAXSLOTS; slotid++) { 2823f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 2824f1ae32a1SGerd Hoffmann if (slot->devaddr == dev->addr) { 2825f1ae32a1SGerd Hoffmann return slotid; 2826f1ae32a1SGerd Hoffmann } 2827f1ae32a1SGerd Hoffmann } 2828f1ae32a1SGerd Hoffmann return 0; 2829f1ae32a1SGerd Hoffmann } 2830f1ae32a1SGerd Hoffmann 2831f1ae32a1SGerd Hoffmann static int xhci_find_epid(USBEndpoint *ep) 2832f1ae32a1SGerd Hoffmann { 2833f1ae32a1SGerd Hoffmann if (ep->nr == 0) { 2834f1ae32a1SGerd Hoffmann return 1; 2835f1ae32a1SGerd Hoffmann } 2836f1ae32a1SGerd Hoffmann if (ep->pid == USB_TOKEN_IN) { 2837f1ae32a1SGerd Hoffmann return ep->nr * 2 + 1; 2838f1ae32a1SGerd Hoffmann } else { 2839f1ae32a1SGerd Hoffmann return ep->nr * 2; 2840f1ae32a1SGerd Hoffmann } 2841f1ae32a1SGerd Hoffmann } 2842f1ae32a1SGerd Hoffmann 2843f1ae32a1SGerd Hoffmann static void xhci_wakeup_endpoint(USBBus *bus, USBEndpoint *ep) 2844f1ae32a1SGerd Hoffmann { 2845f1ae32a1SGerd Hoffmann XHCIState *xhci = container_of(bus, XHCIState, bus); 2846f1ae32a1SGerd Hoffmann int slotid; 2847f1ae32a1SGerd Hoffmann 2848f1ae32a1SGerd Hoffmann DPRINTF("%s\n", __func__); 2849f1ae32a1SGerd Hoffmann slotid = xhci_find_slotid(xhci, ep->dev); 2850f1ae32a1SGerd Hoffmann if (slotid == 0 || !xhci->slots[slotid-1].enabled) { 2851f1ae32a1SGerd Hoffmann DPRINTF("%s: oops, no slot for dev %d\n", __func__, ep->dev->addr); 2852f1ae32a1SGerd Hoffmann return; 2853f1ae32a1SGerd Hoffmann } 2854f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, slotid, xhci_find_epid(ep)); 2855f1ae32a1SGerd Hoffmann } 2856f1ae32a1SGerd Hoffmann 2857f1ae32a1SGerd Hoffmann static USBBusOps xhci_bus_ops = { 2858f1ae32a1SGerd Hoffmann .wakeup_endpoint = xhci_wakeup_endpoint, 2859f1ae32a1SGerd Hoffmann }; 2860f1ae32a1SGerd Hoffmann 2861f1ae32a1SGerd Hoffmann static void usb_xhci_init(XHCIState *xhci, DeviceState *dev) 2862f1ae32a1SGerd Hoffmann { 2863f1ae32a1SGerd Hoffmann int i; 2864f1ae32a1SGerd Hoffmann 2865f1ae32a1SGerd Hoffmann xhci->usbsts = USBSTS_HCH; 2866f1ae32a1SGerd Hoffmann 2867f1ae32a1SGerd Hoffmann usb_bus_new(&xhci->bus, &xhci_bus_ops, &xhci->pci_dev.qdev); 2868f1ae32a1SGerd Hoffmann 2869f1ae32a1SGerd Hoffmann for (i = 0; i < MAXPORTS; i++) { 2870f1ae32a1SGerd Hoffmann memset(&xhci->ports[i], 0, sizeof(xhci->ports[i])); 2871f1ae32a1SGerd Hoffmann usb_register_port(&xhci->bus, &xhci->ports[i].port, xhci, i, 2872f1ae32a1SGerd Hoffmann &xhci_port_ops, 2873f1ae32a1SGerd Hoffmann USB_SPEED_MASK_LOW | 2874f1ae32a1SGerd Hoffmann USB_SPEED_MASK_FULL | 2875f1ae32a1SGerd Hoffmann USB_SPEED_MASK_HIGH); 2876f1ae32a1SGerd Hoffmann } 2877f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 2878f1ae32a1SGerd Hoffmann xhci->slots[i].enabled = 0; 2879f1ae32a1SGerd Hoffmann } 2880f1ae32a1SGerd Hoffmann } 2881f1ae32a1SGerd Hoffmann 2882f1ae32a1SGerd Hoffmann static int usb_xhci_initfn(struct PCIDevice *dev) 2883f1ae32a1SGerd Hoffmann { 2884f1ae32a1SGerd Hoffmann int ret; 2885f1ae32a1SGerd Hoffmann 2886f1ae32a1SGerd Hoffmann XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev, dev); 2887f1ae32a1SGerd Hoffmann 2888f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_CLASS_PROG] = 0x30; /* xHCI */ 2889f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */ 2890f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_CACHE_LINE_SIZE] = 0x10; 2891f1ae32a1SGerd Hoffmann xhci->pci_dev.config[0x60] = 0x30; /* release number */ 2892f1ae32a1SGerd Hoffmann 2893f1ae32a1SGerd Hoffmann usb_xhci_init(xhci, &dev->qdev); 2894f1ae32a1SGerd Hoffmann 2895f1ae32a1SGerd Hoffmann xhci->irq = xhci->pci_dev.irq[0]; 2896f1ae32a1SGerd Hoffmann 2897f1ae32a1SGerd Hoffmann memory_region_init_io(&xhci->mem, &xhci_mem_ops, xhci, 2898f1ae32a1SGerd Hoffmann "xhci", LEN_REGS); 2899f1ae32a1SGerd Hoffmann pci_register_bar(&xhci->pci_dev, 0, 2900f1ae32a1SGerd Hoffmann PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64, 2901f1ae32a1SGerd Hoffmann &xhci->mem); 2902f1ae32a1SGerd Hoffmann 2903f1ae32a1SGerd Hoffmann ret = pcie_cap_init(&xhci->pci_dev, 0xa0, PCI_EXP_TYPE_ENDPOINT, 0); 2904f1ae32a1SGerd Hoffmann assert(ret >= 0); 2905f1ae32a1SGerd Hoffmann 2906f1ae32a1SGerd Hoffmann if (xhci->msi) { 2907f1ae32a1SGerd Hoffmann ret = msi_init(&xhci->pci_dev, 0x70, 1, true, false); 2908f1ae32a1SGerd Hoffmann assert(ret >= 0); 2909f1ae32a1SGerd Hoffmann } 2910f1ae32a1SGerd Hoffmann 2911f1ae32a1SGerd Hoffmann return 0; 2912f1ae32a1SGerd Hoffmann } 2913f1ae32a1SGerd Hoffmann 2914f1ae32a1SGerd Hoffmann static void xhci_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, 2915f1ae32a1SGerd Hoffmann int len) 2916f1ae32a1SGerd Hoffmann { 2917f1ae32a1SGerd Hoffmann XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev, dev); 2918f1ae32a1SGerd Hoffmann 2919f1ae32a1SGerd Hoffmann pci_default_write_config(dev, addr, val, len); 2920f1ae32a1SGerd Hoffmann if (xhci->msi) { 2921f1ae32a1SGerd Hoffmann msi_write_config(dev, addr, val, len); 2922f1ae32a1SGerd Hoffmann } 2923f1ae32a1SGerd Hoffmann } 2924f1ae32a1SGerd Hoffmann 2925f1ae32a1SGerd Hoffmann static const VMStateDescription vmstate_xhci = { 2926f1ae32a1SGerd Hoffmann .name = "xhci", 2927f1ae32a1SGerd Hoffmann .unmigratable = 1, 2928f1ae32a1SGerd Hoffmann }; 2929f1ae32a1SGerd Hoffmann 2930f1ae32a1SGerd Hoffmann static Property xhci_properties[] = { 2931f1ae32a1SGerd Hoffmann DEFINE_PROP_UINT32("msi", XHCIState, msi, 0), 2932f1ae32a1SGerd Hoffmann DEFINE_PROP_END_OF_LIST(), 2933f1ae32a1SGerd Hoffmann }; 2934f1ae32a1SGerd Hoffmann 2935f1ae32a1SGerd Hoffmann static void xhci_class_init(ObjectClass *klass, void *data) 2936f1ae32a1SGerd Hoffmann { 2937f1ae32a1SGerd Hoffmann PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2938f1ae32a1SGerd Hoffmann DeviceClass *dc = DEVICE_CLASS(klass); 2939f1ae32a1SGerd Hoffmann 2940f1ae32a1SGerd Hoffmann dc->vmsd = &vmstate_xhci; 2941f1ae32a1SGerd Hoffmann dc->props = xhci_properties; 294264619739SJan Kiszka dc->reset = xhci_reset; 2943f1ae32a1SGerd Hoffmann k->init = usb_xhci_initfn; 2944f1ae32a1SGerd Hoffmann k->vendor_id = PCI_VENDOR_ID_NEC; 2945f1ae32a1SGerd Hoffmann k->device_id = PCI_DEVICE_ID_NEC_UPD720200; 2946f1ae32a1SGerd Hoffmann k->class_id = PCI_CLASS_SERIAL_USB; 2947f1ae32a1SGerd Hoffmann k->revision = 0x03; 2948f1ae32a1SGerd Hoffmann k->is_express = 1; 2949f1ae32a1SGerd Hoffmann k->config_write = xhci_write_config; 2950f1ae32a1SGerd Hoffmann } 2951f1ae32a1SGerd Hoffmann 2952f1ae32a1SGerd Hoffmann static TypeInfo xhci_info = { 2953f1ae32a1SGerd Hoffmann .name = "nec-usb-xhci", 2954f1ae32a1SGerd Hoffmann .parent = TYPE_PCI_DEVICE, 2955f1ae32a1SGerd Hoffmann .instance_size = sizeof(XHCIState), 2956f1ae32a1SGerd Hoffmann .class_init = xhci_class_init, 2957f1ae32a1SGerd Hoffmann }; 2958f1ae32a1SGerd Hoffmann 2959f1ae32a1SGerd Hoffmann static void xhci_register_types(void) 2960f1ae32a1SGerd Hoffmann { 2961f1ae32a1SGerd Hoffmann type_register_static(&xhci_info); 2962f1ae32a1SGerd Hoffmann } 2963f1ae32a1SGerd Hoffmann 2964f1ae32a1SGerd Hoffmann type_init(xhci_register_types) 2965