1f1ae32a1SGerd Hoffmann /* 2f1ae32a1SGerd Hoffmann * USB xHCI controller emulation 3f1ae32a1SGerd Hoffmann * 4f1ae32a1SGerd Hoffmann * Copyright (c) 2011 Securiforest 5f1ae32a1SGerd Hoffmann * Date: 2011-05-11 ; Author: Hector Martin <hector@marcansoft.com> 6f1ae32a1SGerd Hoffmann * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 7f1ae32a1SGerd Hoffmann * 8f1ae32a1SGerd Hoffmann * This library is free software; you can redistribute it and/or 9f1ae32a1SGerd Hoffmann * modify it under the terms of the GNU Lesser General Public 10f1ae32a1SGerd Hoffmann * License as published by the Free Software Foundation; either 11f1ae32a1SGerd Hoffmann * version 2 of the License, or (at your option) any later version. 12f1ae32a1SGerd Hoffmann * 13f1ae32a1SGerd Hoffmann * This library is distributed in the hope that it will be useful, 14f1ae32a1SGerd Hoffmann * but WITHOUT ANY WARRANTY; without even the implied warranty of 15f1ae32a1SGerd Hoffmann * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16f1ae32a1SGerd Hoffmann * Lesser General Public License for more details. 17f1ae32a1SGerd Hoffmann * 18f1ae32a1SGerd Hoffmann * You should have received a copy of the GNU Lesser General Public 19f1ae32a1SGerd Hoffmann * License along with this library; if not, see <http://www.gnu.org/licenses/>. 20f1ae32a1SGerd Hoffmann */ 21f1ae32a1SGerd Hoffmann #include "hw/hw.h" 22f1ae32a1SGerd Hoffmann #include "qemu-timer.h" 23f1ae32a1SGerd Hoffmann #include "hw/usb.h" 24f1ae32a1SGerd Hoffmann #include "hw/pci.h" 25f1ae32a1SGerd Hoffmann #include "hw/msi.h" 262d754a10SGerd Hoffmann #include "trace.h" 27f1ae32a1SGerd Hoffmann 28f1ae32a1SGerd Hoffmann //#define DEBUG_XHCI 29f1ae32a1SGerd Hoffmann //#define DEBUG_DATA 30f1ae32a1SGerd Hoffmann 31f1ae32a1SGerd Hoffmann #ifdef DEBUG_XHCI 32f1ae32a1SGerd Hoffmann #define DPRINTF(...) fprintf(stderr, __VA_ARGS__) 33f1ae32a1SGerd Hoffmann #else 34f1ae32a1SGerd Hoffmann #define DPRINTF(...) do {} while (0) 35f1ae32a1SGerd Hoffmann #endif 36f1ae32a1SGerd Hoffmann #define FIXME() do { fprintf(stderr, "FIXME %s:%d\n", \ 37f1ae32a1SGerd Hoffmann __func__, __LINE__); abort(); } while (0) 38f1ae32a1SGerd Hoffmann 39f1ae32a1SGerd Hoffmann #define MAXSLOTS 8 40f1ae32a1SGerd Hoffmann #define MAXINTRS 1 41f1ae32a1SGerd Hoffmann 42f1ae32a1SGerd Hoffmann #define USB2_PORTS 4 43f1ae32a1SGerd Hoffmann #define USB3_PORTS 4 44f1ae32a1SGerd Hoffmann 45f1ae32a1SGerd Hoffmann #define MAXPORTS (USB2_PORTS+USB3_PORTS) 46f1ae32a1SGerd Hoffmann 47f1ae32a1SGerd Hoffmann #define TD_QUEUE 24 48f1ae32a1SGerd Hoffmann 49f1ae32a1SGerd Hoffmann /* Very pessimistic, let's hope it's enough for all cases */ 50f1ae32a1SGerd Hoffmann #define EV_QUEUE (((3*TD_QUEUE)+16)*MAXSLOTS) 51f1ae32a1SGerd Hoffmann /* Do not deliver ER Full events. NEC's driver does some things not bound 52f1ae32a1SGerd Hoffmann * to the specs when it gets them */ 53f1ae32a1SGerd Hoffmann #define ER_FULL_HACK 54f1ae32a1SGerd Hoffmann 55f1ae32a1SGerd Hoffmann #define LEN_CAP 0x40 56f1ae32a1SGerd Hoffmann #define OFF_OPER LEN_CAP 57f1ae32a1SGerd Hoffmann #define LEN_OPER (0x400 + 0x10 * MAXPORTS) 58f1ae32a1SGerd Hoffmann #define OFF_RUNTIME ((OFF_OPER + LEN_OPER + 0x20) & ~0x1f) 59f1ae32a1SGerd Hoffmann #define LEN_RUNTIME (0x20 + MAXINTRS * 0x20) 60f1ae32a1SGerd Hoffmann #define OFF_DOORBELL (OFF_RUNTIME + LEN_RUNTIME) 61f1ae32a1SGerd Hoffmann #define LEN_DOORBELL ((MAXSLOTS + 1) * 0x20) 62f1ae32a1SGerd Hoffmann 63f1ae32a1SGerd Hoffmann /* must be power of 2 */ 64f1ae32a1SGerd Hoffmann #define LEN_REGS 0x2000 65f1ae32a1SGerd Hoffmann 66f1ae32a1SGerd Hoffmann #if (OFF_DOORBELL + LEN_DOORBELL) > LEN_REGS 67f1ae32a1SGerd Hoffmann # error Increase LEN_REGS 68f1ae32a1SGerd Hoffmann #endif 69f1ae32a1SGerd Hoffmann 70f1ae32a1SGerd Hoffmann #if MAXINTRS > 1 71f1ae32a1SGerd Hoffmann # error TODO: only one interrupter supported 72f1ae32a1SGerd Hoffmann #endif 73f1ae32a1SGerd Hoffmann 74f1ae32a1SGerd Hoffmann /* bit definitions */ 75f1ae32a1SGerd Hoffmann #define USBCMD_RS (1<<0) 76f1ae32a1SGerd Hoffmann #define USBCMD_HCRST (1<<1) 77f1ae32a1SGerd Hoffmann #define USBCMD_INTE (1<<2) 78f1ae32a1SGerd Hoffmann #define USBCMD_HSEE (1<<3) 79f1ae32a1SGerd Hoffmann #define USBCMD_LHCRST (1<<7) 80f1ae32a1SGerd Hoffmann #define USBCMD_CSS (1<<8) 81f1ae32a1SGerd Hoffmann #define USBCMD_CRS (1<<9) 82f1ae32a1SGerd Hoffmann #define USBCMD_EWE (1<<10) 83f1ae32a1SGerd Hoffmann #define USBCMD_EU3S (1<<11) 84f1ae32a1SGerd Hoffmann 85f1ae32a1SGerd Hoffmann #define USBSTS_HCH (1<<0) 86f1ae32a1SGerd Hoffmann #define USBSTS_HSE (1<<2) 87f1ae32a1SGerd Hoffmann #define USBSTS_EINT (1<<3) 88f1ae32a1SGerd Hoffmann #define USBSTS_PCD (1<<4) 89f1ae32a1SGerd Hoffmann #define USBSTS_SSS (1<<8) 90f1ae32a1SGerd Hoffmann #define USBSTS_RSS (1<<9) 91f1ae32a1SGerd Hoffmann #define USBSTS_SRE (1<<10) 92f1ae32a1SGerd Hoffmann #define USBSTS_CNR (1<<11) 93f1ae32a1SGerd Hoffmann #define USBSTS_HCE (1<<12) 94f1ae32a1SGerd Hoffmann 95f1ae32a1SGerd Hoffmann 96f1ae32a1SGerd Hoffmann #define PORTSC_CCS (1<<0) 97f1ae32a1SGerd Hoffmann #define PORTSC_PED (1<<1) 98f1ae32a1SGerd Hoffmann #define PORTSC_OCA (1<<3) 99f1ae32a1SGerd Hoffmann #define PORTSC_PR (1<<4) 100f1ae32a1SGerd Hoffmann #define PORTSC_PLS_SHIFT 5 101f1ae32a1SGerd Hoffmann #define PORTSC_PLS_MASK 0xf 102f1ae32a1SGerd Hoffmann #define PORTSC_PP (1<<9) 103f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_SHIFT 10 104f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_MASK 0xf 105f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_FULL (1<<10) 106f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_LOW (2<<10) 107f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_HIGH (3<<10) 108f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_SUPER (4<<10) 109f1ae32a1SGerd Hoffmann #define PORTSC_PIC_SHIFT 14 110f1ae32a1SGerd Hoffmann #define PORTSC_PIC_MASK 0x3 111f1ae32a1SGerd Hoffmann #define PORTSC_LWS (1<<16) 112f1ae32a1SGerd Hoffmann #define PORTSC_CSC (1<<17) 113f1ae32a1SGerd Hoffmann #define PORTSC_PEC (1<<18) 114f1ae32a1SGerd Hoffmann #define PORTSC_WRC (1<<19) 115f1ae32a1SGerd Hoffmann #define PORTSC_OCC (1<<20) 116f1ae32a1SGerd Hoffmann #define PORTSC_PRC (1<<21) 117f1ae32a1SGerd Hoffmann #define PORTSC_PLC (1<<22) 118f1ae32a1SGerd Hoffmann #define PORTSC_CEC (1<<23) 119f1ae32a1SGerd Hoffmann #define PORTSC_CAS (1<<24) 120f1ae32a1SGerd Hoffmann #define PORTSC_WCE (1<<25) 121f1ae32a1SGerd Hoffmann #define PORTSC_WDE (1<<26) 122f1ae32a1SGerd Hoffmann #define PORTSC_WOE (1<<27) 123f1ae32a1SGerd Hoffmann #define PORTSC_DR (1<<30) 124f1ae32a1SGerd Hoffmann #define PORTSC_WPR (1<<31) 125f1ae32a1SGerd Hoffmann 126f1ae32a1SGerd Hoffmann #define CRCR_RCS (1<<0) 127f1ae32a1SGerd Hoffmann #define CRCR_CS (1<<1) 128f1ae32a1SGerd Hoffmann #define CRCR_CA (1<<2) 129f1ae32a1SGerd Hoffmann #define CRCR_CRR (1<<3) 130f1ae32a1SGerd Hoffmann 131f1ae32a1SGerd Hoffmann #define IMAN_IP (1<<0) 132f1ae32a1SGerd Hoffmann #define IMAN_IE (1<<1) 133f1ae32a1SGerd Hoffmann 134f1ae32a1SGerd Hoffmann #define ERDP_EHB (1<<3) 135f1ae32a1SGerd Hoffmann 136f1ae32a1SGerd Hoffmann #define TRB_SIZE 16 137f1ae32a1SGerd Hoffmann typedef struct XHCITRB { 138f1ae32a1SGerd Hoffmann uint64_t parameter; 139f1ae32a1SGerd Hoffmann uint32_t status; 140f1ae32a1SGerd Hoffmann uint32_t control; 14159a70ccdSDavid Gibson dma_addr_t addr; 142f1ae32a1SGerd Hoffmann bool ccs; 143f1ae32a1SGerd Hoffmann } XHCITRB; 144f1ae32a1SGerd Hoffmann 145f1ae32a1SGerd Hoffmann 146f1ae32a1SGerd Hoffmann typedef enum TRBType { 147f1ae32a1SGerd Hoffmann TRB_RESERVED = 0, 148f1ae32a1SGerd Hoffmann TR_NORMAL, 149f1ae32a1SGerd Hoffmann TR_SETUP, 150f1ae32a1SGerd Hoffmann TR_DATA, 151f1ae32a1SGerd Hoffmann TR_STATUS, 152f1ae32a1SGerd Hoffmann TR_ISOCH, 153f1ae32a1SGerd Hoffmann TR_LINK, 154f1ae32a1SGerd Hoffmann TR_EVDATA, 155f1ae32a1SGerd Hoffmann TR_NOOP, 156f1ae32a1SGerd Hoffmann CR_ENABLE_SLOT, 157f1ae32a1SGerd Hoffmann CR_DISABLE_SLOT, 158f1ae32a1SGerd Hoffmann CR_ADDRESS_DEVICE, 159f1ae32a1SGerd Hoffmann CR_CONFIGURE_ENDPOINT, 160f1ae32a1SGerd Hoffmann CR_EVALUATE_CONTEXT, 161f1ae32a1SGerd Hoffmann CR_RESET_ENDPOINT, 162f1ae32a1SGerd Hoffmann CR_STOP_ENDPOINT, 163f1ae32a1SGerd Hoffmann CR_SET_TR_DEQUEUE, 164f1ae32a1SGerd Hoffmann CR_RESET_DEVICE, 165f1ae32a1SGerd Hoffmann CR_FORCE_EVENT, 166f1ae32a1SGerd Hoffmann CR_NEGOTIATE_BW, 167f1ae32a1SGerd Hoffmann CR_SET_LATENCY_TOLERANCE, 168f1ae32a1SGerd Hoffmann CR_GET_PORT_BANDWIDTH, 169f1ae32a1SGerd Hoffmann CR_FORCE_HEADER, 170f1ae32a1SGerd Hoffmann CR_NOOP, 171f1ae32a1SGerd Hoffmann ER_TRANSFER = 32, 172f1ae32a1SGerd Hoffmann ER_COMMAND_COMPLETE, 173f1ae32a1SGerd Hoffmann ER_PORT_STATUS_CHANGE, 174f1ae32a1SGerd Hoffmann ER_BANDWIDTH_REQUEST, 175f1ae32a1SGerd Hoffmann ER_DOORBELL, 176f1ae32a1SGerd Hoffmann ER_HOST_CONTROLLER, 177f1ae32a1SGerd Hoffmann ER_DEVICE_NOTIFICATION, 178f1ae32a1SGerd Hoffmann ER_MFINDEX_WRAP, 179f1ae32a1SGerd Hoffmann /* vendor specific bits */ 180f1ae32a1SGerd Hoffmann CR_VENDOR_VIA_CHALLENGE_RESPONSE = 48, 181f1ae32a1SGerd Hoffmann CR_VENDOR_NEC_FIRMWARE_REVISION = 49, 182f1ae32a1SGerd Hoffmann CR_VENDOR_NEC_CHALLENGE_RESPONSE = 50, 183f1ae32a1SGerd Hoffmann } TRBType; 184f1ae32a1SGerd Hoffmann 185f1ae32a1SGerd Hoffmann #define CR_LINK TR_LINK 186f1ae32a1SGerd Hoffmann 187f1ae32a1SGerd Hoffmann typedef enum TRBCCode { 188f1ae32a1SGerd Hoffmann CC_INVALID = 0, 189f1ae32a1SGerd Hoffmann CC_SUCCESS, 190f1ae32a1SGerd Hoffmann CC_DATA_BUFFER_ERROR, 191f1ae32a1SGerd Hoffmann CC_BABBLE_DETECTED, 192f1ae32a1SGerd Hoffmann CC_USB_TRANSACTION_ERROR, 193f1ae32a1SGerd Hoffmann CC_TRB_ERROR, 194f1ae32a1SGerd Hoffmann CC_STALL_ERROR, 195f1ae32a1SGerd Hoffmann CC_RESOURCE_ERROR, 196f1ae32a1SGerd Hoffmann CC_BANDWIDTH_ERROR, 197f1ae32a1SGerd Hoffmann CC_NO_SLOTS_ERROR, 198f1ae32a1SGerd Hoffmann CC_INVALID_STREAM_TYPE_ERROR, 199f1ae32a1SGerd Hoffmann CC_SLOT_NOT_ENABLED_ERROR, 200f1ae32a1SGerd Hoffmann CC_EP_NOT_ENABLED_ERROR, 201f1ae32a1SGerd Hoffmann CC_SHORT_PACKET, 202f1ae32a1SGerd Hoffmann CC_RING_UNDERRUN, 203f1ae32a1SGerd Hoffmann CC_RING_OVERRUN, 204f1ae32a1SGerd Hoffmann CC_VF_ER_FULL, 205f1ae32a1SGerd Hoffmann CC_PARAMETER_ERROR, 206f1ae32a1SGerd Hoffmann CC_BANDWIDTH_OVERRUN, 207f1ae32a1SGerd Hoffmann CC_CONTEXT_STATE_ERROR, 208f1ae32a1SGerd Hoffmann CC_NO_PING_RESPONSE_ERROR, 209f1ae32a1SGerd Hoffmann CC_EVENT_RING_FULL_ERROR, 210f1ae32a1SGerd Hoffmann CC_INCOMPATIBLE_DEVICE_ERROR, 211f1ae32a1SGerd Hoffmann CC_MISSED_SERVICE_ERROR, 212f1ae32a1SGerd Hoffmann CC_COMMAND_RING_STOPPED, 213f1ae32a1SGerd Hoffmann CC_COMMAND_ABORTED, 214f1ae32a1SGerd Hoffmann CC_STOPPED, 215f1ae32a1SGerd Hoffmann CC_STOPPED_LENGTH_INVALID, 216f1ae32a1SGerd Hoffmann CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29, 217f1ae32a1SGerd Hoffmann CC_ISOCH_BUFFER_OVERRUN = 31, 218f1ae32a1SGerd Hoffmann CC_EVENT_LOST_ERROR, 219f1ae32a1SGerd Hoffmann CC_UNDEFINED_ERROR, 220f1ae32a1SGerd Hoffmann CC_INVALID_STREAM_ID_ERROR, 221f1ae32a1SGerd Hoffmann CC_SECONDARY_BANDWIDTH_ERROR, 222f1ae32a1SGerd Hoffmann CC_SPLIT_TRANSACTION_ERROR 223f1ae32a1SGerd Hoffmann } TRBCCode; 224f1ae32a1SGerd Hoffmann 225f1ae32a1SGerd Hoffmann #define TRB_C (1<<0) 226f1ae32a1SGerd Hoffmann #define TRB_TYPE_SHIFT 10 227f1ae32a1SGerd Hoffmann #define TRB_TYPE_MASK 0x3f 228f1ae32a1SGerd Hoffmann #define TRB_TYPE(t) (((t).control >> TRB_TYPE_SHIFT) & TRB_TYPE_MASK) 229f1ae32a1SGerd Hoffmann 230f1ae32a1SGerd Hoffmann #define TRB_EV_ED (1<<2) 231f1ae32a1SGerd Hoffmann 232f1ae32a1SGerd Hoffmann #define TRB_TR_ENT (1<<1) 233f1ae32a1SGerd Hoffmann #define TRB_TR_ISP (1<<2) 234f1ae32a1SGerd Hoffmann #define TRB_TR_NS (1<<3) 235f1ae32a1SGerd Hoffmann #define TRB_TR_CH (1<<4) 236f1ae32a1SGerd Hoffmann #define TRB_TR_IOC (1<<5) 237f1ae32a1SGerd Hoffmann #define TRB_TR_IDT (1<<6) 238f1ae32a1SGerd Hoffmann #define TRB_TR_TBC_SHIFT 7 239f1ae32a1SGerd Hoffmann #define TRB_TR_TBC_MASK 0x3 240f1ae32a1SGerd Hoffmann #define TRB_TR_BEI (1<<9) 241f1ae32a1SGerd Hoffmann #define TRB_TR_TLBPC_SHIFT 16 242f1ae32a1SGerd Hoffmann #define TRB_TR_TLBPC_MASK 0xf 243f1ae32a1SGerd Hoffmann #define TRB_TR_FRAMEID_SHIFT 20 244f1ae32a1SGerd Hoffmann #define TRB_TR_FRAMEID_MASK 0x7ff 245f1ae32a1SGerd Hoffmann #define TRB_TR_SIA (1<<31) 246f1ae32a1SGerd Hoffmann 247f1ae32a1SGerd Hoffmann #define TRB_TR_DIR (1<<16) 248f1ae32a1SGerd Hoffmann 249f1ae32a1SGerd Hoffmann #define TRB_CR_SLOTID_SHIFT 24 250f1ae32a1SGerd Hoffmann #define TRB_CR_SLOTID_MASK 0xff 251f1ae32a1SGerd Hoffmann #define TRB_CR_EPID_SHIFT 16 252f1ae32a1SGerd Hoffmann #define TRB_CR_EPID_MASK 0x1f 253f1ae32a1SGerd Hoffmann 254f1ae32a1SGerd Hoffmann #define TRB_CR_BSR (1<<9) 255f1ae32a1SGerd Hoffmann #define TRB_CR_DC (1<<9) 256f1ae32a1SGerd Hoffmann 257f1ae32a1SGerd Hoffmann #define TRB_LK_TC (1<<1) 258f1ae32a1SGerd Hoffmann 259f1ae32a1SGerd Hoffmann #define EP_TYPE_MASK 0x7 260f1ae32a1SGerd Hoffmann #define EP_TYPE_SHIFT 3 261f1ae32a1SGerd Hoffmann 262f1ae32a1SGerd Hoffmann #define EP_STATE_MASK 0x7 263f1ae32a1SGerd Hoffmann #define EP_DISABLED (0<<0) 264f1ae32a1SGerd Hoffmann #define EP_RUNNING (1<<0) 265f1ae32a1SGerd Hoffmann #define EP_HALTED (2<<0) 266f1ae32a1SGerd Hoffmann #define EP_STOPPED (3<<0) 267f1ae32a1SGerd Hoffmann #define EP_ERROR (4<<0) 268f1ae32a1SGerd Hoffmann 269f1ae32a1SGerd Hoffmann #define SLOT_STATE_MASK 0x1f 270f1ae32a1SGerd Hoffmann #define SLOT_STATE_SHIFT 27 271f1ae32a1SGerd Hoffmann #define SLOT_STATE(s) (((s)>>SLOT_STATE_SHIFT)&SLOT_STATE_MASK) 272f1ae32a1SGerd Hoffmann #define SLOT_ENABLED 0 273f1ae32a1SGerd Hoffmann #define SLOT_DEFAULT 1 274f1ae32a1SGerd Hoffmann #define SLOT_ADDRESSED 2 275f1ae32a1SGerd Hoffmann #define SLOT_CONFIGURED 3 276f1ae32a1SGerd Hoffmann 277f1ae32a1SGerd Hoffmann #define SLOT_CONTEXT_ENTRIES_MASK 0x1f 278f1ae32a1SGerd Hoffmann #define SLOT_CONTEXT_ENTRIES_SHIFT 27 279f1ae32a1SGerd Hoffmann 280f1ae32a1SGerd Hoffmann typedef enum EPType { 281f1ae32a1SGerd Hoffmann ET_INVALID = 0, 282f1ae32a1SGerd Hoffmann ET_ISO_OUT, 283f1ae32a1SGerd Hoffmann ET_BULK_OUT, 284f1ae32a1SGerd Hoffmann ET_INTR_OUT, 285f1ae32a1SGerd Hoffmann ET_CONTROL, 286f1ae32a1SGerd Hoffmann ET_ISO_IN, 287f1ae32a1SGerd Hoffmann ET_BULK_IN, 288f1ae32a1SGerd Hoffmann ET_INTR_IN, 289f1ae32a1SGerd Hoffmann } EPType; 290f1ae32a1SGerd Hoffmann 291f1ae32a1SGerd Hoffmann typedef struct XHCIRing { 29259a70ccdSDavid Gibson dma_addr_t base; 29359a70ccdSDavid Gibson dma_addr_t dequeue; 294f1ae32a1SGerd Hoffmann bool ccs; 295f1ae32a1SGerd Hoffmann } XHCIRing; 296f1ae32a1SGerd Hoffmann 297f1ae32a1SGerd Hoffmann typedef struct XHCIPort { 298f1ae32a1SGerd Hoffmann USBPort port; 299f1ae32a1SGerd Hoffmann uint32_t portsc; 300f1ae32a1SGerd Hoffmann } XHCIPort; 301f1ae32a1SGerd Hoffmann 302f1ae32a1SGerd Hoffmann struct XHCIState; 303f1ae32a1SGerd Hoffmann typedef struct XHCIState XHCIState; 304f1ae32a1SGerd Hoffmann 305f1ae32a1SGerd Hoffmann typedef struct XHCITransfer { 306f1ae32a1SGerd Hoffmann XHCIState *xhci; 307f1ae32a1SGerd Hoffmann USBPacket packet; 308d5a15814SGerd Hoffmann QEMUSGList sgl; 309f1ae32a1SGerd Hoffmann bool running_async; 310f1ae32a1SGerd Hoffmann bool running_retry; 311f1ae32a1SGerd Hoffmann bool cancelled; 312f1ae32a1SGerd Hoffmann bool complete; 313f1ae32a1SGerd Hoffmann unsigned int iso_pkts; 314f1ae32a1SGerd Hoffmann unsigned int slotid; 315f1ae32a1SGerd Hoffmann unsigned int epid; 316f1ae32a1SGerd Hoffmann bool in_xfer; 317f1ae32a1SGerd Hoffmann bool iso_xfer; 318f1ae32a1SGerd Hoffmann 319f1ae32a1SGerd Hoffmann unsigned int trb_count; 320f1ae32a1SGerd Hoffmann unsigned int trb_alloced; 321f1ae32a1SGerd Hoffmann XHCITRB *trbs; 322f1ae32a1SGerd Hoffmann 323f1ae32a1SGerd Hoffmann TRBCCode status; 324f1ae32a1SGerd Hoffmann 325f1ae32a1SGerd Hoffmann unsigned int pkts; 326f1ae32a1SGerd Hoffmann unsigned int pktsize; 327f1ae32a1SGerd Hoffmann unsigned int cur_pkt; 3283d139684SGerd Hoffmann 3293d139684SGerd Hoffmann uint64_t mfindex_kick; 330f1ae32a1SGerd Hoffmann } XHCITransfer; 331f1ae32a1SGerd Hoffmann 332f1ae32a1SGerd Hoffmann typedef struct XHCIEPContext { 3333d139684SGerd Hoffmann XHCIState *xhci; 3343d139684SGerd Hoffmann unsigned int slotid; 3353d139684SGerd Hoffmann unsigned int epid; 3363d139684SGerd Hoffmann 337f1ae32a1SGerd Hoffmann XHCIRing ring; 338f1ae32a1SGerd Hoffmann unsigned int next_xfer; 339f1ae32a1SGerd Hoffmann unsigned int comp_xfer; 340f1ae32a1SGerd Hoffmann XHCITransfer transfers[TD_QUEUE]; 341f1ae32a1SGerd Hoffmann XHCITransfer *retry; 342f1ae32a1SGerd Hoffmann EPType type; 34359a70ccdSDavid Gibson dma_addr_t pctx; 344f1ae32a1SGerd Hoffmann unsigned int max_psize; 345f1ae32a1SGerd Hoffmann uint32_t state; 3463d139684SGerd Hoffmann 3473d139684SGerd Hoffmann /* iso xfer scheduling */ 3483d139684SGerd Hoffmann unsigned int interval; 3493d139684SGerd Hoffmann int64_t mfindex_last; 3503d139684SGerd Hoffmann QEMUTimer *kick_timer; 351f1ae32a1SGerd Hoffmann } XHCIEPContext; 352f1ae32a1SGerd Hoffmann 353f1ae32a1SGerd Hoffmann typedef struct XHCISlot { 354f1ae32a1SGerd Hoffmann bool enabled; 35559a70ccdSDavid Gibson dma_addr_t ctx; 356f1ae32a1SGerd Hoffmann unsigned int port; 357f1ae32a1SGerd Hoffmann unsigned int devaddr; 358f1ae32a1SGerd Hoffmann XHCIEPContext * eps[31]; 359f1ae32a1SGerd Hoffmann } XHCISlot; 360f1ae32a1SGerd Hoffmann 361f1ae32a1SGerd Hoffmann typedef struct XHCIEvent { 362f1ae32a1SGerd Hoffmann TRBType type; 363f1ae32a1SGerd Hoffmann TRBCCode ccode; 364f1ae32a1SGerd Hoffmann uint64_t ptr; 365f1ae32a1SGerd Hoffmann uint32_t length; 366f1ae32a1SGerd Hoffmann uint32_t flags; 367f1ae32a1SGerd Hoffmann uint8_t slotid; 368f1ae32a1SGerd Hoffmann uint8_t epid; 369f1ae32a1SGerd Hoffmann } XHCIEvent; 370f1ae32a1SGerd Hoffmann 371f1ae32a1SGerd Hoffmann struct XHCIState { 372f1ae32a1SGerd Hoffmann PCIDevice pci_dev; 373f1ae32a1SGerd Hoffmann USBBus bus; 374f1ae32a1SGerd Hoffmann qemu_irq irq; 375f1ae32a1SGerd Hoffmann MemoryRegion mem; 376f1ae32a1SGerd Hoffmann const char *name; 377f1ae32a1SGerd Hoffmann uint32_t msi; 378f1ae32a1SGerd Hoffmann unsigned int devaddr; 379f1ae32a1SGerd Hoffmann 380f1ae32a1SGerd Hoffmann /* Operational Registers */ 381f1ae32a1SGerd Hoffmann uint32_t usbcmd; 382f1ae32a1SGerd Hoffmann uint32_t usbsts; 383f1ae32a1SGerd Hoffmann uint32_t dnctrl; 384f1ae32a1SGerd Hoffmann uint32_t crcr_low; 385f1ae32a1SGerd Hoffmann uint32_t crcr_high; 386f1ae32a1SGerd Hoffmann uint32_t dcbaap_low; 387f1ae32a1SGerd Hoffmann uint32_t dcbaap_high; 388f1ae32a1SGerd Hoffmann uint32_t config; 389f1ae32a1SGerd Hoffmann 390f1ae32a1SGerd Hoffmann XHCIPort ports[MAXPORTS]; 391f1ae32a1SGerd Hoffmann XHCISlot slots[MAXSLOTS]; 392f1ae32a1SGerd Hoffmann 393f1ae32a1SGerd Hoffmann /* Runtime Registers */ 394f1ae32a1SGerd Hoffmann uint32_t iman; 395f1ae32a1SGerd Hoffmann uint32_t imod; 396f1ae32a1SGerd Hoffmann uint32_t erstsz; 397f1ae32a1SGerd Hoffmann uint32_t erstba_low; 398f1ae32a1SGerd Hoffmann uint32_t erstba_high; 399f1ae32a1SGerd Hoffmann uint32_t erdp_low; 400f1ae32a1SGerd Hoffmann uint32_t erdp_high; 401f1ae32a1SGerd Hoffmann 40201546fa6SGerd Hoffmann int64_t mfindex_start; 40301546fa6SGerd Hoffmann QEMUTimer *mfwrap_timer; 40401546fa6SGerd Hoffmann 40559a70ccdSDavid Gibson dma_addr_t er_start; 406f1ae32a1SGerd Hoffmann uint32_t er_size; 407f1ae32a1SGerd Hoffmann bool er_pcs; 408f1ae32a1SGerd Hoffmann unsigned int er_ep_idx; 409f1ae32a1SGerd Hoffmann bool er_full; 410f1ae32a1SGerd Hoffmann 411f1ae32a1SGerd Hoffmann XHCIEvent ev_buffer[EV_QUEUE]; 412f1ae32a1SGerd Hoffmann unsigned int ev_buffer_put; 413f1ae32a1SGerd Hoffmann unsigned int ev_buffer_get; 414f1ae32a1SGerd Hoffmann 415f1ae32a1SGerd Hoffmann XHCIRing cmd_ring; 416f1ae32a1SGerd Hoffmann }; 417f1ae32a1SGerd Hoffmann 418f1ae32a1SGerd Hoffmann typedef struct XHCIEvRingSeg { 419f1ae32a1SGerd Hoffmann uint32_t addr_low; 420f1ae32a1SGerd Hoffmann uint32_t addr_high; 421f1ae32a1SGerd Hoffmann uint32_t size; 422f1ae32a1SGerd Hoffmann uint32_t rsvd; 423f1ae32a1SGerd Hoffmann } XHCIEvRingSeg; 424f1ae32a1SGerd Hoffmann 42501546fa6SGerd Hoffmann static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, 42601546fa6SGerd Hoffmann unsigned int epid); 42701546fa6SGerd Hoffmann static void xhci_event(XHCIState *xhci, XHCIEvent *event); 42801546fa6SGerd Hoffmann static void xhci_write_event(XHCIState *xhci, XHCIEvent *event); 42901546fa6SGerd Hoffmann 430f1ae32a1SGerd Hoffmann static const char *TRBType_names[] = { 431f1ae32a1SGerd Hoffmann [TRB_RESERVED] = "TRB_RESERVED", 432f1ae32a1SGerd Hoffmann [TR_NORMAL] = "TR_NORMAL", 433f1ae32a1SGerd Hoffmann [TR_SETUP] = "TR_SETUP", 434f1ae32a1SGerd Hoffmann [TR_DATA] = "TR_DATA", 435f1ae32a1SGerd Hoffmann [TR_STATUS] = "TR_STATUS", 436f1ae32a1SGerd Hoffmann [TR_ISOCH] = "TR_ISOCH", 437f1ae32a1SGerd Hoffmann [TR_LINK] = "TR_LINK", 438f1ae32a1SGerd Hoffmann [TR_EVDATA] = "TR_EVDATA", 439f1ae32a1SGerd Hoffmann [TR_NOOP] = "TR_NOOP", 440f1ae32a1SGerd Hoffmann [CR_ENABLE_SLOT] = "CR_ENABLE_SLOT", 441f1ae32a1SGerd Hoffmann [CR_DISABLE_SLOT] = "CR_DISABLE_SLOT", 442f1ae32a1SGerd Hoffmann [CR_ADDRESS_DEVICE] = "CR_ADDRESS_DEVICE", 443f1ae32a1SGerd Hoffmann [CR_CONFIGURE_ENDPOINT] = "CR_CONFIGURE_ENDPOINT", 444f1ae32a1SGerd Hoffmann [CR_EVALUATE_CONTEXT] = "CR_EVALUATE_CONTEXT", 445f1ae32a1SGerd Hoffmann [CR_RESET_ENDPOINT] = "CR_RESET_ENDPOINT", 446f1ae32a1SGerd Hoffmann [CR_STOP_ENDPOINT] = "CR_STOP_ENDPOINT", 447f1ae32a1SGerd Hoffmann [CR_SET_TR_DEQUEUE] = "CR_SET_TR_DEQUEUE", 448f1ae32a1SGerd Hoffmann [CR_RESET_DEVICE] = "CR_RESET_DEVICE", 449f1ae32a1SGerd Hoffmann [CR_FORCE_EVENT] = "CR_FORCE_EVENT", 450f1ae32a1SGerd Hoffmann [CR_NEGOTIATE_BW] = "CR_NEGOTIATE_BW", 451f1ae32a1SGerd Hoffmann [CR_SET_LATENCY_TOLERANCE] = "CR_SET_LATENCY_TOLERANCE", 452f1ae32a1SGerd Hoffmann [CR_GET_PORT_BANDWIDTH] = "CR_GET_PORT_BANDWIDTH", 453f1ae32a1SGerd Hoffmann [CR_FORCE_HEADER] = "CR_FORCE_HEADER", 454f1ae32a1SGerd Hoffmann [CR_NOOP] = "CR_NOOP", 455f1ae32a1SGerd Hoffmann [ER_TRANSFER] = "ER_TRANSFER", 456f1ae32a1SGerd Hoffmann [ER_COMMAND_COMPLETE] = "ER_COMMAND_COMPLETE", 457f1ae32a1SGerd Hoffmann [ER_PORT_STATUS_CHANGE] = "ER_PORT_STATUS_CHANGE", 458f1ae32a1SGerd Hoffmann [ER_BANDWIDTH_REQUEST] = "ER_BANDWIDTH_REQUEST", 459f1ae32a1SGerd Hoffmann [ER_DOORBELL] = "ER_DOORBELL", 460f1ae32a1SGerd Hoffmann [ER_HOST_CONTROLLER] = "ER_HOST_CONTROLLER", 461f1ae32a1SGerd Hoffmann [ER_DEVICE_NOTIFICATION] = "ER_DEVICE_NOTIFICATION", 462f1ae32a1SGerd Hoffmann [ER_MFINDEX_WRAP] = "ER_MFINDEX_WRAP", 463f1ae32a1SGerd Hoffmann [CR_VENDOR_VIA_CHALLENGE_RESPONSE] = "CR_VENDOR_VIA_CHALLENGE_RESPONSE", 464f1ae32a1SGerd Hoffmann [CR_VENDOR_NEC_FIRMWARE_REVISION] = "CR_VENDOR_NEC_FIRMWARE_REVISION", 465f1ae32a1SGerd Hoffmann [CR_VENDOR_NEC_CHALLENGE_RESPONSE] = "CR_VENDOR_NEC_CHALLENGE_RESPONSE", 466f1ae32a1SGerd Hoffmann }; 467f1ae32a1SGerd Hoffmann 468873123feSGerd Hoffmann static const char *TRBCCode_names[] = { 469873123feSGerd Hoffmann [CC_INVALID] = "CC_INVALID", 470873123feSGerd Hoffmann [CC_SUCCESS] = "CC_SUCCESS", 471873123feSGerd Hoffmann [CC_DATA_BUFFER_ERROR] = "CC_DATA_BUFFER_ERROR", 472873123feSGerd Hoffmann [CC_BABBLE_DETECTED] = "CC_BABBLE_DETECTED", 473873123feSGerd Hoffmann [CC_USB_TRANSACTION_ERROR] = "CC_USB_TRANSACTION_ERROR", 474873123feSGerd Hoffmann [CC_TRB_ERROR] = "CC_TRB_ERROR", 475873123feSGerd Hoffmann [CC_STALL_ERROR] = "CC_STALL_ERROR", 476873123feSGerd Hoffmann [CC_RESOURCE_ERROR] = "CC_RESOURCE_ERROR", 477873123feSGerd Hoffmann [CC_BANDWIDTH_ERROR] = "CC_BANDWIDTH_ERROR", 478873123feSGerd Hoffmann [CC_NO_SLOTS_ERROR] = "CC_NO_SLOTS_ERROR", 479873123feSGerd Hoffmann [CC_INVALID_STREAM_TYPE_ERROR] = "CC_INVALID_STREAM_TYPE_ERROR", 480873123feSGerd Hoffmann [CC_SLOT_NOT_ENABLED_ERROR] = "CC_SLOT_NOT_ENABLED_ERROR", 481873123feSGerd Hoffmann [CC_EP_NOT_ENABLED_ERROR] = "CC_EP_NOT_ENABLED_ERROR", 482873123feSGerd Hoffmann [CC_SHORT_PACKET] = "CC_SHORT_PACKET", 483873123feSGerd Hoffmann [CC_RING_UNDERRUN] = "CC_RING_UNDERRUN", 484873123feSGerd Hoffmann [CC_RING_OVERRUN] = "CC_RING_OVERRUN", 485873123feSGerd Hoffmann [CC_VF_ER_FULL] = "CC_VF_ER_FULL", 486873123feSGerd Hoffmann [CC_PARAMETER_ERROR] = "CC_PARAMETER_ERROR", 487873123feSGerd Hoffmann [CC_BANDWIDTH_OVERRUN] = "CC_BANDWIDTH_OVERRUN", 488873123feSGerd Hoffmann [CC_CONTEXT_STATE_ERROR] = "CC_CONTEXT_STATE_ERROR", 489873123feSGerd Hoffmann [CC_NO_PING_RESPONSE_ERROR] = "CC_NO_PING_RESPONSE_ERROR", 490873123feSGerd Hoffmann [CC_EVENT_RING_FULL_ERROR] = "CC_EVENT_RING_FULL_ERROR", 491873123feSGerd Hoffmann [CC_INCOMPATIBLE_DEVICE_ERROR] = "CC_INCOMPATIBLE_DEVICE_ERROR", 492873123feSGerd Hoffmann [CC_MISSED_SERVICE_ERROR] = "CC_MISSED_SERVICE_ERROR", 493873123feSGerd Hoffmann [CC_COMMAND_RING_STOPPED] = "CC_COMMAND_RING_STOPPED", 494873123feSGerd Hoffmann [CC_COMMAND_ABORTED] = "CC_COMMAND_ABORTED", 495873123feSGerd Hoffmann [CC_STOPPED] = "CC_STOPPED", 496873123feSGerd Hoffmann [CC_STOPPED_LENGTH_INVALID] = "CC_STOPPED_LENGTH_INVALID", 497873123feSGerd Hoffmann [CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR] 498873123feSGerd Hoffmann = "CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR", 499873123feSGerd Hoffmann [CC_ISOCH_BUFFER_OVERRUN] = "CC_ISOCH_BUFFER_OVERRUN", 500873123feSGerd Hoffmann [CC_EVENT_LOST_ERROR] = "CC_EVENT_LOST_ERROR", 501873123feSGerd Hoffmann [CC_UNDEFINED_ERROR] = "CC_UNDEFINED_ERROR", 502873123feSGerd Hoffmann [CC_INVALID_STREAM_ID_ERROR] = "CC_INVALID_STREAM_ID_ERROR", 503873123feSGerd Hoffmann [CC_SECONDARY_BANDWIDTH_ERROR] = "CC_SECONDARY_BANDWIDTH_ERROR", 504873123feSGerd Hoffmann [CC_SPLIT_TRANSACTION_ERROR] = "CC_SPLIT_TRANSACTION_ERROR", 505873123feSGerd Hoffmann }; 506873123feSGerd Hoffmann 507f1ae32a1SGerd Hoffmann static const char *lookup_name(uint32_t index, const char **list, uint32_t llen) 508f1ae32a1SGerd Hoffmann { 509f1ae32a1SGerd Hoffmann if (index >= llen || list[index] == NULL) { 510f1ae32a1SGerd Hoffmann return "???"; 511f1ae32a1SGerd Hoffmann } 512f1ae32a1SGerd Hoffmann return list[index]; 513f1ae32a1SGerd Hoffmann } 514f1ae32a1SGerd Hoffmann 515f1ae32a1SGerd Hoffmann static const char *trb_name(XHCITRB *trb) 516f1ae32a1SGerd Hoffmann { 517f1ae32a1SGerd Hoffmann return lookup_name(TRB_TYPE(*trb), TRBType_names, 518f1ae32a1SGerd Hoffmann ARRAY_SIZE(TRBType_names)); 519f1ae32a1SGerd Hoffmann } 520f1ae32a1SGerd Hoffmann 521873123feSGerd Hoffmann static const char *event_name(XHCIEvent *event) 522873123feSGerd Hoffmann { 523873123feSGerd Hoffmann return lookup_name(event->ccode, TRBCCode_names, 524873123feSGerd Hoffmann ARRAY_SIZE(TRBCCode_names)); 525873123feSGerd Hoffmann } 526873123feSGerd Hoffmann 52701546fa6SGerd Hoffmann static uint64_t xhci_mfindex_get(XHCIState *xhci) 52801546fa6SGerd Hoffmann { 52901546fa6SGerd Hoffmann int64_t now = qemu_get_clock_ns(vm_clock); 53001546fa6SGerd Hoffmann return (now - xhci->mfindex_start) / 125000; 53101546fa6SGerd Hoffmann } 53201546fa6SGerd Hoffmann 53301546fa6SGerd Hoffmann static void xhci_mfwrap_update(XHCIState *xhci) 53401546fa6SGerd Hoffmann { 53501546fa6SGerd Hoffmann const uint32_t bits = USBCMD_RS | USBCMD_EWE; 53601546fa6SGerd Hoffmann uint32_t mfindex, left; 53701546fa6SGerd Hoffmann int64_t now; 53801546fa6SGerd Hoffmann 53901546fa6SGerd Hoffmann if ((xhci->usbcmd & bits) == bits) { 54001546fa6SGerd Hoffmann now = qemu_get_clock_ns(vm_clock); 54101546fa6SGerd Hoffmann mfindex = ((now - xhci->mfindex_start) / 125000) & 0x3fff; 54201546fa6SGerd Hoffmann left = 0x4000 - mfindex; 54301546fa6SGerd Hoffmann qemu_mod_timer(xhci->mfwrap_timer, now + left * 125000); 54401546fa6SGerd Hoffmann } else { 54501546fa6SGerd Hoffmann qemu_del_timer(xhci->mfwrap_timer); 54601546fa6SGerd Hoffmann } 54701546fa6SGerd Hoffmann } 54801546fa6SGerd Hoffmann 54901546fa6SGerd Hoffmann static void xhci_mfwrap_timer(void *opaque) 55001546fa6SGerd Hoffmann { 55101546fa6SGerd Hoffmann XHCIState *xhci = opaque; 55201546fa6SGerd Hoffmann XHCIEvent wrap = { ER_MFINDEX_WRAP, CC_SUCCESS }; 55301546fa6SGerd Hoffmann 55401546fa6SGerd Hoffmann xhci_event(xhci, &wrap); 55501546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 55601546fa6SGerd Hoffmann } 557f1ae32a1SGerd Hoffmann 55859a70ccdSDavid Gibson static inline dma_addr_t xhci_addr64(uint32_t low, uint32_t high) 559f1ae32a1SGerd Hoffmann { 56059a70ccdSDavid Gibson if (sizeof(dma_addr_t) == 4) { 561f1ae32a1SGerd Hoffmann return low; 56259a70ccdSDavid Gibson } else { 56359a70ccdSDavid Gibson return low | (((dma_addr_t)high << 16) << 16); 56459a70ccdSDavid Gibson } 565f1ae32a1SGerd Hoffmann } 566f1ae32a1SGerd Hoffmann 56759a70ccdSDavid Gibson static inline dma_addr_t xhci_mask64(uint64_t addr) 568f1ae32a1SGerd Hoffmann { 56959a70ccdSDavid Gibson if (sizeof(dma_addr_t) == 4) { 570f1ae32a1SGerd Hoffmann return addr & 0xffffffff; 57159a70ccdSDavid Gibson } else { 57259a70ccdSDavid Gibson return addr; 57359a70ccdSDavid Gibson } 574f1ae32a1SGerd Hoffmann } 575f1ae32a1SGerd Hoffmann 576f1ae32a1SGerd Hoffmann static void xhci_irq_update(XHCIState *xhci) 577f1ae32a1SGerd Hoffmann { 578f1ae32a1SGerd Hoffmann int level = 0; 579f1ae32a1SGerd Hoffmann 580f1ae32a1SGerd Hoffmann if (xhci->iman & IMAN_IP && xhci->iman & IMAN_IE && 581215bff17SLai Jiangshan xhci->usbcmd & USBCMD_INTE) { 582f1ae32a1SGerd Hoffmann level = 1; 583f1ae32a1SGerd Hoffmann } 584f1ae32a1SGerd Hoffmann 585f1ae32a1SGerd Hoffmann if (xhci->msi && msi_enabled(&xhci->pci_dev)) { 586f1ae32a1SGerd Hoffmann if (level) { 5877acd279fSGerd Hoffmann trace_usb_xhci_irq_msi(0); 588f1ae32a1SGerd Hoffmann msi_notify(&xhci->pci_dev, 0); 589f1ae32a1SGerd Hoffmann } 590f1ae32a1SGerd Hoffmann } else { 5917acd279fSGerd Hoffmann trace_usb_xhci_irq_intx(level); 592f1ae32a1SGerd Hoffmann qemu_set_irq(xhci->irq, level); 593f1ae32a1SGerd Hoffmann } 594f1ae32a1SGerd Hoffmann } 595f1ae32a1SGerd Hoffmann 596f1ae32a1SGerd Hoffmann static inline int xhci_running(XHCIState *xhci) 597f1ae32a1SGerd Hoffmann { 598f1ae32a1SGerd Hoffmann return !(xhci->usbsts & USBSTS_HCH) && !xhci->er_full; 599f1ae32a1SGerd Hoffmann } 600f1ae32a1SGerd Hoffmann 601f1ae32a1SGerd Hoffmann static void xhci_die(XHCIState *xhci) 602f1ae32a1SGerd Hoffmann { 603f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_HCE; 604f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: asserted controller error\n"); 605f1ae32a1SGerd Hoffmann } 606f1ae32a1SGerd Hoffmann 607f1ae32a1SGerd Hoffmann static void xhci_write_event(XHCIState *xhci, XHCIEvent *event) 608f1ae32a1SGerd Hoffmann { 609f1ae32a1SGerd Hoffmann XHCITRB ev_trb; 61059a70ccdSDavid Gibson dma_addr_t addr; 611f1ae32a1SGerd Hoffmann 612f1ae32a1SGerd Hoffmann ev_trb.parameter = cpu_to_le64(event->ptr); 613f1ae32a1SGerd Hoffmann ev_trb.status = cpu_to_le32(event->length | (event->ccode << 24)); 614f1ae32a1SGerd Hoffmann ev_trb.control = (event->slotid << 24) | (event->epid << 16) | 615f1ae32a1SGerd Hoffmann event->flags | (event->type << TRB_TYPE_SHIFT); 616f1ae32a1SGerd Hoffmann if (xhci->er_pcs) { 617f1ae32a1SGerd Hoffmann ev_trb.control |= TRB_C; 618f1ae32a1SGerd Hoffmann } 619f1ae32a1SGerd Hoffmann ev_trb.control = cpu_to_le32(ev_trb.control); 620f1ae32a1SGerd Hoffmann 6217acd279fSGerd Hoffmann trace_usb_xhci_queue_event(xhci->er_ep_idx, trb_name(&ev_trb), 622873123feSGerd Hoffmann event_name(event), ev_trb.parameter, 623873123feSGerd Hoffmann ev_trb.status, ev_trb.control); 624f1ae32a1SGerd Hoffmann 625f1ae32a1SGerd Hoffmann addr = xhci->er_start + TRB_SIZE*xhci->er_ep_idx; 62659a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, addr, &ev_trb, TRB_SIZE); 627f1ae32a1SGerd Hoffmann 628f1ae32a1SGerd Hoffmann xhci->er_ep_idx++; 629f1ae32a1SGerd Hoffmann if (xhci->er_ep_idx >= xhci->er_size) { 630f1ae32a1SGerd Hoffmann xhci->er_ep_idx = 0; 631f1ae32a1SGerd Hoffmann xhci->er_pcs = !xhci->er_pcs; 632f1ae32a1SGerd Hoffmann } 633f1ae32a1SGerd Hoffmann } 634f1ae32a1SGerd Hoffmann 635f1ae32a1SGerd Hoffmann static void xhci_events_update(XHCIState *xhci) 636f1ae32a1SGerd Hoffmann { 63759a70ccdSDavid Gibson dma_addr_t erdp; 638f1ae32a1SGerd Hoffmann unsigned int dp_idx; 639f1ae32a1SGerd Hoffmann bool do_irq = 0; 640f1ae32a1SGerd Hoffmann 641f1ae32a1SGerd Hoffmann if (xhci->usbsts & USBSTS_HCH) { 642f1ae32a1SGerd Hoffmann return; 643f1ae32a1SGerd Hoffmann } 644f1ae32a1SGerd Hoffmann 645f1ae32a1SGerd Hoffmann erdp = xhci_addr64(xhci->erdp_low, xhci->erdp_high); 646f1ae32a1SGerd Hoffmann if (erdp < xhci->er_start || 647f1ae32a1SGerd Hoffmann erdp >= (xhci->er_start + TRB_SIZE*xhci->er_size)) { 64859a70ccdSDavid Gibson fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); 64959a70ccdSDavid Gibson fprintf(stderr, "xhci: ER at "DMA_ADDR_FMT" len %d\n", 650f1ae32a1SGerd Hoffmann xhci->er_start, xhci->er_size); 651f1ae32a1SGerd Hoffmann xhci_die(xhci); 652f1ae32a1SGerd Hoffmann return; 653f1ae32a1SGerd Hoffmann } 654f1ae32a1SGerd Hoffmann dp_idx = (erdp - xhci->er_start) / TRB_SIZE; 655f1ae32a1SGerd Hoffmann assert(dp_idx < xhci->er_size); 656f1ae32a1SGerd Hoffmann 657f1ae32a1SGerd Hoffmann /* NEC didn't read section 4.9.4 of the spec (v1.0 p139 top Note) and thus 658f1ae32a1SGerd Hoffmann * deadlocks when the ER is full. Hack it by holding off events until 659f1ae32a1SGerd Hoffmann * the driver decides to free at least half of the ring */ 660f1ae32a1SGerd Hoffmann if (xhci->er_full) { 661f1ae32a1SGerd Hoffmann int er_free = dp_idx - xhci->er_ep_idx; 662f1ae32a1SGerd Hoffmann if (er_free <= 0) { 663f1ae32a1SGerd Hoffmann er_free += xhci->er_size; 664f1ae32a1SGerd Hoffmann } 665f1ae32a1SGerd Hoffmann if (er_free < (xhci->er_size/2)) { 666f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring still " 667f1ae32a1SGerd Hoffmann "more than half full (hack)\n"); 668f1ae32a1SGerd Hoffmann return; 669f1ae32a1SGerd Hoffmann } 670f1ae32a1SGerd Hoffmann } 671f1ae32a1SGerd Hoffmann 672f1ae32a1SGerd Hoffmann while (xhci->ev_buffer_put != xhci->ev_buffer_get) { 673f1ae32a1SGerd Hoffmann assert(xhci->er_full); 674f1ae32a1SGerd Hoffmann if (((xhci->er_ep_idx+1) % xhci->er_size) == dp_idx) { 675f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring full again\n"); 676f1ae32a1SGerd Hoffmann #ifndef ER_FULL_HACK 677f1ae32a1SGerd Hoffmann XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR}; 678f1ae32a1SGerd Hoffmann xhci_write_event(xhci, &full); 679f1ae32a1SGerd Hoffmann #endif 680f1ae32a1SGerd Hoffmann do_irq = 1; 681f1ae32a1SGerd Hoffmann break; 682f1ae32a1SGerd Hoffmann } 683f1ae32a1SGerd Hoffmann XHCIEvent *event = &xhci->ev_buffer[xhci->ev_buffer_get]; 684f1ae32a1SGerd Hoffmann xhci_write_event(xhci, event); 685f1ae32a1SGerd Hoffmann xhci->ev_buffer_get++; 686f1ae32a1SGerd Hoffmann do_irq = 1; 687f1ae32a1SGerd Hoffmann if (xhci->ev_buffer_get == EV_QUEUE) { 688f1ae32a1SGerd Hoffmann xhci->ev_buffer_get = 0; 689f1ae32a1SGerd Hoffmann } 690f1ae32a1SGerd Hoffmann } 691f1ae32a1SGerd Hoffmann 692f1ae32a1SGerd Hoffmann if (do_irq) { 693f1ae32a1SGerd Hoffmann xhci->erdp_low |= ERDP_EHB; 694f1ae32a1SGerd Hoffmann xhci->iman |= IMAN_IP; 695f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_EINT; 696f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 697f1ae32a1SGerd Hoffmann } 698f1ae32a1SGerd Hoffmann 699f1ae32a1SGerd Hoffmann if (xhci->er_full && xhci->ev_buffer_put == xhci->ev_buffer_get) { 700f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring no longer full\n"); 701f1ae32a1SGerd Hoffmann xhci->er_full = 0; 702f1ae32a1SGerd Hoffmann } 703f1ae32a1SGerd Hoffmann return; 704f1ae32a1SGerd Hoffmann } 705f1ae32a1SGerd Hoffmann 706f1ae32a1SGerd Hoffmann static void xhci_event(XHCIState *xhci, XHCIEvent *event) 707f1ae32a1SGerd Hoffmann { 70859a70ccdSDavid Gibson dma_addr_t erdp; 709f1ae32a1SGerd Hoffmann unsigned int dp_idx; 710f1ae32a1SGerd Hoffmann 711f1ae32a1SGerd Hoffmann if (xhci->er_full) { 712f1ae32a1SGerd Hoffmann DPRINTF("xhci_event(): ER full, queueing\n"); 713f1ae32a1SGerd Hoffmann if (((xhci->ev_buffer_put+1) % EV_QUEUE) == xhci->ev_buffer_get) { 714f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: event queue full, dropping event!\n"); 715f1ae32a1SGerd Hoffmann return; 716f1ae32a1SGerd Hoffmann } 717f1ae32a1SGerd Hoffmann xhci->ev_buffer[xhci->ev_buffer_put++] = *event; 718f1ae32a1SGerd Hoffmann if (xhci->ev_buffer_put == EV_QUEUE) { 719f1ae32a1SGerd Hoffmann xhci->ev_buffer_put = 0; 720f1ae32a1SGerd Hoffmann } 721f1ae32a1SGerd Hoffmann return; 722f1ae32a1SGerd Hoffmann } 723f1ae32a1SGerd Hoffmann 724f1ae32a1SGerd Hoffmann erdp = xhci_addr64(xhci->erdp_low, xhci->erdp_high); 725f1ae32a1SGerd Hoffmann if (erdp < xhci->er_start || 726f1ae32a1SGerd Hoffmann erdp >= (xhci->er_start + TRB_SIZE*xhci->er_size)) { 72759a70ccdSDavid Gibson fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); 72859a70ccdSDavid Gibson fprintf(stderr, "xhci: ER at "DMA_ADDR_FMT" len %d\n", 729f1ae32a1SGerd Hoffmann xhci->er_start, xhci->er_size); 730f1ae32a1SGerd Hoffmann xhci_die(xhci); 731f1ae32a1SGerd Hoffmann return; 732f1ae32a1SGerd Hoffmann } 733f1ae32a1SGerd Hoffmann 734f1ae32a1SGerd Hoffmann dp_idx = (erdp - xhci->er_start) / TRB_SIZE; 735f1ae32a1SGerd Hoffmann assert(dp_idx < xhci->er_size); 736f1ae32a1SGerd Hoffmann 737f1ae32a1SGerd Hoffmann if ((xhci->er_ep_idx+1) % xhci->er_size == dp_idx) { 738f1ae32a1SGerd Hoffmann DPRINTF("xhci_event(): ER full, queueing\n"); 739f1ae32a1SGerd Hoffmann #ifndef ER_FULL_HACK 740f1ae32a1SGerd Hoffmann XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR}; 741f1ae32a1SGerd Hoffmann xhci_write_event(xhci, &full); 742f1ae32a1SGerd Hoffmann #endif 743f1ae32a1SGerd Hoffmann xhci->er_full = 1; 744f1ae32a1SGerd Hoffmann if (((xhci->ev_buffer_put+1) % EV_QUEUE) == xhci->ev_buffer_get) { 745f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: event queue full, dropping event!\n"); 746f1ae32a1SGerd Hoffmann return; 747f1ae32a1SGerd Hoffmann } 748f1ae32a1SGerd Hoffmann xhci->ev_buffer[xhci->ev_buffer_put++] = *event; 749f1ae32a1SGerd Hoffmann if (xhci->ev_buffer_put == EV_QUEUE) { 750f1ae32a1SGerd Hoffmann xhci->ev_buffer_put = 0; 751f1ae32a1SGerd Hoffmann } 752f1ae32a1SGerd Hoffmann } else { 753f1ae32a1SGerd Hoffmann xhci_write_event(xhci, event); 754f1ae32a1SGerd Hoffmann } 755f1ae32a1SGerd Hoffmann 756f1ae32a1SGerd Hoffmann xhci->erdp_low |= ERDP_EHB; 757f1ae32a1SGerd Hoffmann xhci->iman |= IMAN_IP; 758f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_EINT; 759f1ae32a1SGerd Hoffmann 760f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 761f1ae32a1SGerd Hoffmann } 762f1ae32a1SGerd Hoffmann 763f1ae32a1SGerd Hoffmann static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring, 76459a70ccdSDavid Gibson dma_addr_t base) 765f1ae32a1SGerd Hoffmann { 766f1ae32a1SGerd Hoffmann ring->base = base; 767f1ae32a1SGerd Hoffmann ring->dequeue = base; 768f1ae32a1SGerd Hoffmann ring->ccs = 1; 769f1ae32a1SGerd Hoffmann } 770f1ae32a1SGerd Hoffmann 771f1ae32a1SGerd Hoffmann static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb, 77259a70ccdSDavid Gibson dma_addr_t *addr) 773f1ae32a1SGerd Hoffmann { 774f1ae32a1SGerd Hoffmann while (1) { 775f1ae32a1SGerd Hoffmann TRBType type; 77659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ring->dequeue, trb, TRB_SIZE); 777f1ae32a1SGerd Hoffmann trb->addr = ring->dequeue; 778f1ae32a1SGerd Hoffmann trb->ccs = ring->ccs; 779f1ae32a1SGerd Hoffmann le64_to_cpus(&trb->parameter); 780f1ae32a1SGerd Hoffmann le32_to_cpus(&trb->status); 781f1ae32a1SGerd Hoffmann le32_to_cpus(&trb->control); 782f1ae32a1SGerd Hoffmann 7830703a4a7SGerd Hoffmann trace_usb_xhci_fetch_trb(ring->dequeue, trb_name(trb), 7840703a4a7SGerd Hoffmann trb->parameter, trb->status, trb->control); 785f1ae32a1SGerd Hoffmann 786f1ae32a1SGerd Hoffmann if ((trb->control & TRB_C) != ring->ccs) { 787f1ae32a1SGerd Hoffmann return 0; 788f1ae32a1SGerd Hoffmann } 789f1ae32a1SGerd Hoffmann 790f1ae32a1SGerd Hoffmann type = TRB_TYPE(*trb); 791f1ae32a1SGerd Hoffmann 792f1ae32a1SGerd Hoffmann if (type != TR_LINK) { 793f1ae32a1SGerd Hoffmann if (addr) { 794f1ae32a1SGerd Hoffmann *addr = ring->dequeue; 795f1ae32a1SGerd Hoffmann } 796f1ae32a1SGerd Hoffmann ring->dequeue += TRB_SIZE; 797f1ae32a1SGerd Hoffmann return type; 798f1ae32a1SGerd Hoffmann } else { 799f1ae32a1SGerd Hoffmann ring->dequeue = xhci_mask64(trb->parameter); 800f1ae32a1SGerd Hoffmann if (trb->control & TRB_LK_TC) { 801f1ae32a1SGerd Hoffmann ring->ccs = !ring->ccs; 802f1ae32a1SGerd Hoffmann } 803f1ae32a1SGerd Hoffmann } 804f1ae32a1SGerd Hoffmann } 805f1ae32a1SGerd Hoffmann } 806f1ae32a1SGerd Hoffmann 807f1ae32a1SGerd Hoffmann static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) 808f1ae32a1SGerd Hoffmann { 809f1ae32a1SGerd Hoffmann XHCITRB trb; 810f1ae32a1SGerd Hoffmann int length = 0; 81159a70ccdSDavid Gibson dma_addr_t dequeue = ring->dequeue; 812f1ae32a1SGerd Hoffmann bool ccs = ring->ccs; 813f1ae32a1SGerd Hoffmann /* hack to bundle together the two/three TDs that make a setup transfer */ 814f1ae32a1SGerd Hoffmann bool control_td_set = 0; 815f1ae32a1SGerd Hoffmann 816f1ae32a1SGerd Hoffmann while (1) { 817f1ae32a1SGerd Hoffmann TRBType type; 81859a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, dequeue, &trb, TRB_SIZE); 819f1ae32a1SGerd Hoffmann le64_to_cpus(&trb.parameter); 820f1ae32a1SGerd Hoffmann le32_to_cpus(&trb.status); 821f1ae32a1SGerd Hoffmann le32_to_cpus(&trb.control); 822f1ae32a1SGerd Hoffmann 823f1ae32a1SGerd Hoffmann if ((trb.control & TRB_C) != ccs) { 824f1ae32a1SGerd Hoffmann return -length; 825f1ae32a1SGerd Hoffmann } 826f1ae32a1SGerd Hoffmann 827f1ae32a1SGerd Hoffmann type = TRB_TYPE(trb); 828f1ae32a1SGerd Hoffmann 829f1ae32a1SGerd Hoffmann if (type == TR_LINK) { 830f1ae32a1SGerd Hoffmann dequeue = xhci_mask64(trb.parameter); 831f1ae32a1SGerd Hoffmann if (trb.control & TRB_LK_TC) { 832f1ae32a1SGerd Hoffmann ccs = !ccs; 833f1ae32a1SGerd Hoffmann } 834f1ae32a1SGerd Hoffmann continue; 835f1ae32a1SGerd Hoffmann } 836f1ae32a1SGerd Hoffmann 837f1ae32a1SGerd Hoffmann length += 1; 838f1ae32a1SGerd Hoffmann dequeue += TRB_SIZE; 839f1ae32a1SGerd Hoffmann 840f1ae32a1SGerd Hoffmann if (type == TR_SETUP) { 841f1ae32a1SGerd Hoffmann control_td_set = 1; 842f1ae32a1SGerd Hoffmann } else if (type == TR_STATUS) { 843f1ae32a1SGerd Hoffmann control_td_set = 0; 844f1ae32a1SGerd Hoffmann } 845f1ae32a1SGerd Hoffmann 846f1ae32a1SGerd Hoffmann if (!control_td_set && !(trb.control & TRB_TR_CH)) { 847f1ae32a1SGerd Hoffmann return length; 848f1ae32a1SGerd Hoffmann } 849f1ae32a1SGerd Hoffmann } 850f1ae32a1SGerd Hoffmann } 851f1ae32a1SGerd Hoffmann 852f1ae32a1SGerd Hoffmann static void xhci_er_reset(XHCIState *xhci) 853f1ae32a1SGerd Hoffmann { 854f1ae32a1SGerd Hoffmann XHCIEvRingSeg seg; 855f1ae32a1SGerd Hoffmann 856f1ae32a1SGerd Hoffmann /* cache the (sole) event ring segment location */ 857f1ae32a1SGerd Hoffmann if (xhci->erstsz != 1) { 858f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid value for ERSTSZ: %d\n", xhci->erstsz); 859f1ae32a1SGerd Hoffmann xhci_die(xhci); 860f1ae32a1SGerd Hoffmann return; 861f1ae32a1SGerd Hoffmann } 86259a70ccdSDavid Gibson dma_addr_t erstba = xhci_addr64(xhci->erstba_low, xhci->erstba_high); 86359a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, erstba, &seg, sizeof(seg)); 864f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.addr_low); 865f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.addr_high); 866f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.size); 867f1ae32a1SGerd Hoffmann if (seg.size < 16 || seg.size > 4096) { 868f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid value for segment size: %d\n", seg.size); 869f1ae32a1SGerd Hoffmann xhci_die(xhci); 870f1ae32a1SGerd Hoffmann return; 871f1ae32a1SGerd Hoffmann } 872f1ae32a1SGerd Hoffmann xhci->er_start = xhci_addr64(seg.addr_low, seg.addr_high); 873f1ae32a1SGerd Hoffmann xhci->er_size = seg.size; 874f1ae32a1SGerd Hoffmann 875f1ae32a1SGerd Hoffmann xhci->er_ep_idx = 0; 876f1ae32a1SGerd Hoffmann xhci->er_pcs = 1; 877f1ae32a1SGerd Hoffmann xhci->er_full = 0; 878f1ae32a1SGerd Hoffmann 87959a70ccdSDavid Gibson DPRINTF("xhci: event ring:" DMA_ADDR_FMT " [%d]\n", 880f1ae32a1SGerd Hoffmann xhci->er_start, xhci->er_size); 881f1ae32a1SGerd Hoffmann } 882f1ae32a1SGerd Hoffmann 883f1ae32a1SGerd Hoffmann static void xhci_run(XHCIState *xhci) 884f1ae32a1SGerd Hoffmann { 885fc0ddacaSGerd Hoffmann trace_usb_xhci_run(); 886f1ae32a1SGerd Hoffmann xhci->usbsts &= ~USBSTS_HCH; 88701546fa6SGerd Hoffmann xhci->mfindex_start = qemu_get_clock_ns(vm_clock); 888f1ae32a1SGerd Hoffmann } 889f1ae32a1SGerd Hoffmann 890f1ae32a1SGerd Hoffmann static void xhci_stop(XHCIState *xhci) 891f1ae32a1SGerd Hoffmann { 892fc0ddacaSGerd Hoffmann trace_usb_xhci_stop(); 893f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_HCH; 894f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~CRCR_CRR; 895f1ae32a1SGerd Hoffmann } 896f1ae32a1SGerd Hoffmann 897f1ae32a1SGerd Hoffmann static void xhci_set_ep_state(XHCIState *xhci, XHCIEPContext *epctx, 898f1ae32a1SGerd Hoffmann uint32_t state) 899f1ae32a1SGerd Hoffmann { 900f1ae32a1SGerd Hoffmann uint32_t ctx[5]; 901f1ae32a1SGerd Hoffmann if (epctx->state == state) { 902f1ae32a1SGerd Hoffmann return; 903f1ae32a1SGerd Hoffmann } 904f1ae32a1SGerd Hoffmann 90559a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, epctx->pctx, ctx, sizeof(ctx)); 906f1ae32a1SGerd Hoffmann ctx[0] &= ~EP_STATE_MASK; 907f1ae32a1SGerd Hoffmann ctx[0] |= state; 908f1ae32a1SGerd Hoffmann ctx[2] = epctx->ring.dequeue | epctx->ring.ccs; 909f1ae32a1SGerd Hoffmann ctx[3] = (epctx->ring.dequeue >> 16) >> 16; 91059a70ccdSDavid Gibson DPRINTF("xhci: set epctx: " DMA_ADDR_FMT " state=%d dequeue=%08x%08x\n", 911f1ae32a1SGerd Hoffmann epctx->pctx, state, ctx[3], ctx[2]); 91259a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, epctx->pctx, ctx, sizeof(ctx)); 913f1ae32a1SGerd Hoffmann epctx->state = state; 914f1ae32a1SGerd Hoffmann } 915f1ae32a1SGerd Hoffmann 9163d139684SGerd Hoffmann static void xhci_ep_kick_timer(void *opaque) 9173d139684SGerd Hoffmann { 9183d139684SGerd Hoffmann XHCIEPContext *epctx = opaque; 9193d139684SGerd Hoffmann xhci_kick_ep(epctx->xhci, epctx->slotid, epctx->epid); 9203d139684SGerd Hoffmann } 9213d139684SGerd Hoffmann 922f1ae32a1SGerd Hoffmann static TRBCCode xhci_enable_ep(XHCIState *xhci, unsigned int slotid, 92359a70ccdSDavid Gibson unsigned int epid, dma_addr_t pctx, 924f1ae32a1SGerd Hoffmann uint32_t *ctx) 925f1ae32a1SGerd Hoffmann { 926f1ae32a1SGerd Hoffmann XHCISlot *slot; 927f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 92859a70ccdSDavid Gibson dma_addr_t dequeue; 929f1ae32a1SGerd Hoffmann int i; 930f1ae32a1SGerd Hoffmann 931c1f6b493SGerd Hoffmann trace_usb_xhci_ep_enable(slotid, epid); 932f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 933f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 934f1ae32a1SGerd Hoffmann 935f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 936f1ae32a1SGerd Hoffmann if (slot->eps[epid-1]) { 937f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot %d ep %d already enabled!\n", slotid, epid); 938f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 939f1ae32a1SGerd Hoffmann } 940f1ae32a1SGerd Hoffmann 941f1ae32a1SGerd Hoffmann epctx = g_malloc(sizeof(XHCIEPContext)); 942f1ae32a1SGerd Hoffmann memset(epctx, 0, sizeof(XHCIEPContext)); 9433d139684SGerd Hoffmann epctx->xhci = xhci; 9443d139684SGerd Hoffmann epctx->slotid = slotid; 9453d139684SGerd Hoffmann epctx->epid = epid; 946f1ae32a1SGerd Hoffmann 947f1ae32a1SGerd Hoffmann slot->eps[epid-1] = epctx; 948f1ae32a1SGerd Hoffmann 949f1ae32a1SGerd Hoffmann dequeue = xhci_addr64(ctx[2] & ~0xf, ctx[3]); 950f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &epctx->ring, dequeue); 951f1ae32a1SGerd Hoffmann epctx->ring.ccs = ctx[2] & 1; 952f1ae32a1SGerd Hoffmann 953f1ae32a1SGerd Hoffmann epctx->type = (ctx[1] >> EP_TYPE_SHIFT) & EP_TYPE_MASK; 954f1ae32a1SGerd Hoffmann DPRINTF("xhci: endpoint %d.%d type is %d\n", epid/2, epid%2, epctx->type); 955f1ae32a1SGerd Hoffmann epctx->pctx = pctx; 956f1ae32a1SGerd Hoffmann epctx->max_psize = ctx[1]>>16; 957f1ae32a1SGerd Hoffmann epctx->max_psize *= 1+((ctx[1]>>8)&0xff); 958f1ae32a1SGerd Hoffmann DPRINTF("xhci: endpoint %d.%d max transaction (burst) size is %d\n", 959f1ae32a1SGerd Hoffmann epid/2, epid%2, epctx->max_psize); 960f1ae32a1SGerd Hoffmann for (i = 0; i < ARRAY_SIZE(epctx->transfers); i++) { 961f1ae32a1SGerd Hoffmann usb_packet_init(&epctx->transfers[i].packet); 962f1ae32a1SGerd Hoffmann } 963f1ae32a1SGerd Hoffmann 9643d139684SGerd Hoffmann epctx->interval = 1 << (ctx[0] >> 16) & 0xff; 9653d139684SGerd Hoffmann epctx->mfindex_last = 0; 9663d139684SGerd Hoffmann epctx->kick_timer = qemu_new_timer_ns(vm_clock, xhci_ep_kick_timer, epctx); 9673d139684SGerd Hoffmann 968f1ae32a1SGerd Hoffmann epctx->state = EP_RUNNING; 969f1ae32a1SGerd Hoffmann ctx[0] &= ~EP_STATE_MASK; 970f1ae32a1SGerd Hoffmann ctx[0] |= EP_RUNNING; 971f1ae32a1SGerd Hoffmann 972f1ae32a1SGerd Hoffmann return CC_SUCCESS; 973f1ae32a1SGerd Hoffmann } 974f1ae32a1SGerd Hoffmann 975f1ae32a1SGerd Hoffmann static int xhci_ep_nuke_xfers(XHCIState *xhci, unsigned int slotid, 976f1ae32a1SGerd Hoffmann unsigned int epid) 977f1ae32a1SGerd Hoffmann { 978f1ae32a1SGerd Hoffmann XHCISlot *slot; 979f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 980f1ae32a1SGerd Hoffmann int i, xferi, killed = 0; 981f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 982f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 983f1ae32a1SGerd Hoffmann 984f1ae32a1SGerd Hoffmann DPRINTF("xhci_ep_nuke_xfers(%d, %d)\n", slotid, epid); 985f1ae32a1SGerd Hoffmann 986f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 987f1ae32a1SGerd Hoffmann 988f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 989f1ae32a1SGerd Hoffmann return 0; 990f1ae32a1SGerd Hoffmann } 991f1ae32a1SGerd Hoffmann 992f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 993f1ae32a1SGerd Hoffmann 994f1ae32a1SGerd Hoffmann xferi = epctx->next_xfer; 995f1ae32a1SGerd Hoffmann for (i = 0; i < TD_QUEUE; i++) { 996f1ae32a1SGerd Hoffmann XHCITransfer *t = &epctx->transfers[xferi]; 997f1ae32a1SGerd Hoffmann if (t->running_async) { 998f1ae32a1SGerd Hoffmann usb_cancel_packet(&t->packet); 999f1ae32a1SGerd Hoffmann t->running_async = 0; 1000f1ae32a1SGerd Hoffmann t->cancelled = 1; 1001f1ae32a1SGerd Hoffmann DPRINTF("xhci: cancelling transfer %d, waiting for it to complete...\n", i); 1002f1ae32a1SGerd Hoffmann killed++; 1003f1ae32a1SGerd Hoffmann } 1004f1ae32a1SGerd Hoffmann if (t->running_retry) { 1005f1ae32a1SGerd Hoffmann t->running_retry = 0; 1006f1ae32a1SGerd Hoffmann epctx->retry = NULL; 10073d139684SGerd Hoffmann qemu_del_timer(epctx->kick_timer); 1008f1ae32a1SGerd Hoffmann } 1009f1ae32a1SGerd Hoffmann if (t->trbs) { 1010f1ae32a1SGerd Hoffmann g_free(t->trbs); 1011f1ae32a1SGerd Hoffmann } 1012f1ae32a1SGerd Hoffmann 1013f1ae32a1SGerd Hoffmann t->trbs = NULL; 1014f1ae32a1SGerd Hoffmann t->trb_count = t->trb_alloced = 0; 1015f1ae32a1SGerd Hoffmann xferi = (xferi + 1) % TD_QUEUE; 1016f1ae32a1SGerd Hoffmann } 1017f1ae32a1SGerd Hoffmann return killed; 1018f1ae32a1SGerd Hoffmann } 1019f1ae32a1SGerd Hoffmann 1020f1ae32a1SGerd Hoffmann static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid, 1021f1ae32a1SGerd Hoffmann unsigned int epid) 1022f1ae32a1SGerd Hoffmann { 1023f1ae32a1SGerd Hoffmann XHCISlot *slot; 1024f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1025f1ae32a1SGerd Hoffmann 1026c1f6b493SGerd Hoffmann trace_usb_xhci_ep_disable(slotid, epid); 1027f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1028f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1029f1ae32a1SGerd Hoffmann 1030f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1031f1ae32a1SGerd Hoffmann 1032f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1033f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d already disabled\n", slotid, epid); 1034f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1035f1ae32a1SGerd Hoffmann } 1036f1ae32a1SGerd Hoffmann 1037f1ae32a1SGerd Hoffmann xhci_ep_nuke_xfers(xhci, slotid, epid); 1038f1ae32a1SGerd Hoffmann 1039f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1040f1ae32a1SGerd Hoffmann 1041f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_DISABLED); 1042f1ae32a1SGerd Hoffmann 10433d139684SGerd Hoffmann qemu_free_timer(epctx->kick_timer); 1044f1ae32a1SGerd Hoffmann g_free(epctx); 1045f1ae32a1SGerd Hoffmann slot->eps[epid-1] = NULL; 1046f1ae32a1SGerd Hoffmann 1047f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1048f1ae32a1SGerd Hoffmann } 1049f1ae32a1SGerd Hoffmann 1050f1ae32a1SGerd Hoffmann static TRBCCode xhci_stop_ep(XHCIState *xhci, unsigned int slotid, 1051f1ae32a1SGerd Hoffmann unsigned int epid) 1052f1ae32a1SGerd Hoffmann { 1053f1ae32a1SGerd Hoffmann XHCISlot *slot; 1054f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1055f1ae32a1SGerd Hoffmann 1056c1f6b493SGerd Hoffmann trace_usb_xhci_ep_stop(slotid, epid); 1057f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1058f1ae32a1SGerd Hoffmann 1059f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1060f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1061f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1062f1ae32a1SGerd Hoffmann } 1063f1ae32a1SGerd Hoffmann 1064f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1065f1ae32a1SGerd Hoffmann 1066f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1067f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1068f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1069f1ae32a1SGerd Hoffmann } 1070f1ae32a1SGerd Hoffmann 1071f1ae32a1SGerd Hoffmann if (xhci_ep_nuke_xfers(xhci, slotid, epid) > 0) { 1072f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: FIXME: endpoint stopped w/ xfers running, " 1073f1ae32a1SGerd Hoffmann "data might be lost\n"); 1074f1ae32a1SGerd Hoffmann } 1075f1ae32a1SGerd Hoffmann 1076f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1077f1ae32a1SGerd Hoffmann 1078f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1079f1ae32a1SGerd Hoffmann 1080f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1081f1ae32a1SGerd Hoffmann } 1082f1ae32a1SGerd Hoffmann 1083f1ae32a1SGerd Hoffmann static TRBCCode xhci_reset_ep(XHCIState *xhci, unsigned int slotid, 1084f1ae32a1SGerd Hoffmann unsigned int epid) 1085f1ae32a1SGerd Hoffmann { 1086f1ae32a1SGerd Hoffmann XHCISlot *slot; 1087f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1088f1ae32a1SGerd Hoffmann USBDevice *dev; 1089f1ae32a1SGerd Hoffmann 1090c1f6b493SGerd Hoffmann trace_usb_xhci_ep_reset(slotid, epid); 1091f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1092f1ae32a1SGerd Hoffmann 1093f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1094f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1095f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1096f1ae32a1SGerd Hoffmann } 1097f1ae32a1SGerd Hoffmann 1098f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1099f1ae32a1SGerd Hoffmann 1100f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1101f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1102f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1103f1ae32a1SGerd Hoffmann } 1104f1ae32a1SGerd Hoffmann 1105f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1106f1ae32a1SGerd Hoffmann 1107f1ae32a1SGerd Hoffmann if (epctx->state != EP_HALTED) { 1108f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: reset EP while EP %d not halted (%d)\n", 1109f1ae32a1SGerd Hoffmann epid, epctx->state); 1110f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1111f1ae32a1SGerd Hoffmann } 1112f1ae32a1SGerd Hoffmann 1113f1ae32a1SGerd Hoffmann if (xhci_ep_nuke_xfers(xhci, slotid, epid) > 0) { 1114f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: FIXME: endpoint reset w/ xfers running, " 1115f1ae32a1SGerd Hoffmann "data might be lost\n"); 1116f1ae32a1SGerd Hoffmann } 1117f1ae32a1SGerd Hoffmann 1118f1ae32a1SGerd Hoffmann uint8_t ep = epid>>1; 1119f1ae32a1SGerd Hoffmann 1120f1ae32a1SGerd Hoffmann if (epid & 1) { 1121f1ae32a1SGerd Hoffmann ep |= 0x80; 1122f1ae32a1SGerd Hoffmann } 1123f1ae32a1SGerd Hoffmann 1124f1ae32a1SGerd Hoffmann dev = xhci->ports[xhci->slots[slotid-1].port-1].port.dev; 1125f1ae32a1SGerd Hoffmann if (!dev) { 1126f1ae32a1SGerd Hoffmann return CC_USB_TRANSACTION_ERROR; 1127f1ae32a1SGerd Hoffmann } 1128f1ae32a1SGerd Hoffmann 1129f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1130f1ae32a1SGerd Hoffmann 1131f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1132f1ae32a1SGerd Hoffmann } 1133f1ae32a1SGerd Hoffmann 1134f1ae32a1SGerd Hoffmann static TRBCCode xhci_set_ep_dequeue(XHCIState *xhci, unsigned int slotid, 1135f1ae32a1SGerd Hoffmann unsigned int epid, uint64_t pdequeue) 1136f1ae32a1SGerd Hoffmann { 1137f1ae32a1SGerd Hoffmann XHCISlot *slot; 1138f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 113959a70ccdSDavid Gibson dma_addr_t dequeue; 1140f1ae32a1SGerd Hoffmann 1141f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1142f1ae32a1SGerd Hoffmann 1143f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1144f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1145f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1146f1ae32a1SGerd Hoffmann } 1147f1ae32a1SGerd Hoffmann 1148d829fde9SGerd Hoffmann trace_usb_xhci_ep_set_dequeue(slotid, epid, pdequeue); 1149f1ae32a1SGerd Hoffmann dequeue = xhci_mask64(pdequeue); 1150f1ae32a1SGerd Hoffmann 1151f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1152f1ae32a1SGerd Hoffmann 1153f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1154f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1155f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1156f1ae32a1SGerd Hoffmann } 1157f1ae32a1SGerd Hoffmann 1158f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1159f1ae32a1SGerd Hoffmann 1160f1ae32a1SGerd Hoffmann 1161f1ae32a1SGerd Hoffmann if (epctx->state != EP_STOPPED) { 1162f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: set EP dequeue pointer while EP %d not stopped\n", epid); 1163f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1164f1ae32a1SGerd Hoffmann } 1165f1ae32a1SGerd Hoffmann 1166f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &epctx->ring, dequeue & ~0xF); 1167f1ae32a1SGerd Hoffmann epctx->ring.ccs = dequeue & 1; 1168f1ae32a1SGerd Hoffmann 1169f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1170f1ae32a1SGerd Hoffmann 1171f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1172f1ae32a1SGerd Hoffmann } 1173f1ae32a1SGerd Hoffmann 1174d5a15814SGerd Hoffmann static int xhci_xfer_map(XHCITransfer *xfer) 1175f1ae32a1SGerd Hoffmann { 1176d5a15814SGerd Hoffmann int in_xfer = (xfer->packet.pid == USB_TOKEN_IN); 1177f1ae32a1SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1178d5a15814SGerd Hoffmann int i; 1179f1ae32a1SGerd Hoffmann 1180d5a15814SGerd Hoffmann pci_dma_sglist_init(&xfer->sgl, &xhci->pci_dev, xfer->trb_count); 1181f1ae32a1SGerd Hoffmann for (i = 0; i < xfer->trb_count; i++) { 1182f1ae32a1SGerd Hoffmann XHCITRB *trb = &xfer->trbs[i]; 118359a70ccdSDavid Gibson dma_addr_t addr; 1184f1ae32a1SGerd Hoffmann unsigned int chunk = 0; 1185f1ae32a1SGerd Hoffmann 1186f1ae32a1SGerd Hoffmann switch (TRB_TYPE(*trb)) { 1187f1ae32a1SGerd Hoffmann case TR_DATA: 1188f1ae32a1SGerd Hoffmann if ((!(trb->control & TRB_TR_DIR)) != (!in_xfer)) { 1189f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: data direction mismatch for TR_DATA\n"); 1190d5a15814SGerd Hoffmann goto err; 1191f1ae32a1SGerd Hoffmann } 1192f1ae32a1SGerd Hoffmann /* fallthrough */ 1193f1ae32a1SGerd Hoffmann case TR_NORMAL: 1194f1ae32a1SGerd Hoffmann case TR_ISOCH: 1195f1ae32a1SGerd Hoffmann addr = xhci_mask64(trb->parameter); 1196f1ae32a1SGerd Hoffmann chunk = trb->status & 0x1ffff; 1197f1ae32a1SGerd Hoffmann if (trb->control & TRB_TR_IDT) { 1198f1ae32a1SGerd Hoffmann if (chunk > 8 || in_xfer) { 1199f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid immediate data TRB\n"); 1200d5a15814SGerd Hoffmann goto err; 1201d5a15814SGerd Hoffmann } 1202d5a15814SGerd Hoffmann qemu_sglist_add(&xfer->sgl, trb->addr, chunk); 1203d5a15814SGerd Hoffmann } else { 1204d5a15814SGerd Hoffmann qemu_sglist_add(&xfer->sgl, addr, chunk); 1205d5a15814SGerd Hoffmann } 1206d5a15814SGerd Hoffmann break; 1207d5a15814SGerd Hoffmann } 1208d5a15814SGerd Hoffmann } 1209d5a15814SGerd Hoffmann 1210d5a15814SGerd Hoffmann usb_packet_map(&xfer->packet, &xfer->sgl); 1211d5a15814SGerd Hoffmann return 0; 1212d5a15814SGerd Hoffmann 1213d5a15814SGerd Hoffmann err: 1214d5a15814SGerd Hoffmann qemu_sglist_destroy(&xfer->sgl); 1215f1ae32a1SGerd Hoffmann xhci_die(xhci); 1216d5a15814SGerd Hoffmann return -1; 1217f1ae32a1SGerd Hoffmann } 1218d5a15814SGerd Hoffmann 1219d5a15814SGerd Hoffmann static void xhci_xfer_unmap(XHCITransfer *xfer) 1220d5a15814SGerd Hoffmann { 1221d5a15814SGerd Hoffmann usb_packet_unmap(&xfer->packet, &xfer->sgl); 1222d5a15814SGerd Hoffmann qemu_sglist_destroy(&xfer->sgl); 1223f1ae32a1SGerd Hoffmann } 1224d5a15814SGerd Hoffmann 1225d5a15814SGerd Hoffmann static void xhci_xfer_report(XHCITransfer *xfer) 1226d5a15814SGerd Hoffmann { 1227d5a15814SGerd Hoffmann uint32_t edtla = 0; 1228d5a15814SGerd Hoffmann unsigned int left; 1229d5a15814SGerd Hoffmann bool reported = 0; 1230d5a15814SGerd Hoffmann bool shortpkt = 0; 1231d5a15814SGerd Hoffmann XHCIEvent event = {ER_TRANSFER, CC_SUCCESS}; 1232d5a15814SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1233f1ae32a1SGerd Hoffmann int i; 1234d5a15814SGerd Hoffmann 1235d5a15814SGerd Hoffmann left = xfer->packet.result < 0 ? 0 : xfer->packet.result; 1236d5a15814SGerd Hoffmann 1237d5a15814SGerd Hoffmann for (i = 0; i < xfer->trb_count; i++) { 1238d5a15814SGerd Hoffmann XHCITRB *trb = &xfer->trbs[i]; 1239d5a15814SGerd Hoffmann unsigned int chunk = 0; 1240d5a15814SGerd Hoffmann 1241d5a15814SGerd Hoffmann switch (TRB_TYPE(*trb)) { 1242d5a15814SGerd Hoffmann case TR_DATA: 1243d5a15814SGerd Hoffmann case TR_NORMAL: 1244d5a15814SGerd Hoffmann case TR_ISOCH: 1245d5a15814SGerd Hoffmann chunk = trb->status & 0x1ffff; 1246d5a15814SGerd Hoffmann if (chunk > left) { 1247d5a15814SGerd Hoffmann chunk = left; 1248d5a15814SGerd Hoffmann if (xfer->status == CC_SUCCESS) { 1249d5a15814SGerd Hoffmann shortpkt = 1; 1250f1ae32a1SGerd Hoffmann } 1251f1ae32a1SGerd Hoffmann } 1252f1ae32a1SGerd Hoffmann left -= chunk; 1253f1ae32a1SGerd Hoffmann edtla += chunk; 1254f1ae32a1SGerd Hoffmann break; 1255f1ae32a1SGerd Hoffmann case TR_STATUS: 1256f1ae32a1SGerd Hoffmann reported = 0; 1257f1ae32a1SGerd Hoffmann shortpkt = 0; 1258f1ae32a1SGerd Hoffmann break; 1259f1ae32a1SGerd Hoffmann } 1260f1ae32a1SGerd Hoffmann 1261d5a15814SGerd Hoffmann if (!reported && ((trb->control & TRB_TR_IOC) || 1262d5a15814SGerd Hoffmann (shortpkt && (trb->control & TRB_TR_ISP)) || 1263d5a15814SGerd Hoffmann (xfer->status != CC_SUCCESS))) { 1264f1ae32a1SGerd Hoffmann event.slotid = xfer->slotid; 1265f1ae32a1SGerd Hoffmann event.epid = xfer->epid; 1266f1ae32a1SGerd Hoffmann event.length = (trb->status & 0x1ffff) - chunk; 1267f1ae32a1SGerd Hoffmann event.flags = 0; 1268f1ae32a1SGerd Hoffmann event.ptr = trb->addr; 1269f1ae32a1SGerd Hoffmann if (xfer->status == CC_SUCCESS) { 1270f1ae32a1SGerd Hoffmann event.ccode = shortpkt ? CC_SHORT_PACKET : CC_SUCCESS; 1271f1ae32a1SGerd Hoffmann } else { 1272f1ae32a1SGerd Hoffmann event.ccode = xfer->status; 1273f1ae32a1SGerd Hoffmann } 1274f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb) == TR_EVDATA) { 1275f1ae32a1SGerd Hoffmann event.ptr = trb->parameter; 1276f1ae32a1SGerd Hoffmann event.flags |= TRB_EV_ED; 1277f1ae32a1SGerd Hoffmann event.length = edtla & 0xffffff; 1278f1ae32a1SGerd Hoffmann DPRINTF("xhci_xfer_data: EDTLA=%d\n", event.length); 1279f1ae32a1SGerd Hoffmann edtla = 0; 1280f1ae32a1SGerd Hoffmann } 1281f1ae32a1SGerd Hoffmann xhci_event(xhci, &event); 1282f1ae32a1SGerd Hoffmann reported = 1; 1283d5a15814SGerd Hoffmann if (xfer->status != CC_SUCCESS) { 1284d5a15814SGerd Hoffmann return; 1285f1ae32a1SGerd Hoffmann } 1286f1ae32a1SGerd Hoffmann } 1287d5a15814SGerd Hoffmann } 1288f1ae32a1SGerd Hoffmann } 1289f1ae32a1SGerd Hoffmann 1290f1ae32a1SGerd Hoffmann static void xhci_stall_ep(XHCITransfer *xfer) 1291f1ae32a1SGerd Hoffmann { 1292f1ae32a1SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1293f1ae32a1SGerd Hoffmann XHCISlot *slot = &xhci->slots[xfer->slotid-1]; 1294f1ae32a1SGerd Hoffmann XHCIEPContext *epctx = slot->eps[xfer->epid-1]; 1295f1ae32a1SGerd Hoffmann 1296f1ae32a1SGerd Hoffmann epctx->ring.dequeue = xfer->trbs[0].addr; 1297f1ae32a1SGerd Hoffmann epctx->ring.ccs = xfer->trbs[0].ccs; 1298f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_HALTED); 1299f1ae32a1SGerd Hoffmann DPRINTF("xhci: stalled slot %d ep %d\n", xfer->slotid, xfer->epid); 130059a70ccdSDavid Gibson DPRINTF("xhci: will continue at "DMA_ADDR_FMT"\n", epctx->ring.dequeue); 1301f1ae32a1SGerd Hoffmann } 1302f1ae32a1SGerd Hoffmann 1303f1ae32a1SGerd Hoffmann static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, 1304f1ae32a1SGerd Hoffmann XHCIEPContext *epctx); 1305f1ae32a1SGerd Hoffmann 13065c08106fSGerd Hoffmann static USBDevice *xhci_find_device(XHCIPort *port, uint8_t addr) 1307f1ae32a1SGerd Hoffmann { 13085c08106fSGerd Hoffmann if (!(port->portsc & PORTSC_PED)) { 13095c08106fSGerd Hoffmann return NULL; 13105c08106fSGerd Hoffmann } 13115c08106fSGerd Hoffmann return usb_find_device(&port->port, addr); 13125c08106fSGerd Hoffmann } 13135c08106fSGerd Hoffmann 13145c08106fSGerd Hoffmann static int xhci_setup_packet(XHCITransfer *xfer) 13155c08106fSGerd Hoffmann { 13165c08106fSGerd Hoffmann XHCIState *xhci = xfer->xhci; 13175c08106fSGerd Hoffmann XHCIPort *port; 13185c08106fSGerd Hoffmann USBDevice *dev; 1319f1ae32a1SGerd Hoffmann USBEndpoint *ep; 1320f1ae32a1SGerd Hoffmann int dir; 1321f1ae32a1SGerd Hoffmann 1322f1ae32a1SGerd Hoffmann dir = xfer->in_xfer ? USB_TOKEN_IN : USB_TOKEN_OUT; 13235c08106fSGerd Hoffmann 13245c08106fSGerd Hoffmann if (xfer->packet.ep) { 13255c08106fSGerd Hoffmann ep = xfer->packet.ep; 13265c08106fSGerd Hoffmann dev = ep->dev; 13275c08106fSGerd Hoffmann } else { 13285c08106fSGerd Hoffmann port = &xhci->ports[xhci->slots[xfer->slotid-1].port-1]; 13295c08106fSGerd Hoffmann dev = xhci_find_device(port, xhci->slots[xfer->slotid-1].devaddr); 13305c08106fSGerd Hoffmann if (!dev) { 13315c08106fSGerd Hoffmann fprintf(stderr, "xhci: slot %d port %d has no device\n", 13325c08106fSGerd Hoffmann xfer->slotid, xhci->slots[xfer->slotid-1].port); 13335c08106fSGerd Hoffmann return -1; 13345c08106fSGerd Hoffmann } 1335f1ae32a1SGerd Hoffmann ep = usb_ep_get(dev, dir, xfer->epid >> 1); 13365c08106fSGerd Hoffmann } 13375c08106fSGerd Hoffmann 1338e983395dSGerd Hoffmann usb_packet_setup(&xfer->packet, dir, ep, xfer->trbs[0].addr); 1339d5a15814SGerd Hoffmann xhci_xfer_map(xfer); 1340f1ae32a1SGerd Hoffmann DPRINTF("xhci: setup packet pid 0x%x addr %d ep %d\n", 1341f1ae32a1SGerd Hoffmann xfer->packet.pid, dev->addr, ep->nr); 1342f1ae32a1SGerd Hoffmann return 0; 1343f1ae32a1SGerd Hoffmann } 1344f1ae32a1SGerd Hoffmann 1345f1ae32a1SGerd Hoffmann static int xhci_complete_packet(XHCITransfer *xfer, int ret) 1346f1ae32a1SGerd Hoffmann { 1347f1ae32a1SGerd Hoffmann if (ret == USB_RET_ASYNC) { 134897df650bSGerd Hoffmann trace_usb_xhci_xfer_async(xfer); 1349f1ae32a1SGerd Hoffmann xfer->running_async = 1; 1350f1ae32a1SGerd Hoffmann xfer->running_retry = 0; 1351f1ae32a1SGerd Hoffmann xfer->complete = 0; 1352f1ae32a1SGerd Hoffmann xfer->cancelled = 0; 1353f1ae32a1SGerd Hoffmann return 0; 1354f1ae32a1SGerd Hoffmann } else if (ret == USB_RET_NAK) { 135597df650bSGerd Hoffmann trace_usb_xhci_xfer_nak(xfer); 1356f1ae32a1SGerd Hoffmann xfer->running_async = 0; 1357f1ae32a1SGerd Hoffmann xfer->running_retry = 1; 1358f1ae32a1SGerd Hoffmann xfer->complete = 0; 1359f1ae32a1SGerd Hoffmann xfer->cancelled = 0; 1360f1ae32a1SGerd Hoffmann return 0; 1361f1ae32a1SGerd Hoffmann } else { 1362f1ae32a1SGerd Hoffmann xfer->running_async = 0; 1363f1ae32a1SGerd Hoffmann xfer->running_retry = 0; 1364f1ae32a1SGerd Hoffmann xfer->complete = 1; 1365d5a15814SGerd Hoffmann xhci_xfer_unmap(xfer); 1366f1ae32a1SGerd Hoffmann } 1367f1ae32a1SGerd Hoffmann 1368f1ae32a1SGerd Hoffmann if (ret >= 0) { 136997df650bSGerd Hoffmann trace_usb_xhci_xfer_success(xfer, ret); 1370d5a15814SGerd Hoffmann xfer->status = CC_SUCCESS; 1371d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1372f1ae32a1SGerd Hoffmann return 0; 1373f1ae32a1SGerd Hoffmann } 1374f1ae32a1SGerd Hoffmann 1375f1ae32a1SGerd Hoffmann /* error */ 137697df650bSGerd Hoffmann trace_usb_xhci_xfer_error(xfer, ret); 1377f1ae32a1SGerd Hoffmann switch (ret) { 1378f1ae32a1SGerd Hoffmann case USB_RET_NODEV: 1379f1ae32a1SGerd Hoffmann xfer->status = CC_USB_TRANSACTION_ERROR; 1380d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1381f1ae32a1SGerd Hoffmann xhci_stall_ep(xfer); 1382f1ae32a1SGerd Hoffmann break; 1383f1ae32a1SGerd Hoffmann case USB_RET_STALL: 1384f1ae32a1SGerd Hoffmann xfer->status = CC_STALL_ERROR; 1385d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1386f1ae32a1SGerd Hoffmann xhci_stall_ep(xfer); 1387f1ae32a1SGerd Hoffmann break; 1388f1ae32a1SGerd Hoffmann default: 1389f1ae32a1SGerd Hoffmann fprintf(stderr, "%s: FIXME: ret = %d\n", __FUNCTION__, ret); 1390f1ae32a1SGerd Hoffmann FIXME(); 1391f1ae32a1SGerd Hoffmann } 1392f1ae32a1SGerd Hoffmann return 0; 1393f1ae32a1SGerd Hoffmann } 1394f1ae32a1SGerd Hoffmann 1395f1ae32a1SGerd Hoffmann static int xhci_fire_ctl_transfer(XHCIState *xhci, XHCITransfer *xfer) 1396f1ae32a1SGerd Hoffmann { 1397f1ae32a1SGerd Hoffmann XHCITRB *trb_setup, *trb_status; 1398f1ae32a1SGerd Hoffmann uint8_t bmRequestType; 1399f1ae32a1SGerd Hoffmann int ret; 1400f1ae32a1SGerd Hoffmann 1401f1ae32a1SGerd Hoffmann trb_setup = &xfer->trbs[0]; 1402f1ae32a1SGerd Hoffmann trb_status = &xfer->trbs[xfer->trb_count-1]; 1403f1ae32a1SGerd Hoffmann 1404d5a15814SGerd Hoffmann trace_usb_xhci_xfer_start(xfer, xfer->slotid, xfer->epid); 140597df650bSGerd Hoffmann 1406f1ae32a1SGerd Hoffmann /* at most one Event Data TRB allowed after STATUS */ 1407f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_status) == TR_EVDATA && xfer->trb_count > 2) { 1408f1ae32a1SGerd Hoffmann trb_status--; 1409f1ae32a1SGerd Hoffmann } 1410f1ae32a1SGerd Hoffmann 1411f1ae32a1SGerd Hoffmann /* do some sanity checks */ 1412f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_setup) != TR_SETUP) { 1413f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: ep0 first TD not SETUP: %d\n", 1414f1ae32a1SGerd Hoffmann TRB_TYPE(*trb_setup)); 1415f1ae32a1SGerd Hoffmann return -1; 1416f1ae32a1SGerd Hoffmann } 1417f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_status) != TR_STATUS) { 1418f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: ep0 last TD not STATUS: %d\n", 1419f1ae32a1SGerd Hoffmann TRB_TYPE(*trb_status)); 1420f1ae32a1SGerd Hoffmann return -1; 1421f1ae32a1SGerd Hoffmann } 1422f1ae32a1SGerd Hoffmann if (!(trb_setup->control & TRB_TR_IDT)) { 1423f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: Setup TRB doesn't have IDT set\n"); 1424f1ae32a1SGerd Hoffmann return -1; 1425f1ae32a1SGerd Hoffmann } 1426f1ae32a1SGerd Hoffmann if ((trb_setup->status & 0x1ffff) != 8) { 1427f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: Setup TRB has bad length (%d)\n", 1428f1ae32a1SGerd Hoffmann (trb_setup->status & 0x1ffff)); 1429f1ae32a1SGerd Hoffmann return -1; 1430f1ae32a1SGerd Hoffmann } 1431f1ae32a1SGerd Hoffmann 1432f1ae32a1SGerd Hoffmann bmRequestType = trb_setup->parameter; 1433f1ae32a1SGerd Hoffmann 1434f1ae32a1SGerd Hoffmann xfer->in_xfer = bmRequestType & USB_DIR_IN; 1435f1ae32a1SGerd Hoffmann xfer->iso_xfer = false; 1436f1ae32a1SGerd Hoffmann 14375c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 14385c08106fSGerd Hoffmann return -1; 14395c08106fSGerd Hoffmann } 1440f1ae32a1SGerd Hoffmann xfer->packet.parameter = trb_setup->parameter; 1441f1ae32a1SGerd Hoffmann 14425c08106fSGerd Hoffmann ret = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1443f1ae32a1SGerd Hoffmann 1444f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, ret); 1445f1ae32a1SGerd Hoffmann if (!xfer->running_async && !xfer->running_retry) { 1446f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid); 1447f1ae32a1SGerd Hoffmann } 1448f1ae32a1SGerd Hoffmann return 0; 1449f1ae32a1SGerd Hoffmann } 1450f1ae32a1SGerd Hoffmann 14513d139684SGerd Hoffmann static void xhci_calc_iso_kick(XHCIState *xhci, XHCITransfer *xfer, 14523d139684SGerd Hoffmann XHCIEPContext *epctx, uint64_t mfindex) 14533d139684SGerd Hoffmann { 14543d139684SGerd Hoffmann if (xfer->trbs[0].control & TRB_TR_SIA) { 14553d139684SGerd Hoffmann uint64_t asap = ((mfindex + epctx->interval - 1) & 14563d139684SGerd Hoffmann ~(epctx->interval-1)); 14573d139684SGerd Hoffmann if (asap >= epctx->mfindex_last && 14583d139684SGerd Hoffmann asap <= epctx->mfindex_last + epctx->interval * 4) { 14593d139684SGerd Hoffmann xfer->mfindex_kick = epctx->mfindex_last + epctx->interval; 14603d139684SGerd Hoffmann } else { 14613d139684SGerd Hoffmann xfer->mfindex_kick = asap; 14623d139684SGerd Hoffmann } 14633d139684SGerd Hoffmann } else { 14643d139684SGerd Hoffmann xfer->mfindex_kick = (xfer->trbs[0].control >> TRB_TR_FRAMEID_SHIFT) 14653d139684SGerd Hoffmann & TRB_TR_FRAMEID_MASK; 14663d139684SGerd Hoffmann xfer->mfindex_kick |= mfindex & ~0x3fff; 14673d139684SGerd Hoffmann if (xfer->mfindex_kick < mfindex) { 14683d139684SGerd Hoffmann xfer->mfindex_kick += 0x4000; 14693d139684SGerd Hoffmann } 14703d139684SGerd Hoffmann } 14713d139684SGerd Hoffmann } 14723d139684SGerd Hoffmann 14733d139684SGerd Hoffmann static void xhci_check_iso_kick(XHCIState *xhci, XHCITransfer *xfer, 14743d139684SGerd Hoffmann XHCIEPContext *epctx, uint64_t mfindex) 14753d139684SGerd Hoffmann { 14763d139684SGerd Hoffmann if (xfer->mfindex_kick > mfindex) { 14773d139684SGerd Hoffmann qemu_mod_timer(epctx->kick_timer, qemu_get_clock_ns(vm_clock) + 14783d139684SGerd Hoffmann (xfer->mfindex_kick - mfindex) * 125000); 14793d139684SGerd Hoffmann xfer->running_retry = 1; 14803d139684SGerd Hoffmann } else { 14813d139684SGerd Hoffmann epctx->mfindex_last = xfer->mfindex_kick; 14823d139684SGerd Hoffmann qemu_del_timer(epctx->kick_timer); 14833d139684SGerd Hoffmann xfer->running_retry = 0; 14843d139684SGerd Hoffmann } 14853d139684SGerd Hoffmann } 14863d139684SGerd Hoffmann 14873d139684SGerd Hoffmann 1488f1ae32a1SGerd Hoffmann static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) 1489f1ae32a1SGerd Hoffmann { 14903d139684SGerd Hoffmann uint64_t mfindex; 1491f1ae32a1SGerd Hoffmann int ret; 1492f1ae32a1SGerd Hoffmann 1493f1ae32a1SGerd Hoffmann DPRINTF("xhci_submit(slotid=%d,epid=%d)\n", xfer->slotid, xfer->epid); 1494f1ae32a1SGerd Hoffmann 1495f1ae32a1SGerd Hoffmann xfer->in_xfer = epctx->type>>2; 1496f1ae32a1SGerd Hoffmann 1497f1ae32a1SGerd Hoffmann switch(epctx->type) { 1498f1ae32a1SGerd Hoffmann case ET_INTR_OUT: 1499f1ae32a1SGerd Hoffmann case ET_INTR_IN: 1500f1ae32a1SGerd Hoffmann case ET_BULK_OUT: 1501f1ae32a1SGerd Hoffmann case ET_BULK_IN: 15023d139684SGerd Hoffmann xfer->pkts = 0; 15033d139684SGerd Hoffmann xfer->iso_xfer = false; 1504f1ae32a1SGerd Hoffmann break; 1505f1ae32a1SGerd Hoffmann case ET_ISO_OUT: 1506f1ae32a1SGerd Hoffmann case ET_ISO_IN: 15073d139684SGerd Hoffmann xfer->pkts = 1; 15083d139684SGerd Hoffmann xfer->iso_xfer = true; 15093d139684SGerd Hoffmann mfindex = xhci_mfindex_get(xhci); 15103d139684SGerd Hoffmann xhci_calc_iso_kick(xhci, xfer, epctx, mfindex); 15113d139684SGerd Hoffmann xhci_check_iso_kick(xhci, xfer, epctx, mfindex); 15123d139684SGerd Hoffmann if (xfer->running_retry) { 15133d139684SGerd Hoffmann return -1; 15143d139684SGerd Hoffmann } 1515f1ae32a1SGerd Hoffmann break; 1516f1ae32a1SGerd Hoffmann default: 1517f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: unknown or unhandled EP " 1518f1ae32a1SGerd Hoffmann "(type %d, in %d, ep %02x)\n", 1519f1ae32a1SGerd Hoffmann epctx->type, xfer->in_xfer, xfer->epid); 1520f1ae32a1SGerd Hoffmann return -1; 1521f1ae32a1SGerd Hoffmann } 1522f1ae32a1SGerd Hoffmann 15235c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 15245c08106fSGerd Hoffmann return -1; 15255c08106fSGerd Hoffmann } 15265c08106fSGerd Hoffmann ret = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1527f1ae32a1SGerd Hoffmann 1528f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, ret); 1529f1ae32a1SGerd Hoffmann if (!xfer->running_async && !xfer->running_retry) { 1530f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid); 1531f1ae32a1SGerd Hoffmann } 1532f1ae32a1SGerd Hoffmann return 0; 1533f1ae32a1SGerd Hoffmann } 1534f1ae32a1SGerd Hoffmann 1535f1ae32a1SGerd Hoffmann static int xhci_fire_transfer(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) 1536f1ae32a1SGerd Hoffmann { 1537d5a15814SGerd Hoffmann trace_usb_xhci_xfer_start(xfer, xfer->slotid, xfer->epid); 1538f1ae32a1SGerd Hoffmann return xhci_submit(xhci, xfer, epctx); 1539f1ae32a1SGerd Hoffmann } 1540f1ae32a1SGerd Hoffmann 1541f1ae32a1SGerd Hoffmann static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, unsigned int epid) 1542f1ae32a1SGerd Hoffmann { 1543f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 15443d139684SGerd Hoffmann uint64_t mfindex; 1545f1ae32a1SGerd Hoffmann int length; 1546f1ae32a1SGerd Hoffmann int i; 1547f1ae32a1SGerd Hoffmann 1548c1f6b493SGerd Hoffmann trace_usb_xhci_ep_kick(slotid, epid); 1549f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1550f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1551f1ae32a1SGerd Hoffmann 1552f1ae32a1SGerd Hoffmann if (!xhci->slots[slotid-1].enabled) { 1553f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: xhci_kick_ep for disabled slot %d\n", slotid); 1554f1ae32a1SGerd Hoffmann return; 1555f1ae32a1SGerd Hoffmann } 1556f1ae32a1SGerd Hoffmann epctx = xhci->slots[slotid-1].eps[epid-1]; 1557f1ae32a1SGerd Hoffmann if (!epctx) { 1558f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: xhci_kick_ep for disabled endpoint %d,%d\n", 1559f1ae32a1SGerd Hoffmann epid, slotid); 1560f1ae32a1SGerd Hoffmann return; 1561f1ae32a1SGerd Hoffmann } 1562f1ae32a1SGerd Hoffmann 1563f1ae32a1SGerd Hoffmann if (epctx->retry) { 1564f1ae32a1SGerd Hoffmann XHCITransfer *xfer = epctx->retry; 1565f1ae32a1SGerd Hoffmann int result; 1566f1ae32a1SGerd Hoffmann 156797df650bSGerd Hoffmann trace_usb_xhci_xfer_retry(xfer); 1568f1ae32a1SGerd Hoffmann assert(xfer->running_retry); 15693d139684SGerd Hoffmann if (xfer->iso_xfer) { 15703d139684SGerd Hoffmann /* retry delayed iso transfer */ 15713d139684SGerd Hoffmann mfindex = xhci_mfindex_get(xhci); 15723d139684SGerd Hoffmann xhci_check_iso_kick(xhci, xfer, epctx, mfindex); 15733d139684SGerd Hoffmann if (xfer->running_retry) { 15743d139684SGerd Hoffmann return; 15753d139684SGerd Hoffmann } 15763d139684SGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 15773d139684SGerd Hoffmann return; 15783d139684SGerd Hoffmann } 15793d139684SGerd Hoffmann result = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 15803d139684SGerd Hoffmann assert(result != USB_RET_NAK); 15813d139684SGerd Hoffmann xhci_complete_packet(xfer, result); 15823d139684SGerd Hoffmann } else { 15833d139684SGerd Hoffmann /* retry nak'ed transfer */ 15845c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 15855c08106fSGerd Hoffmann return; 15865c08106fSGerd Hoffmann } 1587f1ae32a1SGerd Hoffmann result = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1588f1ae32a1SGerd Hoffmann if (result == USB_RET_NAK) { 1589f1ae32a1SGerd Hoffmann return; 1590f1ae32a1SGerd Hoffmann } 1591f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, result); 15923d139684SGerd Hoffmann } 1593f1ae32a1SGerd Hoffmann assert(!xfer->running_retry); 1594f1ae32a1SGerd Hoffmann epctx->retry = NULL; 1595f1ae32a1SGerd Hoffmann } 1596f1ae32a1SGerd Hoffmann 1597f1ae32a1SGerd Hoffmann if (epctx->state == EP_HALTED) { 1598f1ae32a1SGerd Hoffmann DPRINTF("xhci: ep halted, not running schedule\n"); 1599f1ae32a1SGerd Hoffmann return; 1600f1ae32a1SGerd Hoffmann } 1601f1ae32a1SGerd Hoffmann 1602f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_RUNNING); 1603f1ae32a1SGerd Hoffmann 1604f1ae32a1SGerd Hoffmann while (1) { 1605f1ae32a1SGerd Hoffmann XHCITransfer *xfer = &epctx->transfers[epctx->next_xfer]; 1606331e9406SGerd Hoffmann if (xfer->running_async || xfer->running_retry) { 1607f1ae32a1SGerd Hoffmann break; 1608f1ae32a1SGerd Hoffmann } 1609f1ae32a1SGerd Hoffmann length = xhci_ring_chain_length(xhci, &epctx->ring); 1610f1ae32a1SGerd Hoffmann if (length < 0) { 1611f1ae32a1SGerd Hoffmann break; 1612f1ae32a1SGerd Hoffmann } else if (length == 0) { 1613f1ae32a1SGerd Hoffmann break; 1614f1ae32a1SGerd Hoffmann } 1615f1ae32a1SGerd Hoffmann if (xfer->trbs && xfer->trb_alloced < length) { 1616f1ae32a1SGerd Hoffmann xfer->trb_count = 0; 1617f1ae32a1SGerd Hoffmann xfer->trb_alloced = 0; 1618f1ae32a1SGerd Hoffmann g_free(xfer->trbs); 1619f1ae32a1SGerd Hoffmann xfer->trbs = NULL; 1620f1ae32a1SGerd Hoffmann } 1621f1ae32a1SGerd Hoffmann if (!xfer->trbs) { 1622f1ae32a1SGerd Hoffmann xfer->trbs = g_malloc(sizeof(XHCITRB) * length); 1623f1ae32a1SGerd Hoffmann xfer->trb_alloced = length; 1624f1ae32a1SGerd Hoffmann } 1625f1ae32a1SGerd Hoffmann xfer->trb_count = length; 1626f1ae32a1SGerd Hoffmann 1627f1ae32a1SGerd Hoffmann for (i = 0; i < length; i++) { 1628f1ae32a1SGerd Hoffmann assert(xhci_ring_fetch(xhci, &epctx->ring, &xfer->trbs[i], NULL)); 1629f1ae32a1SGerd Hoffmann } 1630f1ae32a1SGerd Hoffmann xfer->xhci = xhci; 1631f1ae32a1SGerd Hoffmann xfer->epid = epid; 1632f1ae32a1SGerd Hoffmann xfer->slotid = slotid; 1633f1ae32a1SGerd Hoffmann 1634f1ae32a1SGerd Hoffmann if (epid == 1) { 1635f1ae32a1SGerd Hoffmann if (xhci_fire_ctl_transfer(xhci, xfer) >= 0) { 1636f1ae32a1SGerd Hoffmann epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; 1637f1ae32a1SGerd Hoffmann } else { 1638f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: error firing CTL transfer\n"); 1639f1ae32a1SGerd Hoffmann } 1640f1ae32a1SGerd Hoffmann } else { 1641f1ae32a1SGerd Hoffmann if (xhci_fire_transfer(xhci, xfer, epctx) >= 0) { 1642f1ae32a1SGerd Hoffmann epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; 1643f1ae32a1SGerd Hoffmann } else { 16443d139684SGerd Hoffmann if (!xfer->iso_xfer) { 1645f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: error firing data transfer\n"); 1646f1ae32a1SGerd Hoffmann } 1647f1ae32a1SGerd Hoffmann } 16483d139684SGerd Hoffmann } 1649f1ae32a1SGerd Hoffmann 1650f1ae32a1SGerd Hoffmann if (epctx->state == EP_HALTED) { 1651f1ae32a1SGerd Hoffmann break; 1652f1ae32a1SGerd Hoffmann } 1653f1ae32a1SGerd Hoffmann if (xfer->running_retry) { 1654f1ae32a1SGerd Hoffmann DPRINTF("xhci: xfer nacked, stopping schedule\n"); 1655f1ae32a1SGerd Hoffmann epctx->retry = xfer; 1656f1ae32a1SGerd Hoffmann break; 1657f1ae32a1SGerd Hoffmann } 1658f1ae32a1SGerd Hoffmann } 1659f1ae32a1SGerd Hoffmann } 1660f1ae32a1SGerd Hoffmann 1661f1ae32a1SGerd Hoffmann static TRBCCode xhci_enable_slot(XHCIState *xhci, unsigned int slotid) 1662f1ae32a1SGerd Hoffmann { 1663348f1037SGerd Hoffmann trace_usb_xhci_slot_enable(slotid); 1664f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1665f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].enabled = 1; 1666f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].port = 0; 1667f1ae32a1SGerd Hoffmann memset(xhci->slots[slotid-1].eps, 0, sizeof(XHCIEPContext*)*31); 1668f1ae32a1SGerd Hoffmann 1669f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1670f1ae32a1SGerd Hoffmann } 1671f1ae32a1SGerd Hoffmann 1672f1ae32a1SGerd Hoffmann static TRBCCode xhci_disable_slot(XHCIState *xhci, unsigned int slotid) 1673f1ae32a1SGerd Hoffmann { 1674f1ae32a1SGerd Hoffmann int i; 1675f1ae32a1SGerd Hoffmann 1676348f1037SGerd Hoffmann trace_usb_xhci_slot_disable(slotid); 1677f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1678f1ae32a1SGerd Hoffmann 1679f1ae32a1SGerd Hoffmann for (i = 1; i <= 31; i++) { 1680f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 1681f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1682f1ae32a1SGerd Hoffmann } 1683f1ae32a1SGerd Hoffmann } 1684f1ae32a1SGerd Hoffmann 1685f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].enabled = 0; 1686f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1687f1ae32a1SGerd Hoffmann } 1688f1ae32a1SGerd Hoffmann 1689f1ae32a1SGerd Hoffmann static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid, 1690f1ae32a1SGerd Hoffmann uint64_t pictx, bool bsr) 1691f1ae32a1SGerd Hoffmann { 1692f1ae32a1SGerd Hoffmann XHCISlot *slot; 1693f1ae32a1SGerd Hoffmann USBDevice *dev; 169459a70ccdSDavid Gibson dma_addr_t ictx, octx, dcbaap; 1695f1ae32a1SGerd Hoffmann uint64_t poctx; 1696f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1697f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1698f1ae32a1SGerd Hoffmann uint32_t ep0_ctx[5]; 1699f1ae32a1SGerd Hoffmann unsigned int port; 1700f1ae32a1SGerd Hoffmann int i; 1701f1ae32a1SGerd Hoffmann TRBCCode res; 1702f1ae32a1SGerd Hoffmann 1703348f1037SGerd Hoffmann trace_usb_xhci_slot_address(slotid); 1704f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1705f1ae32a1SGerd Hoffmann 1706f1ae32a1SGerd Hoffmann dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); 170759a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, dcbaap + 8*slotid, &poctx, sizeof(poctx)); 1708f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1709f1ae32a1SGerd Hoffmann octx = xhci_mask64(le64_to_cpu(poctx)); 1710f1ae32a1SGerd Hoffmann 171159a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 171259a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1713f1ae32a1SGerd Hoffmann 171459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1715f1ae32a1SGerd Hoffmann 1716f1ae32a1SGerd Hoffmann if (ictl_ctx[0] != 0x0 || ictl_ctx[1] != 0x3) { 1717f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1718f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1719f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1720f1ae32a1SGerd Hoffmann } 1721f1ae32a1SGerd Hoffmann 172259a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, slot_ctx, sizeof(slot_ctx)); 172359a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+64, ep0_ctx, sizeof(ep0_ctx)); 1724f1ae32a1SGerd Hoffmann 1725f1ae32a1SGerd Hoffmann DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", 1726f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1727f1ae32a1SGerd Hoffmann 1728f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", 1729f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 1730f1ae32a1SGerd Hoffmann 1731f1ae32a1SGerd Hoffmann port = (slot_ctx[1]>>16) & 0xFF; 1732f1ae32a1SGerd Hoffmann dev = xhci->ports[port-1].port.dev; 1733f1ae32a1SGerd Hoffmann 1734f1ae32a1SGerd Hoffmann if (port < 1 || port > MAXPORTS) { 1735f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad port %d\n", port); 1736f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1737f1ae32a1SGerd Hoffmann } else if (!dev) { 1738f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: port %d not connected\n", port); 1739f1ae32a1SGerd Hoffmann return CC_USB_TRANSACTION_ERROR; 1740f1ae32a1SGerd Hoffmann } 1741f1ae32a1SGerd Hoffmann 1742f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 1743f1ae32a1SGerd Hoffmann if (xhci->slots[i].port == port) { 1744f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: port %d already assigned to slot %d\n", 1745f1ae32a1SGerd Hoffmann port, i+1); 1746f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1747f1ae32a1SGerd Hoffmann } 1748f1ae32a1SGerd Hoffmann } 1749f1ae32a1SGerd Hoffmann 1750f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1751f1ae32a1SGerd Hoffmann slot->port = port; 1752f1ae32a1SGerd Hoffmann slot->ctx = octx; 1753f1ae32a1SGerd Hoffmann 1754f1ae32a1SGerd Hoffmann if (bsr) { 1755f1ae32a1SGerd Hoffmann slot_ctx[3] = SLOT_DEFAULT << SLOT_STATE_SHIFT; 1756f1ae32a1SGerd Hoffmann } else { 1757f1ae32a1SGerd Hoffmann slot->devaddr = xhci->devaddr++; 1758f1ae32a1SGerd Hoffmann slot_ctx[3] = (SLOT_ADDRESSED << SLOT_STATE_SHIFT) | slot->devaddr; 1759f1ae32a1SGerd Hoffmann DPRINTF("xhci: device address is %d\n", slot->devaddr); 1760f1ae32a1SGerd Hoffmann usb_device_handle_control(dev, NULL, 1761f1ae32a1SGerd Hoffmann DeviceOutRequest | USB_REQ_SET_ADDRESS, 1762f1ae32a1SGerd Hoffmann slot->devaddr, 0, 0, NULL); 1763f1ae32a1SGerd Hoffmann } 1764f1ae32a1SGerd Hoffmann 1765f1ae32a1SGerd Hoffmann res = xhci_enable_ep(xhci, slotid, 1, octx+32, ep0_ctx); 1766f1ae32a1SGerd Hoffmann 1767f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1768f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1769f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", 1770f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 1771f1ae32a1SGerd Hoffmann 177259a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 177359a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 1774f1ae32a1SGerd Hoffmann 1775f1ae32a1SGerd Hoffmann return res; 1776f1ae32a1SGerd Hoffmann } 1777f1ae32a1SGerd Hoffmann 1778f1ae32a1SGerd Hoffmann 1779f1ae32a1SGerd Hoffmann static TRBCCode xhci_configure_slot(XHCIState *xhci, unsigned int slotid, 1780f1ae32a1SGerd Hoffmann uint64_t pictx, bool dc) 1781f1ae32a1SGerd Hoffmann { 178259a70ccdSDavid Gibson dma_addr_t ictx, octx; 1783f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1784f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1785f1ae32a1SGerd Hoffmann uint32_t islot_ctx[4]; 1786f1ae32a1SGerd Hoffmann uint32_t ep_ctx[5]; 1787f1ae32a1SGerd Hoffmann int i; 1788f1ae32a1SGerd Hoffmann TRBCCode res; 1789f1ae32a1SGerd Hoffmann 1790348f1037SGerd Hoffmann trace_usb_xhci_slot_configure(slotid); 1791f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1792f1ae32a1SGerd Hoffmann 1793f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1794f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 1795f1ae32a1SGerd Hoffmann 179659a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 179759a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1798f1ae32a1SGerd Hoffmann 1799f1ae32a1SGerd Hoffmann if (dc) { 1800f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 1801f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 1802f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1803f1ae32a1SGerd Hoffmann } 1804f1ae32a1SGerd Hoffmann } 1805f1ae32a1SGerd Hoffmann 180659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1807f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 1808f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_ADDRESSED << SLOT_STATE_SHIFT; 1809f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1810f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 181159a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1812f1ae32a1SGerd Hoffmann 1813f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1814f1ae32a1SGerd Hoffmann } 1815f1ae32a1SGerd Hoffmann 181659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1817f1ae32a1SGerd Hoffmann 1818f1ae32a1SGerd Hoffmann if ((ictl_ctx[0] & 0x3) != 0x0 || (ictl_ctx[1] & 0x3) != 0x1) { 1819f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1820f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1821f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1822f1ae32a1SGerd Hoffmann } 1823f1ae32a1SGerd Hoffmann 182459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, islot_ctx, sizeof(islot_ctx)); 182559a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1826f1ae32a1SGerd Hoffmann 1827f1ae32a1SGerd Hoffmann if (SLOT_STATE(slot_ctx[3]) < SLOT_ADDRESSED) { 1828f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid slot state %08x\n", slot_ctx[3]); 1829f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1830f1ae32a1SGerd Hoffmann } 1831f1ae32a1SGerd Hoffmann 1832f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 1833f1ae32a1SGerd Hoffmann if (ictl_ctx[0] & (1<<i)) { 1834f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1835f1ae32a1SGerd Hoffmann } 1836f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & (1<<i)) { 183759a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32+(32*i), ep_ctx, 183859a70ccdSDavid Gibson sizeof(ep_ctx)); 1839f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep%d.%d context: %08x %08x %08x %08x %08x\n", 1840f1ae32a1SGerd Hoffmann i/2, i%2, ep_ctx[0], ep_ctx[1], ep_ctx[2], 1841f1ae32a1SGerd Hoffmann ep_ctx[3], ep_ctx[4]); 1842f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1843f1ae32a1SGerd Hoffmann res = xhci_enable_ep(xhci, slotid, i, octx+(32*i), ep_ctx); 1844f1ae32a1SGerd Hoffmann if (res != CC_SUCCESS) { 1845f1ae32a1SGerd Hoffmann return res; 1846f1ae32a1SGerd Hoffmann } 1847f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep%d.%d context: %08x %08x %08x %08x %08x\n", 1848f1ae32a1SGerd Hoffmann i/2, i%2, ep_ctx[0], ep_ctx[1], ep_ctx[2], 1849f1ae32a1SGerd Hoffmann ep_ctx[3], ep_ctx[4]); 185059a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+(32*i), ep_ctx, sizeof(ep_ctx)); 1851f1ae32a1SGerd Hoffmann } 1852f1ae32a1SGerd Hoffmann } 1853f1ae32a1SGerd Hoffmann 1854f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 1855f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_CONFIGURED << SLOT_STATE_SHIFT; 1856f1ae32a1SGerd Hoffmann slot_ctx[0] &= ~(SLOT_CONTEXT_ENTRIES_MASK << SLOT_CONTEXT_ENTRIES_SHIFT); 1857f1ae32a1SGerd Hoffmann slot_ctx[0] |= islot_ctx[0] & (SLOT_CONTEXT_ENTRIES_MASK << 1858f1ae32a1SGerd Hoffmann SLOT_CONTEXT_ENTRIES_SHIFT); 1859f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1860f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1861f1ae32a1SGerd Hoffmann 186259a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1863f1ae32a1SGerd Hoffmann 1864f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1865f1ae32a1SGerd Hoffmann } 1866f1ae32a1SGerd Hoffmann 1867f1ae32a1SGerd Hoffmann 1868f1ae32a1SGerd Hoffmann static TRBCCode xhci_evaluate_slot(XHCIState *xhci, unsigned int slotid, 1869f1ae32a1SGerd Hoffmann uint64_t pictx) 1870f1ae32a1SGerd Hoffmann { 187159a70ccdSDavid Gibson dma_addr_t ictx, octx; 1872f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1873f1ae32a1SGerd Hoffmann uint32_t iep0_ctx[5]; 1874f1ae32a1SGerd Hoffmann uint32_t ep0_ctx[5]; 1875f1ae32a1SGerd Hoffmann uint32_t islot_ctx[4]; 1876f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1877f1ae32a1SGerd Hoffmann 1878348f1037SGerd Hoffmann trace_usb_xhci_slot_evaluate(slotid); 1879f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1880f1ae32a1SGerd Hoffmann 1881f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1882f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 1883f1ae32a1SGerd Hoffmann 188459a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 188559a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1886f1ae32a1SGerd Hoffmann 188759a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1888f1ae32a1SGerd Hoffmann 1889f1ae32a1SGerd Hoffmann if (ictl_ctx[0] != 0x0 || ictl_ctx[1] & ~0x3) { 1890f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1891f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1892f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1893f1ae32a1SGerd Hoffmann } 1894f1ae32a1SGerd Hoffmann 1895f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & 0x1) { 189659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, islot_ctx, sizeof(islot_ctx)); 1897f1ae32a1SGerd Hoffmann 1898f1ae32a1SGerd Hoffmann DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", 1899f1ae32a1SGerd Hoffmann islot_ctx[0], islot_ctx[1], islot_ctx[2], islot_ctx[3]); 1900f1ae32a1SGerd Hoffmann 190159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1902f1ae32a1SGerd Hoffmann 1903f1ae32a1SGerd Hoffmann slot_ctx[1] &= ~0xFFFF; /* max exit latency */ 1904f1ae32a1SGerd Hoffmann slot_ctx[1] |= islot_ctx[1] & 0xFFFF; 1905f1ae32a1SGerd Hoffmann slot_ctx[2] &= ~0xFF00000; /* interrupter target */ 1906f1ae32a1SGerd Hoffmann slot_ctx[2] |= islot_ctx[2] & 0xFF000000; 1907f1ae32a1SGerd Hoffmann 1908f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1909f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1910f1ae32a1SGerd Hoffmann 191159a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1912f1ae32a1SGerd Hoffmann } 1913f1ae32a1SGerd Hoffmann 1914f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & 0x2) { 191559a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+64, iep0_ctx, sizeof(iep0_ctx)); 1916f1ae32a1SGerd Hoffmann 1917f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", 1918f1ae32a1SGerd Hoffmann iep0_ctx[0], iep0_ctx[1], iep0_ctx[2], 1919f1ae32a1SGerd Hoffmann iep0_ctx[3], iep0_ctx[4]); 1920f1ae32a1SGerd Hoffmann 192159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 1922f1ae32a1SGerd Hoffmann 1923f1ae32a1SGerd Hoffmann ep0_ctx[1] &= ~0xFFFF0000; /* max packet size*/ 1924f1ae32a1SGerd Hoffmann ep0_ctx[1] |= iep0_ctx[1] & 0xFFFF0000; 1925f1ae32a1SGerd Hoffmann 1926f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", 1927f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 1928f1ae32a1SGerd Hoffmann 192959a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 1930f1ae32a1SGerd Hoffmann } 1931f1ae32a1SGerd Hoffmann 1932f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1933f1ae32a1SGerd Hoffmann } 1934f1ae32a1SGerd Hoffmann 1935f1ae32a1SGerd Hoffmann static TRBCCode xhci_reset_slot(XHCIState *xhci, unsigned int slotid) 1936f1ae32a1SGerd Hoffmann { 1937f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 193859a70ccdSDavid Gibson dma_addr_t octx; 1939f1ae32a1SGerd Hoffmann int i; 1940f1ae32a1SGerd Hoffmann 1941348f1037SGerd Hoffmann trace_usb_xhci_slot_reset(slotid); 1942f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1943f1ae32a1SGerd Hoffmann 1944f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 1945f1ae32a1SGerd Hoffmann 194659a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1947f1ae32a1SGerd Hoffmann 1948f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 1949f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 1950f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1951f1ae32a1SGerd Hoffmann } 1952f1ae32a1SGerd Hoffmann } 1953f1ae32a1SGerd Hoffmann 195459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1955f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 1956f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_DEFAULT << SLOT_STATE_SHIFT; 1957f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1958f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 195959a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1960f1ae32a1SGerd Hoffmann 1961f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1962f1ae32a1SGerd Hoffmann } 1963f1ae32a1SGerd Hoffmann 1964f1ae32a1SGerd Hoffmann static unsigned int xhci_get_slot(XHCIState *xhci, XHCIEvent *event, XHCITRB *trb) 1965f1ae32a1SGerd Hoffmann { 1966f1ae32a1SGerd Hoffmann unsigned int slotid; 1967f1ae32a1SGerd Hoffmann slotid = (trb->control >> TRB_CR_SLOTID_SHIFT) & TRB_CR_SLOTID_MASK; 1968f1ae32a1SGerd Hoffmann if (slotid < 1 || slotid > MAXSLOTS) { 1969f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad slot id %d\n", slotid); 1970f1ae32a1SGerd Hoffmann event->ccode = CC_TRB_ERROR; 1971f1ae32a1SGerd Hoffmann return 0; 1972f1ae32a1SGerd Hoffmann } else if (!xhci->slots[slotid-1].enabled) { 1973f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot id %d not enabled\n", slotid); 1974f1ae32a1SGerd Hoffmann event->ccode = CC_SLOT_NOT_ENABLED_ERROR; 1975f1ae32a1SGerd Hoffmann return 0; 1976f1ae32a1SGerd Hoffmann } 1977f1ae32a1SGerd Hoffmann return slotid; 1978f1ae32a1SGerd Hoffmann } 1979f1ae32a1SGerd Hoffmann 1980f1ae32a1SGerd Hoffmann static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx) 1981f1ae32a1SGerd Hoffmann { 198259a70ccdSDavid Gibson dma_addr_t ctx; 1983f1ae32a1SGerd Hoffmann uint8_t bw_ctx[MAXPORTS+1]; 1984f1ae32a1SGerd Hoffmann 1985f1ae32a1SGerd Hoffmann DPRINTF("xhci_get_port_bandwidth()\n"); 1986f1ae32a1SGerd Hoffmann 1987f1ae32a1SGerd Hoffmann ctx = xhci_mask64(pctx); 1988f1ae32a1SGerd Hoffmann 198959a70ccdSDavid Gibson DPRINTF("xhci: bandwidth context at "DMA_ADDR_FMT"\n", ctx); 1990f1ae32a1SGerd Hoffmann 1991f1ae32a1SGerd Hoffmann /* TODO: actually implement real values here */ 1992f1ae32a1SGerd Hoffmann bw_ctx[0] = 0; 1993f1ae32a1SGerd Hoffmann memset(&bw_ctx[1], 80, MAXPORTS); /* 80% */ 199459a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, ctx, bw_ctx, sizeof(bw_ctx)); 1995f1ae32a1SGerd Hoffmann 1996f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1997f1ae32a1SGerd Hoffmann } 1998f1ae32a1SGerd Hoffmann 1999f1ae32a1SGerd Hoffmann static uint32_t rotl(uint32_t v, unsigned count) 2000f1ae32a1SGerd Hoffmann { 2001f1ae32a1SGerd Hoffmann count &= 31; 2002f1ae32a1SGerd Hoffmann return (v << count) | (v >> (32 - count)); 2003f1ae32a1SGerd Hoffmann } 2004f1ae32a1SGerd Hoffmann 2005f1ae32a1SGerd Hoffmann 2006f1ae32a1SGerd Hoffmann static uint32_t xhci_nec_challenge(uint32_t hi, uint32_t lo) 2007f1ae32a1SGerd Hoffmann { 2008f1ae32a1SGerd Hoffmann uint32_t val; 2009f1ae32a1SGerd Hoffmann val = rotl(lo - 0x49434878, 32 - ((hi>>8) & 0x1F)); 2010f1ae32a1SGerd Hoffmann val += rotl(lo + 0x49434878, hi & 0x1F); 2011f1ae32a1SGerd Hoffmann val -= rotl(hi ^ 0x49434878, (lo >> 16) & 0x1F); 2012f1ae32a1SGerd Hoffmann return ~val; 2013f1ae32a1SGerd Hoffmann } 2014f1ae32a1SGerd Hoffmann 201559a70ccdSDavid Gibson static void xhci_via_challenge(XHCIState *xhci, uint64_t addr) 2016f1ae32a1SGerd Hoffmann { 2017f1ae32a1SGerd Hoffmann uint32_t buf[8]; 2018f1ae32a1SGerd Hoffmann uint32_t obuf[8]; 201959a70ccdSDavid Gibson dma_addr_t paddr = xhci_mask64(addr); 2020f1ae32a1SGerd Hoffmann 202159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, paddr, &buf, 32); 2022f1ae32a1SGerd Hoffmann 2023f1ae32a1SGerd Hoffmann memcpy(obuf, buf, sizeof(obuf)); 2024f1ae32a1SGerd Hoffmann 2025f1ae32a1SGerd Hoffmann if ((buf[0] & 0xff) == 2) { 2026f1ae32a1SGerd Hoffmann obuf[0] = 0x49932000 + 0x54dc200 * buf[2] + 0x7429b578 * buf[3]; 2027f1ae32a1SGerd Hoffmann obuf[0] |= (buf[2] * buf[3]) & 0xff; 2028f1ae32a1SGerd Hoffmann obuf[1] = 0x0132bb37 + 0xe89 * buf[2] + 0xf09 * buf[3]; 2029f1ae32a1SGerd Hoffmann obuf[2] = 0x0066c2e9 + 0x2091 * buf[2] + 0x19bd * buf[3]; 2030f1ae32a1SGerd Hoffmann obuf[3] = 0xd5281342 + 0x2cc9691 * buf[2] + 0x2367662 * buf[3]; 2031f1ae32a1SGerd Hoffmann obuf[4] = 0x0123c75c + 0x1595 * buf[2] + 0x19ec * buf[3]; 2032f1ae32a1SGerd Hoffmann obuf[5] = 0x00f695de + 0x26fd * buf[2] + 0x3e9 * buf[3]; 2033f1ae32a1SGerd Hoffmann obuf[6] = obuf[2] ^ obuf[3] ^ 0x29472956; 2034f1ae32a1SGerd Hoffmann obuf[7] = obuf[2] ^ obuf[3] ^ 0x65866593; 2035f1ae32a1SGerd Hoffmann } 2036f1ae32a1SGerd Hoffmann 203759a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, paddr, &obuf, 32); 2038f1ae32a1SGerd Hoffmann } 2039f1ae32a1SGerd Hoffmann 2040f1ae32a1SGerd Hoffmann static void xhci_process_commands(XHCIState *xhci) 2041f1ae32a1SGerd Hoffmann { 2042f1ae32a1SGerd Hoffmann XHCITRB trb; 2043f1ae32a1SGerd Hoffmann TRBType type; 2044f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_COMMAND_COMPLETE, CC_SUCCESS}; 204559a70ccdSDavid Gibson dma_addr_t addr; 2046f1ae32a1SGerd Hoffmann unsigned int i, slotid = 0; 2047f1ae32a1SGerd Hoffmann 2048f1ae32a1SGerd Hoffmann DPRINTF("xhci_process_commands()\n"); 2049f1ae32a1SGerd Hoffmann if (!xhci_running(xhci)) { 2050f1ae32a1SGerd Hoffmann DPRINTF("xhci_process_commands() called while xHC stopped or paused\n"); 2051f1ae32a1SGerd Hoffmann return; 2052f1ae32a1SGerd Hoffmann } 2053f1ae32a1SGerd Hoffmann 2054f1ae32a1SGerd Hoffmann xhci->crcr_low |= CRCR_CRR; 2055f1ae32a1SGerd Hoffmann 2056f1ae32a1SGerd Hoffmann while ((type = xhci_ring_fetch(xhci, &xhci->cmd_ring, &trb, &addr))) { 2057f1ae32a1SGerd Hoffmann event.ptr = addr; 2058f1ae32a1SGerd Hoffmann switch (type) { 2059f1ae32a1SGerd Hoffmann case CR_ENABLE_SLOT: 2060f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 2061f1ae32a1SGerd Hoffmann if (!xhci->slots[i].enabled) { 2062f1ae32a1SGerd Hoffmann break; 2063f1ae32a1SGerd Hoffmann } 2064f1ae32a1SGerd Hoffmann } 2065f1ae32a1SGerd Hoffmann if (i >= MAXSLOTS) { 2066f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: no device slots available\n"); 2067f1ae32a1SGerd Hoffmann event.ccode = CC_NO_SLOTS_ERROR; 2068f1ae32a1SGerd Hoffmann } else { 2069f1ae32a1SGerd Hoffmann slotid = i+1; 2070f1ae32a1SGerd Hoffmann event.ccode = xhci_enable_slot(xhci, slotid); 2071f1ae32a1SGerd Hoffmann } 2072f1ae32a1SGerd Hoffmann break; 2073f1ae32a1SGerd Hoffmann case CR_DISABLE_SLOT: 2074f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2075f1ae32a1SGerd Hoffmann if (slotid) { 2076f1ae32a1SGerd Hoffmann event.ccode = xhci_disable_slot(xhci, slotid); 2077f1ae32a1SGerd Hoffmann } 2078f1ae32a1SGerd Hoffmann break; 2079f1ae32a1SGerd Hoffmann case CR_ADDRESS_DEVICE: 2080f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2081f1ae32a1SGerd Hoffmann if (slotid) { 2082f1ae32a1SGerd Hoffmann event.ccode = xhci_address_slot(xhci, slotid, trb.parameter, 2083f1ae32a1SGerd Hoffmann trb.control & TRB_CR_BSR); 2084f1ae32a1SGerd Hoffmann } 2085f1ae32a1SGerd Hoffmann break; 2086f1ae32a1SGerd Hoffmann case CR_CONFIGURE_ENDPOINT: 2087f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2088f1ae32a1SGerd Hoffmann if (slotid) { 2089f1ae32a1SGerd Hoffmann event.ccode = xhci_configure_slot(xhci, slotid, trb.parameter, 2090f1ae32a1SGerd Hoffmann trb.control & TRB_CR_DC); 2091f1ae32a1SGerd Hoffmann } 2092f1ae32a1SGerd Hoffmann break; 2093f1ae32a1SGerd Hoffmann case CR_EVALUATE_CONTEXT: 2094f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2095f1ae32a1SGerd Hoffmann if (slotid) { 2096f1ae32a1SGerd Hoffmann event.ccode = xhci_evaluate_slot(xhci, slotid, trb.parameter); 2097f1ae32a1SGerd Hoffmann } 2098f1ae32a1SGerd Hoffmann break; 2099f1ae32a1SGerd Hoffmann case CR_STOP_ENDPOINT: 2100f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2101f1ae32a1SGerd Hoffmann if (slotid) { 2102f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2103f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2104f1ae32a1SGerd Hoffmann event.ccode = xhci_stop_ep(xhci, slotid, epid); 2105f1ae32a1SGerd Hoffmann } 2106f1ae32a1SGerd Hoffmann break; 2107f1ae32a1SGerd Hoffmann case CR_RESET_ENDPOINT: 2108f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2109f1ae32a1SGerd Hoffmann if (slotid) { 2110f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2111f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2112f1ae32a1SGerd Hoffmann event.ccode = xhci_reset_ep(xhci, slotid, epid); 2113f1ae32a1SGerd Hoffmann } 2114f1ae32a1SGerd Hoffmann break; 2115f1ae32a1SGerd Hoffmann case CR_SET_TR_DEQUEUE: 2116f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2117f1ae32a1SGerd Hoffmann if (slotid) { 2118f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2119f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2120f1ae32a1SGerd Hoffmann event.ccode = xhci_set_ep_dequeue(xhci, slotid, epid, 2121f1ae32a1SGerd Hoffmann trb.parameter); 2122f1ae32a1SGerd Hoffmann } 2123f1ae32a1SGerd Hoffmann break; 2124f1ae32a1SGerd Hoffmann case CR_RESET_DEVICE: 2125f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2126f1ae32a1SGerd Hoffmann if (slotid) { 2127f1ae32a1SGerd Hoffmann event.ccode = xhci_reset_slot(xhci, slotid); 2128f1ae32a1SGerd Hoffmann } 2129f1ae32a1SGerd Hoffmann break; 2130f1ae32a1SGerd Hoffmann case CR_GET_PORT_BANDWIDTH: 2131f1ae32a1SGerd Hoffmann event.ccode = xhci_get_port_bandwidth(xhci, trb.parameter); 2132f1ae32a1SGerd Hoffmann break; 2133f1ae32a1SGerd Hoffmann case CR_VENDOR_VIA_CHALLENGE_RESPONSE: 213459a70ccdSDavid Gibson xhci_via_challenge(xhci, trb.parameter); 2135f1ae32a1SGerd Hoffmann break; 2136f1ae32a1SGerd Hoffmann case CR_VENDOR_NEC_FIRMWARE_REVISION: 2137f1ae32a1SGerd Hoffmann event.type = 48; /* NEC reply */ 2138f1ae32a1SGerd Hoffmann event.length = 0x3025; 2139f1ae32a1SGerd Hoffmann break; 2140f1ae32a1SGerd Hoffmann case CR_VENDOR_NEC_CHALLENGE_RESPONSE: 2141f1ae32a1SGerd Hoffmann { 2142f1ae32a1SGerd Hoffmann uint32_t chi = trb.parameter >> 32; 2143f1ae32a1SGerd Hoffmann uint32_t clo = trb.parameter; 2144f1ae32a1SGerd Hoffmann uint32_t val = xhci_nec_challenge(chi, clo); 2145f1ae32a1SGerd Hoffmann event.length = val & 0xFFFF; 2146f1ae32a1SGerd Hoffmann event.epid = val >> 16; 2147f1ae32a1SGerd Hoffmann slotid = val >> 24; 2148f1ae32a1SGerd Hoffmann event.type = 48; /* NEC reply */ 2149f1ae32a1SGerd Hoffmann } 2150f1ae32a1SGerd Hoffmann break; 2151f1ae32a1SGerd Hoffmann default: 2152f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: unimplemented command %d\n", type); 2153f1ae32a1SGerd Hoffmann event.ccode = CC_TRB_ERROR; 2154f1ae32a1SGerd Hoffmann break; 2155f1ae32a1SGerd Hoffmann } 2156f1ae32a1SGerd Hoffmann event.slotid = slotid; 2157f1ae32a1SGerd Hoffmann xhci_event(xhci, &event); 2158f1ae32a1SGerd Hoffmann } 2159f1ae32a1SGerd Hoffmann } 2160f1ae32a1SGerd Hoffmann 2161f1ae32a1SGerd Hoffmann static void xhci_update_port(XHCIState *xhci, XHCIPort *port, int is_detach) 2162f1ae32a1SGerd Hoffmann { 2163f1ae32a1SGerd Hoffmann int nr = port->port.index + 1; 2164f1ae32a1SGerd Hoffmann 2165f1ae32a1SGerd Hoffmann port->portsc = PORTSC_PP; 2166f1ae32a1SGerd Hoffmann if (port->port.dev && port->port.dev->attached && !is_detach) { 2167f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_CCS; 2168f1ae32a1SGerd Hoffmann switch (port->port.dev->speed) { 2169f1ae32a1SGerd Hoffmann case USB_SPEED_LOW: 2170f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_LOW; 2171f1ae32a1SGerd Hoffmann break; 2172f1ae32a1SGerd Hoffmann case USB_SPEED_FULL: 2173f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_FULL; 2174f1ae32a1SGerd Hoffmann break; 2175f1ae32a1SGerd Hoffmann case USB_SPEED_HIGH: 2176f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_HIGH; 2177f1ae32a1SGerd Hoffmann break; 2178f1ae32a1SGerd Hoffmann } 2179f1ae32a1SGerd Hoffmann } 2180f1ae32a1SGerd Hoffmann 2181f1ae32a1SGerd Hoffmann if (xhci_running(xhci)) { 2182f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_CSC; 2183f1ae32a1SGerd Hoffmann XHCIEvent ev = { ER_PORT_STATUS_CHANGE, CC_SUCCESS, nr << 24}; 2184f1ae32a1SGerd Hoffmann xhci_event(xhci, &ev); 2185f1ae32a1SGerd Hoffmann DPRINTF("xhci: port change event for port %d\n", nr); 2186f1ae32a1SGerd Hoffmann } 2187f1ae32a1SGerd Hoffmann } 2188f1ae32a1SGerd Hoffmann 218964619739SJan Kiszka static void xhci_reset(DeviceState *dev) 2190f1ae32a1SGerd Hoffmann { 219164619739SJan Kiszka XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev.qdev, dev); 2192f1ae32a1SGerd Hoffmann int i; 2193f1ae32a1SGerd Hoffmann 21942d754a10SGerd Hoffmann trace_usb_xhci_reset(); 2195f1ae32a1SGerd Hoffmann if (!(xhci->usbsts & USBSTS_HCH)) { 2196f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: reset while running!\n"); 2197f1ae32a1SGerd Hoffmann } 2198f1ae32a1SGerd Hoffmann 2199f1ae32a1SGerd Hoffmann xhci->usbcmd = 0; 2200f1ae32a1SGerd Hoffmann xhci->usbsts = USBSTS_HCH; 2201f1ae32a1SGerd Hoffmann xhci->dnctrl = 0; 2202f1ae32a1SGerd Hoffmann xhci->crcr_low = 0; 2203f1ae32a1SGerd Hoffmann xhci->crcr_high = 0; 2204f1ae32a1SGerd Hoffmann xhci->dcbaap_low = 0; 2205f1ae32a1SGerd Hoffmann xhci->dcbaap_high = 0; 2206f1ae32a1SGerd Hoffmann xhci->config = 0; 2207f1ae32a1SGerd Hoffmann xhci->devaddr = 2; 2208f1ae32a1SGerd Hoffmann 2209f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 2210f1ae32a1SGerd Hoffmann xhci_disable_slot(xhci, i+1); 2211f1ae32a1SGerd Hoffmann } 2212f1ae32a1SGerd Hoffmann 2213f1ae32a1SGerd Hoffmann for (i = 0; i < MAXPORTS; i++) { 2214f1ae32a1SGerd Hoffmann xhci_update_port(xhci, xhci->ports + i, 0); 2215f1ae32a1SGerd Hoffmann } 2216f1ae32a1SGerd Hoffmann 2217f1ae32a1SGerd Hoffmann xhci->iman = 0; 2218f1ae32a1SGerd Hoffmann xhci->imod = 0; 2219f1ae32a1SGerd Hoffmann xhci->erstsz = 0; 2220f1ae32a1SGerd Hoffmann xhci->erstba_low = 0; 2221f1ae32a1SGerd Hoffmann xhci->erstba_high = 0; 2222f1ae32a1SGerd Hoffmann xhci->erdp_low = 0; 2223f1ae32a1SGerd Hoffmann xhci->erdp_high = 0; 2224f1ae32a1SGerd Hoffmann 2225f1ae32a1SGerd Hoffmann xhci->er_ep_idx = 0; 2226f1ae32a1SGerd Hoffmann xhci->er_pcs = 1; 2227f1ae32a1SGerd Hoffmann xhci->er_full = 0; 2228f1ae32a1SGerd Hoffmann xhci->ev_buffer_put = 0; 2229f1ae32a1SGerd Hoffmann xhci->ev_buffer_get = 0; 223001546fa6SGerd Hoffmann 223101546fa6SGerd Hoffmann xhci->mfindex_start = qemu_get_clock_ns(vm_clock); 223201546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 2233f1ae32a1SGerd Hoffmann } 2234f1ae32a1SGerd Hoffmann 2235f1ae32a1SGerd Hoffmann static uint32_t xhci_cap_read(XHCIState *xhci, uint32_t reg) 2236f1ae32a1SGerd Hoffmann { 22372d754a10SGerd Hoffmann uint32_t ret; 2238f1ae32a1SGerd Hoffmann 2239f1ae32a1SGerd Hoffmann switch (reg) { 2240f1ae32a1SGerd Hoffmann case 0x00: /* HCIVERSION, CAPLENGTH */ 22412d754a10SGerd Hoffmann ret = 0x01000000 | LEN_CAP; 22422d754a10SGerd Hoffmann break; 2243f1ae32a1SGerd Hoffmann case 0x04: /* HCSPARAMS 1 */ 22442d754a10SGerd Hoffmann ret = (MAXPORTS<<24) | (MAXINTRS<<8) | MAXSLOTS; 22452d754a10SGerd Hoffmann break; 2246f1ae32a1SGerd Hoffmann case 0x08: /* HCSPARAMS 2 */ 22472d754a10SGerd Hoffmann ret = 0x0000000f; 22482d754a10SGerd Hoffmann break; 2249f1ae32a1SGerd Hoffmann case 0x0c: /* HCSPARAMS 3 */ 22502d754a10SGerd Hoffmann ret = 0x00000000; 22512d754a10SGerd Hoffmann break; 2252f1ae32a1SGerd Hoffmann case 0x10: /* HCCPARAMS */ 22532d754a10SGerd Hoffmann if (sizeof(dma_addr_t) == 4) { 22542d754a10SGerd Hoffmann ret = 0x00081000; 22552d754a10SGerd Hoffmann } else { 22562d754a10SGerd Hoffmann ret = 0x00081001; 22572d754a10SGerd Hoffmann } 22582d754a10SGerd Hoffmann break; 2259f1ae32a1SGerd Hoffmann case 0x14: /* DBOFF */ 22602d754a10SGerd Hoffmann ret = OFF_DOORBELL; 22612d754a10SGerd Hoffmann break; 2262f1ae32a1SGerd Hoffmann case 0x18: /* RTSOFF */ 22632d754a10SGerd Hoffmann ret = OFF_RUNTIME; 22642d754a10SGerd Hoffmann break; 2265f1ae32a1SGerd Hoffmann 2266f1ae32a1SGerd Hoffmann /* extended capabilities */ 2267f1ae32a1SGerd Hoffmann case 0x20: /* Supported Protocol:00 */ 22682d754a10SGerd Hoffmann ret = 0x02000402; /* USB 2.0 */ 22692d754a10SGerd Hoffmann break; 2270f1ae32a1SGerd Hoffmann case 0x24: /* Supported Protocol:04 */ 22712d754a10SGerd Hoffmann ret = 0x20425455; /* "USB " */ 22722d754a10SGerd Hoffmann break; 2273f1ae32a1SGerd Hoffmann case 0x28: /* Supported Protocol:08 */ 22742d754a10SGerd Hoffmann ret = 0x00000001 | (USB2_PORTS<<8); 22752d754a10SGerd Hoffmann break; 2276f1ae32a1SGerd Hoffmann case 0x2c: /* Supported Protocol:0c */ 22772d754a10SGerd Hoffmann ret = 0x00000000; /* reserved */ 22782d754a10SGerd Hoffmann break; 2279f1ae32a1SGerd Hoffmann case 0x30: /* Supported Protocol:00 */ 22802d754a10SGerd Hoffmann ret = 0x03000002; /* USB 3.0 */ 22812d754a10SGerd Hoffmann break; 2282f1ae32a1SGerd Hoffmann case 0x34: /* Supported Protocol:04 */ 22832d754a10SGerd Hoffmann ret = 0x20425455; /* "USB " */ 22842d754a10SGerd Hoffmann break; 2285f1ae32a1SGerd Hoffmann case 0x38: /* Supported Protocol:08 */ 22862d754a10SGerd Hoffmann ret = 0x00000000 | (USB2_PORTS+1) | (USB3_PORTS<<8); 22872d754a10SGerd Hoffmann break; 2288f1ae32a1SGerd Hoffmann case 0x3c: /* Supported Protocol:0c */ 22892d754a10SGerd Hoffmann ret = 0x00000000; /* reserved */ 22902d754a10SGerd Hoffmann break; 2291f1ae32a1SGerd Hoffmann default: 2292f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_cap_read: reg %d unimplemented\n", reg); 22932d754a10SGerd Hoffmann ret = 0; 2294f1ae32a1SGerd Hoffmann } 22952d754a10SGerd Hoffmann 22962d754a10SGerd Hoffmann trace_usb_xhci_cap_read(reg, ret); 22972d754a10SGerd Hoffmann return ret; 2298f1ae32a1SGerd Hoffmann } 2299f1ae32a1SGerd Hoffmann 2300f1ae32a1SGerd Hoffmann static uint32_t xhci_port_read(XHCIState *xhci, uint32_t reg) 2301f1ae32a1SGerd Hoffmann { 2302f1ae32a1SGerd Hoffmann uint32_t port = reg >> 4; 23032d754a10SGerd Hoffmann uint32_t ret; 23042d754a10SGerd Hoffmann 2305f1ae32a1SGerd Hoffmann if (port >= MAXPORTS) { 2306f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read: port %d out of bounds\n", port); 23072d754a10SGerd Hoffmann ret = 0; 23082d754a10SGerd Hoffmann goto out; 2309f1ae32a1SGerd Hoffmann } 2310f1ae32a1SGerd Hoffmann 2311f1ae32a1SGerd Hoffmann switch (reg & 0xf) { 2312f1ae32a1SGerd Hoffmann case 0x00: /* PORTSC */ 23132d754a10SGerd Hoffmann ret = xhci->ports[port].portsc; 23142d754a10SGerd Hoffmann break; 2315f1ae32a1SGerd Hoffmann case 0x04: /* PORTPMSC */ 2316f1ae32a1SGerd Hoffmann case 0x08: /* PORTLI */ 23172d754a10SGerd Hoffmann ret = 0; 23182d754a10SGerd Hoffmann break; 2319f1ae32a1SGerd Hoffmann case 0x0c: /* reserved */ 2320f1ae32a1SGerd Hoffmann default: 2321f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read (port %d): reg 0x%x unimplemented\n", 2322f1ae32a1SGerd Hoffmann port, reg); 23232d754a10SGerd Hoffmann ret = 0; 2324f1ae32a1SGerd Hoffmann } 23252d754a10SGerd Hoffmann 23262d754a10SGerd Hoffmann out: 23272d754a10SGerd Hoffmann trace_usb_xhci_port_read(port, reg & 0x0f, ret); 23282d754a10SGerd Hoffmann return ret; 2329f1ae32a1SGerd Hoffmann } 2330f1ae32a1SGerd Hoffmann 2331f1ae32a1SGerd Hoffmann static void xhci_port_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2332f1ae32a1SGerd Hoffmann { 2333f1ae32a1SGerd Hoffmann uint32_t port = reg >> 4; 2334f1ae32a1SGerd Hoffmann uint32_t portsc; 2335f1ae32a1SGerd Hoffmann 23362d754a10SGerd Hoffmann trace_usb_xhci_port_write(port, reg & 0x0f, val); 23372d754a10SGerd Hoffmann 2338f1ae32a1SGerd Hoffmann if (port >= MAXPORTS) { 2339f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read: port %d out of bounds\n", port); 2340f1ae32a1SGerd Hoffmann return; 2341f1ae32a1SGerd Hoffmann } 2342f1ae32a1SGerd Hoffmann 2343f1ae32a1SGerd Hoffmann switch (reg & 0xf) { 2344f1ae32a1SGerd Hoffmann case 0x00: /* PORTSC */ 2345f1ae32a1SGerd Hoffmann portsc = xhci->ports[port].portsc; 2346f1ae32a1SGerd Hoffmann /* write-1-to-clear bits*/ 2347f1ae32a1SGerd Hoffmann portsc &= ~(val & (PORTSC_CSC|PORTSC_PEC|PORTSC_WRC|PORTSC_OCC| 2348f1ae32a1SGerd Hoffmann PORTSC_PRC|PORTSC_PLC|PORTSC_CEC)); 2349f1ae32a1SGerd Hoffmann if (val & PORTSC_LWS) { 2350f1ae32a1SGerd Hoffmann /* overwrite PLS only when LWS=1 */ 2351f1ae32a1SGerd Hoffmann portsc &= ~(PORTSC_PLS_MASK << PORTSC_PLS_SHIFT); 2352f1ae32a1SGerd Hoffmann portsc |= val & (PORTSC_PLS_MASK << PORTSC_PLS_SHIFT); 2353f1ae32a1SGerd Hoffmann } 2354f1ae32a1SGerd Hoffmann /* read/write bits */ 2355f1ae32a1SGerd Hoffmann portsc &= ~(PORTSC_PP|PORTSC_WCE|PORTSC_WDE|PORTSC_WOE); 2356f1ae32a1SGerd Hoffmann portsc |= (val & (PORTSC_PP|PORTSC_WCE|PORTSC_WDE|PORTSC_WOE)); 2357f1ae32a1SGerd Hoffmann /* write-1-to-start bits */ 2358f1ae32a1SGerd Hoffmann if (val & PORTSC_PR) { 2359f1ae32a1SGerd Hoffmann DPRINTF("xhci: port %d reset\n", port); 2360f1ae32a1SGerd Hoffmann usb_device_reset(xhci->ports[port].port.dev); 2361f1ae32a1SGerd Hoffmann portsc |= PORTSC_PRC | PORTSC_PED; 2362f1ae32a1SGerd Hoffmann } 2363f1ae32a1SGerd Hoffmann xhci->ports[port].portsc = portsc; 2364f1ae32a1SGerd Hoffmann break; 2365f1ae32a1SGerd Hoffmann case 0x04: /* PORTPMSC */ 2366f1ae32a1SGerd Hoffmann case 0x08: /* PORTLI */ 2367f1ae32a1SGerd Hoffmann default: 2368f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_write (port %d): reg 0x%x unimplemented\n", 2369f1ae32a1SGerd Hoffmann port, reg); 2370f1ae32a1SGerd Hoffmann } 2371f1ae32a1SGerd Hoffmann } 2372f1ae32a1SGerd Hoffmann 2373f1ae32a1SGerd Hoffmann static uint32_t xhci_oper_read(XHCIState *xhci, uint32_t reg) 2374f1ae32a1SGerd Hoffmann { 23752d754a10SGerd Hoffmann uint32_t ret; 2376f1ae32a1SGerd Hoffmann 2377f1ae32a1SGerd Hoffmann if (reg >= 0x400) { 2378f1ae32a1SGerd Hoffmann return xhci_port_read(xhci, reg - 0x400); 2379f1ae32a1SGerd Hoffmann } 2380f1ae32a1SGerd Hoffmann 2381f1ae32a1SGerd Hoffmann switch (reg) { 2382f1ae32a1SGerd Hoffmann case 0x00: /* USBCMD */ 23832d754a10SGerd Hoffmann ret = xhci->usbcmd; 23842d754a10SGerd Hoffmann break; 2385f1ae32a1SGerd Hoffmann case 0x04: /* USBSTS */ 23862d754a10SGerd Hoffmann ret = xhci->usbsts; 23872d754a10SGerd Hoffmann break; 2388f1ae32a1SGerd Hoffmann case 0x08: /* PAGESIZE */ 23892d754a10SGerd Hoffmann ret = 1; /* 4KiB */ 23902d754a10SGerd Hoffmann break; 2391f1ae32a1SGerd Hoffmann case 0x14: /* DNCTRL */ 23922d754a10SGerd Hoffmann ret = xhci->dnctrl; 23932d754a10SGerd Hoffmann break; 2394f1ae32a1SGerd Hoffmann case 0x18: /* CRCR low */ 23952d754a10SGerd Hoffmann ret = xhci->crcr_low & ~0xe; 23962d754a10SGerd Hoffmann break; 2397f1ae32a1SGerd Hoffmann case 0x1c: /* CRCR high */ 23982d754a10SGerd Hoffmann ret = xhci->crcr_high; 23992d754a10SGerd Hoffmann break; 2400f1ae32a1SGerd Hoffmann case 0x30: /* DCBAAP low */ 24012d754a10SGerd Hoffmann ret = xhci->dcbaap_low; 24022d754a10SGerd Hoffmann break; 2403f1ae32a1SGerd Hoffmann case 0x34: /* DCBAAP high */ 24042d754a10SGerd Hoffmann ret = xhci->dcbaap_high; 24052d754a10SGerd Hoffmann break; 2406f1ae32a1SGerd Hoffmann case 0x38: /* CONFIG */ 24072d754a10SGerd Hoffmann ret = xhci->config; 24082d754a10SGerd Hoffmann break; 2409f1ae32a1SGerd Hoffmann default: 2410f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_read: reg 0x%x unimplemented\n", reg); 24112d754a10SGerd Hoffmann ret = 0; 2412f1ae32a1SGerd Hoffmann } 24132d754a10SGerd Hoffmann 24142d754a10SGerd Hoffmann trace_usb_xhci_oper_read(reg, ret); 24152d754a10SGerd Hoffmann return ret; 2416f1ae32a1SGerd Hoffmann } 2417f1ae32a1SGerd Hoffmann 2418f1ae32a1SGerd Hoffmann static void xhci_oper_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2419f1ae32a1SGerd Hoffmann { 2420f1ae32a1SGerd Hoffmann if (reg >= 0x400) { 2421f1ae32a1SGerd Hoffmann xhci_port_write(xhci, reg - 0x400, val); 2422f1ae32a1SGerd Hoffmann return; 2423f1ae32a1SGerd Hoffmann } 2424f1ae32a1SGerd Hoffmann 24252d754a10SGerd Hoffmann trace_usb_xhci_oper_write(reg, val); 24262d754a10SGerd Hoffmann 2427f1ae32a1SGerd Hoffmann switch (reg) { 2428f1ae32a1SGerd Hoffmann case 0x00: /* USBCMD */ 2429f1ae32a1SGerd Hoffmann if ((val & USBCMD_RS) && !(xhci->usbcmd & USBCMD_RS)) { 2430f1ae32a1SGerd Hoffmann xhci_run(xhci); 2431f1ae32a1SGerd Hoffmann } else if (!(val & USBCMD_RS) && (xhci->usbcmd & USBCMD_RS)) { 2432f1ae32a1SGerd Hoffmann xhci_stop(xhci); 2433f1ae32a1SGerd Hoffmann } 2434f1ae32a1SGerd Hoffmann xhci->usbcmd = val & 0xc0f; 243501546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 2436f1ae32a1SGerd Hoffmann if (val & USBCMD_HCRST) { 243764619739SJan Kiszka xhci_reset(&xhci->pci_dev.qdev); 2438f1ae32a1SGerd Hoffmann } 2439f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 2440f1ae32a1SGerd Hoffmann break; 2441f1ae32a1SGerd Hoffmann 2442f1ae32a1SGerd Hoffmann case 0x04: /* USBSTS */ 2443f1ae32a1SGerd Hoffmann /* these bits are write-1-to-clear */ 2444f1ae32a1SGerd Hoffmann xhci->usbsts &= ~(val & (USBSTS_HSE|USBSTS_EINT|USBSTS_PCD|USBSTS_SRE)); 2445f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 2446f1ae32a1SGerd Hoffmann break; 2447f1ae32a1SGerd Hoffmann 2448f1ae32a1SGerd Hoffmann case 0x14: /* DNCTRL */ 2449f1ae32a1SGerd Hoffmann xhci->dnctrl = val & 0xffff; 2450f1ae32a1SGerd Hoffmann break; 2451f1ae32a1SGerd Hoffmann case 0x18: /* CRCR low */ 2452f1ae32a1SGerd Hoffmann xhci->crcr_low = (val & 0xffffffcf) | (xhci->crcr_low & CRCR_CRR); 2453f1ae32a1SGerd Hoffmann break; 2454f1ae32a1SGerd Hoffmann case 0x1c: /* CRCR high */ 2455f1ae32a1SGerd Hoffmann xhci->crcr_high = val; 2456f1ae32a1SGerd Hoffmann if (xhci->crcr_low & (CRCR_CA|CRCR_CS) && (xhci->crcr_low & CRCR_CRR)) { 2457f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_COMMAND_COMPLETE, CC_COMMAND_RING_STOPPED}; 2458f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~CRCR_CRR; 2459f1ae32a1SGerd Hoffmann xhci_event(xhci, &event); 2460f1ae32a1SGerd Hoffmann DPRINTF("xhci: command ring stopped (CRCR=%08x)\n", xhci->crcr_low); 2461f1ae32a1SGerd Hoffmann } else { 246259a70ccdSDavid Gibson dma_addr_t base = xhci_addr64(xhci->crcr_low & ~0x3f, val); 2463f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &xhci->cmd_ring, base); 2464f1ae32a1SGerd Hoffmann } 2465f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~(CRCR_CA | CRCR_CS); 2466f1ae32a1SGerd Hoffmann break; 2467f1ae32a1SGerd Hoffmann case 0x30: /* DCBAAP low */ 2468f1ae32a1SGerd Hoffmann xhci->dcbaap_low = val & 0xffffffc0; 2469f1ae32a1SGerd Hoffmann break; 2470f1ae32a1SGerd Hoffmann case 0x34: /* DCBAAP high */ 2471f1ae32a1SGerd Hoffmann xhci->dcbaap_high = val; 2472f1ae32a1SGerd Hoffmann break; 2473f1ae32a1SGerd Hoffmann case 0x38: /* CONFIG */ 2474f1ae32a1SGerd Hoffmann xhci->config = val & 0xff; 2475f1ae32a1SGerd Hoffmann break; 2476f1ae32a1SGerd Hoffmann default: 2477f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_write: reg 0x%x unimplemented\n", reg); 2478f1ae32a1SGerd Hoffmann } 2479f1ae32a1SGerd Hoffmann } 2480f1ae32a1SGerd Hoffmann 2481f1ae32a1SGerd Hoffmann static uint32_t xhci_runtime_read(XHCIState *xhci, uint32_t reg) 2482f1ae32a1SGerd Hoffmann { 24832d754a10SGerd Hoffmann uint32_t ret; 2484f1ae32a1SGerd Hoffmann 2485f1ae32a1SGerd Hoffmann switch (reg) { 2486f1ae32a1SGerd Hoffmann case 0x00: /* MFINDEX */ 248701546fa6SGerd Hoffmann ret = xhci_mfindex_get(xhci) & 0x3fff; 24882d754a10SGerd Hoffmann break; 2489f1ae32a1SGerd Hoffmann case 0x20: /* IMAN */ 24902d754a10SGerd Hoffmann ret = xhci->iman; 24912d754a10SGerd Hoffmann break; 2492f1ae32a1SGerd Hoffmann case 0x24: /* IMOD */ 24932d754a10SGerd Hoffmann ret = xhci->imod; 24942d754a10SGerd Hoffmann break; 2495f1ae32a1SGerd Hoffmann case 0x28: /* ERSTSZ */ 24962d754a10SGerd Hoffmann ret = xhci->erstsz; 24972d754a10SGerd Hoffmann break; 2498f1ae32a1SGerd Hoffmann case 0x30: /* ERSTBA low */ 24992d754a10SGerd Hoffmann ret = xhci->erstba_low; 25002d754a10SGerd Hoffmann break; 2501f1ae32a1SGerd Hoffmann case 0x34: /* ERSTBA high */ 25022d754a10SGerd Hoffmann ret = xhci->erstba_high; 25032d754a10SGerd Hoffmann break; 2504f1ae32a1SGerd Hoffmann case 0x38: /* ERDP low */ 25052d754a10SGerd Hoffmann ret = xhci->erdp_low; 25062d754a10SGerd Hoffmann break; 2507f1ae32a1SGerd Hoffmann case 0x3c: /* ERDP high */ 25082d754a10SGerd Hoffmann ret = xhci->erdp_high; 25092d754a10SGerd Hoffmann break; 2510f1ae32a1SGerd Hoffmann default: 2511f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_runtime_read: reg 0x%x unimplemented\n", reg); 25122d754a10SGerd Hoffmann ret = 0; 2513f1ae32a1SGerd Hoffmann } 25142d754a10SGerd Hoffmann 25152d754a10SGerd Hoffmann trace_usb_xhci_runtime_read(reg, ret); 25162d754a10SGerd Hoffmann return ret; 2517f1ae32a1SGerd Hoffmann } 2518f1ae32a1SGerd Hoffmann 2519f1ae32a1SGerd Hoffmann static void xhci_runtime_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2520f1ae32a1SGerd Hoffmann { 2521*8e9f18b6SGerd Hoffmann trace_usb_xhci_runtime_write(reg, val); 2522f1ae32a1SGerd Hoffmann 2523f1ae32a1SGerd Hoffmann switch (reg) { 2524f1ae32a1SGerd Hoffmann case 0x20: /* IMAN */ 2525f1ae32a1SGerd Hoffmann if (val & IMAN_IP) { 2526f1ae32a1SGerd Hoffmann xhci->iman &= ~IMAN_IP; 2527f1ae32a1SGerd Hoffmann } 2528f1ae32a1SGerd Hoffmann xhci->iman &= ~IMAN_IE; 2529f1ae32a1SGerd Hoffmann xhci->iman |= val & IMAN_IE; 2530f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 2531f1ae32a1SGerd Hoffmann break; 2532f1ae32a1SGerd Hoffmann case 0x24: /* IMOD */ 2533f1ae32a1SGerd Hoffmann xhci->imod = val; 2534f1ae32a1SGerd Hoffmann break; 2535f1ae32a1SGerd Hoffmann case 0x28: /* ERSTSZ */ 2536f1ae32a1SGerd Hoffmann xhci->erstsz = val & 0xffff; 2537f1ae32a1SGerd Hoffmann break; 2538f1ae32a1SGerd Hoffmann case 0x30: /* ERSTBA low */ 2539f1ae32a1SGerd Hoffmann /* XXX NEC driver bug: it doesn't align this to 64 bytes 2540f1ae32a1SGerd Hoffmann xhci->erstba_low = val & 0xffffffc0; */ 2541f1ae32a1SGerd Hoffmann xhci->erstba_low = val & 0xfffffff0; 2542f1ae32a1SGerd Hoffmann break; 2543f1ae32a1SGerd Hoffmann case 0x34: /* ERSTBA high */ 2544f1ae32a1SGerd Hoffmann xhci->erstba_high = val; 2545f1ae32a1SGerd Hoffmann xhci_er_reset(xhci); 2546f1ae32a1SGerd Hoffmann break; 2547f1ae32a1SGerd Hoffmann case 0x38: /* ERDP low */ 2548f1ae32a1SGerd Hoffmann if (val & ERDP_EHB) { 2549f1ae32a1SGerd Hoffmann xhci->erdp_low &= ~ERDP_EHB; 2550f1ae32a1SGerd Hoffmann } 2551f1ae32a1SGerd Hoffmann xhci->erdp_low = (val & ~ERDP_EHB) | (xhci->erdp_low & ERDP_EHB); 2552f1ae32a1SGerd Hoffmann break; 2553f1ae32a1SGerd Hoffmann case 0x3c: /* ERDP high */ 2554f1ae32a1SGerd Hoffmann xhci->erdp_high = val; 2555f1ae32a1SGerd Hoffmann xhci_events_update(xhci); 2556f1ae32a1SGerd Hoffmann break; 2557f1ae32a1SGerd Hoffmann default: 2558f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_write: reg 0x%x unimplemented\n", reg); 2559f1ae32a1SGerd Hoffmann } 2560f1ae32a1SGerd Hoffmann } 2561f1ae32a1SGerd Hoffmann 2562f1ae32a1SGerd Hoffmann static uint32_t xhci_doorbell_read(XHCIState *xhci, uint32_t reg) 2563f1ae32a1SGerd Hoffmann { 2564f1ae32a1SGerd Hoffmann /* doorbells always read as 0 */ 25652d754a10SGerd Hoffmann trace_usb_xhci_doorbell_read(reg, 0); 2566f1ae32a1SGerd Hoffmann return 0; 2567f1ae32a1SGerd Hoffmann } 2568f1ae32a1SGerd Hoffmann 2569f1ae32a1SGerd Hoffmann static void xhci_doorbell_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2570f1ae32a1SGerd Hoffmann { 25712d754a10SGerd Hoffmann trace_usb_xhci_doorbell_write(reg, val); 2572f1ae32a1SGerd Hoffmann 2573f1ae32a1SGerd Hoffmann if (!xhci_running(xhci)) { 2574f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: wrote doorbell while xHC stopped or paused\n"); 2575f1ae32a1SGerd Hoffmann return; 2576f1ae32a1SGerd Hoffmann } 2577f1ae32a1SGerd Hoffmann 2578f1ae32a1SGerd Hoffmann reg >>= 2; 2579f1ae32a1SGerd Hoffmann 2580f1ae32a1SGerd Hoffmann if (reg == 0) { 2581f1ae32a1SGerd Hoffmann if (val == 0) { 2582f1ae32a1SGerd Hoffmann xhci_process_commands(xhci); 2583f1ae32a1SGerd Hoffmann } else { 2584f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell 0 write: 0x%x\n", val); 2585f1ae32a1SGerd Hoffmann } 2586f1ae32a1SGerd Hoffmann } else { 2587f1ae32a1SGerd Hoffmann if (reg > MAXSLOTS) { 2588f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell %d\n", reg); 2589f1ae32a1SGerd Hoffmann } else if (val > 31) { 2590f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell %d write: 0x%x\n", reg, val); 2591f1ae32a1SGerd Hoffmann } else { 2592f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, reg, val); 2593f1ae32a1SGerd Hoffmann } 2594f1ae32a1SGerd Hoffmann } 2595f1ae32a1SGerd Hoffmann } 2596f1ae32a1SGerd Hoffmann 2597f1ae32a1SGerd Hoffmann static uint64_t xhci_mem_read(void *ptr, target_phys_addr_t addr, 2598f1ae32a1SGerd Hoffmann unsigned size) 2599f1ae32a1SGerd Hoffmann { 2600f1ae32a1SGerd Hoffmann XHCIState *xhci = ptr; 2601f1ae32a1SGerd Hoffmann 2602f1ae32a1SGerd Hoffmann /* Only aligned reads are allowed on xHCI */ 2603f1ae32a1SGerd Hoffmann if (addr & 3) { 2604f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_read: Mis-aligned read\n"); 2605f1ae32a1SGerd Hoffmann return 0; 2606f1ae32a1SGerd Hoffmann } 2607f1ae32a1SGerd Hoffmann 2608f1ae32a1SGerd Hoffmann if (addr < LEN_CAP) { 2609f1ae32a1SGerd Hoffmann return xhci_cap_read(xhci, addr); 2610f1ae32a1SGerd Hoffmann } else if (addr >= OFF_OPER && addr < (OFF_OPER + LEN_OPER)) { 2611f1ae32a1SGerd Hoffmann return xhci_oper_read(xhci, addr - OFF_OPER); 2612f1ae32a1SGerd Hoffmann } else if (addr >= OFF_RUNTIME && addr < (OFF_RUNTIME + LEN_RUNTIME)) { 2613f1ae32a1SGerd Hoffmann return xhci_runtime_read(xhci, addr - OFF_RUNTIME); 2614f1ae32a1SGerd Hoffmann } else if (addr >= OFF_DOORBELL && addr < (OFF_DOORBELL + LEN_DOORBELL)) { 2615f1ae32a1SGerd Hoffmann return xhci_doorbell_read(xhci, addr - OFF_DOORBELL); 2616f1ae32a1SGerd Hoffmann } else { 2617f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_read: Bad offset %x\n", (int)addr); 2618f1ae32a1SGerd Hoffmann return 0; 2619f1ae32a1SGerd Hoffmann } 2620f1ae32a1SGerd Hoffmann } 2621f1ae32a1SGerd Hoffmann 2622f1ae32a1SGerd Hoffmann static void xhci_mem_write(void *ptr, target_phys_addr_t addr, 2623f1ae32a1SGerd Hoffmann uint64_t val, unsigned size) 2624f1ae32a1SGerd Hoffmann { 2625f1ae32a1SGerd Hoffmann XHCIState *xhci = ptr; 2626f1ae32a1SGerd Hoffmann 2627f1ae32a1SGerd Hoffmann /* Only aligned writes are allowed on xHCI */ 2628f1ae32a1SGerd Hoffmann if (addr & 3) { 2629f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_write: Mis-aligned write\n"); 2630f1ae32a1SGerd Hoffmann return; 2631f1ae32a1SGerd Hoffmann } 2632f1ae32a1SGerd Hoffmann 2633f1ae32a1SGerd Hoffmann if (addr >= OFF_OPER && addr < (OFF_OPER + LEN_OPER)) { 2634f1ae32a1SGerd Hoffmann xhci_oper_write(xhci, addr - OFF_OPER, val); 2635f1ae32a1SGerd Hoffmann } else if (addr >= OFF_RUNTIME && addr < (OFF_RUNTIME + LEN_RUNTIME)) { 2636f1ae32a1SGerd Hoffmann xhci_runtime_write(xhci, addr - OFF_RUNTIME, val); 2637f1ae32a1SGerd Hoffmann } else if (addr >= OFF_DOORBELL && addr < (OFF_DOORBELL + LEN_DOORBELL)) { 2638f1ae32a1SGerd Hoffmann xhci_doorbell_write(xhci, addr - OFF_DOORBELL, val); 2639f1ae32a1SGerd Hoffmann } else { 2640f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_write: Bad offset %x\n", (int)addr); 2641f1ae32a1SGerd Hoffmann } 2642f1ae32a1SGerd Hoffmann } 2643f1ae32a1SGerd Hoffmann 2644f1ae32a1SGerd Hoffmann static const MemoryRegionOps xhci_mem_ops = { 2645f1ae32a1SGerd Hoffmann .read = xhci_mem_read, 2646f1ae32a1SGerd Hoffmann .write = xhci_mem_write, 2647f1ae32a1SGerd Hoffmann .valid.min_access_size = 4, 2648f1ae32a1SGerd Hoffmann .valid.max_access_size = 4, 2649f1ae32a1SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 2650f1ae32a1SGerd Hoffmann }; 2651f1ae32a1SGerd Hoffmann 2652f1ae32a1SGerd Hoffmann static void xhci_attach(USBPort *usbport) 2653f1ae32a1SGerd Hoffmann { 2654f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 2655f1ae32a1SGerd Hoffmann XHCIPort *port = &xhci->ports[usbport->index]; 2656f1ae32a1SGerd Hoffmann 2657f1ae32a1SGerd Hoffmann xhci_update_port(xhci, port, 0); 2658f1ae32a1SGerd Hoffmann } 2659f1ae32a1SGerd Hoffmann 2660f1ae32a1SGerd Hoffmann static void xhci_detach(USBPort *usbport) 2661f1ae32a1SGerd Hoffmann { 2662f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 2663f1ae32a1SGerd Hoffmann XHCIPort *port = &xhci->ports[usbport->index]; 2664f1ae32a1SGerd Hoffmann 2665f1ae32a1SGerd Hoffmann xhci_update_port(xhci, port, 1); 2666f1ae32a1SGerd Hoffmann } 2667f1ae32a1SGerd Hoffmann 2668f1ae32a1SGerd Hoffmann static void xhci_wakeup(USBPort *usbport) 2669f1ae32a1SGerd Hoffmann { 2670f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 2671f1ae32a1SGerd Hoffmann XHCIPort *port = &xhci->ports[usbport->index]; 2672f1ae32a1SGerd Hoffmann int nr = port->port.index + 1; 2673f1ae32a1SGerd Hoffmann XHCIEvent ev = { ER_PORT_STATUS_CHANGE, CC_SUCCESS, nr << 24}; 2674f1ae32a1SGerd Hoffmann uint32_t pls; 2675f1ae32a1SGerd Hoffmann 2676f1ae32a1SGerd Hoffmann pls = (port->portsc >> PORTSC_PLS_SHIFT) & PORTSC_PLS_MASK; 2677f1ae32a1SGerd Hoffmann if (pls != 3) { 2678f1ae32a1SGerd Hoffmann return; 2679f1ae32a1SGerd Hoffmann } 2680f1ae32a1SGerd Hoffmann port->portsc |= 0xf << PORTSC_PLS_SHIFT; 2681f1ae32a1SGerd Hoffmann if (port->portsc & PORTSC_PLC) { 2682f1ae32a1SGerd Hoffmann return; 2683f1ae32a1SGerd Hoffmann } 2684f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_PLC; 2685f1ae32a1SGerd Hoffmann xhci_event(xhci, &ev); 2686f1ae32a1SGerd Hoffmann } 2687f1ae32a1SGerd Hoffmann 2688f1ae32a1SGerd Hoffmann static void xhci_complete(USBPort *port, USBPacket *packet) 2689f1ae32a1SGerd Hoffmann { 2690f1ae32a1SGerd Hoffmann XHCITransfer *xfer = container_of(packet, XHCITransfer, packet); 2691f1ae32a1SGerd Hoffmann 2692f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, packet->result); 2693f1ae32a1SGerd Hoffmann xhci_kick_ep(xfer->xhci, xfer->slotid, xfer->epid); 2694f1ae32a1SGerd Hoffmann } 2695f1ae32a1SGerd Hoffmann 2696f1ae32a1SGerd Hoffmann static void xhci_child_detach(USBPort *port, USBDevice *child) 2697f1ae32a1SGerd Hoffmann { 2698f1ae32a1SGerd Hoffmann FIXME(); 2699f1ae32a1SGerd Hoffmann } 2700f1ae32a1SGerd Hoffmann 2701f1ae32a1SGerd Hoffmann static USBPortOps xhci_port_ops = { 2702f1ae32a1SGerd Hoffmann .attach = xhci_attach, 2703f1ae32a1SGerd Hoffmann .detach = xhci_detach, 2704f1ae32a1SGerd Hoffmann .wakeup = xhci_wakeup, 2705f1ae32a1SGerd Hoffmann .complete = xhci_complete, 2706f1ae32a1SGerd Hoffmann .child_detach = xhci_child_detach, 2707f1ae32a1SGerd Hoffmann }; 2708f1ae32a1SGerd Hoffmann 2709f1ae32a1SGerd Hoffmann static int xhci_find_slotid(XHCIState *xhci, USBDevice *dev) 2710f1ae32a1SGerd Hoffmann { 2711f1ae32a1SGerd Hoffmann XHCISlot *slot; 2712f1ae32a1SGerd Hoffmann int slotid; 2713f1ae32a1SGerd Hoffmann 2714f1ae32a1SGerd Hoffmann for (slotid = 1; slotid <= MAXSLOTS; slotid++) { 2715f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 2716f1ae32a1SGerd Hoffmann if (slot->devaddr == dev->addr) { 2717f1ae32a1SGerd Hoffmann return slotid; 2718f1ae32a1SGerd Hoffmann } 2719f1ae32a1SGerd Hoffmann } 2720f1ae32a1SGerd Hoffmann return 0; 2721f1ae32a1SGerd Hoffmann } 2722f1ae32a1SGerd Hoffmann 2723f1ae32a1SGerd Hoffmann static int xhci_find_epid(USBEndpoint *ep) 2724f1ae32a1SGerd Hoffmann { 2725f1ae32a1SGerd Hoffmann if (ep->nr == 0) { 2726f1ae32a1SGerd Hoffmann return 1; 2727f1ae32a1SGerd Hoffmann } 2728f1ae32a1SGerd Hoffmann if (ep->pid == USB_TOKEN_IN) { 2729f1ae32a1SGerd Hoffmann return ep->nr * 2 + 1; 2730f1ae32a1SGerd Hoffmann } else { 2731f1ae32a1SGerd Hoffmann return ep->nr * 2; 2732f1ae32a1SGerd Hoffmann } 2733f1ae32a1SGerd Hoffmann } 2734f1ae32a1SGerd Hoffmann 2735f1ae32a1SGerd Hoffmann static void xhci_wakeup_endpoint(USBBus *bus, USBEndpoint *ep) 2736f1ae32a1SGerd Hoffmann { 2737f1ae32a1SGerd Hoffmann XHCIState *xhci = container_of(bus, XHCIState, bus); 2738f1ae32a1SGerd Hoffmann int slotid; 2739f1ae32a1SGerd Hoffmann 2740f1ae32a1SGerd Hoffmann DPRINTF("%s\n", __func__); 2741f1ae32a1SGerd Hoffmann slotid = xhci_find_slotid(xhci, ep->dev); 2742f1ae32a1SGerd Hoffmann if (slotid == 0 || !xhci->slots[slotid-1].enabled) { 2743f1ae32a1SGerd Hoffmann DPRINTF("%s: oops, no slot for dev %d\n", __func__, ep->dev->addr); 2744f1ae32a1SGerd Hoffmann return; 2745f1ae32a1SGerd Hoffmann } 2746f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, slotid, xhci_find_epid(ep)); 2747f1ae32a1SGerd Hoffmann } 2748f1ae32a1SGerd Hoffmann 2749f1ae32a1SGerd Hoffmann static USBBusOps xhci_bus_ops = { 2750f1ae32a1SGerd Hoffmann .wakeup_endpoint = xhci_wakeup_endpoint, 2751f1ae32a1SGerd Hoffmann }; 2752f1ae32a1SGerd Hoffmann 2753f1ae32a1SGerd Hoffmann static void usb_xhci_init(XHCIState *xhci, DeviceState *dev) 2754f1ae32a1SGerd Hoffmann { 2755f1ae32a1SGerd Hoffmann int i; 2756f1ae32a1SGerd Hoffmann 2757f1ae32a1SGerd Hoffmann xhci->usbsts = USBSTS_HCH; 2758f1ae32a1SGerd Hoffmann 2759f1ae32a1SGerd Hoffmann usb_bus_new(&xhci->bus, &xhci_bus_ops, &xhci->pci_dev.qdev); 2760f1ae32a1SGerd Hoffmann 2761f1ae32a1SGerd Hoffmann for (i = 0; i < MAXPORTS; i++) { 2762f1ae32a1SGerd Hoffmann memset(&xhci->ports[i], 0, sizeof(xhci->ports[i])); 2763f1ae32a1SGerd Hoffmann usb_register_port(&xhci->bus, &xhci->ports[i].port, xhci, i, 2764f1ae32a1SGerd Hoffmann &xhci_port_ops, 2765f1ae32a1SGerd Hoffmann USB_SPEED_MASK_LOW | 2766f1ae32a1SGerd Hoffmann USB_SPEED_MASK_FULL | 2767f1ae32a1SGerd Hoffmann USB_SPEED_MASK_HIGH); 2768f1ae32a1SGerd Hoffmann } 2769f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 2770f1ae32a1SGerd Hoffmann xhci->slots[i].enabled = 0; 2771f1ae32a1SGerd Hoffmann } 2772f1ae32a1SGerd Hoffmann } 2773f1ae32a1SGerd Hoffmann 2774f1ae32a1SGerd Hoffmann static int usb_xhci_initfn(struct PCIDevice *dev) 2775f1ae32a1SGerd Hoffmann { 2776f1ae32a1SGerd Hoffmann int ret; 2777f1ae32a1SGerd Hoffmann 2778f1ae32a1SGerd Hoffmann XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev, dev); 2779f1ae32a1SGerd Hoffmann 2780f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_CLASS_PROG] = 0x30; /* xHCI */ 2781f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */ 2782f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_CACHE_LINE_SIZE] = 0x10; 2783f1ae32a1SGerd Hoffmann xhci->pci_dev.config[0x60] = 0x30; /* release number */ 2784f1ae32a1SGerd Hoffmann 2785f1ae32a1SGerd Hoffmann usb_xhci_init(xhci, &dev->qdev); 2786f1ae32a1SGerd Hoffmann 278701546fa6SGerd Hoffmann xhci->mfwrap_timer = qemu_new_timer_ns(vm_clock, xhci_mfwrap_timer, xhci); 278801546fa6SGerd Hoffmann 2789f1ae32a1SGerd Hoffmann xhci->irq = xhci->pci_dev.irq[0]; 2790f1ae32a1SGerd Hoffmann 2791f1ae32a1SGerd Hoffmann memory_region_init_io(&xhci->mem, &xhci_mem_ops, xhci, 2792f1ae32a1SGerd Hoffmann "xhci", LEN_REGS); 2793f1ae32a1SGerd Hoffmann pci_register_bar(&xhci->pci_dev, 0, 2794f1ae32a1SGerd Hoffmann PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64, 2795f1ae32a1SGerd Hoffmann &xhci->mem); 2796f1ae32a1SGerd Hoffmann 2797f1ae32a1SGerd Hoffmann ret = pcie_cap_init(&xhci->pci_dev, 0xa0, PCI_EXP_TYPE_ENDPOINT, 0); 2798f1ae32a1SGerd Hoffmann assert(ret >= 0); 2799f1ae32a1SGerd Hoffmann 2800f1ae32a1SGerd Hoffmann if (xhci->msi) { 2801f1ae32a1SGerd Hoffmann ret = msi_init(&xhci->pci_dev, 0x70, 1, true, false); 2802f1ae32a1SGerd Hoffmann assert(ret >= 0); 2803f1ae32a1SGerd Hoffmann } 2804f1ae32a1SGerd Hoffmann 2805f1ae32a1SGerd Hoffmann return 0; 2806f1ae32a1SGerd Hoffmann } 2807f1ae32a1SGerd Hoffmann 2808f1ae32a1SGerd Hoffmann static void xhci_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, 2809f1ae32a1SGerd Hoffmann int len) 2810f1ae32a1SGerd Hoffmann { 2811f1ae32a1SGerd Hoffmann XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev, dev); 2812f1ae32a1SGerd Hoffmann 2813f1ae32a1SGerd Hoffmann pci_default_write_config(dev, addr, val, len); 2814f1ae32a1SGerd Hoffmann if (xhci->msi) { 2815f1ae32a1SGerd Hoffmann msi_write_config(dev, addr, val, len); 2816f1ae32a1SGerd Hoffmann } 2817f1ae32a1SGerd Hoffmann } 2818f1ae32a1SGerd Hoffmann 2819f1ae32a1SGerd Hoffmann static const VMStateDescription vmstate_xhci = { 2820f1ae32a1SGerd Hoffmann .name = "xhci", 2821f1ae32a1SGerd Hoffmann .unmigratable = 1, 2822f1ae32a1SGerd Hoffmann }; 2823f1ae32a1SGerd Hoffmann 2824f1ae32a1SGerd Hoffmann static Property xhci_properties[] = { 2825f1ae32a1SGerd Hoffmann DEFINE_PROP_UINT32("msi", XHCIState, msi, 0), 2826f1ae32a1SGerd Hoffmann DEFINE_PROP_END_OF_LIST(), 2827f1ae32a1SGerd Hoffmann }; 2828f1ae32a1SGerd Hoffmann 2829f1ae32a1SGerd Hoffmann static void xhci_class_init(ObjectClass *klass, void *data) 2830f1ae32a1SGerd Hoffmann { 2831f1ae32a1SGerd Hoffmann PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2832f1ae32a1SGerd Hoffmann DeviceClass *dc = DEVICE_CLASS(klass); 2833f1ae32a1SGerd Hoffmann 2834f1ae32a1SGerd Hoffmann dc->vmsd = &vmstate_xhci; 2835f1ae32a1SGerd Hoffmann dc->props = xhci_properties; 283664619739SJan Kiszka dc->reset = xhci_reset; 2837f1ae32a1SGerd Hoffmann k->init = usb_xhci_initfn; 2838f1ae32a1SGerd Hoffmann k->vendor_id = PCI_VENDOR_ID_NEC; 2839f1ae32a1SGerd Hoffmann k->device_id = PCI_DEVICE_ID_NEC_UPD720200; 2840f1ae32a1SGerd Hoffmann k->class_id = PCI_CLASS_SERIAL_USB; 2841f1ae32a1SGerd Hoffmann k->revision = 0x03; 2842f1ae32a1SGerd Hoffmann k->is_express = 1; 2843f1ae32a1SGerd Hoffmann k->config_write = xhci_write_config; 2844f1ae32a1SGerd Hoffmann } 2845f1ae32a1SGerd Hoffmann 2846f1ae32a1SGerd Hoffmann static TypeInfo xhci_info = { 2847f1ae32a1SGerd Hoffmann .name = "nec-usb-xhci", 2848f1ae32a1SGerd Hoffmann .parent = TYPE_PCI_DEVICE, 2849f1ae32a1SGerd Hoffmann .instance_size = sizeof(XHCIState), 2850f1ae32a1SGerd Hoffmann .class_init = xhci_class_init, 2851f1ae32a1SGerd Hoffmann }; 2852f1ae32a1SGerd Hoffmann 2853f1ae32a1SGerd Hoffmann static void xhci_register_types(void) 2854f1ae32a1SGerd Hoffmann { 2855f1ae32a1SGerd Hoffmann type_register_static(&xhci_info); 2856f1ae32a1SGerd Hoffmann } 2857f1ae32a1SGerd Hoffmann 2858f1ae32a1SGerd Hoffmann type_init(xhci_register_types) 2859