1f1ae32a1SGerd Hoffmann /* 2f1ae32a1SGerd Hoffmann * USB xHCI controller emulation 3f1ae32a1SGerd Hoffmann * 4f1ae32a1SGerd Hoffmann * Copyright (c) 2011 Securiforest 5f1ae32a1SGerd Hoffmann * Date: 2011-05-11 ; Author: Hector Martin <hector@marcansoft.com> 6f1ae32a1SGerd Hoffmann * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 7f1ae32a1SGerd Hoffmann * 8f1ae32a1SGerd Hoffmann * This library is free software; you can redistribute it and/or 9f1ae32a1SGerd Hoffmann * modify it under the terms of the GNU Lesser General Public 10f1ae32a1SGerd Hoffmann * License as published by the Free Software Foundation; either 11f1ae32a1SGerd Hoffmann * version 2 of the License, or (at your option) any later version. 12f1ae32a1SGerd Hoffmann * 13f1ae32a1SGerd Hoffmann * This library is distributed in the hope that it will be useful, 14f1ae32a1SGerd Hoffmann * but WITHOUT ANY WARRANTY; without even the implied warranty of 15f1ae32a1SGerd Hoffmann * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16f1ae32a1SGerd Hoffmann * Lesser General Public License for more details. 17f1ae32a1SGerd Hoffmann * 18f1ae32a1SGerd Hoffmann * You should have received a copy of the GNU Lesser General Public 19f1ae32a1SGerd Hoffmann * License along with this library; if not, see <http://www.gnu.org/licenses/>. 20f1ae32a1SGerd Hoffmann */ 21f1ae32a1SGerd Hoffmann #include "hw/hw.h" 221de7afc9SPaolo Bonzini #include "qemu/timer.h" 23f1ae32a1SGerd Hoffmann #include "hw/usb.h" 24a2cb15b0SMichael S. Tsirkin #include "hw/pci/pci.h" 25a2cb15b0SMichael S. Tsirkin #include "hw/pci/msi.h" 26a2cb15b0SMichael S. Tsirkin #include "hw/pci/msix.h" 272d754a10SGerd Hoffmann #include "trace.h" 28f1ae32a1SGerd Hoffmann 29f1ae32a1SGerd Hoffmann //#define DEBUG_XHCI 30f1ae32a1SGerd Hoffmann //#define DEBUG_DATA 31f1ae32a1SGerd Hoffmann 32f1ae32a1SGerd Hoffmann #ifdef DEBUG_XHCI 33f1ae32a1SGerd Hoffmann #define DPRINTF(...) fprintf(stderr, __VA_ARGS__) 34f1ae32a1SGerd Hoffmann #else 35f1ae32a1SGerd Hoffmann #define DPRINTF(...) do {} while (0) 36f1ae32a1SGerd Hoffmann #endif 37024426acSGerd Hoffmann #define FIXME(_msg) do { fprintf(stderr, "FIXME %s:%d %s\n", \ 38024426acSGerd Hoffmann __func__, __LINE__, _msg); abort(); } while (0) 39f1ae32a1SGerd Hoffmann 40d95e74eaSGerd Hoffmann #define MAXPORTS_2 15 41d95e74eaSGerd Hoffmann #define MAXPORTS_3 15 42f1ae32a1SGerd Hoffmann 430846e635SGerd Hoffmann #define MAXPORTS (MAXPORTS_2+MAXPORTS_3) 44d95e74eaSGerd Hoffmann #define MAXSLOTS 64 45d95e74eaSGerd Hoffmann #define MAXINTRS 16 46f1ae32a1SGerd Hoffmann 47f1ae32a1SGerd Hoffmann #define TD_QUEUE 24 48f1ae32a1SGerd Hoffmann 49f1ae32a1SGerd Hoffmann /* Very pessimistic, let's hope it's enough for all cases */ 50f1ae32a1SGerd Hoffmann #define EV_QUEUE (((3*TD_QUEUE)+16)*MAXSLOTS) 51f1ae32a1SGerd Hoffmann /* Do not deliver ER Full events. NEC's driver does some things not bound 52f1ae32a1SGerd Hoffmann * to the specs when it gets them */ 53f1ae32a1SGerd Hoffmann #define ER_FULL_HACK 54f1ae32a1SGerd Hoffmann 55f1ae32a1SGerd Hoffmann #define LEN_CAP 0x40 56f1ae32a1SGerd Hoffmann #define LEN_OPER (0x400 + 0x10 * MAXPORTS) 57106b214cSGerd Hoffmann #define LEN_RUNTIME ((MAXINTRS + 1) * 0x20) 58f1ae32a1SGerd Hoffmann #define LEN_DOORBELL ((MAXSLOTS + 1) * 0x20) 59f1ae32a1SGerd Hoffmann 60106b214cSGerd Hoffmann #define OFF_OPER LEN_CAP 61106b214cSGerd Hoffmann #define OFF_RUNTIME 0x1000 62106b214cSGerd Hoffmann #define OFF_DOORBELL 0x2000 634c47f800SGerd Hoffmann #define OFF_MSIX_TABLE 0x3000 644c47f800SGerd Hoffmann #define OFF_MSIX_PBA 0x3800 65f1ae32a1SGerd Hoffmann /* must be power of 2 */ 66106b214cSGerd Hoffmann #define LEN_REGS 0x4000 67f1ae32a1SGerd Hoffmann 68106b214cSGerd Hoffmann #if (OFF_OPER + LEN_OPER) > OFF_RUNTIME 69106b214cSGerd Hoffmann #error Increase OFF_RUNTIME 70106b214cSGerd Hoffmann #endif 71106b214cSGerd Hoffmann #if (OFF_RUNTIME + LEN_RUNTIME) > OFF_DOORBELL 72106b214cSGerd Hoffmann #error Increase OFF_DOORBELL 73106b214cSGerd Hoffmann #endif 74f1ae32a1SGerd Hoffmann #if (OFF_DOORBELL + LEN_DOORBELL) > LEN_REGS 75f1ae32a1SGerd Hoffmann # error Increase LEN_REGS 76f1ae32a1SGerd Hoffmann #endif 77f1ae32a1SGerd Hoffmann 78f1ae32a1SGerd Hoffmann /* bit definitions */ 79f1ae32a1SGerd Hoffmann #define USBCMD_RS (1<<0) 80f1ae32a1SGerd Hoffmann #define USBCMD_HCRST (1<<1) 81f1ae32a1SGerd Hoffmann #define USBCMD_INTE (1<<2) 82f1ae32a1SGerd Hoffmann #define USBCMD_HSEE (1<<3) 83f1ae32a1SGerd Hoffmann #define USBCMD_LHCRST (1<<7) 84f1ae32a1SGerd Hoffmann #define USBCMD_CSS (1<<8) 85f1ae32a1SGerd Hoffmann #define USBCMD_CRS (1<<9) 86f1ae32a1SGerd Hoffmann #define USBCMD_EWE (1<<10) 87f1ae32a1SGerd Hoffmann #define USBCMD_EU3S (1<<11) 88f1ae32a1SGerd Hoffmann 89f1ae32a1SGerd Hoffmann #define USBSTS_HCH (1<<0) 90f1ae32a1SGerd Hoffmann #define USBSTS_HSE (1<<2) 91f1ae32a1SGerd Hoffmann #define USBSTS_EINT (1<<3) 92f1ae32a1SGerd Hoffmann #define USBSTS_PCD (1<<4) 93f1ae32a1SGerd Hoffmann #define USBSTS_SSS (1<<8) 94f1ae32a1SGerd Hoffmann #define USBSTS_RSS (1<<9) 95f1ae32a1SGerd Hoffmann #define USBSTS_SRE (1<<10) 96f1ae32a1SGerd Hoffmann #define USBSTS_CNR (1<<11) 97f1ae32a1SGerd Hoffmann #define USBSTS_HCE (1<<12) 98f1ae32a1SGerd Hoffmann 99f1ae32a1SGerd Hoffmann 100f1ae32a1SGerd Hoffmann #define PORTSC_CCS (1<<0) 101f1ae32a1SGerd Hoffmann #define PORTSC_PED (1<<1) 102f1ae32a1SGerd Hoffmann #define PORTSC_OCA (1<<3) 103f1ae32a1SGerd Hoffmann #define PORTSC_PR (1<<4) 104f1ae32a1SGerd Hoffmann #define PORTSC_PLS_SHIFT 5 105f1ae32a1SGerd Hoffmann #define PORTSC_PLS_MASK 0xf 106f1ae32a1SGerd Hoffmann #define PORTSC_PP (1<<9) 107f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_SHIFT 10 108f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_MASK 0xf 109f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_FULL (1<<10) 110f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_LOW (2<<10) 111f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_HIGH (3<<10) 112f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_SUPER (4<<10) 113f1ae32a1SGerd Hoffmann #define PORTSC_PIC_SHIFT 14 114f1ae32a1SGerd Hoffmann #define PORTSC_PIC_MASK 0x3 115f1ae32a1SGerd Hoffmann #define PORTSC_LWS (1<<16) 116f1ae32a1SGerd Hoffmann #define PORTSC_CSC (1<<17) 117f1ae32a1SGerd Hoffmann #define PORTSC_PEC (1<<18) 118f1ae32a1SGerd Hoffmann #define PORTSC_WRC (1<<19) 119f1ae32a1SGerd Hoffmann #define PORTSC_OCC (1<<20) 120f1ae32a1SGerd Hoffmann #define PORTSC_PRC (1<<21) 121f1ae32a1SGerd Hoffmann #define PORTSC_PLC (1<<22) 122f1ae32a1SGerd Hoffmann #define PORTSC_CEC (1<<23) 123f1ae32a1SGerd Hoffmann #define PORTSC_CAS (1<<24) 124f1ae32a1SGerd Hoffmann #define PORTSC_WCE (1<<25) 125f1ae32a1SGerd Hoffmann #define PORTSC_WDE (1<<26) 126f1ae32a1SGerd Hoffmann #define PORTSC_WOE (1<<27) 127f1ae32a1SGerd Hoffmann #define PORTSC_DR (1<<30) 128f1ae32a1SGerd Hoffmann #define PORTSC_WPR (1<<31) 129f1ae32a1SGerd Hoffmann 130f1ae32a1SGerd Hoffmann #define CRCR_RCS (1<<0) 131f1ae32a1SGerd Hoffmann #define CRCR_CS (1<<1) 132f1ae32a1SGerd Hoffmann #define CRCR_CA (1<<2) 133f1ae32a1SGerd Hoffmann #define CRCR_CRR (1<<3) 134f1ae32a1SGerd Hoffmann 135f1ae32a1SGerd Hoffmann #define IMAN_IP (1<<0) 136f1ae32a1SGerd Hoffmann #define IMAN_IE (1<<1) 137f1ae32a1SGerd Hoffmann 138f1ae32a1SGerd Hoffmann #define ERDP_EHB (1<<3) 139f1ae32a1SGerd Hoffmann 140f1ae32a1SGerd Hoffmann #define TRB_SIZE 16 141f1ae32a1SGerd Hoffmann typedef struct XHCITRB { 142f1ae32a1SGerd Hoffmann uint64_t parameter; 143f1ae32a1SGerd Hoffmann uint32_t status; 144f1ae32a1SGerd Hoffmann uint32_t control; 14559a70ccdSDavid Gibson dma_addr_t addr; 146f1ae32a1SGerd Hoffmann bool ccs; 147f1ae32a1SGerd Hoffmann } XHCITRB; 148f1ae32a1SGerd Hoffmann 14985e05d82SGerd Hoffmann enum { 15085e05d82SGerd Hoffmann PLS_U0 = 0, 15185e05d82SGerd Hoffmann PLS_U1 = 1, 15285e05d82SGerd Hoffmann PLS_U2 = 2, 15385e05d82SGerd Hoffmann PLS_U3 = 3, 15485e05d82SGerd Hoffmann PLS_DISABLED = 4, 15585e05d82SGerd Hoffmann PLS_RX_DETECT = 5, 15685e05d82SGerd Hoffmann PLS_INACTIVE = 6, 15785e05d82SGerd Hoffmann PLS_POLLING = 7, 15885e05d82SGerd Hoffmann PLS_RECOVERY = 8, 15985e05d82SGerd Hoffmann PLS_HOT_RESET = 9, 16085e05d82SGerd Hoffmann PLS_COMPILANCE_MODE = 10, 16185e05d82SGerd Hoffmann PLS_TEST_MODE = 11, 16285e05d82SGerd Hoffmann PLS_RESUME = 15, 16385e05d82SGerd Hoffmann }; 164f1ae32a1SGerd Hoffmann 165f1ae32a1SGerd Hoffmann typedef enum TRBType { 166f1ae32a1SGerd Hoffmann TRB_RESERVED = 0, 167f1ae32a1SGerd Hoffmann TR_NORMAL, 168f1ae32a1SGerd Hoffmann TR_SETUP, 169f1ae32a1SGerd Hoffmann TR_DATA, 170f1ae32a1SGerd Hoffmann TR_STATUS, 171f1ae32a1SGerd Hoffmann TR_ISOCH, 172f1ae32a1SGerd Hoffmann TR_LINK, 173f1ae32a1SGerd Hoffmann TR_EVDATA, 174f1ae32a1SGerd Hoffmann TR_NOOP, 175f1ae32a1SGerd Hoffmann CR_ENABLE_SLOT, 176f1ae32a1SGerd Hoffmann CR_DISABLE_SLOT, 177f1ae32a1SGerd Hoffmann CR_ADDRESS_DEVICE, 178f1ae32a1SGerd Hoffmann CR_CONFIGURE_ENDPOINT, 179f1ae32a1SGerd Hoffmann CR_EVALUATE_CONTEXT, 180f1ae32a1SGerd Hoffmann CR_RESET_ENDPOINT, 181f1ae32a1SGerd Hoffmann CR_STOP_ENDPOINT, 182f1ae32a1SGerd Hoffmann CR_SET_TR_DEQUEUE, 183f1ae32a1SGerd Hoffmann CR_RESET_DEVICE, 184f1ae32a1SGerd Hoffmann CR_FORCE_EVENT, 185f1ae32a1SGerd Hoffmann CR_NEGOTIATE_BW, 186f1ae32a1SGerd Hoffmann CR_SET_LATENCY_TOLERANCE, 187f1ae32a1SGerd Hoffmann CR_GET_PORT_BANDWIDTH, 188f1ae32a1SGerd Hoffmann CR_FORCE_HEADER, 189f1ae32a1SGerd Hoffmann CR_NOOP, 190f1ae32a1SGerd Hoffmann ER_TRANSFER = 32, 191f1ae32a1SGerd Hoffmann ER_COMMAND_COMPLETE, 192f1ae32a1SGerd Hoffmann ER_PORT_STATUS_CHANGE, 193f1ae32a1SGerd Hoffmann ER_BANDWIDTH_REQUEST, 194f1ae32a1SGerd Hoffmann ER_DOORBELL, 195f1ae32a1SGerd Hoffmann ER_HOST_CONTROLLER, 196f1ae32a1SGerd Hoffmann ER_DEVICE_NOTIFICATION, 197f1ae32a1SGerd Hoffmann ER_MFINDEX_WRAP, 198f1ae32a1SGerd Hoffmann /* vendor specific bits */ 199f1ae32a1SGerd Hoffmann CR_VENDOR_VIA_CHALLENGE_RESPONSE = 48, 200f1ae32a1SGerd Hoffmann CR_VENDOR_NEC_FIRMWARE_REVISION = 49, 201f1ae32a1SGerd Hoffmann CR_VENDOR_NEC_CHALLENGE_RESPONSE = 50, 202f1ae32a1SGerd Hoffmann } TRBType; 203f1ae32a1SGerd Hoffmann 204f1ae32a1SGerd Hoffmann #define CR_LINK TR_LINK 205f1ae32a1SGerd Hoffmann 206f1ae32a1SGerd Hoffmann typedef enum TRBCCode { 207f1ae32a1SGerd Hoffmann CC_INVALID = 0, 208f1ae32a1SGerd Hoffmann CC_SUCCESS, 209f1ae32a1SGerd Hoffmann CC_DATA_BUFFER_ERROR, 210f1ae32a1SGerd Hoffmann CC_BABBLE_DETECTED, 211f1ae32a1SGerd Hoffmann CC_USB_TRANSACTION_ERROR, 212f1ae32a1SGerd Hoffmann CC_TRB_ERROR, 213f1ae32a1SGerd Hoffmann CC_STALL_ERROR, 214f1ae32a1SGerd Hoffmann CC_RESOURCE_ERROR, 215f1ae32a1SGerd Hoffmann CC_BANDWIDTH_ERROR, 216f1ae32a1SGerd Hoffmann CC_NO_SLOTS_ERROR, 217f1ae32a1SGerd Hoffmann CC_INVALID_STREAM_TYPE_ERROR, 218f1ae32a1SGerd Hoffmann CC_SLOT_NOT_ENABLED_ERROR, 219f1ae32a1SGerd Hoffmann CC_EP_NOT_ENABLED_ERROR, 220f1ae32a1SGerd Hoffmann CC_SHORT_PACKET, 221f1ae32a1SGerd Hoffmann CC_RING_UNDERRUN, 222f1ae32a1SGerd Hoffmann CC_RING_OVERRUN, 223f1ae32a1SGerd Hoffmann CC_VF_ER_FULL, 224f1ae32a1SGerd Hoffmann CC_PARAMETER_ERROR, 225f1ae32a1SGerd Hoffmann CC_BANDWIDTH_OVERRUN, 226f1ae32a1SGerd Hoffmann CC_CONTEXT_STATE_ERROR, 227f1ae32a1SGerd Hoffmann CC_NO_PING_RESPONSE_ERROR, 228f1ae32a1SGerd Hoffmann CC_EVENT_RING_FULL_ERROR, 229f1ae32a1SGerd Hoffmann CC_INCOMPATIBLE_DEVICE_ERROR, 230f1ae32a1SGerd Hoffmann CC_MISSED_SERVICE_ERROR, 231f1ae32a1SGerd Hoffmann CC_COMMAND_RING_STOPPED, 232f1ae32a1SGerd Hoffmann CC_COMMAND_ABORTED, 233f1ae32a1SGerd Hoffmann CC_STOPPED, 234f1ae32a1SGerd Hoffmann CC_STOPPED_LENGTH_INVALID, 235f1ae32a1SGerd Hoffmann CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29, 236f1ae32a1SGerd Hoffmann CC_ISOCH_BUFFER_OVERRUN = 31, 237f1ae32a1SGerd Hoffmann CC_EVENT_LOST_ERROR, 238f1ae32a1SGerd Hoffmann CC_UNDEFINED_ERROR, 239f1ae32a1SGerd Hoffmann CC_INVALID_STREAM_ID_ERROR, 240f1ae32a1SGerd Hoffmann CC_SECONDARY_BANDWIDTH_ERROR, 241f1ae32a1SGerd Hoffmann CC_SPLIT_TRANSACTION_ERROR 242f1ae32a1SGerd Hoffmann } TRBCCode; 243f1ae32a1SGerd Hoffmann 244f1ae32a1SGerd Hoffmann #define TRB_C (1<<0) 245f1ae32a1SGerd Hoffmann #define TRB_TYPE_SHIFT 10 246f1ae32a1SGerd Hoffmann #define TRB_TYPE_MASK 0x3f 247f1ae32a1SGerd Hoffmann #define TRB_TYPE(t) (((t).control >> TRB_TYPE_SHIFT) & TRB_TYPE_MASK) 248f1ae32a1SGerd Hoffmann 249f1ae32a1SGerd Hoffmann #define TRB_EV_ED (1<<2) 250f1ae32a1SGerd Hoffmann 251f1ae32a1SGerd Hoffmann #define TRB_TR_ENT (1<<1) 252f1ae32a1SGerd Hoffmann #define TRB_TR_ISP (1<<2) 253f1ae32a1SGerd Hoffmann #define TRB_TR_NS (1<<3) 254f1ae32a1SGerd Hoffmann #define TRB_TR_CH (1<<4) 255f1ae32a1SGerd Hoffmann #define TRB_TR_IOC (1<<5) 256f1ae32a1SGerd Hoffmann #define TRB_TR_IDT (1<<6) 257f1ae32a1SGerd Hoffmann #define TRB_TR_TBC_SHIFT 7 258f1ae32a1SGerd Hoffmann #define TRB_TR_TBC_MASK 0x3 259f1ae32a1SGerd Hoffmann #define TRB_TR_BEI (1<<9) 260f1ae32a1SGerd Hoffmann #define TRB_TR_TLBPC_SHIFT 16 261f1ae32a1SGerd Hoffmann #define TRB_TR_TLBPC_MASK 0xf 262f1ae32a1SGerd Hoffmann #define TRB_TR_FRAMEID_SHIFT 20 263f1ae32a1SGerd Hoffmann #define TRB_TR_FRAMEID_MASK 0x7ff 264f1ae32a1SGerd Hoffmann #define TRB_TR_SIA (1<<31) 265f1ae32a1SGerd Hoffmann 266f1ae32a1SGerd Hoffmann #define TRB_TR_DIR (1<<16) 267f1ae32a1SGerd Hoffmann 268f1ae32a1SGerd Hoffmann #define TRB_CR_SLOTID_SHIFT 24 269f1ae32a1SGerd Hoffmann #define TRB_CR_SLOTID_MASK 0xff 270f1ae32a1SGerd Hoffmann #define TRB_CR_EPID_SHIFT 16 271f1ae32a1SGerd Hoffmann #define TRB_CR_EPID_MASK 0x1f 272f1ae32a1SGerd Hoffmann 273f1ae32a1SGerd Hoffmann #define TRB_CR_BSR (1<<9) 274f1ae32a1SGerd Hoffmann #define TRB_CR_DC (1<<9) 275f1ae32a1SGerd Hoffmann 276f1ae32a1SGerd Hoffmann #define TRB_LK_TC (1<<1) 277f1ae32a1SGerd Hoffmann 2782d1de850SGerd Hoffmann #define TRB_INTR_SHIFT 22 2792d1de850SGerd Hoffmann #define TRB_INTR_MASK 0x3ff 2802d1de850SGerd Hoffmann #define TRB_INTR(t) (((t).status >> TRB_INTR_SHIFT) & TRB_INTR_MASK) 2812d1de850SGerd Hoffmann 282f1ae32a1SGerd Hoffmann #define EP_TYPE_MASK 0x7 283f1ae32a1SGerd Hoffmann #define EP_TYPE_SHIFT 3 284f1ae32a1SGerd Hoffmann 285f1ae32a1SGerd Hoffmann #define EP_STATE_MASK 0x7 286f1ae32a1SGerd Hoffmann #define EP_DISABLED (0<<0) 287f1ae32a1SGerd Hoffmann #define EP_RUNNING (1<<0) 288f1ae32a1SGerd Hoffmann #define EP_HALTED (2<<0) 289f1ae32a1SGerd Hoffmann #define EP_STOPPED (3<<0) 290f1ae32a1SGerd Hoffmann #define EP_ERROR (4<<0) 291f1ae32a1SGerd Hoffmann 292f1ae32a1SGerd Hoffmann #define SLOT_STATE_MASK 0x1f 293f1ae32a1SGerd Hoffmann #define SLOT_STATE_SHIFT 27 294f1ae32a1SGerd Hoffmann #define SLOT_STATE(s) (((s)>>SLOT_STATE_SHIFT)&SLOT_STATE_MASK) 295f1ae32a1SGerd Hoffmann #define SLOT_ENABLED 0 296f1ae32a1SGerd Hoffmann #define SLOT_DEFAULT 1 297f1ae32a1SGerd Hoffmann #define SLOT_ADDRESSED 2 298f1ae32a1SGerd Hoffmann #define SLOT_CONFIGURED 3 299f1ae32a1SGerd Hoffmann 300f1ae32a1SGerd Hoffmann #define SLOT_CONTEXT_ENTRIES_MASK 0x1f 301f1ae32a1SGerd Hoffmann #define SLOT_CONTEXT_ENTRIES_SHIFT 27 302f1ae32a1SGerd Hoffmann 3031d8a4e69SGerd Hoffmann typedef struct XHCIState XHCIState; 304024426acSGerd Hoffmann typedef struct XHCIStreamContext XHCIStreamContext; 305024426acSGerd Hoffmann typedef struct XHCIEPContext XHCIEPContext; 3061d8a4e69SGerd Hoffmann 30785e05d82SGerd Hoffmann #define get_field(data, field) \ 30885e05d82SGerd Hoffmann (((data) >> field##_SHIFT) & field##_MASK) 30985e05d82SGerd Hoffmann 31085e05d82SGerd Hoffmann #define set_field(data, newval, field) do { \ 31185e05d82SGerd Hoffmann uint32_t val = *data; \ 31285e05d82SGerd Hoffmann val &= ~(field##_MASK << field##_SHIFT); \ 31385e05d82SGerd Hoffmann val |= ((newval) & field##_MASK) << field##_SHIFT; \ 31485e05d82SGerd Hoffmann *data = val; \ 31585e05d82SGerd Hoffmann } while (0) 31685e05d82SGerd Hoffmann 317f1ae32a1SGerd Hoffmann typedef enum EPType { 318f1ae32a1SGerd Hoffmann ET_INVALID = 0, 319f1ae32a1SGerd Hoffmann ET_ISO_OUT, 320f1ae32a1SGerd Hoffmann ET_BULK_OUT, 321f1ae32a1SGerd Hoffmann ET_INTR_OUT, 322f1ae32a1SGerd Hoffmann ET_CONTROL, 323f1ae32a1SGerd Hoffmann ET_ISO_IN, 324f1ae32a1SGerd Hoffmann ET_BULK_IN, 325f1ae32a1SGerd Hoffmann ET_INTR_IN, 326f1ae32a1SGerd Hoffmann } EPType; 327f1ae32a1SGerd Hoffmann 328f1ae32a1SGerd Hoffmann typedef struct XHCIRing { 32959a70ccdSDavid Gibson dma_addr_t dequeue; 330f1ae32a1SGerd Hoffmann bool ccs; 331f1ae32a1SGerd Hoffmann } XHCIRing; 332f1ae32a1SGerd Hoffmann 333f1ae32a1SGerd Hoffmann typedef struct XHCIPort { 3341d8a4e69SGerd Hoffmann XHCIState *xhci; 335f1ae32a1SGerd Hoffmann uint32_t portsc; 3360846e635SGerd Hoffmann uint32_t portnr; 3370846e635SGerd Hoffmann USBPort *uport; 3380846e635SGerd Hoffmann uint32_t speedmask; 3391d8a4e69SGerd Hoffmann char name[16]; 3401d8a4e69SGerd Hoffmann MemoryRegion mem; 341f1ae32a1SGerd Hoffmann } XHCIPort; 342f1ae32a1SGerd Hoffmann 343f1ae32a1SGerd Hoffmann typedef struct XHCITransfer { 344f1ae32a1SGerd Hoffmann XHCIState *xhci; 345f1ae32a1SGerd Hoffmann USBPacket packet; 346d5a15814SGerd Hoffmann QEMUSGList sgl; 347f1ae32a1SGerd Hoffmann bool running_async; 348f1ae32a1SGerd Hoffmann bool running_retry; 349f1ae32a1SGerd Hoffmann bool cancelled; 350f1ae32a1SGerd Hoffmann bool complete; 351a6fb2ddbSHans de Goede bool int_req; 352f1ae32a1SGerd Hoffmann unsigned int iso_pkts; 353f1ae32a1SGerd Hoffmann unsigned int slotid; 354f1ae32a1SGerd Hoffmann unsigned int epid; 355024426acSGerd Hoffmann unsigned int streamid; 356f1ae32a1SGerd Hoffmann bool in_xfer; 357f1ae32a1SGerd Hoffmann bool iso_xfer; 358f1ae32a1SGerd Hoffmann 359f1ae32a1SGerd Hoffmann unsigned int trb_count; 360f1ae32a1SGerd Hoffmann unsigned int trb_alloced; 361f1ae32a1SGerd Hoffmann XHCITRB *trbs; 362f1ae32a1SGerd Hoffmann 363f1ae32a1SGerd Hoffmann TRBCCode status; 364f1ae32a1SGerd Hoffmann 365f1ae32a1SGerd Hoffmann unsigned int pkts; 366f1ae32a1SGerd Hoffmann unsigned int pktsize; 367f1ae32a1SGerd Hoffmann unsigned int cur_pkt; 3683d139684SGerd Hoffmann 3693d139684SGerd Hoffmann uint64_t mfindex_kick; 370f1ae32a1SGerd Hoffmann } XHCITransfer; 371f1ae32a1SGerd Hoffmann 372024426acSGerd Hoffmann struct XHCIStreamContext { 373024426acSGerd Hoffmann dma_addr_t pctx; 374024426acSGerd Hoffmann unsigned int sct; 375024426acSGerd Hoffmann XHCIRing ring; 376024426acSGerd Hoffmann XHCIStreamContext *sstreams; 377024426acSGerd Hoffmann }; 378024426acSGerd Hoffmann 379024426acSGerd Hoffmann struct XHCIEPContext { 3803d139684SGerd Hoffmann XHCIState *xhci; 3813d139684SGerd Hoffmann unsigned int slotid; 3823d139684SGerd Hoffmann unsigned int epid; 3833d139684SGerd Hoffmann 384f1ae32a1SGerd Hoffmann XHCIRing ring; 385f1ae32a1SGerd Hoffmann unsigned int next_xfer; 386f1ae32a1SGerd Hoffmann unsigned int comp_xfer; 387f1ae32a1SGerd Hoffmann XHCITransfer transfers[TD_QUEUE]; 388f1ae32a1SGerd Hoffmann XHCITransfer *retry; 389f1ae32a1SGerd Hoffmann EPType type; 39059a70ccdSDavid Gibson dma_addr_t pctx; 391f1ae32a1SGerd Hoffmann unsigned int max_psize; 392f1ae32a1SGerd Hoffmann uint32_t state; 3933d139684SGerd Hoffmann 394024426acSGerd Hoffmann /* streams */ 395024426acSGerd Hoffmann unsigned int max_pstreams; 396024426acSGerd Hoffmann bool lsa; 397024426acSGerd Hoffmann unsigned int nr_pstreams; 398024426acSGerd Hoffmann XHCIStreamContext *pstreams; 399024426acSGerd Hoffmann 4003d139684SGerd Hoffmann /* iso xfer scheduling */ 4013d139684SGerd Hoffmann unsigned int interval; 4023d139684SGerd Hoffmann int64_t mfindex_last; 4033d139684SGerd Hoffmann QEMUTimer *kick_timer; 404024426acSGerd Hoffmann }; 405f1ae32a1SGerd Hoffmann 406f1ae32a1SGerd Hoffmann typedef struct XHCISlot { 407f1ae32a1SGerd Hoffmann bool enabled; 40859a70ccdSDavid Gibson dma_addr_t ctx; 409ccaf87a0SGerd Hoffmann USBPort *uport; 410f1ae32a1SGerd Hoffmann XHCIEPContext * eps[31]; 411f1ae32a1SGerd Hoffmann } XHCISlot; 412f1ae32a1SGerd Hoffmann 413f1ae32a1SGerd Hoffmann typedef struct XHCIEvent { 414f1ae32a1SGerd Hoffmann TRBType type; 415f1ae32a1SGerd Hoffmann TRBCCode ccode; 416f1ae32a1SGerd Hoffmann uint64_t ptr; 417f1ae32a1SGerd Hoffmann uint32_t length; 418f1ae32a1SGerd Hoffmann uint32_t flags; 419f1ae32a1SGerd Hoffmann uint8_t slotid; 420f1ae32a1SGerd Hoffmann uint8_t epid; 421f1ae32a1SGerd Hoffmann } XHCIEvent; 422f1ae32a1SGerd Hoffmann 423962d11e1SGerd Hoffmann typedef struct XHCIInterrupter { 424962d11e1SGerd Hoffmann uint32_t iman; 425962d11e1SGerd Hoffmann uint32_t imod; 426962d11e1SGerd Hoffmann uint32_t erstsz; 427962d11e1SGerd Hoffmann uint32_t erstba_low; 428962d11e1SGerd Hoffmann uint32_t erstba_high; 429962d11e1SGerd Hoffmann uint32_t erdp_low; 430962d11e1SGerd Hoffmann uint32_t erdp_high; 431962d11e1SGerd Hoffmann 432962d11e1SGerd Hoffmann bool msix_used, er_pcs, er_full; 433962d11e1SGerd Hoffmann 434962d11e1SGerd Hoffmann dma_addr_t er_start; 435962d11e1SGerd Hoffmann uint32_t er_size; 436962d11e1SGerd Hoffmann unsigned int er_ep_idx; 437962d11e1SGerd Hoffmann 438962d11e1SGerd Hoffmann XHCIEvent ev_buffer[EV_QUEUE]; 439962d11e1SGerd Hoffmann unsigned int ev_buffer_put; 440962d11e1SGerd Hoffmann unsigned int ev_buffer_get; 441962d11e1SGerd Hoffmann 442962d11e1SGerd Hoffmann } XHCIInterrupter; 443962d11e1SGerd Hoffmann 444f1ae32a1SGerd Hoffmann struct XHCIState { 445f1ae32a1SGerd Hoffmann PCIDevice pci_dev; 446f1ae32a1SGerd Hoffmann USBBus bus; 447f1ae32a1SGerd Hoffmann qemu_irq irq; 448f1ae32a1SGerd Hoffmann MemoryRegion mem; 4491b067564SGerd Hoffmann MemoryRegion mem_cap; 4501b067564SGerd Hoffmann MemoryRegion mem_oper; 4511b067564SGerd Hoffmann MemoryRegion mem_runtime; 4521b067564SGerd Hoffmann MemoryRegion mem_doorbell; 453f1ae32a1SGerd Hoffmann 4540846e635SGerd Hoffmann /* properties */ 4550846e635SGerd Hoffmann uint32_t numports_2; 4560846e635SGerd Hoffmann uint32_t numports_3; 45791062ae0SGerd Hoffmann uint32_t numintrs; 45891062ae0SGerd Hoffmann uint32_t numslots; 459c5e9b02dSGerd Hoffmann uint32_t flags; 4600846e635SGerd Hoffmann 461f1ae32a1SGerd Hoffmann /* Operational Registers */ 462f1ae32a1SGerd Hoffmann uint32_t usbcmd; 463f1ae32a1SGerd Hoffmann uint32_t usbsts; 464f1ae32a1SGerd Hoffmann uint32_t dnctrl; 465f1ae32a1SGerd Hoffmann uint32_t crcr_low; 466f1ae32a1SGerd Hoffmann uint32_t crcr_high; 467f1ae32a1SGerd Hoffmann uint32_t dcbaap_low; 468f1ae32a1SGerd Hoffmann uint32_t dcbaap_high; 469f1ae32a1SGerd Hoffmann uint32_t config; 470f1ae32a1SGerd Hoffmann 4710846e635SGerd Hoffmann USBPort uports[MAX(MAXPORTS_2, MAXPORTS_3)]; 472f1ae32a1SGerd Hoffmann XHCIPort ports[MAXPORTS]; 473f1ae32a1SGerd Hoffmann XHCISlot slots[MAXSLOTS]; 4740846e635SGerd Hoffmann uint32_t numports; 475f1ae32a1SGerd Hoffmann 476f1ae32a1SGerd Hoffmann /* Runtime Registers */ 47701546fa6SGerd Hoffmann int64_t mfindex_start; 47801546fa6SGerd Hoffmann QEMUTimer *mfwrap_timer; 479962d11e1SGerd Hoffmann XHCIInterrupter intr[MAXINTRS]; 480f1ae32a1SGerd Hoffmann 481f1ae32a1SGerd Hoffmann XHCIRing cmd_ring; 482f1ae32a1SGerd Hoffmann }; 483f1ae32a1SGerd Hoffmann 484f1ae32a1SGerd Hoffmann typedef struct XHCIEvRingSeg { 485f1ae32a1SGerd Hoffmann uint32_t addr_low; 486f1ae32a1SGerd Hoffmann uint32_t addr_high; 487f1ae32a1SGerd Hoffmann uint32_t size; 488f1ae32a1SGerd Hoffmann uint32_t rsvd; 489f1ae32a1SGerd Hoffmann } XHCIEvRingSeg; 490f1ae32a1SGerd Hoffmann 491c5e9b02dSGerd Hoffmann enum xhci_flags { 492c5e9b02dSGerd Hoffmann XHCI_FLAG_USE_MSI = 1, 4934c47f800SGerd Hoffmann XHCI_FLAG_USE_MSI_X, 494c5e9b02dSGerd Hoffmann }; 495c5e9b02dSGerd Hoffmann 49601546fa6SGerd Hoffmann static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, 497024426acSGerd Hoffmann unsigned int epid, unsigned int streamid); 4980bc85da6SGerd Hoffmann static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid, 4990bc85da6SGerd Hoffmann unsigned int epid); 500962d11e1SGerd Hoffmann static void xhci_event(XHCIState *xhci, XHCIEvent *event, int v); 501962d11e1SGerd Hoffmann static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v); 50201546fa6SGerd Hoffmann 503f1ae32a1SGerd Hoffmann static const char *TRBType_names[] = { 504f1ae32a1SGerd Hoffmann [TRB_RESERVED] = "TRB_RESERVED", 505f1ae32a1SGerd Hoffmann [TR_NORMAL] = "TR_NORMAL", 506f1ae32a1SGerd Hoffmann [TR_SETUP] = "TR_SETUP", 507f1ae32a1SGerd Hoffmann [TR_DATA] = "TR_DATA", 508f1ae32a1SGerd Hoffmann [TR_STATUS] = "TR_STATUS", 509f1ae32a1SGerd Hoffmann [TR_ISOCH] = "TR_ISOCH", 510f1ae32a1SGerd Hoffmann [TR_LINK] = "TR_LINK", 511f1ae32a1SGerd Hoffmann [TR_EVDATA] = "TR_EVDATA", 512f1ae32a1SGerd Hoffmann [TR_NOOP] = "TR_NOOP", 513f1ae32a1SGerd Hoffmann [CR_ENABLE_SLOT] = "CR_ENABLE_SLOT", 514f1ae32a1SGerd Hoffmann [CR_DISABLE_SLOT] = "CR_DISABLE_SLOT", 515f1ae32a1SGerd Hoffmann [CR_ADDRESS_DEVICE] = "CR_ADDRESS_DEVICE", 516f1ae32a1SGerd Hoffmann [CR_CONFIGURE_ENDPOINT] = "CR_CONFIGURE_ENDPOINT", 517f1ae32a1SGerd Hoffmann [CR_EVALUATE_CONTEXT] = "CR_EVALUATE_CONTEXT", 518f1ae32a1SGerd Hoffmann [CR_RESET_ENDPOINT] = "CR_RESET_ENDPOINT", 519f1ae32a1SGerd Hoffmann [CR_STOP_ENDPOINT] = "CR_STOP_ENDPOINT", 520f1ae32a1SGerd Hoffmann [CR_SET_TR_DEQUEUE] = "CR_SET_TR_DEQUEUE", 521f1ae32a1SGerd Hoffmann [CR_RESET_DEVICE] = "CR_RESET_DEVICE", 522f1ae32a1SGerd Hoffmann [CR_FORCE_EVENT] = "CR_FORCE_EVENT", 523f1ae32a1SGerd Hoffmann [CR_NEGOTIATE_BW] = "CR_NEGOTIATE_BW", 524f1ae32a1SGerd Hoffmann [CR_SET_LATENCY_TOLERANCE] = "CR_SET_LATENCY_TOLERANCE", 525f1ae32a1SGerd Hoffmann [CR_GET_PORT_BANDWIDTH] = "CR_GET_PORT_BANDWIDTH", 526f1ae32a1SGerd Hoffmann [CR_FORCE_HEADER] = "CR_FORCE_HEADER", 527f1ae32a1SGerd Hoffmann [CR_NOOP] = "CR_NOOP", 528f1ae32a1SGerd Hoffmann [ER_TRANSFER] = "ER_TRANSFER", 529f1ae32a1SGerd Hoffmann [ER_COMMAND_COMPLETE] = "ER_COMMAND_COMPLETE", 530f1ae32a1SGerd Hoffmann [ER_PORT_STATUS_CHANGE] = "ER_PORT_STATUS_CHANGE", 531f1ae32a1SGerd Hoffmann [ER_BANDWIDTH_REQUEST] = "ER_BANDWIDTH_REQUEST", 532f1ae32a1SGerd Hoffmann [ER_DOORBELL] = "ER_DOORBELL", 533f1ae32a1SGerd Hoffmann [ER_HOST_CONTROLLER] = "ER_HOST_CONTROLLER", 534f1ae32a1SGerd Hoffmann [ER_DEVICE_NOTIFICATION] = "ER_DEVICE_NOTIFICATION", 535f1ae32a1SGerd Hoffmann [ER_MFINDEX_WRAP] = "ER_MFINDEX_WRAP", 536f1ae32a1SGerd Hoffmann [CR_VENDOR_VIA_CHALLENGE_RESPONSE] = "CR_VENDOR_VIA_CHALLENGE_RESPONSE", 537f1ae32a1SGerd Hoffmann [CR_VENDOR_NEC_FIRMWARE_REVISION] = "CR_VENDOR_NEC_FIRMWARE_REVISION", 538f1ae32a1SGerd Hoffmann [CR_VENDOR_NEC_CHALLENGE_RESPONSE] = "CR_VENDOR_NEC_CHALLENGE_RESPONSE", 539f1ae32a1SGerd Hoffmann }; 540f1ae32a1SGerd Hoffmann 541873123feSGerd Hoffmann static const char *TRBCCode_names[] = { 542873123feSGerd Hoffmann [CC_INVALID] = "CC_INVALID", 543873123feSGerd Hoffmann [CC_SUCCESS] = "CC_SUCCESS", 544873123feSGerd Hoffmann [CC_DATA_BUFFER_ERROR] = "CC_DATA_BUFFER_ERROR", 545873123feSGerd Hoffmann [CC_BABBLE_DETECTED] = "CC_BABBLE_DETECTED", 546873123feSGerd Hoffmann [CC_USB_TRANSACTION_ERROR] = "CC_USB_TRANSACTION_ERROR", 547873123feSGerd Hoffmann [CC_TRB_ERROR] = "CC_TRB_ERROR", 548873123feSGerd Hoffmann [CC_STALL_ERROR] = "CC_STALL_ERROR", 549873123feSGerd Hoffmann [CC_RESOURCE_ERROR] = "CC_RESOURCE_ERROR", 550873123feSGerd Hoffmann [CC_BANDWIDTH_ERROR] = "CC_BANDWIDTH_ERROR", 551873123feSGerd Hoffmann [CC_NO_SLOTS_ERROR] = "CC_NO_SLOTS_ERROR", 552873123feSGerd Hoffmann [CC_INVALID_STREAM_TYPE_ERROR] = "CC_INVALID_STREAM_TYPE_ERROR", 553873123feSGerd Hoffmann [CC_SLOT_NOT_ENABLED_ERROR] = "CC_SLOT_NOT_ENABLED_ERROR", 554873123feSGerd Hoffmann [CC_EP_NOT_ENABLED_ERROR] = "CC_EP_NOT_ENABLED_ERROR", 555873123feSGerd Hoffmann [CC_SHORT_PACKET] = "CC_SHORT_PACKET", 556873123feSGerd Hoffmann [CC_RING_UNDERRUN] = "CC_RING_UNDERRUN", 557873123feSGerd Hoffmann [CC_RING_OVERRUN] = "CC_RING_OVERRUN", 558873123feSGerd Hoffmann [CC_VF_ER_FULL] = "CC_VF_ER_FULL", 559873123feSGerd Hoffmann [CC_PARAMETER_ERROR] = "CC_PARAMETER_ERROR", 560873123feSGerd Hoffmann [CC_BANDWIDTH_OVERRUN] = "CC_BANDWIDTH_OVERRUN", 561873123feSGerd Hoffmann [CC_CONTEXT_STATE_ERROR] = "CC_CONTEXT_STATE_ERROR", 562873123feSGerd Hoffmann [CC_NO_PING_RESPONSE_ERROR] = "CC_NO_PING_RESPONSE_ERROR", 563873123feSGerd Hoffmann [CC_EVENT_RING_FULL_ERROR] = "CC_EVENT_RING_FULL_ERROR", 564873123feSGerd Hoffmann [CC_INCOMPATIBLE_DEVICE_ERROR] = "CC_INCOMPATIBLE_DEVICE_ERROR", 565873123feSGerd Hoffmann [CC_MISSED_SERVICE_ERROR] = "CC_MISSED_SERVICE_ERROR", 566873123feSGerd Hoffmann [CC_COMMAND_RING_STOPPED] = "CC_COMMAND_RING_STOPPED", 567873123feSGerd Hoffmann [CC_COMMAND_ABORTED] = "CC_COMMAND_ABORTED", 568873123feSGerd Hoffmann [CC_STOPPED] = "CC_STOPPED", 569873123feSGerd Hoffmann [CC_STOPPED_LENGTH_INVALID] = "CC_STOPPED_LENGTH_INVALID", 570873123feSGerd Hoffmann [CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR] 571873123feSGerd Hoffmann = "CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR", 572873123feSGerd Hoffmann [CC_ISOCH_BUFFER_OVERRUN] = "CC_ISOCH_BUFFER_OVERRUN", 573873123feSGerd Hoffmann [CC_EVENT_LOST_ERROR] = "CC_EVENT_LOST_ERROR", 574873123feSGerd Hoffmann [CC_UNDEFINED_ERROR] = "CC_UNDEFINED_ERROR", 575873123feSGerd Hoffmann [CC_INVALID_STREAM_ID_ERROR] = "CC_INVALID_STREAM_ID_ERROR", 576873123feSGerd Hoffmann [CC_SECONDARY_BANDWIDTH_ERROR] = "CC_SECONDARY_BANDWIDTH_ERROR", 577873123feSGerd Hoffmann [CC_SPLIT_TRANSACTION_ERROR] = "CC_SPLIT_TRANSACTION_ERROR", 578873123feSGerd Hoffmann }; 579873123feSGerd Hoffmann 580f1ae32a1SGerd Hoffmann static const char *lookup_name(uint32_t index, const char **list, uint32_t llen) 581f1ae32a1SGerd Hoffmann { 582f1ae32a1SGerd Hoffmann if (index >= llen || list[index] == NULL) { 583f1ae32a1SGerd Hoffmann return "???"; 584f1ae32a1SGerd Hoffmann } 585f1ae32a1SGerd Hoffmann return list[index]; 586f1ae32a1SGerd Hoffmann } 587f1ae32a1SGerd Hoffmann 588f1ae32a1SGerd Hoffmann static const char *trb_name(XHCITRB *trb) 589f1ae32a1SGerd Hoffmann { 590f1ae32a1SGerd Hoffmann return lookup_name(TRB_TYPE(*trb), TRBType_names, 591f1ae32a1SGerd Hoffmann ARRAY_SIZE(TRBType_names)); 592f1ae32a1SGerd Hoffmann } 593f1ae32a1SGerd Hoffmann 594873123feSGerd Hoffmann static const char *event_name(XHCIEvent *event) 595873123feSGerd Hoffmann { 596873123feSGerd Hoffmann return lookup_name(event->ccode, TRBCCode_names, 597873123feSGerd Hoffmann ARRAY_SIZE(TRBCCode_names)); 598873123feSGerd Hoffmann } 599873123feSGerd Hoffmann 60001546fa6SGerd Hoffmann static uint64_t xhci_mfindex_get(XHCIState *xhci) 60101546fa6SGerd Hoffmann { 60201546fa6SGerd Hoffmann int64_t now = qemu_get_clock_ns(vm_clock); 60301546fa6SGerd Hoffmann return (now - xhci->mfindex_start) / 125000; 60401546fa6SGerd Hoffmann } 60501546fa6SGerd Hoffmann 60601546fa6SGerd Hoffmann static void xhci_mfwrap_update(XHCIState *xhci) 60701546fa6SGerd Hoffmann { 60801546fa6SGerd Hoffmann const uint32_t bits = USBCMD_RS | USBCMD_EWE; 60901546fa6SGerd Hoffmann uint32_t mfindex, left; 61001546fa6SGerd Hoffmann int64_t now; 61101546fa6SGerd Hoffmann 61201546fa6SGerd Hoffmann if ((xhci->usbcmd & bits) == bits) { 61301546fa6SGerd Hoffmann now = qemu_get_clock_ns(vm_clock); 61401546fa6SGerd Hoffmann mfindex = ((now - xhci->mfindex_start) / 125000) & 0x3fff; 61501546fa6SGerd Hoffmann left = 0x4000 - mfindex; 61601546fa6SGerd Hoffmann qemu_mod_timer(xhci->mfwrap_timer, now + left * 125000); 61701546fa6SGerd Hoffmann } else { 61801546fa6SGerd Hoffmann qemu_del_timer(xhci->mfwrap_timer); 61901546fa6SGerd Hoffmann } 62001546fa6SGerd Hoffmann } 62101546fa6SGerd Hoffmann 62201546fa6SGerd Hoffmann static void xhci_mfwrap_timer(void *opaque) 62301546fa6SGerd Hoffmann { 62401546fa6SGerd Hoffmann XHCIState *xhci = opaque; 62501546fa6SGerd Hoffmann XHCIEvent wrap = { ER_MFINDEX_WRAP, CC_SUCCESS }; 62601546fa6SGerd Hoffmann 627962d11e1SGerd Hoffmann xhci_event(xhci, &wrap, 0); 62801546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 62901546fa6SGerd Hoffmann } 630f1ae32a1SGerd Hoffmann 63159a70ccdSDavid Gibson static inline dma_addr_t xhci_addr64(uint32_t low, uint32_t high) 632f1ae32a1SGerd Hoffmann { 63359a70ccdSDavid Gibson if (sizeof(dma_addr_t) == 4) { 634f1ae32a1SGerd Hoffmann return low; 63559a70ccdSDavid Gibson } else { 63659a70ccdSDavid Gibson return low | (((dma_addr_t)high << 16) << 16); 63759a70ccdSDavid Gibson } 638f1ae32a1SGerd Hoffmann } 639f1ae32a1SGerd Hoffmann 64059a70ccdSDavid Gibson static inline dma_addr_t xhci_mask64(uint64_t addr) 641f1ae32a1SGerd Hoffmann { 64259a70ccdSDavid Gibson if (sizeof(dma_addr_t) == 4) { 643f1ae32a1SGerd Hoffmann return addr & 0xffffffff; 64459a70ccdSDavid Gibson } else { 64559a70ccdSDavid Gibson return addr; 64659a70ccdSDavid Gibson } 647f1ae32a1SGerd Hoffmann } 648f1ae32a1SGerd Hoffmann 649616b5d53SDavid Gibson static inline void xhci_dma_read_u32s(XHCIState *xhci, dma_addr_t addr, 650616b5d53SDavid Gibson uint32_t *buf, size_t len) 651616b5d53SDavid Gibson { 652616b5d53SDavid Gibson int i; 653616b5d53SDavid Gibson 654616b5d53SDavid Gibson assert((len % sizeof(uint32_t)) == 0); 655616b5d53SDavid Gibson 656616b5d53SDavid Gibson pci_dma_read(&xhci->pci_dev, addr, buf, len); 657616b5d53SDavid Gibson 658616b5d53SDavid Gibson for (i = 0; i < (len / sizeof(uint32_t)); i++) { 659616b5d53SDavid Gibson buf[i] = le32_to_cpu(buf[i]); 660616b5d53SDavid Gibson } 661616b5d53SDavid Gibson } 662616b5d53SDavid Gibson 663616b5d53SDavid Gibson static inline void xhci_dma_write_u32s(XHCIState *xhci, dma_addr_t addr, 664616b5d53SDavid Gibson uint32_t *buf, size_t len) 665616b5d53SDavid Gibson { 666616b5d53SDavid Gibson int i; 667616b5d53SDavid Gibson uint32_t tmp[len / sizeof(uint32_t)]; 668616b5d53SDavid Gibson 669616b5d53SDavid Gibson assert((len % sizeof(uint32_t)) == 0); 670616b5d53SDavid Gibson 671616b5d53SDavid Gibson for (i = 0; i < (len / sizeof(uint32_t)); i++) { 672616b5d53SDavid Gibson tmp[i] = cpu_to_le32(buf[i]); 673616b5d53SDavid Gibson } 674616b5d53SDavid Gibson pci_dma_write(&xhci->pci_dev, addr, tmp, len); 675616b5d53SDavid Gibson } 676616b5d53SDavid Gibson 6770846e635SGerd Hoffmann static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) 6780846e635SGerd Hoffmann { 6790846e635SGerd Hoffmann int index; 6800846e635SGerd Hoffmann 6810846e635SGerd Hoffmann if (!uport->dev) { 6820846e635SGerd Hoffmann return NULL; 6830846e635SGerd Hoffmann } 6840846e635SGerd Hoffmann switch (uport->dev->speed) { 6850846e635SGerd Hoffmann case USB_SPEED_LOW: 6860846e635SGerd Hoffmann case USB_SPEED_FULL: 6870846e635SGerd Hoffmann case USB_SPEED_HIGH: 6880846e635SGerd Hoffmann index = uport->index; 6890846e635SGerd Hoffmann break; 6900846e635SGerd Hoffmann case USB_SPEED_SUPER: 6910846e635SGerd Hoffmann index = uport->index + xhci->numports_2; 6920846e635SGerd Hoffmann break; 6930846e635SGerd Hoffmann default: 6940846e635SGerd Hoffmann return NULL; 6950846e635SGerd Hoffmann } 6960846e635SGerd Hoffmann return &xhci->ports[index]; 6970846e635SGerd Hoffmann } 6980846e635SGerd Hoffmann 6994c4abe7cSGerd Hoffmann static void xhci_intx_update(XHCIState *xhci) 700f1ae32a1SGerd Hoffmann { 701f1ae32a1SGerd Hoffmann int level = 0; 702f1ae32a1SGerd Hoffmann 7034c47f800SGerd Hoffmann if (msix_enabled(&xhci->pci_dev) || 7044c47f800SGerd Hoffmann msi_enabled(&xhci->pci_dev)) { 7054c4abe7cSGerd Hoffmann return; 7064c4abe7cSGerd Hoffmann } 7074c4abe7cSGerd Hoffmann 708962d11e1SGerd Hoffmann if (xhci->intr[0].iman & IMAN_IP && 709962d11e1SGerd Hoffmann xhci->intr[0].iman & IMAN_IE && 710215bff17SLai Jiangshan xhci->usbcmd & USBCMD_INTE) { 711f1ae32a1SGerd Hoffmann level = 1; 712f1ae32a1SGerd Hoffmann } 713f1ae32a1SGerd Hoffmann 7147acd279fSGerd Hoffmann trace_usb_xhci_irq_intx(level); 715f1ae32a1SGerd Hoffmann qemu_set_irq(xhci->irq, level); 716f1ae32a1SGerd Hoffmann } 7174c4abe7cSGerd Hoffmann 718962d11e1SGerd Hoffmann static void xhci_msix_update(XHCIState *xhci, int v) 7194c47f800SGerd Hoffmann { 7204c47f800SGerd Hoffmann bool enabled; 7214c47f800SGerd Hoffmann 7224c47f800SGerd Hoffmann if (!msix_enabled(&xhci->pci_dev)) { 7234c47f800SGerd Hoffmann return; 7244c47f800SGerd Hoffmann } 7254c47f800SGerd Hoffmann 726962d11e1SGerd Hoffmann enabled = xhci->intr[v].iman & IMAN_IE; 727962d11e1SGerd Hoffmann if (enabled == xhci->intr[v].msix_used) { 7284c47f800SGerd Hoffmann return; 7294c47f800SGerd Hoffmann } 7304c47f800SGerd Hoffmann 7314c47f800SGerd Hoffmann if (enabled) { 732962d11e1SGerd Hoffmann trace_usb_xhci_irq_msix_use(v); 733962d11e1SGerd Hoffmann msix_vector_use(&xhci->pci_dev, v); 734962d11e1SGerd Hoffmann xhci->intr[v].msix_used = true; 7354c47f800SGerd Hoffmann } else { 736962d11e1SGerd Hoffmann trace_usb_xhci_irq_msix_unuse(v); 737962d11e1SGerd Hoffmann msix_vector_unuse(&xhci->pci_dev, v); 738962d11e1SGerd Hoffmann xhci->intr[v].msix_used = false; 7394c47f800SGerd Hoffmann } 7404c47f800SGerd Hoffmann } 7414c47f800SGerd Hoffmann 742962d11e1SGerd Hoffmann static void xhci_intr_raise(XHCIState *xhci, int v) 7434c4abe7cSGerd Hoffmann { 744962d11e1SGerd Hoffmann xhci->intr[v].erdp_low |= ERDP_EHB; 745962d11e1SGerd Hoffmann xhci->intr[v].iman |= IMAN_IP; 7462cae4119SGerd Hoffmann xhci->usbsts |= USBSTS_EINT; 7472cae4119SGerd Hoffmann 748962d11e1SGerd Hoffmann if (!(xhci->intr[v].iman & IMAN_IE)) { 7494c4abe7cSGerd Hoffmann return; 7504c4abe7cSGerd Hoffmann } 7514c4abe7cSGerd Hoffmann 7524c4abe7cSGerd Hoffmann if (!(xhci->usbcmd & USBCMD_INTE)) { 7534c4abe7cSGerd Hoffmann return; 7544c4abe7cSGerd Hoffmann } 7554c4abe7cSGerd Hoffmann 7564c47f800SGerd Hoffmann if (msix_enabled(&xhci->pci_dev)) { 757962d11e1SGerd Hoffmann trace_usb_xhci_irq_msix(v); 758962d11e1SGerd Hoffmann msix_notify(&xhci->pci_dev, v); 7594c47f800SGerd Hoffmann return; 7604c47f800SGerd Hoffmann } 7614c47f800SGerd Hoffmann 7624c4abe7cSGerd Hoffmann if (msi_enabled(&xhci->pci_dev)) { 763962d11e1SGerd Hoffmann trace_usb_xhci_irq_msi(v); 764962d11e1SGerd Hoffmann msi_notify(&xhci->pci_dev, v); 7654c4abe7cSGerd Hoffmann return; 7664c4abe7cSGerd Hoffmann } 7674c4abe7cSGerd Hoffmann 768962d11e1SGerd Hoffmann if (v == 0) { 7694c4abe7cSGerd Hoffmann trace_usb_xhci_irq_intx(1); 7704c4abe7cSGerd Hoffmann qemu_set_irq(xhci->irq, 1); 771f1ae32a1SGerd Hoffmann } 772962d11e1SGerd Hoffmann } 773f1ae32a1SGerd Hoffmann 774f1ae32a1SGerd Hoffmann static inline int xhci_running(XHCIState *xhci) 775f1ae32a1SGerd Hoffmann { 776962d11e1SGerd Hoffmann return !(xhci->usbsts & USBSTS_HCH) && !xhci->intr[0].er_full; 777f1ae32a1SGerd Hoffmann } 778f1ae32a1SGerd Hoffmann 779f1ae32a1SGerd Hoffmann static void xhci_die(XHCIState *xhci) 780f1ae32a1SGerd Hoffmann { 781f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_HCE; 782f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: asserted controller error\n"); 783f1ae32a1SGerd Hoffmann } 784f1ae32a1SGerd Hoffmann 785962d11e1SGerd Hoffmann static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v) 786f1ae32a1SGerd Hoffmann { 787962d11e1SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[v]; 788f1ae32a1SGerd Hoffmann XHCITRB ev_trb; 78959a70ccdSDavid Gibson dma_addr_t addr; 790f1ae32a1SGerd Hoffmann 791f1ae32a1SGerd Hoffmann ev_trb.parameter = cpu_to_le64(event->ptr); 792f1ae32a1SGerd Hoffmann ev_trb.status = cpu_to_le32(event->length | (event->ccode << 24)); 793f1ae32a1SGerd Hoffmann ev_trb.control = (event->slotid << 24) | (event->epid << 16) | 794f1ae32a1SGerd Hoffmann event->flags | (event->type << TRB_TYPE_SHIFT); 795962d11e1SGerd Hoffmann if (intr->er_pcs) { 796f1ae32a1SGerd Hoffmann ev_trb.control |= TRB_C; 797f1ae32a1SGerd Hoffmann } 798f1ae32a1SGerd Hoffmann ev_trb.control = cpu_to_le32(ev_trb.control); 799f1ae32a1SGerd Hoffmann 800962d11e1SGerd Hoffmann trace_usb_xhci_queue_event(v, intr->er_ep_idx, trb_name(&ev_trb), 801873123feSGerd Hoffmann event_name(event), ev_trb.parameter, 802873123feSGerd Hoffmann ev_trb.status, ev_trb.control); 803f1ae32a1SGerd Hoffmann 804962d11e1SGerd Hoffmann addr = intr->er_start + TRB_SIZE*intr->er_ep_idx; 80559a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, addr, &ev_trb, TRB_SIZE); 806f1ae32a1SGerd Hoffmann 807962d11e1SGerd Hoffmann intr->er_ep_idx++; 808962d11e1SGerd Hoffmann if (intr->er_ep_idx >= intr->er_size) { 809962d11e1SGerd Hoffmann intr->er_ep_idx = 0; 810962d11e1SGerd Hoffmann intr->er_pcs = !intr->er_pcs; 811f1ae32a1SGerd Hoffmann } 812f1ae32a1SGerd Hoffmann } 813f1ae32a1SGerd Hoffmann 814962d11e1SGerd Hoffmann static void xhci_events_update(XHCIState *xhci, int v) 815f1ae32a1SGerd Hoffmann { 816962d11e1SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[v]; 81759a70ccdSDavid Gibson dma_addr_t erdp; 818f1ae32a1SGerd Hoffmann unsigned int dp_idx; 819f1ae32a1SGerd Hoffmann bool do_irq = 0; 820f1ae32a1SGerd Hoffmann 821f1ae32a1SGerd Hoffmann if (xhci->usbsts & USBSTS_HCH) { 822f1ae32a1SGerd Hoffmann return; 823f1ae32a1SGerd Hoffmann } 824f1ae32a1SGerd Hoffmann 825962d11e1SGerd Hoffmann erdp = xhci_addr64(intr->erdp_low, intr->erdp_high); 826962d11e1SGerd Hoffmann if (erdp < intr->er_start || 827962d11e1SGerd Hoffmann erdp >= (intr->er_start + TRB_SIZE*intr->er_size)) { 82859a70ccdSDavid Gibson fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); 829962d11e1SGerd Hoffmann fprintf(stderr, "xhci: ER[%d] at "DMA_ADDR_FMT" len %d\n", 830962d11e1SGerd Hoffmann v, intr->er_start, intr->er_size); 831f1ae32a1SGerd Hoffmann xhci_die(xhci); 832f1ae32a1SGerd Hoffmann return; 833f1ae32a1SGerd Hoffmann } 834962d11e1SGerd Hoffmann dp_idx = (erdp - intr->er_start) / TRB_SIZE; 835962d11e1SGerd Hoffmann assert(dp_idx < intr->er_size); 836f1ae32a1SGerd Hoffmann 837f1ae32a1SGerd Hoffmann /* NEC didn't read section 4.9.4 of the spec (v1.0 p139 top Note) and thus 838f1ae32a1SGerd Hoffmann * deadlocks when the ER is full. Hack it by holding off events until 839f1ae32a1SGerd Hoffmann * the driver decides to free at least half of the ring */ 840962d11e1SGerd Hoffmann if (intr->er_full) { 841962d11e1SGerd Hoffmann int er_free = dp_idx - intr->er_ep_idx; 842f1ae32a1SGerd Hoffmann if (er_free <= 0) { 843962d11e1SGerd Hoffmann er_free += intr->er_size; 844f1ae32a1SGerd Hoffmann } 845962d11e1SGerd Hoffmann if (er_free < (intr->er_size/2)) { 846f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring still " 847f1ae32a1SGerd Hoffmann "more than half full (hack)\n"); 848f1ae32a1SGerd Hoffmann return; 849f1ae32a1SGerd Hoffmann } 850f1ae32a1SGerd Hoffmann } 851f1ae32a1SGerd Hoffmann 852962d11e1SGerd Hoffmann while (intr->ev_buffer_put != intr->ev_buffer_get) { 853962d11e1SGerd Hoffmann assert(intr->er_full); 854962d11e1SGerd Hoffmann if (((intr->er_ep_idx+1) % intr->er_size) == dp_idx) { 855f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring full again\n"); 856f1ae32a1SGerd Hoffmann #ifndef ER_FULL_HACK 857f1ae32a1SGerd Hoffmann XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR}; 858962d11e1SGerd Hoffmann xhci_write_event(xhci, &full, v); 859f1ae32a1SGerd Hoffmann #endif 860f1ae32a1SGerd Hoffmann do_irq = 1; 861f1ae32a1SGerd Hoffmann break; 862f1ae32a1SGerd Hoffmann } 863962d11e1SGerd Hoffmann XHCIEvent *event = &intr->ev_buffer[intr->ev_buffer_get]; 864962d11e1SGerd Hoffmann xhci_write_event(xhci, event, v); 865962d11e1SGerd Hoffmann intr->ev_buffer_get++; 866f1ae32a1SGerd Hoffmann do_irq = 1; 867962d11e1SGerd Hoffmann if (intr->ev_buffer_get == EV_QUEUE) { 868962d11e1SGerd Hoffmann intr->ev_buffer_get = 0; 869f1ae32a1SGerd Hoffmann } 870f1ae32a1SGerd Hoffmann } 871f1ae32a1SGerd Hoffmann 872f1ae32a1SGerd Hoffmann if (do_irq) { 873962d11e1SGerd Hoffmann xhci_intr_raise(xhci, v); 874f1ae32a1SGerd Hoffmann } 875f1ae32a1SGerd Hoffmann 876962d11e1SGerd Hoffmann if (intr->er_full && intr->ev_buffer_put == intr->ev_buffer_get) { 877f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring no longer full\n"); 878962d11e1SGerd Hoffmann intr->er_full = 0; 879f1ae32a1SGerd Hoffmann } 880f1ae32a1SGerd Hoffmann } 881f1ae32a1SGerd Hoffmann 882962d11e1SGerd Hoffmann static void xhci_event(XHCIState *xhci, XHCIEvent *event, int v) 883f1ae32a1SGerd Hoffmann { 8842d1de850SGerd Hoffmann XHCIInterrupter *intr; 88559a70ccdSDavid Gibson dma_addr_t erdp; 886f1ae32a1SGerd Hoffmann unsigned int dp_idx; 887f1ae32a1SGerd Hoffmann 88891062ae0SGerd Hoffmann if (v >= xhci->numintrs) { 88991062ae0SGerd Hoffmann DPRINTF("intr nr out of range (%d >= %d)\n", v, xhci->numintrs); 8902d1de850SGerd Hoffmann return; 8912d1de850SGerd Hoffmann } 8922d1de850SGerd Hoffmann intr = &xhci->intr[v]; 8932d1de850SGerd Hoffmann 894962d11e1SGerd Hoffmann if (intr->er_full) { 895f1ae32a1SGerd Hoffmann DPRINTF("xhci_event(): ER full, queueing\n"); 896962d11e1SGerd Hoffmann if (((intr->ev_buffer_put+1) % EV_QUEUE) == intr->ev_buffer_get) { 897f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: event queue full, dropping event!\n"); 898f1ae32a1SGerd Hoffmann return; 899f1ae32a1SGerd Hoffmann } 900962d11e1SGerd Hoffmann intr->ev_buffer[intr->ev_buffer_put++] = *event; 901962d11e1SGerd Hoffmann if (intr->ev_buffer_put == EV_QUEUE) { 902962d11e1SGerd Hoffmann intr->ev_buffer_put = 0; 903f1ae32a1SGerd Hoffmann } 904f1ae32a1SGerd Hoffmann return; 905f1ae32a1SGerd Hoffmann } 906f1ae32a1SGerd Hoffmann 907962d11e1SGerd Hoffmann erdp = xhci_addr64(intr->erdp_low, intr->erdp_high); 908962d11e1SGerd Hoffmann if (erdp < intr->er_start || 909962d11e1SGerd Hoffmann erdp >= (intr->er_start + TRB_SIZE*intr->er_size)) { 91059a70ccdSDavid Gibson fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); 911962d11e1SGerd Hoffmann fprintf(stderr, "xhci: ER[%d] at "DMA_ADDR_FMT" len %d\n", 912962d11e1SGerd Hoffmann v, intr->er_start, intr->er_size); 913f1ae32a1SGerd Hoffmann xhci_die(xhci); 914f1ae32a1SGerd Hoffmann return; 915f1ae32a1SGerd Hoffmann } 916f1ae32a1SGerd Hoffmann 917962d11e1SGerd Hoffmann dp_idx = (erdp - intr->er_start) / TRB_SIZE; 918962d11e1SGerd Hoffmann assert(dp_idx < intr->er_size); 919f1ae32a1SGerd Hoffmann 920962d11e1SGerd Hoffmann if ((intr->er_ep_idx+1) % intr->er_size == dp_idx) { 921f1ae32a1SGerd Hoffmann DPRINTF("xhci_event(): ER full, queueing\n"); 922f1ae32a1SGerd Hoffmann #ifndef ER_FULL_HACK 923f1ae32a1SGerd Hoffmann XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR}; 924f1ae32a1SGerd Hoffmann xhci_write_event(xhci, &full); 925f1ae32a1SGerd Hoffmann #endif 926962d11e1SGerd Hoffmann intr->er_full = 1; 927962d11e1SGerd Hoffmann if (((intr->ev_buffer_put+1) % EV_QUEUE) == intr->ev_buffer_get) { 928f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: event queue full, dropping event!\n"); 929f1ae32a1SGerd Hoffmann return; 930f1ae32a1SGerd Hoffmann } 931962d11e1SGerd Hoffmann intr->ev_buffer[intr->ev_buffer_put++] = *event; 932962d11e1SGerd Hoffmann if (intr->ev_buffer_put == EV_QUEUE) { 933962d11e1SGerd Hoffmann intr->ev_buffer_put = 0; 934f1ae32a1SGerd Hoffmann } 935f1ae32a1SGerd Hoffmann } else { 936962d11e1SGerd Hoffmann xhci_write_event(xhci, event, v); 937f1ae32a1SGerd Hoffmann } 938f1ae32a1SGerd Hoffmann 939962d11e1SGerd Hoffmann xhci_intr_raise(xhci, v); 940f1ae32a1SGerd Hoffmann } 941f1ae32a1SGerd Hoffmann 942f1ae32a1SGerd Hoffmann static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring, 94359a70ccdSDavid Gibson dma_addr_t base) 944f1ae32a1SGerd Hoffmann { 945f1ae32a1SGerd Hoffmann ring->dequeue = base; 946f1ae32a1SGerd Hoffmann ring->ccs = 1; 947f1ae32a1SGerd Hoffmann } 948f1ae32a1SGerd Hoffmann 949f1ae32a1SGerd Hoffmann static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb, 95059a70ccdSDavid Gibson dma_addr_t *addr) 951f1ae32a1SGerd Hoffmann { 952f1ae32a1SGerd Hoffmann while (1) { 953f1ae32a1SGerd Hoffmann TRBType type; 95459a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ring->dequeue, trb, TRB_SIZE); 955f1ae32a1SGerd Hoffmann trb->addr = ring->dequeue; 956f1ae32a1SGerd Hoffmann trb->ccs = ring->ccs; 957f1ae32a1SGerd Hoffmann le64_to_cpus(&trb->parameter); 958f1ae32a1SGerd Hoffmann le32_to_cpus(&trb->status); 959f1ae32a1SGerd Hoffmann le32_to_cpus(&trb->control); 960f1ae32a1SGerd Hoffmann 9610703a4a7SGerd Hoffmann trace_usb_xhci_fetch_trb(ring->dequeue, trb_name(trb), 9620703a4a7SGerd Hoffmann trb->parameter, trb->status, trb->control); 963f1ae32a1SGerd Hoffmann 964f1ae32a1SGerd Hoffmann if ((trb->control & TRB_C) != ring->ccs) { 965f1ae32a1SGerd Hoffmann return 0; 966f1ae32a1SGerd Hoffmann } 967f1ae32a1SGerd Hoffmann 968f1ae32a1SGerd Hoffmann type = TRB_TYPE(*trb); 969f1ae32a1SGerd Hoffmann 970f1ae32a1SGerd Hoffmann if (type != TR_LINK) { 971f1ae32a1SGerd Hoffmann if (addr) { 972f1ae32a1SGerd Hoffmann *addr = ring->dequeue; 973f1ae32a1SGerd Hoffmann } 974f1ae32a1SGerd Hoffmann ring->dequeue += TRB_SIZE; 975f1ae32a1SGerd Hoffmann return type; 976f1ae32a1SGerd Hoffmann } else { 977f1ae32a1SGerd Hoffmann ring->dequeue = xhci_mask64(trb->parameter); 978f1ae32a1SGerd Hoffmann if (trb->control & TRB_LK_TC) { 979f1ae32a1SGerd Hoffmann ring->ccs = !ring->ccs; 980f1ae32a1SGerd Hoffmann } 981f1ae32a1SGerd Hoffmann } 982f1ae32a1SGerd Hoffmann } 983f1ae32a1SGerd Hoffmann } 984f1ae32a1SGerd Hoffmann 985f1ae32a1SGerd Hoffmann static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) 986f1ae32a1SGerd Hoffmann { 987f1ae32a1SGerd Hoffmann XHCITRB trb; 988f1ae32a1SGerd Hoffmann int length = 0; 98959a70ccdSDavid Gibson dma_addr_t dequeue = ring->dequeue; 990f1ae32a1SGerd Hoffmann bool ccs = ring->ccs; 991f1ae32a1SGerd Hoffmann /* hack to bundle together the two/three TDs that make a setup transfer */ 992f1ae32a1SGerd Hoffmann bool control_td_set = 0; 993f1ae32a1SGerd Hoffmann 994f1ae32a1SGerd Hoffmann while (1) { 995f1ae32a1SGerd Hoffmann TRBType type; 99659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, dequeue, &trb, TRB_SIZE); 997f1ae32a1SGerd Hoffmann le64_to_cpus(&trb.parameter); 998f1ae32a1SGerd Hoffmann le32_to_cpus(&trb.status); 999f1ae32a1SGerd Hoffmann le32_to_cpus(&trb.control); 1000f1ae32a1SGerd Hoffmann 1001f1ae32a1SGerd Hoffmann if ((trb.control & TRB_C) != ccs) { 1002f1ae32a1SGerd Hoffmann return -length; 1003f1ae32a1SGerd Hoffmann } 1004f1ae32a1SGerd Hoffmann 1005f1ae32a1SGerd Hoffmann type = TRB_TYPE(trb); 1006f1ae32a1SGerd Hoffmann 1007f1ae32a1SGerd Hoffmann if (type == TR_LINK) { 1008f1ae32a1SGerd Hoffmann dequeue = xhci_mask64(trb.parameter); 1009f1ae32a1SGerd Hoffmann if (trb.control & TRB_LK_TC) { 1010f1ae32a1SGerd Hoffmann ccs = !ccs; 1011f1ae32a1SGerd Hoffmann } 1012f1ae32a1SGerd Hoffmann continue; 1013f1ae32a1SGerd Hoffmann } 1014f1ae32a1SGerd Hoffmann 1015f1ae32a1SGerd Hoffmann length += 1; 1016f1ae32a1SGerd Hoffmann dequeue += TRB_SIZE; 1017f1ae32a1SGerd Hoffmann 1018f1ae32a1SGerd Hoffmann if (type == TR_SETUP) { 1019f1ae32a1SGerd Hoffmann control_td_set = 1; 1020f1ae32a1SGerd Hoffmann } else if (type == TR_STATUS) { 1021f1ae32a1SGerd Hoffmann control_td_set = 0; 1022f1ae32a1SGerd Hoffmann } 1023f1ae32a1SGerd Hoffmann 1024f1ae32a1SGerd Hoffmann if (!control_td_set && !(trb.control & TRB_TR_CH)) { 1025f1ae32a1SGerd Hoffmann return length; 1026f1ae32a1SGerd Hoffmann } 1027f1ae32a1SGerd Hoffmann } 1028f1ae32a1SGerd Hoffmann } 1029f1ae32a1SGerd Hoffmann 1030962d11e1SGerd Hoffmann static void xhci_er_reset(XHCIState *xhci, int v) 1031f1ae32a1SGerd Hoffmann { 1032962d11e1SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[v]; 1033f1ae32a1SGerd Hoffmann XHCIEvRingSeg seg; 1034f1ae32a1SGerd Hoffmann 1035e099ad4bSGerd Hoffmann if (intr->erstsz == 0) { 1036e099ad4bSGerd Hoffmann /* disabled */ 1037e099ad4bSGerd Hoffmann intr->er_start = 0; 1038e099ad4bSGerd Hoffmann intr->er_size = 0; 1039e099ad4bSGerd Hoffmann return; 1040e099ad4bSGerd Hoffmann } 1041f1ae32a1SGerd Hoffmann /* cache the (sole) event ring segment location */ 1042962d11e1SGerd Hoffmann if (intr->erstsz != 1) { 1043962d11e1SGerd Hoffmann fprintf(stderr, "xhci: invalid value for ERSTSZ: %d\n", intr->erstsz); 1044f1ae32a1SGerd Hoffmann xhci_die(xhci); 1045f1ae32a1SGerd Hoffmann return; 1046f1ae32a1SGerd Hoffmann } 1047962d11e1SGerd Hoffmann dma_addr_t erstba = xhci_addr64(intr->erstba_low, intr->erstba_high); 104859a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, erstba, &seg, sizeof(seg)); 1049f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.addr_low); 1050f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.addr_high); 1051f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.size); 1052f1ae32a1SGerd Hoffmann if (seg.size < 16 || seg.size > 4096) { 1053f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid value for segment size: %d\n", seg.size); 1054f1ae32a1SGerd Hoffmann xhci_die(xhci); 1055f1ae32a1SGerd Hoffmann return; 1056f1ae32a1SGerd Hoffmann } 1057962d11e1SGerd Hoffmann intr->er_start = xhci_addr64(seg.addr_low, seg.addr_high); 1058962d11e1SGerd Hoffmann intr->er_size = seg.size; 1059f1ae32a1SGerd Hoffmann 1060962d11e1SGerd Hoffmann intr->er_ep_idx = 0; 1061962d11e1SGerd Hoffmann intr->er_pcs = 1; 1062962d11e1SGerd Hoffmann intr->er_full = 0; 1063f1ae32a1SGerd Hoffmann 1064962d11e1SGerd Hoffmann DPRINTF("xhci: event ring[%d]:" DMA_ADDR_FMT " [%d]\n", 1065962d11e1SGerd Hoffmann v, intr->er_start, intr->er_size); 1066f1ae32a1SGerd Hoffmann } 1067f1ae32a1SGerd Hoffmann 1068f1ae32a1SGerd Hoffmann static void xhci_run(XHCIState *xhci) 1069f1ae32a1SGerd Hoffmann { 1070fc0ddacaSGerd Hoffmann trace_usb_xhci_run(); 1071f1ae32a1SGerd Hoffmann xhci->usbsts &= ~USBSTS_HCH; 107201546fa6SGerd Hoffmann xhci->mfindex_start = qemu_get_clock_ns(vm_clock); 1073f1ae32a1SGerd Hoffmann } 1074f1ae32a1SGerd Hoffmann 1075f1ae32a1SGerd Hoffmann static void xhci_stop(XHCIState *xhci) 1076f1ae32a1SGerd Hoffmann { 1077fc0ddacaSGerd Hoffmann trace_usb_xhci_stop(); 1078f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_HCH; 1079f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~CRCR_CRR; 1080f1ae32a1SGerd Hoffmann } 1081f1ae32a1SGerd Hoffmann 1082024426acSGerd Hoffmann static XHCIStreamContext *xhci_alloc_stream_contexts(unsigned count, 1083024426acSGerd Hoffmann dma_addr_t base) 1084024426acSGerd Hoffmann { 1085024426acSGerd Hoffmann XHCIStreamContext *stctx; 1086024426acSGerd Hoffmann unsigned int i; 1087024426acSGerd Hoffmann 1088024426acSGerd Hoffmann stctx = g_new0(XHCIStreamContext, count); 1089024426acSGerd Hoffmann for (i = 0; i < count; i++) { 1090024426acSGerd Hoffmann stctx[i].pctx = base + i * 16; 1091024426acSGerd Hoffmann stctx[i].sct = -1; 1092024426acSGerd Hoffmann } 1093024426acSGerd Hoffmann return stctx; 1094024426acSGerd Hoffmann } 1095024426acSGerd Hoffmann 1096024426acSGerd Hoffmann static void xhci_reset_streams(XHCIEPContext *epctx) 1097024426acSGerd Hoffmann { 1098024426acSGerd Hoffmann unsigned int i; 1099024426acSGerd Hoffmann 1100024426acSGerd Hoffmann for (i = 0; i < epctx->nr_pstreams; i++) { 1101024426acSGerd Hoffmann epctx->pstreams[i].sct = -1; 1102024426acSGerd Hoffmann g_free(epctx->pstreams[i].sstreams); 1103024426acSGerd Hoffmann } 1104024426acSGerd Hoffmann } 1105024426acSGerd Hoffmann 1106024426acSGerd Hoffmann static void xhci_alloc_streams(XHCIEPContext *epctx, dma_addr_t base) 1107024426acSGerd Hoffmann { 1108024426acSGerd Hoffmann assert(epctx->pstreams == NULL); 1109024426acSGerd Hoffmann epctx->nr_pstreams = 2 << epctx->max_pstreams; 1110024426acSGerd Hoffmann epctx->pstreams = xhci_alloc_stream_contexts(epctx->nr_pstreams, base); 1111024426acSGerd Hoffmann } 1112024426acSGerd Hoffmann 1113024426acSGerd Hoffmann static void xhci_free_streams(XHCIEPContext *epctx) 1114024426acSGerd Hoffmann { 1115024426acSGerd Hoffmann int i; 1116024426acSGerd Hoffmann 1117024426acSGerd Hoffmann assert(epctx->pstreams != NULL); 1118024426acSGerd Hoffmann 1119024426acSGerd Hoffmann if (!epctx->lsa) { 1120024426acSGerd Hoffmann for (i = 0; i < epctx->nr_pstreams; i++) { 1121024426acSGerd Hoffmann g_free(epctx->pstreams[i].sstreams); 1122024426acSGerd Hoffmann } 1123024426acSGerd Hoffmann } 1124024426acSGerd Hoffmann g_free(epctx->pstreams); 1125024426acSGerd Hoffmann epctx->pstreams = NULL; 1126024426acSGerd Hoffmann epctx->nr_pstreams = 0; 1127024426acSGerd Hoffmann } 1128024426acSGerd Hoffmann 1129024426acSGerd Hoffmann static XHCIStreamContext *xhci_find_stream(XHCIEPContext *epctx, 1130024426acSGerd Hoffmann unsigned int streamid, 1131024426acSGerd Hoffmann uint32_t *cc_error) 1132024426acSGerd Hoffmann { 1133024426acSGerd Hoffmann XHCIStreamContext *sctx; 1134024426acSGerd Hoffmann dma_addr_t base; 1135024426acSGerd Hoffmann uint32_t ctx[2], sct; 1136024426acSGerd Hoffmann 1137024426acSGerd Hoffmann assert(streamid != 0); 1138024426acSGerd Hoffmann if (epctx->lsa) { 1139024426acSGerd Hoffmann if (streamid >= epctx->nr_pstreams) { 1140024426acSGerd Hoffmann *cc_error = CC_INVALID_STREAM_ID_ERROR; 1141024426acSGerd Hoffmann return NULL; 1142024426acSGerd Hoffmann } 1143024426acSGerd Hoffmann sctx = epctx->pstreams + streamid; 1144024426acSGerd Hoffmann } else { 1145024426acSGerd Hoffmann FIXME("secondary streams not implemented yet"); 1146024426acSGerd Hoffmann } 1147024426acSGerd Hoffmann 1148024426acSGerd Hoffmann if (sctx->sct == -1) { 1149024426acSGerd Hoffmann xhci_dma_read_u32s(epctx->xhci, sctx->pctx, ctx, sizeof(ctx)); 1150685cbd2fSHervé Poussineau fprintf(stderr, "%s: init sctx #%d @ " DMA_ADDR_FMT ": %08x %08x\n", 1151685cbd2fSHervé Poussineau __func__, streamid, sctx->pctx, ctx[0], ctx[1]); 1152024426acSGerd Hoffmann sct = (ctx[0] >> 1) & 0x07; 1153024426acSGerd Hoffmann if (epctx->lsa && sct != 1) { 1154024426acSGerd Hoffmann *cc_error = CC_INVALID_STREAM_TYPE_ERROR; 1155024426acSGerd Hoffmann return NULL; 1156024426acSGerd Hoffmann } 1157024426acSGerd Hoffmann sctx->sct = sct; 1158024426acSGerd Hoffmann base = xhci_addr64(ctx[0] & ~0xf, ctx[1]); 1159024426acSGerd Hoffmann xhci_ring_init(epctx->xhci, &sctx->ring, base); 1160024426acSGerd Hoffmann } 1161024426acSGerd Hoffmann return sctx; 1162024426acSGerd Hoffmann } 1163024426acSGerd Hoffmann 1164f1ae32a1SGerd Hoffmann static void xhci_set_ep_state(XHCIState *xhci, XHCIEPContext *epctx, 1165024426acSGerd Hoffmann XHCIStreamContext *sctx, uint32_t state) 1166f1ae32a1SGerd Hoffmann { 1167f1ae32a1SGerd Hoffmann uint32_t ctx[5]; 1168024426acSGerd Hoffmann uint32_t ctx2[2]; 1169f1ae32a1SGerd Hoffmann 1170616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, epctx->pctx, ctx, sizeof(ctx)); 1171f1ae32a1SGerd Hoffmann ctx[0] &= ~EP_STATE_MASK; 1172f1ae32a1SGerd Hoffmann ctx[0] |= state; 1173024426acSGerd Hoffmann 1174024426acSGerd Hoffmann /* update ring dequeue ptr */ 1175024426acSGerd Hoffmann if (epctx->nr_pstreams) { 1176024426acSGerd Hoffmann if (sctx != NULL) { 1177024426acSGerd Hoffmann xhci_dma_read_u32s(xhci, sctx->pctx, ctx2, sizeof(ctx2)); 1178024426acSGerd Hoffmann ctx2[0] &= 0xe; 1179024426acSGerd Hoffmann ctx2[0] |= sctx->ring.dequeue | sctx->ring.ccs; 1180024426acSGerd Hoffmann ctx2[1] = (sctx->ring.dequeue >> 16) >> 16; 1181024426acSGerd Hoffmann xhci_dma_write_u32s(xhci, sctx->pctx, ctx2, sizeof(ctx2)); 1182024426acSGerd Hoffmann } 1183024426acSGerd Hoffmann } else { 1184f1ae32a1SGerd Hoffmann ctx[2] = epctx->ring.dequeue | epctx->ring.ccs; 1185f1ae32a1SGerd Hoffmann ctx[3] = (epctx->ring.dequeue >> 16) >> 16; 118659a70ccdSDavid Gibson DPRINTF("xhci: set epctx: " DMA_ADDR_FMT " state=%d dequeue=%08x%08x\n", 1187f1ae32a1SGerd Hoffmann epctx->pctx, state, ctx[3], ctx[2]); 1188024426acSGerd Hoffmann } 1189024426acSGerd Hoffmann 1190616b5d53SDavid Gibson xhci_dma_write_u32s(xhci, epctx->pctx, ctx, sizeof(ctx)); 1191f1ae32a1SGerd Hoffmann epctx->state = state; 1192f1ae32a1SGerd Hoffmann } 1193f1ae32a1SGerd Hoffmann 11943d139684SGerd Hoffmann static void xhci_ep_kick_timer(void *opaque) 11953d139684SGerd Hoffmann { 11963d139684SGerd Hoffmann XHCIEPContext *epctx = opaque; 1197024426acSGerd Hoffmann xhci_kick_ep(epctx->xhci, epctx->slotid, epctx->epid, 0); 11983d139684SGerd Hoffmann } 11993d139684SGerd Hoffmann 1200f1ae32a1SGerd Hoffmann static TRBCCode xhci_enable_ep(XHCIState *xhci, unsigned int slotid, 120159a70ccdSDavid Gibson unsigned int epid, dma_addr_t pctx, 1202f1ae32a1SGerd Hoffmann uint32_t *ctx) 1203f1ae32a1SGerd Hoffmann { 1204f1ae32a1SGerd Hoffmann XHCISlot *slot; 1205f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 120659a70ccdSDavid Gibson dma_addr_t dequeue; 1207f1ae32a1SGerd Hoffmann int i; 1208f1ae32a1SGerd Hoffmann 1209c1f6b493SGerd Hoffmann trace_usb_xhci_ep_enable(slotid, epid); 121091062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 1211f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1212f1ae32a1SGerd Hoffmann 1213f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1214f1ae32a1SGerd Hoffmann if (slot->eps[epid-1]) { 12150bc85da6SGerd Hoffmann xhci_disable_ep(xhci, slotid, epid); 1216f1ae32a1SGerd Hoffmann } 1217f1ae32a1SGerd Hoffmann 1218f1ae32a1SGerd Hoffmann epctx = g_malloc(sizeof(XHCIEPContext)); 1219f1ae32a1SGerd Hoffmann memset(epctx, 0, sizeof(XHCIEPContext)); 12203d139684SGerd Hoffmann epctx->xhci = xhci; 12213d139684SGerd Hoffmann epctx->slotid = slotid; 12223d139684SGerd Hoffmann epctx->epid = epid; 1223f1ae32a1SGerd Hoffmann 1224f1ae32a1SGerd Hoffmann slot->eps[epid-1] = epctx; 1225f1ae32a1SGerd Hoffmann 1226f1ae32a1SGerd Hoffmann dequeue = xhci_addr64(ctx[2] & ~0xf, ctx[3]); 1227f1ae32a1SGerd Hoffmann 1228f1ae32a1SGerd Hoffmann epctx->type = (ctx[1] >> EP_TYPE_SHIFT) & EP_TYPE_MASK; 1229f1ae32a1SGerd Hoffmann DPRINTF("xhci: endpoint %d.%d type is %d\n", epid/2, epid%2, epctx->type); 1230f1ae32a1SGerd Hoffmann epctx->pctx = pctx; 1231f1ae32a1SGerd Hoffmann epctx->max_psize = ctx[1]>>16; 1232f1ae32a1SGerd Hoffmann epctx->max_psize *= 1+((ctx[1]>>8)&0xff); 1233024426acSGerd Hoffmann epctx->max_pstreams = (ctx[0] >> 10) & 0xf; 1234024426acSGerd Hoffmann epctx->lsa = (ctx[0] >> 15) & 1; 1235f1ae32a1SGerd Hoffmann DPRINTF("xhci: endpoint %d.%d max transaction (burst) size is %d\n", 1236f1ae32a1SGerd Hoffmann epid/2, epid%2, epctx->max_psize); 1237024426acSGerd Hoffmann if (epctx->max_pstreams) { 1238024426acSGerd Hoffmann xhci_alloc_streams(epctx, dequeue); 1239024426acSGerd Hoffmann } else { 1240024426acSGerd Hoffmann xhci_ring_init(xhci, &epctx->ring, dequeue); 1241024426acSGerd Hoffmann epctx->ring.ccs = ctx[2] & 1; 1242024426acSGerd Hoffmann } 1243f1ae32a1SGerd Hoffmann for (i = 0; i < ARRAY_SIZE(epctx->transfers); i++) { 1244f1ae32a1SGerd Hoffmann usb_packet_init(&epctx->transfers[i].packet); 1245f1ae32a1SGerd Hoffmann } 1246f1ae32a1SGerd Hoffmann 12473d139684SGerd Hoffmann epctx->interval = 1 << (ctx[0] >> 16) & 0xff; 12483d139684SGerd Hoffmann epctx->mfindex_last = 0; 12493d139684SGerd Hoffmann epctx->kick_timer = qemu_new_timer_ns(vm_clock, xhci_ep_kick_timer, epctx); 12503d139684SGerd Hoffmann 1251f1ae32a1SGerd Hoffmann epctx->state = EP_RUNNING; 1252f1ae32a1SGerd Hoffmann ctx[0] &= ~EP_STATE_MASK; 1253f1ae32a1SGerd Hoffmann ctx[0] |= EP_RUNNING; 1254f1ae32a1SGerd Hoffmann 1255f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1256f1ae32a1SGerd Hoffmann } 1257f1ae32a1SGerd Hoffmann 12583151f209SHans de Goede static int xhci_ep_nuke_one_xfer(XHCITransfer *t) 12593151f209SHans de Goede { 12603151f209SHans de Goede int killed = 0; 12613151f209SHans de Goede 12623151f209SHans de Goede if (t->running_async) { 12633151f209SHans de Goede usb_cancel_packet(&t->packet); 12643151f209SHans de Goede t->running_async = 0; 12653151f209SHans de Goede t->cancelled = 1; 12663151f209SHans de Goede DPRINTF("xhci: cancelling transfer, waiting for it to complete\n"); 12673151f209SHans de Goede killed = 1; 12683151f209SHans de Goede } 12693151f209SHans de Goede if (t->running_retry) { 12703151f209SHans de Goede XHCIEPContext *epctx = t->xhci->slots[t->slotid-1].eps[t->epid-1]; 12713151f209SHans de Goede if (epctx) { 12723151f209SHans de Goede epctx->retry = NULL; 12733151f209SHans de Goede qemu_del_timer(epctx->kick_timer); 12743151f209SHans de Goede } 12753151f209SHans de Goede t->running_retry = 0; 12763151f209SHans de Goede } 12773151f209SHans de Goede if (t->trbs) { 12783151f209SHans de Goede g_free(t->trbs); 12793151f209SHans de Goede } 12803151f209SHans de Goede 12813151f209SHans de Goede t->trbs = NULL; 12823151f209SHans de Goede t->trb_count = t->trb_alloced = 0; 12833151f209SHans de Goede 12843151f209SHans de Goede return killed; 12853151f209SHans de Goede } 12863151f209SHans de Goede 1287f1ae32a1SGerd Hoffmann static int xhci_ep_nuke_xfers(XHCIState *xhci, unsigned int slotid, 1288f1ae32a1SGerd Hoffmann unsigned int epid) 1289f1ae32a1SGerd Hoffmann { 1290f1ae32a1SGerd Hoffmann XHCISlot *slot; 1291f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1292f1ae32a1SGerd Hoffmann int i, xferi, killed = 0; 1293f79738b0SHans de Goede USBEndpoint *ep = NULL; 129491062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 1295f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1296f1ae32a1SGerd Hoffmann 1297f1ae32a1SGerd Hoffmann DPRINTF("xhci_ep_nuke_xfers(%d, %d)\n", slotid, epid); 1298f1ae32a1SGerd Hoffmann 1299f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1300f1ae32a1SGerd Hoffmann 1301f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1302f1ae32a1SGerd Hoffmann return 0; 1303f1ae32a1SGerd Hoffmann } 1304f1ae32a1SGerd Hoffmann 1305f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1306f1ae32a1SGerd Hoffmann 1307f1ae32a1SGerd Hoffmann xferi = epctx->next_xfer; 1308f1ae32a1SGerd Hoffmann for (i = 0; i < TD_QUEUE; i++) { 1309f79738b0SHans de Goede if (epctx->transfers[xferi].packet.ep) { 1310f79738b0SHans de Goede ep = epctx->transfers[xferi].packet.ep; 1311f79738b0SHans de Goede } 13123151f209SHans de Goede killed += xhci_ep_nuke_one_xfer(&epctx->transfers[xferi]); 13130cb41e2cSGerd Hoffmann epctx->transfers[xferi].packet.ep = NULL; 1314f1ae32a1SGerd Hoffmann xferi = (xferi + 1) % TD_QUEUE; 1315f1ae32a1SGerd Hoffmann } 1316f79738b0SHans de Goede if (ep) { 1317f79738b0SHans de Goede usb_device_ep_stopped(ep->dev, ep); 1318f79738b0SHans de Goede } 1319f1ae32a1SGerd Hoffmann return killed; 1320f1ae32a1SGerd Hoffmann } 1321f1ae32a1SGerd Hoffmann 1322f1ae32a1SGerd Hoffmann static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid, 1323f1ae32a1SGerd Hoffmann unsigned int epid) 1324f1ae32a1SGerd Hoffmann { 1325f1ae32a1SGerd Hoffmann XHCISlot *slot; 1326f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1327f1ae32a1SGerd Hoffmann 1328c1f6b493SGerd Hoffmann trace_usb_xhci_ep_disable(slotid, epid); 132991062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 1330f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1331f1ae32a1SGerd Hoffmann 1332f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1333f1ae32a1SGerd Hoffmann 1334f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1335f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d already disabled\n", slotid, epid); 1336f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1337f1ae32a1SGerd Hoffmann } 1338f1ae32a1SGerd Hoffmann 1339f1ae32a1SGerd Hoffmann xhci_ep_nuke_xfers(xhci, slotid, epid); 1340f1ae32a1SGerd Hoffmann 1341f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1342f1ae32a1SGerd Hoffmann 1343024426acSGerd Hoffmann if (epctx->nr_pstreams) { 1344024426acSGerd Hoffmann xhci_free_streams(epctx); 1345024426acSGerd Hoffmann } 1346024426acSGerd Hoffmann 1347024426acSGerd Hoffmann xhci_set_ep_state(xhci, epctx, NULL, EP_DISABLED); 1348f1ae32a1SGerd Hoffmann 13493d139684SGerd Hoffmann qemu_free_timer(epctx->kick_timer); 1350f1ae32a1SGerd Hoffmann g_free(epctx); 1351f1ae32a1SGerd Hoffmann slot->eps[epid-1] = NULL; 1352f1ae32a1SGerd Hoffmann 1353f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1354f1ae32a1SGerd Hoffmann } 1355f1ae32a1SGerd Hoffmann 1356f1ae32a1SGerd Hoffmann static TRBCCode xhci_stop_ep(XHCIState *xhci, unsigned int slotid, 1357f1ae32a1SGerd Hoffmann unsigned int epid) 1358f1ae32a1SGerd Hoffmann { 1359f1ae32a1SGerd Hoffmann XHCISlot *slot; 1360f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1361f1ae32a1SGerd Hoffmann 1362c1f6b493SGerd Hoffmann trace_usb_xhci_ep_stop(slotid, epid); 136391062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 1364f1ae32a1SGerd Hoffmann 1365f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1366f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1367f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1368f1ae32a1SGerd Hoffmann } 1369f1ae32a1SGerd Hoffmann 1370f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1371f1ae32a1SGerd Hoffmann 1372f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1373f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1374f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1375f1ae32a1SGerd Hoffmann } 1376f1ae32a1SGerd Hoffmann 1377f1ae32a1SGerd Hoffmann if (xhci_ep_nuke_xfers(xhci, slotid, epid) > 0) { 1378f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: FIXME: endpoint stopped w/ xfers running, " 1379f1ae32a1SGerd Hoffmann "data might be lost\n"); 1380f1ae32a1SGerd Hoffmann } 1381f1ae32a1SGerd Hoffmann 1382f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1383f1ae32a1SGerd Hoffmann 1384024426acSGerd Hoffmann xhci_set_ep_state(xhci, epctx, NULL, EP_STOPPED); 1385024426acSGerd Hoffmann 1386024426acSGerd Hoffmann if (epctx->nr_pstreams) { 1387024426acSGerd Hoffmann xhci_reset_streams(epctx); 1388024426acSGerd Hoffmann } 1389f1ae32a1SGerd Hoffmann 1390f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1391f1ae32a1SGerd Hoffmann } 1392f1ae32a1SGerd Hoffmann 1393f1ae32a1SGerd Hoffmann static TRBCCode xhci_reset_ep(XHCIState *xhci, unsigned int slotid, 1394f1ae32a1SGerd Hoffmann unsigned int epid) 1395f1ae32a1SGerd Hoffmann { 1396f1ae32a1SGerd Hoffmann XHCISlot *slot; 1397f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1398f1ae32a1SGerd Hoffmann USBDevice *dev; 1399f1ae32a1SGerd Hoffmann 1400c1f6b493SGerd Hoffmann trace_usb_xhci_ep_reset(slotid, epid); 140191062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 1402f1ae32a1SGerd Hoffmann 1403f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1404f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1405f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1406f1ae32a1SGerd Hoffmann } 1407f1ae32a1SGerd Hoffmann 1408f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1409f1ae32a1SGerd Hoffmann 1410f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1411f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1412f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1413f1ae32a1SGerd Hoffmann } 1414f1ae32a1SGerd Hoffmann 1415f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1416f1ae32a1SGerd Hoffmann 1417f1ae32a1SGerd Hoffmann if (epctx->state != EP_HALTED) { 1418f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: reset EP while EP %d not halted (%d)\n", 1419f1ae32a1SGerd Hoffmann epid, epctx->state); 1420f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1421f1ae32a1SGerd Hoffmann } 1422f1ae32a1SGerd Hoffmann 1423f1ae32a1SGerd Hoffmann if (xhci_ep_nuke_xfers(xhci, slotid, epid) > 0) { 1424f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: FIXME: endpoint reset w/ xfers running, " 1425f1ae32a1SGerd Hoffmann "data might be lost\n"); 1426f1ae32a1SGerd Hoffmann } 1427f1ae32a1SGerd Hoffmann 1428f1ae32a1SGerd Hoffmann uint8_t ep = epid>>1; 1429f1ae32a1SGerd Hoffmann 1430f1ae32a1SGerd Hoffmann if (epid & 1) { 1431f1ae32a1SGerd Hoffmann ep |= 0x80; 1432f1ae32a1SGerd Hoffmann } 1433f1ae32a1SGerd Hoffmann 1434ccaf87a0SGerd Hoffmann dev = xhci->slots[slotid-1].uport->dev; 1435f1ae32a1SGerd Hoffmann if (!dev) { 1436f1ae32a1SGerd Hoffmann return CC_USB_TRANSACTION_ERROR; 1437f1ae32a1SGerd Hoffmann } 1438f1ae32a1SGerd Hoffmann 1439024426acSGerd Hoffmann xhci_set_ep_state(xhci, epctx, NULL, EP_STOPPED); 1440024426acSGerd Hoffmann 1441024426acSGerd Hoffmann if (epctx->nr_pstreams) { 1442024426acSGerd Hoffmann xhci_reset_streams(epctx); 1443024426acSGerd Hoffmann } 1444f1ae32a1SGerd Hoffmann 1445f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1446f1ae32a1SGerd Hoffmann } 1447f1ae32a1SGerd Hoffmann 1448f1ae32a1SGerd Hoffmann static TRBCCode xhci_set_ep_dequeue(XHCIState *xhci, unsigned int slotid, 1449024426acSGerd Hoffmann unsigned int epid, unsigned int streamid, 1450024426acSGerd Hoffmann uint64_t pdequeue) 1451f1ae32a1SGerd Hoffmann { 1452f1ae32a1SGerd Hoffmann XHCISlot *slot; 1453f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1454024426acSGerd Hoffmann XHCIStreamContext *sctx; 145559a70ccdSDavid Gibson dma_addr_t dequeue; 1456f1ae32a1SGerd Hoffmann 145791062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 1458f1ae32a1SGerd Hoffmann 1459f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1460f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1461f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1462f1ae32a1SGerd Hoffmann } 1463f1ae32a1SGerd Hoffmann 1464024426acSGerd Hoffmann trace_usb_xhci_ep_set_dequeue(slotid, epid, streamid, pdequeue); 1465f1ae32a1SGerd Hoffmann dequeue = xhci_mask64(pdequeue); 1466f1ae32a1SGerd Hoffmann 1467f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1468f1ae32a1SGerd Hoffmann 1469f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1470f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1471f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1472f1ae32a1SGerd Hoffmann } 1473f1ae32a1SGerd Hoffmann 1474f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1475f1ae32a1SGerd Hoffmann 1476f1ae32a1SGerd Hoffmann if (epctx->state != EP_STOPPED) { 1477f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: set EP dequeue pointer while EP %d not stopped\n", epid); 1478f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1479f1ae32a1SGerd Hoffmann } 1480f1ae32a1SGerd Hoffmann 1481024426acSGerd Hoffmann if (epctx->nr_pstreams) { 1482024426acSGerd Hoffmann uint32_t err; 1483024426acSGerd Hoffmann sctx = xhci_find_stream(epctx, streamid, &err); 1484024426acSGerd Hoffmann if (sctx == NULL) { 1485024426acSGerd Hoffmann return err; 1486024426acSGerd Hoffmann } 1487024426acSGerd Hoffmann xhci_ring_init(xhci, &sctx->ring, dequeue & ~0xf); 1488024426acSGerd Hoffmann sctx->ring.ccs = dequeue & 1; 1489024426acSGerd Hoffmann } else { 1490024426acSGerd Hoffmann sctx = NULL; 1491f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &epctx->ring, dequeue & ~0xF); 1492f1ae32a1SGerd Hoffmann epctx->ring.ccs = dequeue & 1; 1493024426acSGerd Hoffmann } 1494f1ae32a1SGerd Hoffmann 1495024426acSGerd Hoffmann xhci_set_ep_state(xhci, epctx, sctx, EP_STOPPED); 1496f1ae32a1SGerd Hoffmann 1497f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1498f1ae32a1SGerd Hoffmann } 1499f1ae32a1SGerd Hoffmann 1500a6fb2ddbSHans de Goede static int xhci_xfer_create_sgl(XHCITransfer *xfer, int in_xfer) 1501f1ae32a1SGerd Hoffmann { 1502f1ae32a1SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1503d5a15814SGerd Hoffmann int i; 1504f1ae32a1SGerd Hoffmann 1505a6fb2ddbSHans de Goede xfer->int_req = false; 1506d5a15814SGerd Hoffmann pci_dma_sglist_init(&xfer->sgl, &xhci->pci_dev, xfer->trb_count); 1507f1ae32a1SGerd Hoffmann for (i = 0; i < xfer->trb_count; i++) { 1508f1ae32a1SGerd Hoffmann XHCITRB *trb = &xfer->trbs[i]; 150959a70ccdSDavid Gibson dma_addr_t addr; 1510f1ae32a1SGerd Hoffmann unsigned int chunk = 0; 1511f1ae32a1SGerd Hoffmann 1512a6fb2ddbSHans de Goede if (trb->control & TRB_TR_IOC) { 1513a6fb2ddbSHans de Goede xfer->int_req = true; 1514a6fb2ddbSHans de Goede } 1515a6fb2ddbSHans de Goede 1516f1ae32a1SGerd Hoffmann switch (TRB_TYPE(*trb)) { 1517f1ae32a1SGerd Hoffmann case TR_DATA: 1518f1ae32a1SGerd Hoffmann if ((!(trb->control & TRB_TR_DIR)) != (!in_xfer)) { 1519f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: data direction mismatch for TR_DATA\n"); 1520d5a15814SGerd Hoffmann goto err; 1521f1ae32a1SGerd Hoffmann } 1522f1ae32a1SGerd Hoffmann /* fallthrough */ 1523f1ae32a1SGerd Hoffmann case TR_NORMAL: 1524f1ae32a1SGerd Hoffmann case TR_ISOCH: 1525f1ae32a1SGerd Hoffmann addr = xhci_mask64(trb->parameter); 1526f1ae32a1SGerd Hoffmann chunk = trb->status & 0x1ffff; 1527f1ae32a1SGerd Hoffmann if (trb->control & TRB_TR_IDT) { 1528f1ae32a1SGerd Hoffmann if (chunk > 8 || in_xfer) { 1529f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid immediate data TRB\n"); 1530d5a15814SGerd Hoffmann goto err; 1531d5a15814SGerd Hoffmann } 1532d5a15814SGerd Hoffmann qemu_sglist_add(&xfer->sgl, trb->addr, chunk); 1533d5a15814SGerd Hoffmann } else { 1534d5a15814SGerd Hoffmann qemu_sglist_add(&xfer->sgl, addr, chunk); 1535d5a15814SGerd Hoffmann } 1536d5a15814SGerd Hoffmann break; 1537d5a15814SGerd Hoffmann } 1538d5a15814SGerd Hoffmann } 1539d5a15814SGerd Hoffmann 1540d5a15814SGerd Hoffmann return 0; 1541d5a15814SGerd Hoffmann 1542d5a15814SGerd Hoffmann err: 1543d5a15814SGerd Hoffmann qemu_sglist_destroy(&xfer->sgl); 1544f1ae32a1SGerd Hoffmann xhci_die(xhci); 1545d5a15814SGerd Hoffmann return -1; 1546f1ae32a1SGerd Hoffmann } 1547d5a15814SGerd Hoffmann 1548d5a15814SGerd Hoffmann static void xhci_xfer_unmap(XHCITransfer *xfer) 1549d5a15814SGerd Hoffmann { 1550d5a15814SGerd Hoffmann usb_packet_unmap(&xfer->packet, &xfer->sgl); 1551d5a15814SGerd Hoffmann qemu_sglist_destroy(&xfer->sgl); 1552f1ae32a1SGerd Hoffmann } 1553d5a15814SGerd Hoffmann 1554d5a15814SGerd Hoffmann static void xhci_xfer_report(XHCITransfer *xfer) 1555d5a15814SGerd Hoffmann { 1556d5a15814SGerd Hoffmann uint32_t edtla = 0; 1557d5a15814SGerd Hoffmann unsigned int left; 1558d5a15814SGerd Hoffmann bool reported = 0; 1559d5a15814SGerd Hoffmann bool shortpkt = 0; 1560d5a15814SGerd Hoffmann XHCIEvent event = {ER_TRANSFER, CC_SUCCESS}; 1561d5a15814SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1562f1ae32a1SGerd Hoffmann int i; 1563d5a15814SGerd Hoffmann 15649b8251c5SHans de Goede left = xfer->packet.actual_length; 1565d5a15814SGerd Hoffmann 1566d5a15814SGerd Hoffmann for (i = 0; i < xfer->trb_count; i++) { 1567d5a15814SGerd Hoffmann XHCITRB *trb = &xfer->trbs[i]; 1568d5a15814SGerd Hoffmann unsigned int chunk = 0; 1569d5a15814SGerd Hoffmann 1570d5a15814SGerd Hoffmann switch (TRB_TYPE(*trb)) { 1571d5a15814SGerd Hoffmann case TR_DATA: 1572d5a15814SGerd Hoffmann case TR_NORMAL: 1573d5a15814SGerd Hoffmann case TR_ISOCH: 1574d5a15814SGerd Hoffmann chunk = trb->status & 0x1ffff; 1575d5a15814SGerd Hoffmann if (chunk > left) { 1576d5a15814SGerd Hoffmann chunk = left; 1577d5a15814SGerd Hoffmann if (xfer->status == CC_SUCCESS) { 1578d5a15814SGerd Hoffmann shortpkt = 1; 1579f1ae32a1SGerd Hoffmann } 1580f1ae32a1SGerd Hoffmann } 1581f1ae32a1SGerd Hoffmann left -= chunk; 1582f1ae32a1SGerd Hoffmann edtla += chunk; 1583f1ae32a1SGerd Hoffmann break; 1584f1ae32a1SGerd Hoffmann case TR_STATUS: 1585f1ae32a1SGerd Hoffmann reported = 0; 1586f1ae32a1SGerd Hoffmann shortpkt = 0; 1587f1ae32a1SGerd Hoffmann break; 1588f1ae32a1SGerd Hoffmann } 1589f1ae32a1SGerd Hoffmann 1590d5a15814SGerd Hoffmann if (!reported && ((trb->control & TRB_TR_IOC) || 1591d5a15814SGerd Hoffmann (shortpkt && (trb->control & TRB_TR_ISP)) || 15929b8251c5SHans de Goede (xfer->status != CC_SUCCESS && left == 0))) { 1593f1ae32a1SGerd Hoffmann event.slotid = xfer->slotid; 1594f1ae32a1SGerd Hoffmann event.epid = xfer->epid; 1595f1ae32a1SGerd Hoffmann event.length = (trb->status & 0x1ffff) - chunk; 1596f1ae32a1SGerd Hoffmann event.flags = 0; 1597f1ae32a1SGerd Hoffmann event.ptr = trb->addr; 1598f1ae32a1SGerd Hoffmann if (xfer->status == CC_SUCCESS) { 1599f1ae32a1SGerd Hoffmann event.ccode = shortpkt ? CC_SHORT_PACKET : CC_SUCCESS; 1600f1ae32a1SGerd Hoffmann } else { 1601f1ae32a1SGerd Hoffmann event.ccode = xfer->status; 1602f1ae32a1SGerd Hoffmann } 1603f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb) == TR_EVDATA) { 1604f1ae32a1SGerd Hoffmann event.ptr = trb->parameter; 1605f1ae32a1SGerd Hoffmann event.flags |= TRB_EV_ED; 1606f1ae32a1SGerd Hoffmann event.length = edtla & 0xffffff; 1607f1ae32a1SGerd Hoffmann DPRINTF("xhci_xfer_data: EDTLA=%d\n", event.length); 1608f1ae32a1SGerd Hoffmann edtla = 0; 1609f1ae32a1SGerd Hoffmann } 16102d1de850SGerd Hoffmann xhci_event(xhci, &event, TRB_INTR(*trb)); 1611f1ae32a1SGerd Hoffmann reported = 1; 1612d5a15814SGerd Hoffmann if (xfer->status != CC_SUCCESS) { 1613d5a15814SGerd Hoffmann return; 1614f1ae32a1SGerd Hoffmann } 1615f1ae32a1SGerd Hoffmann } 1616d5a15814SGerd Hoffmann } 1617f1ae32a1SGerd Hoffmann } 1618f1ae32a1SGerd Hoffmann 1619f1ae32a1SGerd Hoffmann static void xhci_stall_ep(XHCITransfer *xfer) 1620f1ae32a1SGerd Hoffmann { 1621f1ae32a1SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1622f1ae32a1SGerd Hoffmann XHCISlot *slot = &xhci->slots[xfer->slotid-1]; 1623f1ae32a1SGerd Hoffmann XHCIEPContext *epctx = slot->eps[xfer->epid-1]; 1624024426acSGerd Hoffmann uint32_t err; 1625024426acSGerd Hoffmann XHCIStreamContext *sctx; 1626f1ae32a1SGerd Hoffmann 1627024426acSGerd Hoffmann if (epctx->nr_pstreams) { 1628024426acSGerd Hoffmann sctx = xhci_find_stream(epctx, xfer->streamid, &err); 1629024426acSGerd Hoffmann if (sctx == NULL) { 1630024426acSGerd Hoffmann return; 1631024426acSGerd Hoffmann } 1632024426acSGerd Hoffmann sctx->ring.dequeue = xfer->trbs[0].addr; 1633024426acSGerd Hoffmann sctx->ring.ccs = xfer->trbs[0].ccs; 1634024426acSGerd Hoffmann xhci_set_ep_state(xhci, epctx, sctx, EP_HALTED); 1635024426acSGerd Hoffmann } else { 1636f1ae32a1SGerd Hoffmann epctx->ring.dequeue = xfer->trbs[0].addr; 1637f1ae32a1SGerd Hoffmann epctx->ring.ccs = xfer->trbs[0].ccs; 1638024426acSGerd Hoffmann xhci_set_ep_state(xhci, epctx, NULL, EP_HALTED); 1639024426acSGerd Hoffmann } 1640f1ae32a1SGerd Hoffmann } 1641f1ae32a1SGerd Hoffmann 1642f1ae32a1SGerd Hoffmann static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, 1643f1ae32a1SGerd Hoffmann XHCIEPContext *epctx); 1644f1ae32a1SGerd Hoffmann 16455c08106fSGerd Hoffmann static int xhci_setup_packet(XHCITransfer *xfer) 16465c08106fSGerd Hoffmann { 16475c08106fSGerd Hoffmann XHCIState *xhci = xfer->xhci; 16485c08106fSGerd Hoffmann USBDevice *dev; 1649f1ae32a1SGerd Hoffmann USBEndpoint *ep; 1650f1ae32a1SGerd Hoffmann int dir; 1651f1ae32a1SGerd Hoffmann 1652f1ae32a1SGerd Hoffmann dir = xfer->in_xfer ? USB_TOKEN_IN : USB_TOKEN_OUT; 16535c08106fSGerd Hoffmann 16545c08106fSGerd Hoffmann if (xfer->packet.ep) { 16555c08106fSGerd Hoffmann ep = xfer->packet.ep; 16565c08106fSGerd Hoffmann dev = ep->dev; 16575c08106fSGerd Hoffmann } else { 1658ccaf87a0SGerd Hoffmann if (!xhci->slots[xfer->slotid-1].uport) { 1659ccaf87a0SGerd Hoffmann fprintf(stderr, "xhci: slot %d has no device\n", 1660ccaf87a0SGerd Hoffmann xfer->slotid); 16615c08106fSGerd Hoffmann return -1; 16625c08106fSGerd Hoffmann } 1663ccaf87a0SGerd Hoffmann dev = xhci->slots[xfer->slotid-1].uport->dev; 1664f1ae32a1SGerd Hoffmann ep = usb_ep_get(dev, dir, xfer->epid >> 1); 16655c08106fSGerd Hoffmann } 16665c08106fSGerd Hoffmann 1667a6fb2ddbSHans de Goede xhci_xfer_create_sgl(xfer, dir == USB_TOKEN_IN); /* Also sets int_req */ 1668024426acSGerd Hoffmann usb_packet_setup(&xfer->packet, dir, ep, xfer->streamid, 16698550a02dSGerd Hoffmann xfer->trbs[0].addr, false, xfer->int_req); 1670a6fb2ddbSHans de Goede usb_packet_map(&xfer->packet, &xfer->sgl); 1671f1ae32a1SGerd Hoffmann DPRINTF("xhci: setup packet pid 0x%x addr %d ep %d\n", 1672f1ae32a1SGerd Hoffmann xfer->packet.pid, dev->addr, ep->nr); 1673f1ae32a1SGerd Hoffmann return 0; 1674f1ae32a1SGerd Hoffmann } 1675f1ae32a1SGerd Hoffmann 16769a77a0f5SHans de Goede static int xhci_complete_packet(XHCITransfer *xfer) 1677f1ae32a1SGerd Hoffmann { 16789a77a0f5SHans de Goede if (xfer->packet.status == USB_RET_ASYNC) { 167997df650bSGerd Hoffmann trace_usb_xhci_xfer_async(xfer); 1680f1ae32a1SGerd Hoffmann xfer->running_async = 1; 1681f1ae32a1SGerd Hoffmann xfer->running_retry = 0; 1682f1ae32a1SGerd Hoffmann xfer->complete = 0; 1683f1ae32a1SGerd Hoffmann xfer->cancelled = 0; 1684f1ae32a1SGerd Hoffmann return 0; 16859a77a0f5SHans de Goede } else if (xfer->packet.status == USB_RET_NAK) { 168697df650bSGerd Hoffmann trace_usb_xhci_xfer_nak(xfer); 1687f1ae32a1SGerd Hoffmann xfer->running_async = 0; 1688f1ae32a1SGerd Hoffmann xfer->running_retry = 1; 1689f1ae32a1SGerd Hoffmann xfer->complete = 0; 1690f1ae32a1SGerd Hoffmann xfer->cancelled = 0; 1691f1ae32a1SGerd Hoffmann return 0; 1692f1ae32a1SGerd Hoffmann } else { 1693f1ae32a1SGerd Hoffmann xfer->running_async = 0; 1694f1ae32a1SGerd Hoffmann xfer->running_retry = 0; 1695f1ae32a1SGerd Hoffmann xfer->complete = 1; 1696d5a15814SGerd Hoffmann xhci_xfer_unmap(xfer); 1697f1ae32a1SGerd Hoffmann } 1698f1ae32a1SGerd Hoffmann 16999a77a0f5SHans de Goede if (xfer->packet.status == USB_RET_SUCCESS) { 17009a77a0f5SHans de Goede trace_usb_xhci_xfer_success(xfer, xfer->packet.actual_length); 1701d5a15814SGerd Hoffmann xfer->status = CC_SUCCESS; 1702d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1703f1ae32a1SGerd Hoffmann return 0; 1704f1ae32a1SGerd Hoffmann } 1705f1ae32a1SGerd Hoffmann 1706f1ae32a1SGerd Hoffmann /* error */ 17079a77a0f5SHans de Goede trace_usb_xhci_xfer_error(xfer, xfer->packet.status); 17089a77a0f5SHans de Goede switch (xfer->packet.status) { 1709f1ae32a1SGerd Hoffmann case USB_RET_NODEV: 1710f1ae32a1SGerd Hoffmann xfer->status = CC_USB_TRANSACTION_ERROR; 1711d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1712f1ae32a1SGerd Hoffmann xhci_stall_ep(xfer); 1713f1ae32a1SGerd Hoffmann break; 1714f1ae32a1SGerd Hoffmann case USB_RET_STALL: 1715f1ae32a1SGerd Hoffmann xfer->status = CC_STALL_ERROR; 1716d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1717f1ae32a1SGerd Hoffmann xhci_stall_ep(xfer); 1718f1ae32a1SGerd Hoffmann break; 1719*4e906d56SGerd Hoffmann case USB_RET_BABBLE: 1720*4e906d56SGerd Hoffmann xfer->status = CC_BABBLE_DETECTED; 1721*4e906d56SGerd Hoffmann xhci_xfer_report(xfer); 1722*4e906d56SGerd Hoffmann xhci_stall_ep(xfer); 1723*4e906d56SGerd Hoffmann break; 1724f1ae32a1SGerd Hoffmann default: 17259a77a0f5SHans de Goede fprintf(stderr, "%s: FIXME: status = %d\n", __func__, 17269a77a0f5SHans de Goede xfer->packet.status); 1727024426acSGerd Hoffmann FIXME("unhandled USB_RET_*"); 1728f1ae32a1SGerd Hoffmann } 1729f1ae32a1SGerd Hoffmann return 0; 1730f1ae32a1SGerd Hoffmann } 1731f1ae32a1SGerd Hoffmann 1732f1ae32a1SGerd Hoffmann static int xhci_fire_ctl_transfer(XHCIState *xhci, XHCITransfer *xfer) 1733f1ae32a1SGerd Hoffmann { 1734f1ae32a1SGerd Hoffmann XHCITRB *trb_setup, *trb_status; 1735f1ae32a1SGerd Hoffmann uint8_t bmRequestType; 1736f1ae32a1SGerd Hoffmann 1737f1ae32a1SGerd Hoffmann trb_setup = &xfer->trbs[0]; 1738f1ae32a1SGerd Hoffmann trb_status = &xfer->trbs[xfer->trb_count-1]; 1739f1ae32a1SGerd Hoffmann 1740024426acSGerd Hoffmann trace_usb_xhci_xfer_start(xfer, xfer->slotid, xfer->epid, xfer->streamid); 174197df650bSGerd Hoffmann 1742f1ae32a1SGerd Hoffmann /* at most one Event Data TRB allowed after STATUS */ 1743f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_status) == TR_EVDATA && xfer->trb_count > 2) { 1744f1ae32a1SGerd Hoffmann trb_status--; 1745f1ae32a1SGerd Hoffmann } 1746f1ae32a1SGerd Hoffmann 1747f1ae32a1SGerd Hoffmann /* do some sanity checks */ 1748f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_setup) != TR_SETUP) { 1749f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: ep0 first TD not SETUP: %d\n", 1750f1ae32a1SGerd Hoffmann TRB_TYPE(*trb_setup)); 1751f1ae32a1SGerd Hoffmann return -1; 1752f1ae32a1SGerd Hoffmann } 1753f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_status) != TR_STATUS) { 1754f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: ep0 last TD not STATUS: %d\n", 1755f1ae32a1SGerd Hoffmann TRB_TYPE(*trb_status)); 1756f1ae32a1SGerd Hoffmann return -1; 1757f1ae32a1SGerd Hoffmann } 1758f1ae32a1SGerd Hoffmann if (!(trb_setup->control & TRB_TR_IDT)) { 1759f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: Setup TRB doesn't have IDT set\n"); 1760f1ae32a1SGerd Hoffmann return -1; 1761f1ae32a1SGerd Hoffmann } 1762f1ae32a1SGerd Hoffmann if ((trb_setup->status & 0x1ffff) != 8) { 1763f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: Setup TRB has bad length (%d)\n", 1764f1ae32a1SGerd Hoffmann (trb_setup->status & 0x1ffff)); 1765f1ae32a1SGerd Hoffmann return -1; 1766f1ae32a1SGerd Hoffmann } 1767f1ae32a1SGerd Hoffmann 1768f1ae32a1SGerd Hoffmann bmRequestType = trb_setup->parameter; 1769f1ae32a1SGerd Hoffmann 1770f1ae32a1SGerd Hoffmann xfer->in_xfer = bmRequestType & USB_DIR_IN; 1771f1ae32a1SGerd Hoffmann xfer->iso_xfer = false; 1772f1ae32a1SGerd Hoffmann 17735c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 17745c08106fSGerd Hoffmann return -1; 17755c08106fSGerd Hoffmann } 1776f1ae32a1SGerd Hoffmann xfer->packet.parameter = trb_setup->parameter; 1777f1ae32a1SGerd Hoffmann 17789a77a0f5SHans de Goede usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1779f1ae32a1SGerd Hoffmann 17809a77a0f5SHans de Goede xhci_complete_packet(xfer); 1781f1ae32a1SGerd Hoffmann if (!xfer->running_async && !xfer->running_retry) { 1782024426acSGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid, 0); 1783f1ae32a1SGerd Hoffmann } 1784f1ae32a1SGerd Hoffmann return 0; 1785f1ae32a1SGerd Hoffmann } 1786f1ae32a1SGerd Hoffmann 17873d139684SGerd Hoffmann static void xhci_calc_iso_kick(XHCIState *xhci, XHCITransfer *xfer, 17883d139684SGerd Hoffmann XHCIEPContext *epctx, uint64_t mfindex) 17893d139684SGerd Hoffmann { 17903d139684SGerd Hoffmann if (xfer->trbs[0].control & TRB_TR_SIA) { 17913d139684SGerd Hoffmann uint64_t asap = ((mfindex + epctx->interval - 1) & 17923d139684SGerd Hoffmann ~(epctx->interval-1)); 17933d139684SGerd Hoffmann if (asap >= epctx->mfindex_last && 17943d139684SGerd Hoffmann asap <= epctx->mfindex_last + epctx->interval * 4) { 17953d139684SGerd Hoffmann xfer->mfindex_kick = epctx->mfindex_last + epctx->interval; 17963d139684SGerd Hoffmann } else { 17973d139684SGerd Hoffmann xfer->mfindex_kick = asap; 17983d139684SGerd Hoffmann } 17993d139684SGerd Hoffmann } else { 18003d139684SGerd Hoffmann xfer->mfindex_kick = (xfer->trbs[0].control >> TRB_TR_FRAMEID_SHIFT) 18013d139684SGerd Hoffmann & TRB_TR_FRAMEID_MASK; 18023d139684SGerd Hoffmann xfer->mfindex_kick |= mfindex & ~0x3fff; 18033d139684SGerd Hoffmann if (xfer->mfindex_kick < mfindex) { 18043d139684SGerd Hoffmann xfer->mfindex_kick += 0x4000; 18053d139684SGerd Hoffmann } 18063d139684SGerd Hoffmann } 18073d139684SGerd Hoffmann } 18083d139684SGerd Hoffmann 18093d139684SGerd Hoffmann static void xhci_check_iso_kick(XHCIState *xhci, XHCITransfer *xfer, 18103d139684SGerd Hoffmann XHCIEPContext *epctx, uint64_t mfindex) 18113d139684SGerd Hoffmann { 18123d139684SGerd Hoffmann if (xfer->mfindex_kick > mfindex) { 18133d139684SGerd Hoffmann qemu_mod_timer(epctx->kick_timer, qemu_get_clock_ns(vm_clock) + 18143d139684SGerd Hoffmann (xfer->mfindex_kick - mfindex) * 125000); 18153d139684SGerd Hoffmann xfer->running_retry = 1; 18163d139684SGerd Hoffmann } else { 18173d139684SGerd Hoffmann epctx->mfindex_last = xfer->mfindex_kick; 18183d139684SGerd Hoffmann qemu_del_timer(epctx->kick_timer); 18193d139684SGerd Hoffmann xfer->running_retry = 0; 18203d139684SGerd Hoffmann } 18213d139684SGerd Hoffmann } 18223d139684SGerd Hoffmann 18233d139684SGerd Hoffmann 1824f1ae32a1SGerd Hoffmann static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) 1825f1ae32a1SGerd Hoffmann { 18263d139684SGerd Hoffmann uint64_t mfindex; 1827f1ae32a1SGerd Hoffmann 1828f1ae32a1SGerd Hoffmann DPRINTF("xhci_submit(slotid=%d,epid=%d)\n", xfer->slotid, xfer->epid); 1829f1ae32a1SGerd Hoffmann 1830f1ae32a1SGerd Hoffmann xfer->in_xfer = epctx->type>>2; 1831f1ae32a1SGerd Hoffmann 1832f1ae32a1SGerd Hoffmann switch(epctx->type) { 1833f1ae32a1SGerd Hoffmann case ET_INTR_OUT: 1834f1ae32a1SGerd Hoffmann case ET_INTR_IN: 1835f1ae32a1SGerd Hoffmann case ET_BULK_OUT: 1836f1ae32a1SGerd Hoffmann case ET_BULK_IN: 18373d139684SGerd Hoffmann xfer->pkts = 0; 18383d139684SGerd Hoffmann xfer->iso_xfer = false; 1839f1ae32a1SGerd Hoffmann break; 1840f1ae32a1SGerd Hoffmann case ET_ISO_OUT: 1841f1ae32a1SGerd Hoffmann case ET_ISO_IN: 18423d139684SGerd Hoffmann xfer->pkts = 1; 18433d139684SGerd Hoffmann xfer->iso_xfer = true; 18443d139684SGerd Hoffmann mfindex = xhci_mfindex_get(xhci); 18453d139684SGerd Hoffmann xhci_calc_iso_kick(xhci, xfer, epctx, mfindex); 18463d139684SGerd Hoffmann xhci_check_iso_kick(xhci, xfer, epctx, mfindex); 18473d139684SGerd Hoffmann if (xfer->running_retry) { 18483d139684SGerd Hoffmann return -1; 18493d139684SGerd Hoffmann } 1850f1ae32a1SGerd Hoffmann break; 1851f1ae32a1SGerd Hoffmann default: 1852f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: unknown or unhandled EP " 1853f1ae32a1SGerd Hoffmann "(type %d, in %d, ep %02x)\n", 1854f1ae32a1SGerd Hoffmann epctx->type, xfer->in_xfer, xfer->epid); 1855f1ae32a1SGerd Hoffmann return -1; 1856f1ae32a1SGerd Hoffmann } 1857f1ae32a1SGerd Hoffmann 18585c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 18595c08106fSGerd Hoffmann return -1; 18605c08106fSGerd Hoffmann } 18619a77a0f5SHans de Goede usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1862f1ae32a1SGerd Hoffmann 18639a77a0f5SHans de Goede xhci_complete_packet(xfer); 1864f1ae32a1SGerd Hoffmann if (!xfer->running_async && !xfer->running_retry) { 1865024426acSGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid, xfer->streamid); 1866f1ae32a1SGerd Hoffmann } 1867f1ae32a1SGerd Hoffmann return 0; 1868f1ae32a1SGerd Hoffmann } 1869f1ae32a1SGerd Hoffmann 1870f1ae32a1SGerd Hoffmann static int xhci_fire_transfer(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) 1871f1ae32a1SGerd Hoffmann { 1872024426acSGerd Hoffmann trace_usb_xhci_xfer_start(xfer, xfer->slotid, xfer->epid, xfer->streamid); 1873f1ae32a1SGerd Hoffmann return xhci_submit(xhci, xfer, epctx); 1874f1ae32a1SGerd Hoffmann } 1875f1ae32a1SGerd Hoffmann 1876024426acSGerd Hoffmann static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, 1877024426acSGerd Hoffmann unsigned int epid, unsigned int streamid) 1878f1ae32a1SGerd Hoffmann { 1879024426acSGerd Hoffmann XHCIStreamContext *stctx; 1880f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1881024426acSGerd Hoffmann XHCIRing *ring; 188236dfe324SHans de Goede USBEndpoint *ep = NULL; 18833d139684SGerd Hoffmann uint64_t mfindex; 1884f1ae32a1SGerd Hoffmann int length; 1885f1ae32a1SGerd Hoffmann int i; 1886f1ae32a1SGerd Hoffmann 1887024426acSGerd Hoffmann trace_usb_xhci_ep_kick(slotid, epid, streamid); 188891062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 1889f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1890f1ae32a1SGerd Hoffmann 1891f1ae32a1SGerd Hoffmann if (!xhci->slots[slotid-1].enabled) { 1892f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: xhci_kick_ep for disabled slot %d\n", slotid); 1893f1ae32a1SGerd Hoffmann return; 1894f1ae32a1SGerd Hoffmann } 1895f1ae32a1SGerd Hoffmann epctx = xhci->slots[slotid-1].eps[epid-1]; 1896f1ae32a1SGerd Hoffmann if (!epctx) { 1897f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: xhci_kick_ep for disabled endpoint %d,%d\n", 1898f1ae32a1SGerd Hoffmann epid, slotid); 1899f1ae32a1SGerd Hoffmann return; 1900f1ae32a1SGerd Hoffmann } 1901f1ae32a1SGerd Hoffmann 1902f1ae32a1SGerd Hoffmann if (epctx->retry) { 1903f1ae32a1SGerd Hoffmann XHCITransfer *xfer = epctx->retry; 1904f1ae32a1SGerd Hoffmann 190597df650bSGerd Hoffmann trace_usb_xhci_xfer_retry(xfer); 1906f1ae32a1SGerd Hoffmann assert(xfer->running_retry); 19073d139684SGerd Hoffmann if (xfer->iso_xfer) { 19083d139684SGerd Hoffmann /* retry delayed iso transfer */ 19093d139684SGerd Hoffmann mfindex = xhci_mfindex_get(xhci); 19103d139684SGerd Hoffmann xhci_check_iso_kick(xhci, xfer, epctx, mfindex); 19113d139684SGerd Hoffmann if (xfer->running_retry) { 19123d139684SGerd Hoffmann return; 19133d139684SGerd Hoffmann } 19143d139684SGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 19153d139684SGerd Hoffmann return; 19163d139684SGerd Hoffmann } 19179a77a0f5SHans de Goede usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 19189a77a0f5SHans de Goede assert(xfer->packet.status != USB_RET_NAK); 19199a77a0f5SHans de Goede xhci_complete_packet(xfer); 19203d139684SGerd Hoffmann } else { 19213d139684SGerd Hoffmann /* retry nak'ed transfer */ 19225c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 19235c08106fSGerd Hoffmann return; 19245c08106fSGerd Hoffmann } 19259a77a0f5SHans de Goede usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 19269a77a0f5SHans de Goede if (xfer->packet.status == USB_RET_NAK) { 1927f1ae32a1SGerd Hoffmann return; 1928f1ae32a1SGerd Hoffmann } 19299a77a0f5SHans de Goede xhci_complete_packet(xfer); 19303d139684SGerd Hoffmann } 1931f1ae32a1SGerd Hoffmann assert(!xfer->running_retry); 1932f1ae32a1SGerd Hoffmann epctx->retry = NULL; 1933f1ae32a1SGerd Hoffmann } 1934f1ae32a1SGerd Hoffmann 1935f1ae32a1SGerd Hoffmann if (epctx->state == EP_HALTED) { 1936f1ae32a1SGerd Hoffmann DPRINTF("xhci: ep halted, not running schedule\n"); 1937f1ae32a1SGerd Hoffmann return; 1938f1ae32a1SGerd Hoffmann } 1939f1ae32a1SGerd Hoffmann 1940024426acSGerd Hoffmann 1941024426acSGerd Hoffmann if (epctx->nr_pstreams) { 1942024426acSGerd Hoffmann uint32_t err; 1943024426acSGerd Hoffmann stctx = xhci_find_stream(epctx, streamid, &err); 1944024426acSGerd Hoffmann if (stctx == NULL) { 1945024426acSGerd Hoffmann return; 1946024426acSGerd Hoffmann } 1947024426acSGerd Hoffmann ring = &stctx->ring; 1948024426acSGerd Hoffmann xhci_set_ep_state(xhci, epctx, stctx, EP_RUNNING); 1949024426acSGerd Hoffmann } else { 1950024426acSGerd Hoffmann ring = &epctx->ring; 1951024426acSGerd Hoffmann streamid = 0; 1952024426acSGerd Hoffmann xhci_set_ep_state(xhci, epctx, NULL, EP_RUNNING); 1953024426acSGerd Hoffmann } 19547d04c2b7SGerd Hoffmann assert(ring->dequeue != 0); 1955f1ae32a1SGerd Hoffmann 1956f1ae32a1SGerd Hoffmann while (1) { 1957f1ae32a1SGerd Hoffmann XHCITransfer *xfer = &epctx->transfers[epctx->next_xfer]; 1958331e9406SGerd Hoffmann if (xfer->running_async || xfer->running_retry) { 1959f1ae32a1SGerd Hoffmann break; 1960f1ae32a1SGerd Hoffmann } 1961024426acSGerd Hoffmann length = xhci_ring_chain_length(xhci, ring); 1962f1ae32a1SGerd Hoffmann if (length < 0) { 1963f1ae32a1SGerd Hoffmann break; 1964f1ae32a1SGerd Hoffmann } else if (length == 0) { 1965f1ae32a1SGerd Hoffmann break; 1966f1ae32a1SGerd Hoffmann } 1967f1ae32a1SGerd Hoffmann if (xfer->trbs && xfer->trb_alloced < length) { 1968f1ae32a1SGerd Hoffmann xfer->trb_count = 0; 1969f1ae32a1SGerd Hoffmann xfer->trb_alloced = 0; 1970f1ae32a1SGerd Hoffmann g_free(xfer->trbs); 1971f1ae32a1SGerd Hoffmann xfer->trbs = NULL; 1972f1ae32a1SGerd Hoffmann } 1973f1ae32a1SGerd Hoffmann if (!xfer->trbs) { 1974f1ae32a1SGerd Hoffmann xfer->trbs = g_malloc(sizeof(XHCITRB) * length); 1975f1ae32a1SGerd Hoffmann xfer->trb_alloced = length; 1976f1ae32a1SGerd Hoffmann } 1977f1ae32a1SGerd Hoffmann xfer->trb_count = length; 1978f1ae32a1SGerd Hoffmann 1979f1ae32a1SGerd Hoffmann for (i = 0; i < length; i++) { 1980024426acSGerd Hoffmann assert(xhci_ring_fetch(xhci, ring, &xfer->trbs[i], NULL)); 1981f1ae32a1SGerd Hoffmann } 1982f1ae32a1SGerd Hoffmann xfer->xhci = xhci; 1983f1ae32a1SGerd Hoffmann xfer->epid = epid; 1984f1ae32a1SGerd Hoffmann xfer->slotid = slotid; 1985024426acSGerd Hoffmann xfer->streamid = streamid; 1986f1ae32a1SGerd Hoffmann 1987f1ae32a1SGerd Hoffmann if (epid == 1) { 1988f1ae32a1SGerd Hoffmann if (xhci_fire_ctl_transfer(xhci, xfer) >= 0) { 1989f1ae32a1SGerd Hoffmann epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; 199036dfe324SHans de Goede ep = xfer->packet.ep; 1991f1ae32a1SGerd Hoffmann } else { 1992f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: error firing CTL transfer\n"); 1993f1ae32a1SGerd Hoffmann } 1994f1ae32a1SGerd Hoffmann } else { 1995f1ae32a1SGerd Hoffmann if (xhci_fire_transfer(xhci, xfer, epctx) >= 0) { 1996f1ae32a1SGerd Hoffmann epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; 199736dfe324SHans de Goede ep = xfer->packet.ep; 1998f1ae32a1SGerd Hoffmann } else { 19993d139684SGerd Hoffmann if (!xfer->iso_xfer) { 2000f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: error firing data transfer\n"); 2001f1ae32a1SGerd Hoffmann } 2002f1ae32a1SGerd Hoffmann } 20033d139684SGerd Hoffmann } 2004f1ae32a1SGerd Hoffmann 2005f1ae32a1SGerd Hoffmann if (epctx->state == EP_HALTED) { 2006f1ae32a1SGerd Hoffmann break; 2007f1ae32a1SGerd Hoffmann } 2008f1ae32a1SGerd Hoffmann if (xfer->running_retry) { 2009f1ae32a1SGerd Hoffmann DPRINTF("xhci: xfer nacked, stopping schedule\n"); 2010f1ae32a1SGerd Hoffmann epctx->retry = xfer; 2011f1ae32a1SGerd Hoffmann break; 2012f1ae32a1SGerd Hoffmann } 2013f1ae32a1SGerd Hoffmann } 201436dfe324SHans de Goede if (ep) { 201536dfe324SHans de Goede usb_device_flush_ep_queue(ep->dev, ep); 201636dfe324SHans de Goede } 2017f1ae32a1SGerd Hoffmann } 2018f1ae32a1SGerd Hoffmann 2019f1ae32a1SGerd Hoffmann static TRBCCode xhci_enable_slot(XHCIState *xhci, unsigned int slotid) 2020f1ae32a1SGerd Hoffmann { 2021348f1037SGerd Hoffmann trace_usb_xhci_slot_enable(slotid); 202291062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 2023f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].enabled = 1; 2024ccaf87a0SGerd Hoffmann xhci->slots[slotid-1].uport = NULL; 2025f1ae32a1SGerd Hoffmann memset(xhci->slots[slotid-1].eps, 0, sizeof(XHCIEPContext*)*31); 2026f1ae32a1SGerd Hoffmann 2027f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2028f1ae32a1SGerd Hoffmann } 2029f1ae32a1SGerd Hoffmann 2030f1ae32a1SGerd Hoffmann static TRBCCode xhci_disable_slot(XHCIState *xhci, unsigned int slotid) 2031f1ae32a1SGerd Hoffmann { 2032f1ae32a1SGerd Hoffmann int i; 2033f1ae32a1SGerd Hoffmann 2034348f1037SGerd Hoffmann trace_usb_xhci_slot_disable(slotid); 203591062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 2036f1ae32a1SGerd Hoffmann 2037f1ae32a1SGerd Hoffmann for (i = 1; i <= 31; i++) { 2038f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 2039f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 2040f1ae32a1SGerd Hoffmann } 2041f1ae32a1SGerd Hoffmann } 2042f1ae32a1SGerd Hoffmann 2043f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].enabled = 0; 2044f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2045f1ae32a1SGerd Hoffmann } 2046f1ae32a1SGerd Hoffmann 2047ccaf87a0SGerd Hoffmann static USBPort *xhci_lookup_uport(XHCIState *xhci, uint32_t *slot_ctx) 2048ccaf87a0SGerd Hoffmann { 2049ccaf87a0SGerd Hoffmann USBPort *uport; 2050ccaf87a0SGerd Hoffmann char path[32]; 2051ccaf87a0SGerd Hoffmann int i, pos, port; 2052ccaf87a0SGerd Hoffmann 2053ccaf87a0SGerd Hoffmann port = (slot_ctx[1]>>16) & 0xFF; 2054ccaf87a0SGerd Hoffmann port = xhci->ports[port-1].uport->index+1; 2055ccaf87a0SGerd Hoffmann pos = snprintf(path, sizeof(path), "%d", port); 2056ccaf87a0SGerd Hoffmann for (i = 0; i < 5; i++) { 2057ccaf87a0SGerd Hoffmann port = (slot_ctx[0] >> 4*i) & 0x0f; 2058ccaf87a0SGerd Hoffmann if (!port) { 2059ccaf87a0SGerd Hoffmann break; 2060ccaf87a0SGerd Hoffmann } 2061ccaf87a0SGerd Hoffmann pos += snprintf(path + pos, sizeof(path) - pos, ".%d", port); 2062ccaf87a0SGerd Hoffmann } 2063ccaf87a0SGerd Hoffmann 2064ccaf87a0SGerd Hoffmann QTAILQ_FOREACH(uport, &xhci->bus.used, next) { 2065ccaf87a0SGerd Hoffmann if (strcmp(uport->path, path) == 0) { 2066ccaf87a0SGerd Hoffmann return uport; 2067ccaf87a0SGerd Hoffmann } 2068ccaf87a0SGerd Hoffmann } 2069ccaf87a0SGerd Hoffmann return NULL; 2070ccaf87a0SGerd Hoffmann } 2071ccaf87a0SGerd Hoffmann 2072f1ae32a1SGerd Hoffmann static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid, 2073f1ae32a1SGerd Hoffmann uint64_t pictx, bool bsr) 2074f1ae32a1SGerd Hoffmann { 2075f1ae32a1SGerd Hoffmann XHCISlot *slot; 2076ccaf87a0SGerd Hoffmann USBPort *uport; 2077f1ae32a1SGerd Hoffmann USBDevice *dev; 207859a70ccdSDavid Gibson dma_addr_t ictx, octx, dcbaap; 2079f1ae32a1SGerd Hoffmann uint64_t poctx; 2080f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 2081f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 2082f1ae32a1SGerd Hoffmann uint32_t ep0_ctx[5]; 2083f1ae32a1SGerd Hoffmann int i; 2084f1ae32a1SGerd Hoffmann TRBCCode res; 2085f1ae32a1SGerd Hoffmann 2086348f1037SGerd Hoffmann trace_usb_xhci_slot_address(slotid); 208791062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 2088f1ae32a1SGerd Hoffmann 2089f1ae32a1SGerd Hoffmann dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); 2090616b5d53SDavid Gibson poctx = ldq_le_pci_dma(&xhci->pci_dev, dcbaap + 8*slotid); 2091f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 2092616b5d53SDavid Gibson octx = xhci_mask64(poctx); 2093f1ae32a1SGerd Hoffmann 209459a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 209559a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 2096f1ae32a1SGerd Hoffmann 2097616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, ictx, ictl_ctx, sizeof(ictl_ctx)); 2098f1ae32a1SGerd Hoffmann 2099f1ae32a1SGerd Hoffmann if (ictl_ctx[0] != 0x0 || ictl_ctx[1] != 0x3) { 2100f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 2101f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 2102f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 2103f1ae32a1SGerd Hoffmann } 2104f1ae32a1SGerd Hoffmann 2105616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, ictx+32, slot_ctx, sizeof(slot_ctx)); 2106616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, ictx+64, ep0_ctx, sizeof(ep0_ctx)); 2107f1ae32a1SGerd Hoffmann 2108f1ae32a1SGerd Hoffmann DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", 2109f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 2110f1ae32a1SGerd Hoffmann 2111f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", 2112f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 2113f1ae32a1SGerd Hoffmann 2114ccaf87a0SGerd Hoffmann uport = xhci_lookup_uport(xhci, slot_ctx); 2115ccaf87a0SGerd Hoffmann if (uport == NULL) { 2116ccaf87a0SGerd Hoffmann fprintf(stderr, "xhci: port not found\n"); 2117f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 2118ccaf87a0SGerd Hoffmann } 2119ccaf87a0SGerd Hoffmann 2120ccaf87a0SGerd Hoffmann dev = uport->dev; 2121ccaf87a0SGerd Hoffmann if (!dev) { 2122ccaf87a0SGerd Hoffmann fprintf(stderr, "xhci: port %s not connected\n", uport->path); 2123f1ae32a1SGerd Hoffmann return CC_USB_TRANSACTION_ERROR; 2124f1ae32a1SGerd Hoffmann } 2125f1ae32a1SGerd Hoffmann 212691062ae0SGerd Hoffmann for (i = 0; i < xhci->numslots; i++) { 21270bc85da6SGerd Hoffmann if (i == slotid-1) { 21280bc85da6SGerd Hoffmann continue; 21290bc85da6SGerd Hoffmann } 2130ccaf87a0SGerd Hoffmann if (xhci->slots[i].uport == uport) { 2131ccaf87a0SGerd Hoffmann fprintf(stderr, "xhci: port %s already assigned to slot %d\n", 2132ccaf87a0SGerd Hoffmann uport->path, i+1); 2133f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 2134f1ae32a1SGerd Hoffmann } 2135f1ae32a1SGerd Hoffmann } 2136f1ae32a1SGerd Hoffmann 2137f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 2138ccaf87a0SGerd Hoffmann slot->uport = uport; 2139f1ae32a1SGerd Hoffmann slot->ctx = octx; 2140f1ae32a1SGerd Hoffmann 2141f1ae32a1SGerd Hoffmann if (bsr) { 2142f1ae32a1SGerd Hoffmann slot_ctx[3] = SLOT_DEFAULT << SLOT_STATE_SHIFT; 2143f1ae32a1SGerd Hoffmann } else { 2144a820b575SGerd Hoffmann USBPacket p; 2145a6718874SGerd Hoffmann uint8_t buf[1]; 2146a6718874SGerd Hoffmann 2147af203be3SGerd Hoffmann slot_ctx[3] = (SLOT_ADDRESSED << SLOT_STATE_SHIFT) | slotid; 21480bc85da6SGerd Hoffmann usb_device_reset(dev); 2149a6718874SGerd Hoffmann memset(&p, 0, sizeof(p)); 2150a6718874SGerd Hoffmann usb_packet_addbuf(&p, buf, sizeof(buf)); 2151a820b575SGerd Hoffmann usb_packet_setup(&p, USB_TOKEN_OUT, 21528550a02dSGerd Hoffmann usb_ep_get(dev, USB_TOKEN_OUT, 0), 0, 2153a820b575SGerd Hoffmann 0, false, false); 2154a820b575SGerd Hoffmann usb_device_handle_control(dev, &p, 2155f1ae32a1SGerd Hoffmann DeviceOutRequest | USB_REQ_SET_ADDRESS, 2156af203be3SGerd Hoffmann slotid, 0, 0, NULL); 2157a820b575SGerd Hoffmann assert(p.status != USB_RET_ASYNC); 2158f1ae32a1SGerd Hoffmann } 2159f1ae32a1SGerd Hoffmann 2160f1ae32a1SGerd Hoffmann res = xhci_enable_ep(xhci, slotid, 1, octx+32, ep0_ctx); 2161f1ae32a1SGerd Hoffmann 2162f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 2163f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 2164f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", 2165f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 2166f1ae32a1SGerd Hoffmann 2167616b5d53SDavid Gibson xhci_dma_write_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); 2168616b5d53SDavid Gibson xhci_dma_write_u32s(xhci, octx+32, ep0_ctx, sizeof(ep0_ctx)); 2169f1ae32a1SGerd Hoffmann 2170f1ae32a1SGerd Hoffmann return res; 2171f1ae32a1SGerd Hoffmann } 2172f1ae32a1SGerd Hoffmann 2173f1ae32a1SGerd Hoffmann 2174f1ae32a1SGerd Hoffmann static TRBCCode xhci_configure_slot(XHCIState *xhci, unsigned int slotid, 2175f1ae32a1SGerd Hoffmann uint64_t pictx, bool dc) 2176f1ae32a1SGerd Hoffmann { 217759a70ccdSDavid Gibson dma_addr_t ictx, octx; 2178f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 2179f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 2180f1ae32a1SGerd Hoffmann uint32_t islot_ctx[4]; 2181f1ae32a1SGerd Hoffmann uint32_t ep_ctx[5]; 2182f1ae32a1SGerd Hoffmann int i; 2183f1ae32a1SGerd Hoffmann TRBCCode res; 2184f1ae32a1SGerd Hoffmann 2185348f1037SGerd Hoffmann trace_usb_xhci_slot_configure(slotid); 218691062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 2187f1ae32a1SGerd Hoffmann 2188f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 2189f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 2190f1ae32a1SGerd Hoffmann 219159a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 219259a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 2193f1ae32a1SGerd Hoffmann 2194f1ae32a1SGerd Hoffmann if (dc) { 2195f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 2196f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 2197f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 2198f1ae32a1SGerd Hoffmann } 2199f1ae32a1SGerd Hoffmann } 2200f1ae32a1SGerd Hoffmann 2201616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); 2202f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 2203f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_ADDRESSED << SLOT_STATE_SHIFT; 2204f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 2205f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 2206616b5d53SDavid Gibson xhci_dma_write_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); 2207f1ae32a1SGerd Hoffmann 2208f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2209f1ae32a1SGerd Hoffmann } 2210f1ae32a1SGerd Hoffmann 2211616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, ictx, ictl_ctx, sizeof(ictl_ctx)); 2212f1ae32a1SGerd Hoffmann 2213f1ae32a1SGerd Hoffmann if ((ictl_ctx[0] & 0x3) != 0x0 || (ictl_ctx[1] & 0x3) != 0x1) { 2214f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 2215f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 2216f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 2217f1ae32a1SGerd Hoffmann } 2218f1ae32a1SGerd Hoffmann 2219616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, ictx+32, islot_ctx, sizeof(islot_ctx)); 2220616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); 2221f1ae32a1SGerd Hoffmann 2222f1ae32a1SGerd Hoffmann if (SLOT_STATE(slot_ctx[3]) < SLOT_ADDRESSED) { 2223f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid slot state %08x\n", slot_ctx[3]); 2224f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 2225f1ae32a1SGerd Hoffmann } 2226f1ae32a1SGerd Hoffmann 2227f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 2228f1ae32a1SGerd Hoffmann if (ictl_ctx[0] & (1<<i)) { 2229f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 2230f1ae32a1SGerd Hoffmann } 2231f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & (1<<i)) { 2232616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, ictx+32+(32*i), ep_ctx, sizeof(ep_ctx)); 2233f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep%d.%d context: %08x %08x %08x %08x %08x\n", 2234f1ae32a1SGerd Hoffmann i/2, i%2, ep_ctx[0], ep_ctx[1], ep_ctx[2], 2235f1ae32a1SGerd Hoffmann ep_ctx[3], ep_ctx[4]); 2236f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 2237f1ae32a1SGerd Hoffmann res = xhci_enable_ep(xhci, slotid, i, octx+(32*i), ep_ctx); 2238f1ae32a1SGerd Hoffmann if (res != CC_SUCCESS) { 2239f1ae32a1SGerd Hoffmann return res; 2240f1ae32a1SGerd Hoffmann } 2241f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep%d.%d context: %08x %08x %08x %08x %08x\n", 2242f1ae32a1SGerd Hoffmann i/2, i%2, ep_ctx[0], ep_ctx[1], ep_ctx[2], 2243f1ae32a1SGerd Hoffmann ep_ctx[3], ep_ctx[4]); 2244616b5d53SDavid Gibson xhci_dma_write_u32s(xhci, octx+(32*i), ep_ctx, sizeof(ep_ctx)); 2245f1ae32a1SGerd Hoffmann } 2246f1ae32a1SGerd Hoffmann } 2247f1ae32a1SGerd Hoffmann 2248f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 2249f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_CONFIGURED << SLOT_STATE_SHIFT; 2250f1ae32a1SGerd Hoffmann slot_ctx[0] &= ~(SLOT_CONTEXT_ENTRIES_MASK << SLOT_CONTEXT_ENTRIES_SHIFT); 2251f1ae32a1SGerd Hoffmann slot_ctx[0] |= islot_ctx[0] & (SLOT_CONTEXT_ENTRIES_MASK << 2252f1ae32a1SGerd Hoffmann SLOT_CONTEXT_ENTRIES_SHIFT); 2253f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 2254f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 2255f1ae32a1SGerd Hoffmann 2256616b5d53SDavid Gibson xhci_dma_write_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); 2257f1ae32a1SGerd Hoffmann 2258f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2259f1ae32a1SGerd Hoffmann } 2260f1ae32a1SGerd Hoffmann 2261f1ae32a1SGerd Hoffmann 2262f1ae32a1SGerd Hoffmann static TRBCCode xhci_evaluate_slot(XHCIState *xhci, unsigned int slotid, 2263f1ae32a1SGerd Hoffmann uint64_t pictx) 2264f1ae32a1SGerd Hoffmann { 226559a70ccdSDavid Gibson dma_addr_t ictx, octx; 2266f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 2267f1ae32a1SGerd Hoffmann uint32_t iep0_ctx[5]; 2268f1ae32a1SGerd Hoffmann uint32_t ep0_ctx[5]; 2269f1ae32a1SGerd Hoffmann uint32_t islot_ctx[4]; 2270f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 2271f1ae32a1SGerd Hoffmann 2272348f1037SGerd Hoffmann trace_usb_xhci_slot_evaluate(slotid); 227391062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 2274f1ae32a1SGerd Hoffmann 2275f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 2276f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 2277f1ae32a1SGerd Hoffmann 227859a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 227959a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 2280f1ae32a1SGerd Hoffmann 2281616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, ictx, ictl_ctx, sizeof(ictl_ctx)); 2282f1ae32a1SGerd Hoffmann 2283f1ae32a1SGerd Hoffmann if (ictl_ctx[0] != 0x0 || ictl_ctx[1] & ~0x3) { 2284f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 2285f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 2286f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 2287f1ae32a1SGerd Hoffmann } 2288f1ae32a1SGerd Hoffmann 2289f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & 0x1) { 2290616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, ictx+32, islot_ctx, sizeof(islot_ctx)); 2291f1ae32a1SGerd Hoffmann 2292f1ae32a1SGerd Hoffmann DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", 2293f1ae32a1SGerd Hoffmann islot_ctx[0], islot_ctx[1], islot_ctx[2], islot_ctx[3]); 2294f1ae32a1SGerd Hoffmann 2295616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); 2296f1ae32a1SGerd Hoffmann 2297f1ae32a1SGerd Hoffmann slot_ctx[1] &= ~0xFFFF; /* max exit latency */ 2298f1ae32a1SGerd Hoffmann slot_ctx[1] |= islot_ctx[1] & 0xFFFF; 2299f1ae32a1SGerd Hoffmann slot_ctx[2] &= ~0xFF00000; /* interrupter target */ 2300f1ae32a1SGerd Hoffmann slot_ctx[2] |= islot_ctx[2] & 0xFF000000; 2301f1ae32a1SGerd Hoffmann 2302f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 2303f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 2304f1ae32a1SGerd Hoffmann 2305616b5d53SDavid Gibson xhci_dma_write_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); 2306f1ae32a1SGerd Hoffmann } 2307f1ae32a1SGerd Hoffmann 2308f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & 0x2) { 2309616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, ictx+64, iep0_ctx, sizeof(iep0_ctx)); 2310f1ae32a1SGerd Hoffmann 2311f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", 2312f1ae32a1SGerd Hoffmann iep0_ctx[0], iep0_ctx[1], iep0_ctx[2], 2313f1ae32a1SGerd Hoffmann iep0_ctx[3], iep0_ctx[4]); 2314f1ae32a1SGerd Hoffmann 2315616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, octx+32, ep0_ctx, sizeof(ep0_ctx)); 2316f1ae32a1SGerd Hoffmann 2317f1ae32a1SGerd Hoffmann ep0_ctx[1] &= ~0xFFFF0000; /* max packet size*/ 2318f1ae32a1SGerd Hoffmann ep0_ctx[1] |= iep0_ctx[1] & 0xFFFF0000; 2319f1ae32a1SGerd Hoffmann 2320f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", 2321f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 2322f1ae32a1SGerd Hoffmann 2323616b5d53SDavid Gibson xhci_dma_write_u32s(xhci, octx+32, ep0_ctx, sizeof(ep0_ctx)); 2324f1ae32a1SGerd Hoffmann } 2325f1ae32a1SGerd Hoffmann 2326f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2327f1ae32a1SGerd Hoffmann } 2328f1ae32a1SGerd Hoffmann 2329f1ae32a1SGerd Hoffmann static TRBCCode xhci_reset_slot(XHCIState *xhci, unsigned int slotid) 2330f1ae32a1SGerd Hoffmann { 2331f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 233259a70ccdSDavid Gibson dma_addr_t octx; 2333f1ae32a1SGerd Hoffmann int i; 2334f1ae32a1SGerd Hoffmann 2335348f1037SGerd Hoffmann trace_usb_xhci_slot_reset(slotid); 233691062ae0SGerd Hoffmann assert(slotid >= 1 && slotid <= xhci->numslots); 2337f1ae32a1SGerd Hoffmann 2338f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 2339f1ae32a1SGerd Hoffmann 234059a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 2341f1ae32a1SGerd Hoffmann 2342f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 2343f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 2344f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 2345f1ae32a1SGerd Hoffmann } 2346f1ae32a1SGerd Hoffmann } 2347f1ae32a1SGerd Hoffmann 2348616b5d53SDavid Gibson xhci_dma_read_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); 2349f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 2350f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_DEFAULT << SLOT_STATE_SHIFT; 2351f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 2352f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 2353616b5d53SDavid Gibson xhci_dma_write_u32s(xhci, octx, slot_ctx, sizeof(slot_ctx)); 2354f1ae32a1SGerd Hoffmann 2355f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2356f1ae32a1SGerd Hoffmann } 2357f1ae32a1SGerd Hoffmann 2358f1ae32a1SGerd Hoffmann static unsigned int xhci_get_slot(XHCIState *xhci, XHCIEvent *event, XHCITRB *trb) 2359f1ae32a1SGerd Hoffmann { 2360f1ae32a1SGerd Hoffmann unsigned int slotid; 2361f1ae32a1SGerd Hoffmann slotid = (trb->control >> TRB_CR_SLOTID_SHIFT) & TRB_CR_SLOTID_MASK; 236291062ae0SGerd Hoffmann if (slotid < 1 || slotid > xhci->numslots) { 2363f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad slot id %d\n", slotid); 2364f1ae32a1SGerd Hoffmann event->ccode = CC_TRB_ERROR; 2365f1ae32a1SGerd Hoffmann return 0; 2366f1ae32a1SGerd Hoffmann } else if (!xhci->slots[slotid-1].enabled) { 2367f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot id %d not enabled\n", slotid); 2368f1ae32a1SGerd Hoffmann event->ccode = CC_SLOT_NOT_ENABLED_ERROR; 2369f1ae32a1SGerd Hoffmann return 0; 2370f1ae32a1SGerd Hoffmann } 2371f1ae32a1SGerd Hoffmann return slotid; 2372f1ae32a1SGerd Hoffmann } 2373f1ae32a1SGerd Hoffmann 237481251841SGerd Hoffmann /* cleanup slot state on usb device detach */ 237581251841SGerd Hoffmann static void xhci_detach_slot(XHCIState *xhci, USBPort *uport) 237681251841SGerd Hoffmann { 23770cb41e2cSGerd Hoffmann int slot, ep; 237881251841SGerd Hoffmann 237981251841SGerd Hoffmann for (slot = 0; slot < xhci->numslots; slot++) { 238081251841SGerd Hoffmann if (xhci->slots[slot].uport == uport) { 238181251841SGerd Hoffmann break; 238281251841SGerd Hoffmann } 238381251841SGerd Hoffmann } 238481251841SGerd Hoffmann if (slot == xhci->numslots) { 238581251841SGerd Hoffmann return; 238681251841SGerd Hoffmann } 238781251841SGerd Hoffmann 23880cb41e2cSGerd Hoffmann for (ep = 0; ep < 31; ep++) { 23890cb41e2cSGerd Hoffmann if (xhci->slots[slot].eps[ep]) { 23900cb41e2cSGerd Hoffmann xhci_ep_nuke_xfers(xhci, slot+1, ep+1); 23910cb41e2cSGerd Hoffmann } 23920cb41e2cSGerd Hoffmann } 239381251841SGerd Hoffmann xhci->slots[slot].uport = NULL; 239481251841SGerd Hoffmann } 239581251841SGerd Hoffmann 2396f1ae32a1SGerd Hoffmann static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx) 2397f1ae32a1SGerd Hoffmann { 239859a70ccdSDavid Gibson dma_addr_t ctx; 23990846e635SGerd Hoffmann uint8_t bw_ctx[xhci->numports+1]; 2400f1ae32a1SGerd Hoffmann 2401f1ae32a1SGerd Hoffmann DPRINTF("xhci_get_port_bandwidth()\n"); 2402f1ae32a1SGerd Hoffmann 2403f1ae32a1SGerd Hoffmann ctx = xhci_mask64(pctx); 2404f1ae32a1SGerd Hoffmann 240559a70ccdSDavid Gibson DPRINTF("xhci: bandwidth context at "DMA_ADDR_FMT"\n", ctx); 2406f1ae32a1SGerd Hoffmann 2407f1ae32a1SGerd Hoffmann /* TODO: actually implement real values here */ 2408f1ae32a1SGerd Hoffmann bw_ctx[0] = 0; 24090846e635SGerd Hoffmann memset(&bw_ctx[1], 80, xhci->numports); /* 80% */ 241059a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, ctx, bw_ctx, sizeof(bw_ctx)); 2411f1ae32a1SGerd Hoffmann 2412f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2413f1ae32a1SGerd Hoffmann } 2414f1ae32a1SGerd Hoffmann 2415f1ae32a1SGerd Hoffmann static uint32_t rotl(uint32_t v, unsigned count) 2416f1ae32a1SGerd Hoffmann { 2417f1ae32a1SGerd Hoffmann count &= 31; 2418f1ae32a1SGerd Hoffmann return (v << count) | (v >> (32 - count)); 2419f1ae32a1SGerd Hoffmann } 2420f1ae32a1SGerd Hoffmann 2421f1ae32a1SGerd Hoffmann 2422f1ae32a1SGerd Hoffmann static uint32_t xhci_nec_challenge(uint32_t hi, uint32_t lo) 2423f1ae32a1SGerd Hoffmann { 2424f1ae32a1SGerd Hoffmann uint32_t val; 2425f1ae32a1SGerd Hoffmann val = rotl(lo - 0x49434878, 32 - ((hi>>8) & 0x1F)); 2426f1ae32a1SGerd Hoffmann val += rotl(lo + 0x49434878, hi & 0x1F); 2427f1ae32a1SGerd Hoffmann val -= rotl(hi ^ 0x49434878, (lo >> 16) & 0x1F); 2428f1ae32a1SGerd Hoffmann return ~val; 2429f1ae32a1SGerd Hoffmann } 2430f1ae32a1SGerd Hoffmann 243159a70ccdSDavid Gibson static void xhci_via_challenge(XHCIState *xhci, uint64_t addr) 2432f1ae32a1SGerd Hoffmann { 2433f1ae32a1SGerd Hoffmann uint32_t buf[8]; 2434f1ae32a1SGerd Hoffmann uint32_t obuf[8]; 243559a70ccdSDavid Gibson dma_addr_t paddr = xhci_mask64(addr); 2436f1ae32a1SGerd Hoffmann 243759a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, paddr, &buf, 32); 2438f1ae32a1SGerd Hoffmann 2439f1ae32a1SGerd Hoffmann memcpy(obuf, buf, sizeof(obuf)); 2440f1ae32a1SGerd Hoffmann 2441f1ae32a1SGerd Hoffmann if ((buf[0] & 0xff) == 2) { 2442f1ae32a1SGerd Hoffmann obuf[0] = 0x49932000 + 0x54dc200 * buf[2] + 0x7429b578 * buf[3]; 2443f1ae32a1SGerd Hoffmann obuf[0] |= (buf[2] * buf[3]) & 0xff; 2444f1ae32a1SGerd Hoffmann obuf[1] = 0x0132bb37 + 0xe89 * buf[2] + 0xf09 * buf[3]; 2445f1ae32a1SGerd Hoffmann obuf[2] = 0x0066c2e9 + 0x2091 * buf[2] + 0x19bd * buf[3]; 2446f1ae32a1SGerd Hoffmann obuf[3] = 0xd5281342 + 0x2cc9691 * buf[2] + 0x2367662 * buf[3]; 2447f1ae32a1SGerd Hoffmann obuf[4] = 0x0123c75c + 0x1595 * buf[2] + 0x19ec * buf[3]; 2448f1ae32a1SGerd Hoffmann obuf[5] = 0x00f695de + 0x26fd * buf[2] + 0x3e9 * buf[3]; 2449f1ae32a1SGerd Hoffmann obuf[6] = obuf[2] ^ obuf[3] ^ 0x29472956; 2450f1ae32a1SGerd Hoffmann obuf[7] = obuf[2] ^ obuf[3] ^ 0x65866593; 2451f1ae32a1SGerd Hoffmann } 2452f1ae32a1SGerd Hoffmann 245359a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, paddr, &obuf, 32); 2454f1ae32a1SGerd Hoffmann } 2455f1ae32a1SGerd Hoffmann 2456f1ae32a1SGerd Hoffmann static void xhci_process_commands(XHCIState *xhci) 2457f1ae32a1SGerd Hoffmann { 2458f1ae32a1SGerd Hoffmann XHCITRB trb; 2459f1ae32a1SGerd Hoffmann TRBType type; 2460f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_COMMAND_COMPLETE, CC_SUCCESS}; 246159a70ccdSDavid Gibson dma_addr_t addr; 2462f1ae32a1SGerd Hoffmann unsigned int i, slotid = 0; 2463f1ae32a1SGerd Hoffmann 2464f1ae32a1SGerd Hoffmann DPRINTF("xhci_process_commands()\n"); 2465f1ae32a1SGerd Hoffmann if (!xhci_running(xhci)) { 2466f1ae32a1SGerd Hoffmann DPRINTF("xhci_process_commands() called while xHC stopped or paused\n"); 2467f1ae32a1SGerd Hoffmann return; 2468f1ae32a1SGerd Hoffmann } 2469f1ae32a1SGerd Hoffmann 2470f1ae32a1SGerd Hoffmann xhci->crcr_low |= CRCR_CRR; 2471f1ae32a1SGerd Hoffmann 2472f1ae32a1SGerd Hoffmann while ((type = xhci_ring_fetch(xhci, &xhci->cmd_ring, &trb, &addr))) { 2473f1ae32a1SGerd Hoffmann event.ptr = addr; 2474f1ae32a1SGerd Hoffmann switch (type) { 2475f1ae32a1SGerd Hoffmann case CR_ENABLE_SLOT: 247691062ae0SGerd Hoffmann for (i = 0; i < xhci->numslots; i++) { 2477f1ae32a1SGerd Hoffmann if (!xhci->slots[i].enabled) { 2478f1ae32a1SGerd Hoffmann break; 2479f1ae32a1SGerd Hoffmann } 2480f1ae32a1SGerd Hoffmann } 248191062ae0SGerd Hoffmann if (i >= xhci->numslots) { 2482f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: no device slots available\n"); 2483f1ae32a1SGerd Hoffmann event.ccode = CC_NO_SLOTS_ERROR; 2484f1ae32a1SGerd Hoffmann } else { 2485f1ae32a1SGerd Hoffmann slotid = i+1; 2486f1ae32a1SGerd Hoffmann event.ccode = xhci_enable_slot(xhci, slotid); 2487f1ae32a1SGerd Hoffmann } 2488f1ae32a1SGerd Hoffmann break; 2489f1ae32a1SGerd Hoffmann case CR_DISABLE_SLOT: 2490f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2491f1ae32a1SGerd Hoffmann if (slotid) { 2492f1ae32a1SGerd Hoffmann event.ccode = xhci_disable_slot(xhci, slotid); 2493f1ae32a1SGerd Hoffmann } 2494f1ae32a1SGerd Hoffmann break; 2495f1ae32a1SGerd Hoffmann case CR_ADDRESS_DEVICE: 2496f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2497f1ae32a1SGerd Hoffmann if (slotid) { 2498f1ae32a1SGerd Hoffmann event.ccode = xhci_address_slot(xhci, slotid, trb.parameter, 2499f1ae32a1SGerd Hoffmann trb.control & TRB_CR_BSR); 2500f1ae32a1SGerd Hoffmann } 2501f1ae32a1SGerd Hoffmann break; 2502f1ae32a1SGerd Hoffmann case CR_CONFIGURE_ENDPOINT: 2503f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2504f1ae32a1SGerd Hoffmann if (slotid) { 2505f1ae32a1SGerd Hoffmann event.ccode = xhci_configure_slot(xhci, slotid, trb.parameter, 2506f1ae32a1SGerd Hoffmann trb.control & TRB_CR_DC); 2507f1ae32a1SGerd Hoffmann } 2508f1ae32a1SGerd Hoffmann break; 2509f1ae32a1SGerd Hoffmann case CR_EVALUATE_CONTEXT: 2510f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2511f1ae32a1SGerd Hoffmann if (slotid) { 2512f1ae32a1SGerd Hoffmann event.ccode = xhci_evaluate_slot(xhci, slotid, trb.parameter); 2513f1ae32a1SGerd Hoffmann } 2514f1ae32a1SGerd Hoffmann break; 2515f1ae32a1SGerd Hoffmann case CR_STOP_ENDPOINT: 2516f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2517f1ae32a1SGerd Hoffmann if (slotid) { 2518f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2519f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2520f1ae32a1SGerd Hoffmann event.ccode = xhci_stop_ep(xhci, slotid, epid); 2521f1ae32a1SGerd Hoffmann } 2522f1ae32a1SGerd Hoffmann break; 2523f1ae32a1SGerd Hoffmann case CR_RESET_ENDPOINT: 2524f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2525f1ae32a1SGerd Hoffmann if (slotid) { 2526f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2527f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2528f1ae32a1SGerd Hoffmann event.ccode = xhci_reset_ep(xhci, slotid, epid); 2529f1ae32a1SGerd Hoffmann } 2530f1ae32a1SGerd Hoffmann break; 2531f1ae32a1SGerd Hoffmann case CR_SET_TR_DEQUEUE: 2532f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2533f1ae32a1SGerd Hoffmann if (slotid) { 2534f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2535f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2536024426acSGerd Hoffmann unsigned int streamid = (trb.status >> 16) & 0xffff; 2537024426acSGerd Hoffmann event.ccode = xhci_set_ep_dequeue(xhci, slotid, 2538024426acSGerd Hoffmann epid, streamid, 2539f1ae32a1SGerd Hoffmann trb.parameter); 2540f1ae32a1SGerd Hoffmann } 2541f1ae32a1SGerd Hoffmann break; 2542f1ae32a1SGerd Hoffmann case CR_RESET_DEVICE: 2543f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2544f1ae32a1SGerd Hoffmann if (slotid) { 2545f1ae32a1SGerd Hoffmann event.ccode = xhci_reset_slot(xhci, slotid); 2546f1ae32a1SGerd Hoffmann } 2547f1ae32a1SGerd Hoffmann break; 2548f1ae32a1SGerd Hoffmann case CR_GET_PORT_BANDWIDTH: 2549f1ae32a1SGerd Hoffmann event.ccode = xhci_get_port_bandwidth(xhci, trb.parameter); 2550f1ae32a1SGerd Hoffmann break; 2551f1ae32a1SGerd Hoffmann case CR_VENDOR_VIA_CHALLENGE_RESPONSE: 255259a70ccdSDavid Gibson xhci_via_challenge(xhci, trb.parameter); 2553f1ae32a1SGerd Hoffmann break; 2554f1ae32a1SGerd Hoffmann case CR_VENDOR_NEC_FIRMWARE_REVISION: 2555f1ae32a1SGerd Hoffmann event.type = 48; /* NEC reply */ 2556f1ae32a1SGerd Hoffmann event.length = 0x3025; 2557f1ae32a1SGerd Hoffmann break; 2558f1ae32a1SGerd Hoffmann case CR_VENDOR_NEC_CHALLENGE_RESPONSE: 2559f1ae32a1SGerd Hoffmann { 2560f1ae32a1SGerd Hoffmann uint32_t chi = trb.parameter >> 32; 2561f1ae32a1SGerd Hoffmann uint32_t clo = trb.parameter; 2562f1ae32a1SGerd Hoffmann uint32_t val = xhci_nec_challenge(chi, clo); 2563f1ae32a1SGerd Hoffmann event.length = val & 0xFFFF; 2564f1ae32a1SGerd Hoffmann event.epid = val >> 16; 2565f1ae32a1SGerd Hoffmann slotid = val >> 24; 2566f1ae32a1SGerd Hoffmann event.type = 48; /* NEC reply */ 2567f1ae32a1SGerd Hoffmann } 2568f1ae32a1SGerd Hoffmann break; 2569f1ae32a1SGerd Hoffmann default: 25700ab966cfSGerd Hoffmann trace_usb_xhci_unimplemented("command", type); 2571f1ae32a1SGerd Hoffmann event.ccode = CC_TRB_ERROR; 2572f1ae32a1SGerd Hoffmann break; 2573f1ae32a1SGerd Hoffmann } 2574f1ae32a1SGerd Hoffmann event.slotid = slotid; 25752d1de850SGerd Hoffmann xhci_event(xhci, &event, 0); 2576f1ae32a1SGerd Hoffmann } 2577f1ae32a1SGerd Hoffmann } 2578f1ae32a1SGerd Hoffmann 25796a32f80fSGerd Hoffmann static bool xhci_port_have_device(XHCIPort *port) 25806a32f80fSGerd Hoffmann { 25816a32f80fSGerd Hoffmann if (!port->uport->dev || !port->uport->dev->attached) { 25826a32f80fSGerd Hoffmann return false; /* no device present */ 25836a32f80fSGerd Hoffmann } 25846a32f80fSGerd Hoffmann if (!((1 << port->uport->dev->speed) & port->speedmask)) { 25856a32f80fSGerd Hoffmann return false; /* speed mismatch */ 25866a32f80fSGerd Hoffmann } 25876a32f80fSGerd Hoffmann return true; 25886a32f80fSGerd Hoffmann } 25896a32f80fSGerd Hoffmann 2590f705a362SGerd Hoffmann static void xhci_port_notify(XHCIPort *port, uint32_t bits) 2591f705a362SGerd Hoffmann { 2592f705a362SGerd Hoffmann XHCIEvent ev = { ER_PORT_STATUS_CHANGE, CC_SUCCESS, 2593f705a362SGerd Hoffmann port->portnr << 24 }; 2594f705a362SGerd Hoffmann 2595f705a362SGerd Hoffmann if ((port->portsc & bits) == bits) { 2596f705a362SGerd Hoffmann return; 2597f705a362SGerd Hoffmann } 2598bdfce20dSGerd Hoffmann trace_usb_xhci_port_notify(port->portnr, bits); 2599f705a362SGerd Hoffmann port->portsc |= bits; 2600f705a362SGerd Hoffmann if (!xhci_running(port->xhci)) { 2601f705a362SGerd Hoffmann return; 2602f705a362SGerd Hoffmann } 2603f705a362SGerd Hoffmann xhci_event(port->xhci, &ev, 0); 2604f705a362SGerd Hoffmann } 2605f705a362SGerd Hoffmann 2606f3214027SGerd Hoffmann static void xhci_port_update(XHCIPort *port, int is_detach) 2607f1ae32a1SGerd Hoffmann { 2608b62b0828SGerd Hoffmann uint32_t pls = PLS_RX_DETECT; 2609b62b0828SGerd Hoffmann 2610f1ae32a1SGerd Hoffmann port->portsc = PORTSC_PP; 26116a32f80fSGerd Hoffmann if (!is_detach && xhci_port_have_device(port)) { 2612f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_CCS; 26130846e635SGerd Hoffmann switch (port->uport->dev->speed) { 2614f1ae32a1SGerd Hoffmann case USB_SPEED_LOW: 2615f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_LOW; 2616b62b0828SGerd Hoffmann pls = PLS_POLLING; 2617f1ae32a1SGerd Hoffmann break; 2618f1ae32a1SGerd Hoffmann case USB_SPEED_FULL: 2619f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_FULL; 2620b62b0828SGerd Hoffmann pls = PLS_POLLING; 2621f1ae32a1SGerd Hoffmann break; 2622f1ae32a1SGerd Hoffmann case USB_SPEED_HIGH: 2623f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_HIGH; 2624b62b0828SGerd Hoffmann pls = PLS_POLLING; 2625f1ae32a1SGerd Hoffmann break; 26260846e635SGerd Hoffmann case USB_SPEED_SUPER: 26270846e635SGerd Hoffmann port->portsc |= PORTSC_SPEED_SUPER; 2628b62b0828SGerd Hoffmann port->portsc |= PORTSC_PED; 2629b62b0828SGerd Hoffmann pls = PLS_U0; 26300846e635SGerd Hoffmann break; 2631f1ae32a1SGerd Hoffmann } 2632f1ae32a1SGerd Hoffmann } 2633b62b0828SGerd Hoffmann set_field(&port->portsc, pls, PORTSC_PLS); 26344f47f0f8SGerd Hoffmann trace_usb_xhci_port_link(port->portnr, pls); 2635f705a362SGerd Hoffmann xhci_port_notify(port, PORTSC_CSC); 2636f1ae32a1SGerd Hoffmann } 2637f1ae32a1SGerd Hoffmann 263840030130SGerd Hoffmann static void xhci_port_reset(XHCIPort *port) 263940030130SGerd Hoffmann { 26404f47f0f8SGerd Hoffmann trace_usb_xhci_port_reset(port->portnr); 26414f47f0f8SGerd Hoffmann 2642b62b0828SGerd Hoffmann if (!xhci_port_have_device(port)) { 2643b62b0828SGerd Hoffmann return; 2644b62b0828SGerd Hoffmann } 2645b62b0828SGerd Hoffmann 264640030130SGerd Hoffmann usb_device_reset(port->uport->dev); 2647b62b0828SGerd Hoffmann 2648b62b0828SGerd Hoffmann switch (port->uport->dev->speed) { 2649b62b0828SGerd Hoffmann case USB_SPEED_LOW: 2650b62b0828SGerd Hoffmann case USB_SPEED_FULL: 2651b62b0828SGerd Hoffmann case USB_SPEED_HIGH: 2652b62b0828SGerd Hoffmann set_field(&port->portsc, PLS_U0, PORTSC_PLS); 26534f47f0f8SGerd Hoffmann trace_usb_xhci_port_link(port->portnr, PLS_U0); 2654b62b0828SGerd Hoffmann port->portsc |= PORTSC_PED; 2655b62b0828SGerd Hoffmann break; 2656b62b0828SGerd Hoffmann } 2657b62b0828SGerd Hoffmann 2658b62b0828SGerd Hoffmann port->portsc &= ~PORTSC_PR; 2659b62b0828SGerd Hoffmann xhci_port_notify(port, PORTSC_PRC); 266040030130SGerd Hoffmann } 266140030130SGerd Hoffmann 266264619739SJan Kiszka static void xhci_reset(DeviceState *dev) 2663f1ae32a1SGerd Hoffmann { 266464619739SJan Kiszka XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev.qdev, dev); 2665f1ae32a1SGerd Hoffmann int i; 2666f1ae32a1SGerd Hoffmann 26672d754a10SGerd Hoffmann trace_usb_xhci_reset(); 2668f1ae32a1SGerd Hoffmann if (!(xhci->usbsts & USBSTS_HCH)) { 2669f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: reset while running!\n"); 2670f1ae32a1SGerd Hoffmann } 2671f1ae32a1SGerd Hoffmann 2672f1ae32a1SGerd Hoffmann xhci->usbcmd = 0; 2673f1ae32a1SGerd Hoffmann xhci->usbsts = USBSTS_HCH; 2674f1ae32a1SGerd Hoffmann xhci->dnctrl = 0; 2675f1ae32a1SGerd Hoffmann xhci->crcr_low = 0; 2676f1ae32a1SGerd Hoffmann xhci->crcr_high = 0; 2677f1ae32a1SGerd Hoffmann xhci->dcbaap_low = 0; 2678f1ae32a1SGerd Hoffmann xhci->dcbaap_high = 0; 2679f1ae32a1SGerd Hoffmann xhci->config = 0; 2680f1ae32a1SGerd Hoffmann 268191062ae0SGerd Hoffmann for (i = 0; i < xhci->numslots; i++) { 2682f1ae32a1SGerd Hoffmann xhci_disable_slot(xhci, i+1); 2683f1ae32a1SGerd Hoffmann } 2684f1ae32a1SGerd Hoffmann 26850846e635SGerd Hoffmann for (i = 0; i < xhci->numports; i++) { 2686f3214027SGerd Hoffmann xhci_port_update(xhci->ports + i, 0); 2687f1ae32a1SGerd Hoffmann } 2688f1ae32a1SGerd Hoffmann 268991062ae0SGerd Hoffmann for (i = 0; i < xhci->numintrs; i++) { 2690962d11e1SGerd Hoffmann xhci->intr[i].iman = 0; 2691962d11e1SGerd Hoffmann xhci->intr[i].imod = 0; 2692962d11e1SGerd Hoffmann xhci->intr[i].erstsz = 0; 2693962d11e1SGerd Hoffmann xhci->intr[i].erstba_low = 0; 2694962d11e1SGerd Hoffmann xhci->intr[i].erstba_high = 0; 2695962d11e1SGerd Hoffmann xhci->intr[i].erdp_low = 0; 2696962d11e1SGerd Hoffmann xhci->intr[i].erdp_high = 0; 2697962d11e1SGerd Hoffmann xhci->intr[i].msix_used = 0; 2698f1ae32a1SGerd Hoffmann 2699962d11e1SGerd Hoffmann xhci->intr[i].er_ep_idx = 0; 2700962d11e1SGerd Hoffmann xhci->intr[i].er_pcs = 1; 2701962d11e1SGerd Hoffmann xhci->intr[i].er_full = 0; 2702962d11e1SGerd Hoffmann xhci->intr[i].ev_buffer_put = 0; 2703962d11e1SGerd Hoffmann xhci->intr[i].ev_buffer_get = 0; 2704962d11e1SGerd Hoffmann } 270501546fa6SGerd Hoffmann 270601546fa6SGerd Hoffmann xhci->mfindex_start = qemu_get_clock_ns(vm_clock); 270701546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 2708f1ae32a1SGerd Hoffmann } 2709f1ae32a1SGerd Hoffmann 2710a8170e5eSAvi Kivity static uint64_t xhci_cap_read(void *ptr, hwaddr reg, unsigned size) 2711f1ae32a1SGerd Hoffmann { 27121b067564SGerd Hoffmann XHCIState *xhci = ptr; 27132d754a10SGerd Hoffmann uint32_t ret; 2714f1ae32a1SGerd Hoffmann 2715f1ae32a1SGerd Hoffmann switch (reg) { 2716f1ae32a1SGerd Hoffmann case 0x00: /* HCIVERSION, CAPLENGTH */ 27172d754a10SGerd Hoffmann ret = 0x01000000 | LEN_CAP; 27182d754a10SGerd Hoffmann break; 2719f1ae32a1SGerd Hoffmann case 0x04: /* HCSPARAMS 1 */ 27200846e635SGerd Hoffmann ret = ((xhci->numports_2+xhci->numports_3)<<24) 272191062ae0SGerd Hoffmann | (xhci->numintrs<<8) | xhci->numslots; 27222d754a10SGerd Hoffmann break; 2723f1ae32a1SGerd Hoffmann case 0x08: /* HCSPARAMS 2 */ 27242d754a10SGerd Hoffmann ret = 0x0000000f; 27252d754a10SGerd Hoffmann break; 2726f1ae32a1SGerd Hoffmann case 0x0c: /* HCSPARAMS 3 */ 27272d754a10SGerd Hoffmann ret = 0x00000000; 27282d754a10SGerd Hoffmann break; 2729f1ae32a1SGerd Hoffmann case 0x10: /* HCCPARAMS */ 27302d754a10SGerd Hoffmann if (sizeof(dma_addr_t) == 4) { 2731024426acSGerd Hoffmann ret = 0x00087000; 27322d754a10SGerd Hoffmann } else { 2733024426acSGerd Hoffmann ret = 0x00087001; 27342d754a10SGerd Hoffmann } 27352d754a10SGerd Hoffmann break; 2736f1ae32a1SGerd Hoffmann case 0x14: /* DBOFF */ 27372d754a10SGerd Hoffmann ret = OFF_DOORBELL; 27382d754a10SGerd Hoffmann break; 2739f1ae32a1SGerd Hoffmann case 0x18: /* RTSOFF */ 27402d754a10SGerd Hoffmann ret = OFF_RUNTIME; 27412d754a10SGerd Hoffmann break; 2742f1ae32a1SGerd Hoffmann 2743f1ae32a1SGerd Hoffmann /* extended capabilities */ 2744f1ae32a1SGerd Hoffmann case 0x20: /* Supported Protocol:00 */ 27452d754a10SGerd Hoffmann ret = 0x02000402; /* USB 2.0 */ 27462d754a10SGerd Hoffmann break; 2747f1ae32a1SGerd Hoffmann case 0x24: /* Supported Protocol:04 */ 27480ebfb144SGerd Hoffmann ret = 0x20425355; /* "USB " */ 27492d754a10SGerd Hoffmann break; 2750f1ae32a1SGerd Hoffmann case 0x28: /* Supported Protocol:08 */ 27510846e635SGerd Hoffmann ret = 0x00000001 | (xhci->numports_2<<8); 27522d754a10SGerd Hoffmann break; 2753f1ae32a1SGerd Hoffmann case 0x2c: /* Supported Protocol:0c */ 27542d754a10SGerd Hoffmann ret = 0x00000000; /* reserved */ 27552d754a10SGerd Hoffmann break; 2756f1ae32a1SGerd Hoffmann case 0x30: /* Supported Protocol:00 */ 27572d754a10SGerd Hoffmann ret = 0x03000002; /* USB 3.0 */ 27582d754a10SGerd Hoffmann break; 2759f1ae32a1SGerd Hoffmann case 0x34: /* Supported Protocol:04 */ 27600ebfb144SGerd Hoffmann ret = 0x20425355; /* "USB " */ 27612d754a10SGerd Hoffmann break; 2762f1ae32a1SGerd Hoffmann case 0x38: /* Supported Protocol:08 */ 27630846e635SGerd Hoffmann ret = 0x00000000 | (xhci->numports_2+1) | (xhci->numports_3<<8); 27642d754a10SGerd Hoffmann break; 2765f1ae32a1SGerd Hoffmann case 0x3c: /* Supported Protocol:0c */ 27662d754a10SGerd Hoffmann ret = 0x00000000; /* reserved */ 27672d754a10SGerd Hoffmann break; 2768f1ae32a1SGerd Hoffmann default: 27690ab966cfSGerd Hoffmann trace_usb_xhci_unimplemented("cap read", reg); 27702d754a10SGerd Hoffmann ret = 0; 2771f1ae32a1SGerd Hoffmann } 27722d754a10SGerd Hoffmann 27732d754a10SGerd Hoffmann trace_usb_xhci_cap_read(reg, ret); 27742d754a10SGerd Hoffmann return ret; 2775f1ae32a1SGerd Hoffmann } 2776f1ae32a1SGerd Hoffmann 2777a8170e5eSAvi Kivity static uint64_t xhci_port_read(void *ptr, hwaddr reg, unsigned size) 2778f1ae32a1SGerd Hoffmann { 27791d8a4e69SGerd Hoffmann XHCIPort *port = ptr; 27802d754a10SGerd Hoffmann uint32_t ret; 27812d754a10SGerd Hoffmann 27821d8a4e69SGerd Hoffmann switch (reg) { 2783f1ae32a1SGerd Hoffmann case 0x00: /* PORTSC */ 27841d8a4e69SGerd Hoffmann ret = port->portsc; 27852d754a10SGerd Hoffmann break; 2786f1ae32a1SGerd Hoffmann case 0x04: /* PORTPMSC */ 2787f1ae32a1SGerd Hoffmann case 0x08: /* PORTLI */ 27882d754a10SGerd Hoffmann ret = 0; 27892d754a10SGerd Hoffmann break; 2790f1ae32a1SGerd Hoffmann case 0x0c: /* reserved */ 2791f1ae32a1SGerd Hoffmann default: 27920ab966cfSGerd Hoffmann trace_usb_xhci_unimplemented("port read", reg); 27932d754a10SGerd Hoffmann ret = 0; 2794f1ae32a1SGerd Hoffmann } 27952d754a10SGerd Hoffmann 27961d8a4e69SGerd Hoffmann trace_usb_xhci_port_read(port->portnr, reg, ret); 27972d754a10SGerd Hoffmann return ret; 2798f1ae32a1SGerd Hoffmann } 2799f1ae32a1SGerd Hoffmann 2800a8170e5eSAvi Kivity static void xhci_port_write(void *ptr, hwaddr reg, 28011d8a4e69SGerd Hoffmann uint64_t val, unsigned size) 2802f1ae32a1SGerd Hoffmann { 28031d8a4e69SGerd Hoffmann XHCIPort *port = ptr; 2804bdfce20dSGerd Hoffmann uint32_t portsc, notify; 2805f1ae32a1SGerd Hoffmann 28061d8a4e69SGerd Hoffmann trace_usb_xhci_port_write(port->portnr, reg, val); 28072d754a10SGerd Hoffmann 28081d8a4e69SGerd Hoffmann switch (reg) { 2809f1ae32a1SGerd Hoffmann case 0x00: /* PORTSC */ 2810bdfce20dSGerd Hoffmann /* write-1-to-start bits */ 2811bdfce20dSGerd Hoffmann if (val & PORTSC_PR) { 2812bdfce20dSGerd Hoffmann xhci_port_reset(port); 2813bdfce20dSGerd Hoffmann break; 2814bdfce20dSGerd Hoffmann } 2815bdfce20dSGerd Hoffmann 28161d8a4e69SGerd Hoffmann portsc = port->portsc; 2817bdfce20dSGerd Hoffmann notify = 0; 2818f1ae32a1SGerd Hoffmann /* write-1-to-clear bits*/ 2819f1ae32a1SGerd Hoffmann portsc &= ~(val & (PORTSC_CSC|PORTSC_PEC|PORTSC_WRC|PORTSC_OCC| 2820f1ae32a1SGerd Hoffmann PORTSC_PRC|PORTSC_PLC|PORTSC_CEC)); 2821f1ae32a1SGerd Hoffmann if (val & PORTSC_LWS) { 2822f1ae32a1SGerd Hoffmann /* overwrite PLS only when LWS=1 */ 2823bdfce20dSGerd Hoffmann uint32_t old_pls = get_field(port->portsc, PORTSC_PLS); 2824bdfce20dSGerd Hoffmann uint32_t new_pls = get_field(val, PORTSC_PLS); 2825bdfce20dSGerd Hoffmann switch (new_pls) { 2826bdfce20dSGerd Hoffmann case PLS_U0: 2827bdfce20dSGerd Hoffmann if (old_pls != PLS_U0) { 2828bdfce20dSGerd Hoffmann set_field(&portsc, new_pls, PORTSC_PLS); 2829bdfce20dSGerd Hoffmann trace_usb_xhci_port_link(port->portnr, new_pls); 2830bdfce20dSGerd Hoffmann notify = PORTSC_PLC; 2831bdfce20dSGerd Hoffmann } 2832bdfce20dSGerd Hoffmann break; 2833bdfce20dSGerd Hoffmann case PLS_U3: 2834bdfce20dSGerd Hoffmann if (old_pls < PLS_U3) { 2835bdfce20dSGerd Hoffmann set_field(&portsc, new_pls, PORTSC_PLS); 2836bdfce20dSGerd Hoffmann trace_usb_xhci_port_link(port->portnr, new_pls); 2837bdfce20dSGerd Hoffmann } 2838bdfce20dSGerd Hoffmann break; 2839bdfce20dSGerd Hoffmann case PLS_RESUME: 2840bdfce20dSGerd Hoffmann /* windows does this for some reason, don't spam stderr */ 2841bdfce20dSGerd Hoffmann break; 2842bdfce20dSGerd Hoffmann default: 2843bdfce20dSGerd Hoffmann fprintf(stderr, "%s: ignore pls write (old %d, new %d)\n", 2844bdfce20dSGerd Hoffmann __func__, old_pls, new_pls); 2845bdfce20dSGerd Hoffmann break; 2846bdfce20dSGerd Hoffmann } 2847f1ae32a1SGerd Hoffmann } 2848f1ae32a1SGerd Hoffmann /* read/write bits */ 2849f1ae32a1SGerd Hoffmann portsc &= ~(PORTSC_PP|PORTSC_WCE|PORTSC_WDE|PORTSC_WOE); 2850f1ae32a1SGerd Hoffmann portsc |= (val & (PORTSC_PP|PORTSC_WCE|PORTSC_WDE|PORTSC_WOE)); 285140030130SGerd Hoffmann port->portsc = portsc; 2852bdfce20dSGerd Hoffmann if (notify) { 2853bdfce20dSGerd Hoffmann xhci_port_notify(port, notify); 2854f1ae32a1SGerd Hoffmann } 2855f1ae32a1SGerd Hoffmann break; 2856f1ae32a1SGerd Hoffmann case 0x04: /* PORTPMSC */ 2857f1ae32a1SGerd Hoffmann case 0x08: /* PORTLI */ 2858f1ae32a1SGerd Hoffmann default: 28590ab966cfSGerd Hoffmann trace_usb_xhci_unimplemented("port write", reg); 2860f1ae32a1SGerd Hoffmann } 2861f1ae32a1SGerd Hoffmann } 2862f1ae32a1SGerd Hoffmann 2863a8170e5eSAvi Kivity static uint64_t xhci_oper_read(void *ptr, hwaddr reg, unsigned size) 2864f1ae32a1SGerd Hoffmann { 28651b067564SGerd Hoffmann XHCIState *xhci = ptr; 28662d754a10SGerd Hoffmann uint32_t ret; 2867f1ae32a1SGerd Hoffmann 2868f1ae32a1SGerd Hoffmann switch (reg) { 2869f1ae32a1SGerd Hoffmann case 0x00: /* USBCMD */ 28702d754a10SGerd Hoffmann ret = xhci->usbcmd; 28712d754a10SGerd Hoffmann break; 2872f1ae32a1SGerd Hoffmann case 0x04: /* USBSTS */ 28732d754a10SGerd Hoffmann ret = xhci->usbsts; 28742d754a10SGerd Hoffmann break; 2875f1ae32a1SGerd Hoffmann case 0x08: /* PAGESIZE */ 28762d754a10SGerd Hoffmann ret = 1; /* 4KiB */ 28772d754a10SGerd Hoffmann break; 2878f1ae32a1SGerd Hoffmann case 0x14: /* DNCTRL */ 28792d754a10SGerd Hoffmann ret = xhci->dnctrl; 28802d754a10SGerd Hoffmann break; 2881f1ae32a1SGerd Hoffmann case 0x18: /* CRCR low */ 28822d754a10SGerd Hoffmann ret = xhci->crcr_low & ~0xe; 28832d754a10SGerd Hoffmann break; 2884f1ae32a1SGerd Hoffmann case 0x1c: /* CRCR high */ 28852d754a10SGerd Hoffmann ret = xhci->crcr_high; 28862d754a10SGerd Hoffmann break; 2887f1ae32a1SGerd Hoffmann case 0x30: /* DCBAAP low */ 28882d754a10SGerd Hoffmann ret = xhci->dcbaap_low; 28892d754a10SGerd Hoffmann break; 2890f1ae32a1SGerd Hoffmann case 0x34: /* DCBAAP high */ 28912d754a10SGerd Hoffmann ret = xhci->dcbaap_high; 28922d754a10SGerd Hoffmann break; 2893f1ae32a1SGerd Hoffmann case 0x38: /* CONFIG */ 28942d754a10SGerd Hoffmann ret = xhci->config; 28952d754a10SGerd Hoffmann break; 2896f1ae32a1SGerd Hoffmann default: 28970ab966cfSGerd Hoffmann trace_usb_xhci_unimplemented("oper read", reg); 28982d754a10SGerd Hoffmann ret = 0; 2899f1ae32a1SGerd Hoffmann } 29002d754a10SGerd Hoffmann 29012d754a10SGerd Hoffmann trace_usb_xhci_oper_read(reg, ret); 29022d754a10SGerd Hoffmann return ret; 2903f1ae32a1SGerd Hoffmann } 2904f1ae32a1SGerd Hoffmann 2905a8170e5eSAvi Kivity static void xhci_oper_write(void *ptr, hwaddr reg, 29061b067564SGerd Hoffmann uint64_t val, unsigned size) 2907f1ae32a1SGerd Hoffmann { 29081b067564SGerd Hoffmann XHCIState *xhci = ptr; 29091b067564SGerd Hoffmann 29102d754a10SGerd Hoffmann trace_usb_xhci_oper_write(reg, val); 29112d754a10SGerd Hoffmann 2912f1ae32a1SGerd Hoffmann switch (reg) { 2913f1ae32a1SGerd Hoffmann case 0x00: /* USBCMD */ 2914f1ae32a1SGerd Hoffmann if ((val & USBCMD_RS) && !(xhci->usbcmd & USBCMD_RS)) { 2915f1ae32a1SGerd Hoffmann xhci_run(xhci); 2916f1ae32a1SGerd Hoffmann } else if (!(val & USBCMD_RS) && (xhci->usbcmd & USBCMD_RS)) { 2917f1ae32a1SGerd Hoffmann xhci_stop(xhci); 2918f1ae32a1SGerd Hoffmann } 2919f1ae32a1SGerd Hoffmann xhci->usbcmd = val & 0xc0f; 292001546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 2921f1ae32a1SGerd Hoffmann if (val & USBCMD_HCRST) { 292264619739SJan Kiszka xhci_reset(&xhci->pci_dev.qdev); 2923f1ae32a1SGerd Hoffmann } 29244c4abe7cSGerd Hoffmann xhci_intx_update(xhci); 2925f1ae32a1SGerd Hoffmann break; 2926f1ae32a1SGerd Hoffmann 2927f1ae32a1SGerd Hoffmann case 0x04: /* USBSTS */ 2928f1ae32a1SGerd Hoffmann /* these bits are write-1-to-clear */ 2929f1ae32a1SGerd Hoffmann xhci->usbsts &= ~(val & (USBSTS_HSE|USBSTS_EINT|USBSTS_PCD|USBSTS_SRE)); 29304c4abe7cSGerd Hoffmann xhci_intx_update(xhci); 2931f1ae32a1SGerd Hoffmann break; 2932f1ae32a1SGerd Hoffmann 2933f1ae32a1SGerd Hoffmann case 0x14: /* DNCTRL */ 2934f1ae32a1SGerd Hoffmann xhci->dnctrl = val & 0xffff; 2935f1ae32a1SGerd Hoffmann break; 2936f1ae32a1SGerd Hoffmann case 0x18: /* CRCR low */ 2937f1ae32a1SGerd Hoffmann xhci->crcr_low = (val & 0xffffffcf) | (xhci->crcr_low & CRCR_CRR); 2938f1ae32a1SGerd Hoffmann break; 2939f1ae32a1SGerd Hoffmann case 0x1c: /* CRCR high */ 2940f1ae32a1SGerd Hoffmann xhci->crcr_high = val; 2941f1ae32a1SGerd Hoffmann if (xhci->crcr_low & (CRCR_CA|CRCR_CS) && (xhci->crcr_low & CRCR_CRR)) { 2942f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_COMMAND_COMPLETE, CC_COMMAND_RING_STOPPED}; 2943f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~CRCR_CRR; 29442d1de850SGerd Hoffmann xhci_event(xhci, &event, 0); 2945f1ae32a1SGerd Hoffmann DPRINTF("xhci: command ring stopped (CRCR=%08x)\n", xhci->crcr_low); 2946f1ae32a1SGerd Hoffmann } else { 294759a70ccdSDavid Gibson dma_addr_t base = xhci_addr64(xhci->crcr_low & ~0x3f, val); 2948f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &xhci->cmd_ring, base); 2949f1ae32a1SGerd Hoffmann } 2950f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~(CRCR_CA | CRCR_CS); 2951f1ae32a1SGerd Hoffmann break; 2952f1ae32a1SGerd Hoffmann case 0x30: /* DCBAAP low */ 2953f1ae32a1SGerd Hoffmann xhci->dcbaap_low = val & 0xffffffc0; 2954f1ae32a1SGerd Hoffmann break; 2955f1ae32a1SGerd Hoffmann case 0x34: /* DCBAAP high */ 2956f1ae32a1SGerd Hoffmann xhci->dcbaap_high = val; 2957f1ae32a1SGerd Hoffmann break; 2958f1ae32a1SGerd Hoffmann case 0x38: /* CONFIG */ 2959f1ae32a1SGerd Hoffmann xhci->config = val & 0xff; 2960f1ae32a1SGerd Hoffmann break; 2961f1ae32a1SGerd Hoffmann default: 29620ab966cfSGerd Hoffmann trace_usb_xhci_unimplemented("oper write", reg); 2963f1ae32a1SGerd Hoffmann } 2964f1ae32a1SGerd Hoffmann } 2965f1ae32a1SGerd Hoffmann 2966a8170e5eSAvi Kivity static uint64_t xhci_runtime_read(void *ptr, hwaddr reg, 29671b067564SGerd Hoffmann unsigned size) 2968f1ae32a1SGerd Hoffmann { 29691b067564SGerd Hoffmann XHCIState *xhci = ptr; 297043d9d604SGerd Hoffmann uint32_t ret = 0; 2971f1ae32a1SGerd Hoffmann 297243d9d604SGerd Hoffmann if (reg < 0x20) { 2973f1ae32a1SGerd Hoffmann switch (reg) { 2974f1ae32a1SGerd Hoffmann case 0x00: /* MFINDEX */ 297501546fa6SGerd Hoffmann ret = xhci_mfindex_get(xhci) & 0x3fff; 29762d754a10SGerd Hoffmann break; 2977f1ae32a1SGerd Hoffmann default: 29780ab966cfSGerd Hoffmann trace_usb_xhci_unimplemented("runtime read", reg); 297943d9d604SGerd Hoffmann break; 298043d9d604SGerd Hoffmann } 298143d9d604SGerd Hoffmann } else { 298243d9d604SGerd Hoffmann int v = (reg - 0x20) / 0x20; 298343d9d604SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[v]; 298443d9d604SGerd Hoffmann switch (reg & 0x1f) { 298543d9d604SGerd Hoffmann case 0x00: /* IMAN */ 298643d9d604SGerd Hoffmann ret = intr->iman; 298743d9d604SGerd Hoffmann break; 298843d9d604SGerd Hoffmann case 0x04: /* IMOD */ 298943d9d604SGerd Hoffmann ret = intr->imod; 299043d9d604SGerd Hoffmann break; 299143d9d604SGerd Hoffmann case 0x08: /* ERSTSZ */ 299243d9d604SGerd Hoffmann ret = intr->erstsz; 299343d9d604SGerd Hoffmann break; 299443d9d604SGerd Hoffmann case 0x10: /* ERSTBA low */ 299543d9d604SGerd Hoffmann ret = intr->erstba_low; 299643d9d604SGerd Hoffmann break; 299743d9d604SGerd Hoffmann case 0x14: /* ERSTBA high */ 299843d9d604SGerd Hoffmann ret = intr->erstba_high; 299943d9d604SGerd Hoffmann break; 300043d9d604SGerd Hoffmann case 0x18: /* ERDP low */ 300143d9d604SGerd Hoffmann ret = intr->erdp_low; 300243d9d604SGerd Hoffmann break; 300343d9d604SGerd Hoffmann case 0x1c: /* ERDP high */ 300443d9d604SGerd Hoffmann ret = intr->erdp_high; 300543d9d604SGerd Hoffmann break; 300643d9d604SGerd Hoffmann } 3007f1ae32a1SGerd Hoffmann } 30082d754a10SGerd Hoffmann 30092d754a10SGerd Hoffmann trace_usb_xhci_runtime_read(reg, ret); 30102d754a10SGerd Hoffmann return ret; 3011f1ae32a1SGerd Hoffmann } 3012f1ae32a1SGerd Hoffmann 3013a8170e5eSAvi Kivity static void xhci_runtime_write(void *ptr, hwaddr reg, 30141b067564SGerd Hoffmann uint64_t val, unsigned size) 3015f1ae32a1SGerd Hoffmann { 30161b067564SGerd Hoffmann XHCIState *xhci = ptr; 301743d9d604SGerd Hoffmann int v = (reg - 0x20) / 0x20; 301843d9d604SGerd Hoffmann XHCIInterrupter *intr = &xhci->intr[v]; 30198e9f18b6SGerd Hoffmann trace_usb_xhci_runtime_write(reg, val); 3020f1ae32a1SGerd Hoffmann 302143d9d604SGerd Hoffmann if (reg < 0x20) { 30220ab966cfSGerd Hoffmann trace_usb_xhci_unimplemented("runtime write", reg); 302343d9d604SGerd Hoffmann return; 302443d9d604SGerd Hoffmann } 302543d9d604SGerd Hoffmann 302643d9d604SGerd Hoffmann switch (reg & 0x1f) { 302743d9d604SGerd Hoffmann case 0x00: /* IMAN */ 3028f1ae32a1SGerd Hoffmann if (val & IMAN_IP) { 3029962d11e1SGerd Hoffmann intr->iman &= ~IMAN_IP; 3030f1ae32a1SGerd Hoffmann } 3031962d11e1SGerd Hoffmann intr->iman &= ~IMAN_IE; 3032962d11e1SGerd Hoffmann intr->iman |= val & IMAN_IE; 303343d9d604SGerd Hoffmann if (v == 0) { 30344c4abe7cSGerd Hoffmann xhci_intx_update(xhci); 303543d9d604SGerd Hoffmann } 303643d9d604SGerd Hoffmann xhci_msix_update(xhci, v); 3037f1ae32a1SGerd Hoffmann break; 303843d9d604SGerd Hoffmann case 0x04: /* IMOD */ 3039962d11e1SGerd Hoffmann intr->imod = val; 3040f1ae32a1SGerd Hoffmann break; 304143d9d604SGerd Hoffmann case 0x08: /* ERSTSZ */ 3042962d11e1SGerd Hoffmann intr->erstsz = val & 0xffff; 3043f1ae32a1SGerd Hoffmann break; 304443d9d604SGerd Hoffmann case 0x10: /* ERSTBA low */ 3045f1ae32a1SGerd Hoffmann /* XXX NEC driver bug: it doesn't align this to 64 bytes 3046962d11e1SGerd Hoffmann intr->erstba_low = val & 0xffffffc0; */ 3047962d11e1SGerd Hoffmann intr->erstba_low = val & 0xfffffff0; 3048f1ae32a1SGerd Hoffmann break; 304943d9d604SGerd Hoffmann case 0x14: /* ERSTBA high */ 3050962d11e1SGerd Hoffmann intr->erstba_high = val; 305143d9d604SGerd Hoffmann xhci_er_reset(xhci, v); 3052f1ae32a1SGerd Hoffmann break; 305343d9d604SGerd Hoffmann case 0x18: /* ERDP low */ 3054f1ae32a1SGerd Hoffmann if (val & ERDP_EHB) { 3055962d11e1SGerd Hoffmann intr->erdp_low &= ~ERDP_EHB; 3056f1ae32a1SGerd Hoffmann } 3057962d11e1SGerd Hoffmann intr->erdp_low = (val & ~ERDP_EHB) | (intr->erdp_low & ERDP_EHB); 3058f1ae32a1SGerd Hoffmann break; 305943d9d604SGerd Hoffmann case 0x1c: /* ERDP high */ 3060962d11e1SGerd Hoffmann intr->erdp_high = val; 306143d9d604SGerd Hoffmann xhci_events_update(xhci, v); 3062f1ae32a1SGerd Hoffmann break; 3063f1ae32a1SGerd Hoffmann default: 30640ab966cfSGerd Hoffmann trace_usb_xhci_unimplemented("oper write", reg); 3065f1ae32a1SGerd Hoffmann } 3066f1ae32a1SGerd Hoffmann } 3067f1ae32a1SGerd Hoffmann 3068a8170e5eSAvi Kivity static uint64_t xhci_doorbell_read(void *ptr, hwaddr reg, 30691b067564SGerd Hoffmann unsigned size) 3070f1ae32a1SGerd Hoffmann { 3071f1ae32a1SGerd Hoffmann /* doorbells always read as 0 */ 30722d754a10SGerd Hoffmann trace_usb_xhci_doorbell_read(reg, 0); 3073f1ae32a1SGerd Hoffmann return 0; 3074f1ae32a1SGerd Hoffmann } 3075f1ae32a1SGerd Hoffmann 3076a8170e5eSAvi Kivity static void xhci_doorbell_write(void *ptr, hwaddr reg, 30771b067564SGerd Hoffmann uint64_t val, unsigned size) 3078f1ae32a1SGerd Hoffmann { 30791b067564SGerd Hoffmann XHCIState *xhci = ptr; 3080024426acSGerd Hoffmann unsigned int epid, streamid; 30811b067564SGerd Hoffmann 30822d754a10SGerd Hoffmann trace_usb_xhci_doorbell_write(reg, val); 3083f1ae32a1SGerd Hoffmann 3084f1ae32a1SGerd Hoffmann if (!xhci_running(xhci)) { 3085f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: wrote doorbell while xHC stopped or paused\n"); 3086f1ae32a1SGerd Hoffmann return; 3087f1ae32a1SGerd Hoffmann } 3088f1ae32a1SGerd Hoffmann 3089f1ae32a1SGerd Hoffmann reg >>= 2; 3090f1ae32a1SGerd Hoffmann 3091f1ae32a1SGerd Hoffmann if (reg == 0) { 3092f1ae32a1SGerd Hoffmann if (val == 0) { 3093f1ae32a1SGerd Hoffmann xhci_process_commands(xhci); 3094f1ae32a1SGerd Hoffmann } else { 30951b067564SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell 0 write: 0x%x\n", 30961b067564SGerd Hoffmann (uint32_t)val); 3097f1ae32a1SGerd Hoffmann } 3098f1ae32a1SGerd Hoffmann } else { 3099024426acSGerd Hoffmann epid = val & 0xff; 3100024426acSGerd Hoffmann streamid = (val >> 16) & 0xffff; 310191062ae0SGerd Hoffmann if (reg > xhci->numslots) { 31021b067564SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell %d\n", (int)reg); 3103024426acSGerd Hoffmann } else if (epid > 31) { 31041b067564SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell %d write: 0x%x\n", 31051b067564SGerd Hoffmann (int)reg, (uint32_t)val); 3106f1ae32a1SGerd Hoffmann } else { 3107024426acSGerd Hoffmann xhci_kick_ep(xhci, reg, epid, streamid); 3108f1ae32a1SGerd Hoffmann } 3109f1ae32a1SGerd Hoffmann } 3110f1ae32a1SGerd Hoffmann } 3111f1ae32a1SGerd Hoffmann 31126d3bc22eSGerd Hoffmann static void xhci_cap_write(void *opaque, hwaddr addr, uint64_t val, 31136d3bc22eSGerd Hoffmann unsigned width) 31146d3bc22eSGerd Hoffmann { 31156d3bc22eSGerd Hoffmann /* nothing */ 31166d3bc22eSGerd Hoffmann } 31176d3bc22eSGerd Hoffmann 31181b067564SGerd Hoffmann static const MemoryRegionOps xhci_cap_ops = { 31191b067564SGerd Hoffmann .read = xhci_cap_read, 31206d3bc22eSGerd Hoffmann .write = xhci_cap_write, 31216ee021d4SGerd Hoffmann .valid.min_access_size = 1, 31221b067564SGerd Hoffmann .valid.max_access_size = 4, 31236ee021d4SGerd Hoffmann .impl.min_access_size = 4, 31246ee021d4SGerd Hoffmann .impl.max_access_size = 4, 31251b067564SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 31261b067564SGerd Hoffmann }; 3127f1ae32a1SGerd Hoffmann 31281b067564SGerd Hoffmann static const MemoryRegionOps xhci_oper_ops = { 31291b067564SGerd Hoffmann .read = xhci_oper_read, 31301b067564SGerd Hoffmann .write = xhci_oper_write, 31311b067564SGerd Hoffmann .valid.min_access_size = 4, 31321b067564SGerd Hoffmann .valid.max_access_size = 4, 31331b067564SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 31341b067564SGerd Hoffmann }; 3135f1ae32a1SGerd Hoffmann 31361d8a4e69SGerd Hoffmann static const MemoryRegionOps xhci_port_ops = { 31371d8a4e69SGerd Hoffmann .read = xhci_port_read, 31381d8a4e69SGerd Hoffmann .write = xhci_port_write, 31391d8a4e69SGerd Hoffmann .valid.min_access_size = 4, 31401d8a4e69SGerd Hoffmann .valid.max_access_size = 4, 31411d8a4e69SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 31421d8a4e69SGerd Hoffmann }; 31431d8a4e69SGerd Hoffmann 31441b067564SGerd Hoffmann static const MemoryRegionOps xhci_runtime_ops = { 31451b067564SGerd Hoffmann .read = xhci_runtime_read, 31461b067564SGerd Hoffmann .write = xhci_runtime_write, 31471b067564SGerd Hoffmann .valid.min_access_size = 4, 31481b067564SGerd Hoffmann .valid.max_access_size = 4, 31491b067564SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 31501b067564SGerd Hoffmann }; 3151f1ae32a1SGerd Hoffmann 31521b067564SGerd Hoffmann static const MemoryRegionOps xhci_doorbell_ops = { 31531b067564SGerd Hoffmann .read = xhci_doorbell_read, 31541b067564SGerd Hoffmann .write = xhci_doorbell_write, 3155f1ae32a1SGerd Hoffmann .valid.min_access_size = 4, 3156f1ae32a1SGerd Hoffmann .valid.max_access_size = 4, 3157f1ae32a1SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 3158f1ae32a1SGerd Hoffmann }; 3159f1ae32a1SGerd Hoffmann 3160f1ae32a1SGerd Hoffmann static void xhci_attach(USBPort *usbport) 3161f1ae32a1SGerd Hoffmann { 3162f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 31630846e635SGerd Hoffmann XHCIPort *port = xhci_lookup_port(xhci, usbport); 3164f1ae32a1SGerd Hoffmann 3165f3214027SGerd Hoffmann xhci_port_update(port, 0); 3166f1ae32a1SGerd Hoffmann } 3167f1ae32a1SGerd Hoffmann 3168f1ae32a1SGerd Hoffmann static void xhci_detach(USBPort *usbport) 3169f1ae32a1SGerd Hoffmann { 3170f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 31710846e635SGerd Hoffmann XHCIPort *port = xhci_lookup_port(xhci, usbport); 3172f1ae32a1SGerd Hoffmann 3173f3dcf638SGerd Hoffmann xhci_detach_slot(xhci, usbport); 3174f3214027SGerd Hoffmann xhci_port_update(port, 1); 3175f1ae32a1SGerd Hoffmann } 3176f1ae32a1SGerd Hoffmann 3177f1ae32a1SGerd Hoffmann static void xhci_wakeup(USBPort *usbport) 3178f1ae32a1SGerd Hoffmann { 3179f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 31800846e635SGerd Hoffmann XHCIPort *port = xhci_lookup_port(xhci, usbport); 3181f1ae32a1SGerd Hoffmann 318285e05d82SGerd Hoffmann if (get_field(port->portsc, PORTSC_PLS) != PLS_U3) { 3183f1ae32a1SGerd Hoffmann return; 3184f1ae32a1SGerd Hoffmann } 318585e05d82SGerd Hoffmann set_field(&port->portsc, PLS_RESUME, PORTSC_PLS); 3186f705a362SGerd Hoffmann xhci_port_notify(port, PORTSC_PLC); 3187f1ae32a1SGerd Hoffmann } 3188f1ae32a1SGerd Hoffmann 3189f1ae32a1SGerd Hoffmann static void xhci_complete(USBPort *port, USBPacket *packet) 3190f1ae32a1SGerd Hoffmann { 3191f1ae32a1SGerd Hoffmann XHCITransfer *xfer = container_of(packet, XHCITransfer, packet); 3192f1ae32a1SGerd Hoffmann 31939a77a0f5SHans de Goede if (packet->status == USB_RET_REMOVE_FROM_QUEUE) { 31940cae7b1aSHans de Goede xhci_ep_nuke_one_xfer(xfer); 31950cae7b1aSHans de Goede return; 31960cae7b1aSHans de Goede } 31979a77a0f5SHans de Goede xhci_complete_packet(xfer); 3198024426acSGerd Hoffmann xhci_kick_ep(xfer->xhci, xfer->slotid, xfer->epid, xfer->streamid); 3199f1ae32a1SGerd Hoffmann } 3200f1ae32a1SGerd Hoffmann 3201ccaf87a0SGerd Hoffmann static void xhci_child_detach(USBPort *uport, USBDevice *child) 3202f1ae32a1SGerd Hoffmann { 3203ccaf87a0SGerd Hoffmann USBBus *bus = usb_bus_from_device(child); 3204ccaf87a0SGerd Hoffmann XHCIState *xhci = container_of(bus, XHCIState, bus); 3205ccaf87a0SGerd Hoffmann 320681251841SGerd Hoffmann xhci_detach_slot(xhci, uport); 3207f1ae32a1SGerd Hoffmann } 3208f1ae32a1SGerd Hoffmann 32091d8a4e69SGerd Hoffmann static USBPortOps xhci_uport_ops = { 3210f1ae32a1SGerd Hoffmann .attach = xhci_attach, 3211f1ae32a1SGerd Hoffmann .detach = xhci_detach, 3212f1ae32a1SGerd Hoffmann .wakeup = xhci_wakeup, 3213f1ae32a1SGerd Hoffmann .complete = xhci_complete, 3214f1ae32a1SGerd Hoffmann .child_detach = xhci_child_detach, 3215f1ae32a1SGerd Hoffmann }; 3216f1ae32a1SGerd Hoffmann 3217f1ae32a1SGerd Hoffmann static int xhci_find_epid(USBEndpoint *ep) 3218f1ae32a1SGerd Hoffmann { 3219f1ae32a1SGerd Hoffmann if (ep->nr == 0) { 3220f1ae32a1SGerd Hoffmann return 1; 3221f1ae32a1SGerd Hoffmann } 3222f1ae32a1SGerd Hoffmann if (ep->pid == USB_TOKEN_IN) { 3223f1ae32a1SGerd Hoffmann return ep->nr * 2 + 1; 3224f1ae32a1SGerd Hoffmann } else { 3225f1ae32a1SGerd Hoffmann return ep->nr * 2; 3226f1ae32a1SGerd Hoffmann } 3227f1ae32a1SGerd Hoffmann } 3228f1ae32a1SGerd Hoffmann 32298550a02dSGerd Hoffmann static void xhci_wakeup_endpoint(USBBus *bus, USBEndpoint *ep, 32308550a02dSGerd Hoffmann unsigned int stream) 3231f1ae32a1SGerd Hoffmann { 3232f1ae32a1SGerd Hoffmann XHCIState *xhci = container_of(bus, XHCIState, bus); 3233f1ae32a1SGerd Hoffmann int slotid; 3234f1ae32a1SGerd Hoffmann 3235f1ae32a1SGerd Hoffmann DPRINTF("%s\n", __func__); 3236af203be3SGerd Hoffmann slotid = ep->dev->addr; 3237f1ae32a1SGerd Hoffmann if (slotid == 0 || !xhci->slots[slotid-1].enabled) { 3238f1ae32a1SGerd Hoffmann DPRINTF("%s: oops, no slot for dev %d\n", __func__, ep->dev->addr); 3239f1ae32a1SGerd Hoffmann return; 3240f1ae32a1SGerd Hoffmann } 3241024426acSGerd Hoffmann xhci_kick_ep(xhci, slotid, xhci_find_epid(ep), stream); 3242f1ae32a1SGerd Hoffmann } 3243f1ae32a1SGerd Hoffmann 3244f1ae32a1SGerd Hoffmann static USBBusOps xhci_bus_ops = { 3245f1ae32a1SGerd Hoffmann .wakeup_endpoint = xhci_wakeup_endpoint, 3246f1ae32a1SGerd Hoffmann }; 3247f1ae32a1SGerd Hoffmann 3248f1ae32a1SGerd Hoffmann static void usb_xhci_init(XHCIState *xhci, DeviceState *dev) 3249f1ae32a1SGerd Hoffmann { 32500846e635SGerd Hoffmann XHCIPort *port; 32510846e635SGerd Hoffmann int i, usbports, speedmask; 3252f1ae32a1SGerd Hoffmann 3253f1ae32a1SGerd Hoffmann xhci->usbsts = USBSTS_HCH; 3254f1ae32a1SGerd Hoffmann 32550846e635SGerd Hoffmann if (xhci->numports_2 > MAXPORTS_2) { 32560846e635SGerd Hoffmann xhci->numports_2 = MAXPORTS_2; 32570846e635SGerd Hoffmann } 32580846e635SGerd Hoffmann if (xhci->numports_3 > MAXPORTS_3) { 32590846e635SGerd Hoffmann xhci->numports_3 = MAXPORTS_3; 32600846e635SGerd Hoffmann } 32610846e635SGerd Hoffmann usbports = MAX(xhci->numports_2, xhci->numports_3); 32620846e635SGerd Hoffmann xhci->numports = xhci->numports_2 + xhci->numports_3; 32630846e635SGerd Hoffmann 3264f1ae32a1SGerd Hoffmann usb_bus_new(&xhci->bus, &xhci_bus_ops, &xhci->pci_dev.qdev); 3265f1ae32a1SGerd Hoffmann 32660846e635SGerd Hoffmann for (i = 0; i < usbports; i++) { 32670846e635SGerd Hoffmann speedmask = 0; 32680846e635SGerd Hoffmann if (i < xhci->numports_2) { 32690846e635SGerd Hoffmann port = &xhci->ports[i]; 32700846e635SGerd Hoffmann port->portnr = i + 1; 32710846e635SGerd Hoffmann port->uport = &xhci->uports[i]; 32720846e635SGerd Hoffmann port->speedmask = 3273f1ae32a1SGerd Hoffmann USB_SPEED_MASK_LOW | 3274f1ae32a1SGerd Hoffmann USB_SPEED_MASK_FULL | 32750846e635SGerd Hoffmann USB_SPEED_MASK_HIGH; 32761d8a4e69SGerd Hoffmann snprintf(port->name, sizeof(port->name), "usb2 port #%d", i+1); 32770846e635SGerd Hoffmann speedmask |= port->speedmask; 3278f1ae32a1SGerd Hoffmann } 32790846e635SGerd Hoffmann if (i < xhci->numports_3) { 32800846e635SGerd Hoffmann port = &xhci->ports[i + xhci->numports_2]; 32810846e635SGerd Hoffmann port->portnr = i + 1 + xhci->numports_2; 32820846e635SGerd Hoffmann port->uport = &xhci->uports[i]; 32830846e635SGerd Hoffmann port->speedmask = USB_SPEED_MASK_SUPER; 32841d8a4e69SGerd Hoffmann snprintf(port->name, sizeof(port->name), "usb3 port #%d", i+1); 32850846e635SGerd Hoffmann speedmask |= port->speedmask; 32860846e635SGerd Hoffmann } 32870846e635SGerd Hoffmann usb_register_port(&xhci->bus, &xhci->uports[i], xhci, i, 32881d8a4e69SGerd Hoffmann &xhci_uport_ops, speedmask); 3289f1ae32a1SGerd Hoffmann } 3290f1ae32a1SGerd Hoffmann } 3291f1ae32a1SGerd Hoffmann 3292f1ae32a1SGerd Hoffmann static int usb_xhci_initfn(struct PCIDevice *dev) 3293f1ae32a1SGerd Hoffmann { 32941d8a4e69SGerd Hoffmann int i, ret; 3295f1ae32a1SGerd Hoffmann 3296f1ae32a1SGerd Hoffmann XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev, dev); 3297f1ae32a1SGerd Hoffmann 3298f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_CLASS_PROG] = 0x30; /* xHCI */ 3299f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */ 3300f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_CACHE_LINE_SIZE] = 0x10; 3301f1ae32a1SGerd Hoffmann xhci->pci_dev.config[0x60] = 0x30; /* release number */ 3302f1ae32a1SGerd Hoffmann 3303f1ae32a1SGerd Hoffmann usb_xhci_init(xhci, &dev->qdev); 3304f1ae32a1SGerd Hoffmann 330591062ae0SGerd Hoffmann if (xhci->numintrs > MAXINTRS) { 330691062ae0SGerd Hoffmann xhci->numintrs = MAXINTRS; 330791062ae0SGerd Hoffmann } 3308c94a7c69SGerd Hoffmann while (xhci->numintrs & (xhci->numintrs - 1)) { /* ! power of 2 */ 3309c94a7c69SGerd Hoffmann xhci->numintrs++; 3310c94a7c69SGerd Hoffmann } 331191062ae0SGerd Hoffmann if (xhci->numintrs < 1) { 331291062ae0SGerd Hoffmann xhci->numintrs = 1; 331391062ae0SGerd Hoffmann } 331491062ae0SGerd Hoffmann if (xhci->numslots > MAXSLOTS) { 331591062ae0SGerd Hoffmann xhci->numslots = MAXSLOTS; 331691062ae0SGerd Hoffmann } 331791062ae0SGerd Hoffmann if (xhci->numslots < 1) { 331891062ae0SGerd Hoffmann xhci->numslots = 1; 331991062ae0SGerd Hoffmann } 332091062ae0SGerd Hoffmann 332101546fa6SGerd Hoffmann xhci->mfwrap_timer = qemu_new_timer_ns(vm_clock, xhci_mfwrap_timer, xhci); 332201546fa6SGerd Hoffmann 3323f1ae32a1SGerd Hoffmann xhci->irq = xhci->pci_dev.irq[0]; 3324f1ae32a1SGerd Hoffmann 33251b067564SGerd Hoffmann memory_region_init(&xhci->mem, "xhci", LEN_REGS); 33261b067564SGerd Hoffmann memory_region_init_io(&xhci->mem_cap, &xhci_cap_ops, xhci, 33271b067564SGerd Hoffmann "capabilities", LEN_CAP); 33281b067564SGerd Hoffmann memory_region_init_io(&xhci->mem_oper, &xhci_oper_ops, xhci, 33291d8a4e69SGerd Hoffmann "operational", 0x400); 33301b067564SGerd Hoffmann memory_region_init_io(&xhci->mem_runtime, &xhci_runtime_ops, xhci, 33311b067564SGerd Hoffmann "runtime", LEN_RUNTIME); 33321b067564SGerd Hoffmann memory_region_init_io(&xhci->mem_doorbell, &xhci_doorbell_ops, xhci, 33331b067564SGerd Hoffmann "doorbell", LEN_DOORBELL); 33341b067564SGerd Hoffmann 33351b067564SGerd Hoffmann memory_region_add_subregion(&xhci->mem, 0, &xhci->mem_cap); 33361b067564SGerd Hoffmann memory_region_add_subregion(&xhci->mem, OFF_OPER, &xhci->mem_oper); 33371b067564SGerd Hoffmann memory_region_add_subregion(&xhci->mem, OFF_RUNTIME, &xhci->mem_runtime); 33381b067564SGerd Hoffmann memory_region_add_subregion(&xhci->mem, OFF_DOORBELL, &xhci->mem_doorbell); 33391b067564SGerd Hoffmann 33401d8a4e69SGerd Hoffmann for (i = 0; i < xhci->numports; i++) { 33411d8a4e69SGerd Hoffmann XHCIPort *port = &xhci->ports[i]; 33421d8a4e69SGerd Hoffmann uint32_t offset = OFF_OPER + 0x400 + 0x10 * i; 33431d8a4e69SGerd Hoffmann port->xhci = xhci; 33441d8a4e69SGerd Hoffmann memory_region_init_io(&port->mem, &xhci_port_ops, port, 33451d8a4e69SGerd Hoffmann port->name, 0x10); 33461d8a4e69SGerd Hoffmann memory_region_add_subregion(&xhci->mem, offset, &port->mem); 33471d8a4e69SGerd Hoffmann } 33481d8a4e69SGerd Hoffmann 3349f1ae32a1SGerd Hoffmann pci_register_bar(&xhci->pci_dev, 0, 3350f1ae32a1SGerd Hoffmann PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64, 3351f1ae32a1SGerd Hoffmann &xhci->mem); 3352f1ae32a1SGerd Hoffmann 33536214e73cSAlex Williamson ret = pcie_endpoint_cap_init(&xhci->pci_dev, 0xa0); 3354f1ae32a1SGerd Hoffmann assert(ret >= 0); 3355f1ae32a1SGerd Hoffmann 3356c5e9b02dSGerd Hoffmann if (xhci->flags & (1 << XHCI_FLAG_USE_MSI)) { 335791062ae0SGerd Hoffmann msi_init(&xhci->pci_dev, 0x70, xhci->numintrs, true, false); 3358f1ae32a1SGerd Hoffmann } 33594c47f800SGerd Hoffmann if (xhci->flags & (1 << XHCI_FLAG_USE_MSI_X)) { 336091062ae0SGerd Hoffmann msix_init(&xhci->pci_dev, xhci->numintrs, 33614c47f800SGerd Hoffmann &xhci->mem, 0, OFF_MSIX_TABLE, 33624c47f800SGerd Hoffmann &xhci->mem, 0, OFF_MSIX_PBA, 33634c47f800SGerd Hoffmann 0x90); 33644c47f800SGerd Hoffmann } 3365f1ae32a1SGerd Hoffmann 3366f1ae32a1SGerd Hoffmann return 0; 3367f1ae32a1SGerd Hoffmann } 3368f1ae32a1SGerd Hoffmann 3369f1ae32a1SGerd Hoffmann static const VMStateDescription vmstate_xhci = { 3370f1ae32a1SGerd Hoffmann .name = "xhci", 3371f1ae32a1SGerd Hoffmann .unmigratable = 1, 3372f1ae32a1SGerd Hoffmann }; 3373f1ae32a1SGerd Hoffmann 3374f1ae32a1SGerd Hoffmann static Property xhci_properties[] = { 3375c5e9b02dSGerd Hoffmann DEFINE_PROP_BIT("msi", XHCIState, flags, XHCI_FLAG_USE_MSI, true), 33764c47f800SGerd Hoffmann DEFINE_PROP_BIT("msix", XHCIState, flags, XHCI_FLAG_USE_MSI_X, true), 337791062ae0SGerd Hoffmann DEFINE_PROP_UINT32("intrs", XHCIState, numintrs, MAXINTRS), 337891062ae0SGerd Hoffmann DEFINE_PROP_UINT32("slots", XHCIState, numslots, MAXSLOTS), 33790846e635SGerd Hoffmann DEFINE_PROP_UINT32("p2", XHCIState, numports_2, 4), 33800846e635SGerd Hoffmann DEFINE_PROP_UINT32("p3", XHCIState, numports_3, 4), 3381f1ae32a1SGerd Hoffmann DEFINE_PROP_END_OF_LIST(), 3382f1ae32a1SGerd Hoffmann }; 3383f1ae32a1SGerd Hoffmann 3384f1ae32a1SGerd Hoffmann static void xhci_class_init(ObjectClass *klass, void *data) 3385f1ae32a1SGerd Hoffmann { 3386f1ae32a1SGerd Hoffmann PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 3387f1ae32a1SGerd Hoffmann DeviceClass *dc = DEVICE_CLASS(klass); 3388f1ae32a1SGerd Hoffmann 3389f1ae32a1SGerd Hoffmann dc->vmsd = &vmstate_xhci; 3390f1ae32a1SGerd Hoffmann dc->props = xhci_properties; 339164619739SJan Kiszka dc->reset = xhci_reset; 3392f1ae32a1SGerd Hoffmann k->init = usb_xhci_initfn; 3393f1ae32a1SGerd Hoffmann k->vendor_id = PCI_VENDOR_ID_NEC; 3394f1ae32a1SGerd Hoffmann k->device_id = PCI_DEVICE_ID_NEC_UPD720200; 3395f1ae32a1SGerd Hoffmann k->class_id = PCI_CLASS_SERIAL_USB; 3396f1ae32a1SGerd Hoffmann k->revision = 0x03; 3397f1ae32a1SGerd Hoffmann k->is_express = 1; 33986c2d1c32SGerd Hoffmann k->no_hotplug = 1; 3399f1ae32a1SGerd Hoffmann } 3400f1ae32a1SGerd Hoffmann 34018c43a6f0SAndreas Färber static const TypeInfo xhci_info = { 3402f1ae32a1SGerd Hoffmann .name = "nec-usb-xhci", 3403f1ae32a1SGerd Hoffmann .parent = TYPE_PCI_DEVICE, 3404f1ae32a1SGerd Hoffmann .instance_size = sizeof(XHCIState), 3405f1ae32a1SGerd Hoffmann .class_init = xhci_class_init, 3406f1ae32a1SGerd Hoffmann }; 3407f1ae32a1SGerd Hoffmann 3408f1ae32a1SGerd Hoffmann static void xhci_register_types(void) 3409f1ae32a1SGerd Hoffmann { 3410f1ae32a1SGerd Hoffmann type_register_static(&xhci_info); 3411f1ae32a1SGerd Hoffmann } 3412f1ae32a1SGerd Hoffmann 3413f1ae32a1SGerd Hoffmann type_init(xhci_register_types) 3414