1f1ae32a1SGerd Hoffmann /* 2f1ae32a1SGerd Hoffmann * USB xHCI controller emulation 3f1ae32a1SGerd Hoffmann * 4f1ae32a1SGerd Hoffmann * Copyright (c) 2011 Securiforest 5f1ae32a1SGerd Hoffmann * Date: 2011-05-11 ; Author: Hector Martin <hector@marcansoft.com> 6f1ae32a1SGerd Hoffmann * Based on usb-ohci.c, emulates Renesas NEC USB 3.0 7f1ae32a1SGerd Hoffmann * 8f1ae32a1SGerd Hoffmann * This library is free software; you can redistribute it and/or 9f1ae32a1SGerd Hoffmann * modify it under the terms of the GNU Lesser General Public 10f1ae32a1SGerd Hoffmann * License as published by the Free Software Foundation; either 11f1ae32a1SGerd Hoffmann * version 2 of the License, or (at your option) any later version. 12f1ae32a1SGerd Hoffmann * 13f1ae32a1SGerd Hoffmann * This library is distributed in the hope that it will be useful, 14f1ae32a1SGerd Hoffmann * but WITHOUT ANY WARRANTY; without even the implied warranty of 15f1ae32a1SGerd Hoffmann * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16f1ae32a1SGerd Hoffmann * Lesser General Public License for more details. 17f1ae32a1SGerd Hoffmann * 18f1ae32a1SGerd Hoffmann * You should have received a copy of the GNU Lesser General Public 19f1ae32a1SGerd Hoffmann * License along with this library; if not, see <http://www.gnu.org/licenses/>. 20f1ae32a1SGerd Hoffmann */ 21f1ae32a1SGerd Hoffmann #include "hw/hw.h" 22f1ae32a1SGerd Hoffmann #include "qemu-timer.h" 23f1ae32a1SGerd Hoffmann #include "hw/usb.h" 24f1ae32a1SGerd Hoffmann #include "hw/pci.h" 25f1ae32a1SGerd Hoffmann #include "hw/msi.h" 262d754a10SGerd Hoffmann #include "trace.h" 27f1ae32a1SGerd Hoffmann 28f1ae32a1SGerd Hoffmann //#define DEBUG_XHCI 29f1ae32a1SGerd Hoffmann //#define DEBUG_DATA 30f1ae32a1SGerd Hoffmann 31f1ae32a1SGerd Hoffmann #ifdef DEBUG_XHCI 32f1ae32a1SGerd Hoffmann #define DPRINTF(...) fprintf(stderr, __VA_ARGS__) 33f1ae32a1SGerd Hoffmann #else 34f1ae32a1SGerd Hoffmann #define DPRINTF(...) do {} while (0) 35f1ae32a1SGerd Hoffmann #endif 36f1ae32a1SGerd Hoffmann #define FIXME() do { fprintf(stderr, "FIXME %s:%d\n", \ 37f1ae32a1SGerd Hoffmann __func__, __LINE__); abort(); } while (0) 38f1ae32a1SGerd Hoffmann 39*0846e635SGerd Hoffmann #define MAXPORTS_2 8 40*0846e635SGerd Hoffmann #define MAXPORTS_3 8 41f1ae32a1SGerd Hoffmann 42*0846e635SGerd Hoffmann #define MAXPORTS (MAXPORTS_2+MAXPORTS_3) 43106b214cSGerd Hoffmann #define MAXSLOTS MAXPORTS 44106b214cSGerd Hoffmann #define MAXINTRS 1 /* MAXPORTS */ 45f1ae32a1SGerd Hoffmann 46f1ae32a1SGerd Hoffmann #define TD_QUEUE 24 47f1ae32a1SGerd Hoffmann 48f1ae32a1SGerd Hoffmann /* Very pessimistic, let's hope it's enough for all cases */ 49f1ae32a1SGerd Hoffmann #define EV_QUEUE (((3*TD_QUEUE)+16)*MAXSLOTS) 50f1ae32a1SGerd Hoffmann /* Do not deliver ER Full events. NEC's driver does some things not bound 51f1ae32a1SGerd Hoffmann * to the specs when it gets them */ 52f1ae32a1SGerd Hoffmann #define ER_FULL_HACK 53f1ae32a1SGerd Hoffmann 54f1ae32a1SGerd Hoffmann #define LEN_CAP 0x40 55f1ae32a1SGerd Hoffmann #define LEN_OPER (0x400 + 0x10 * MAXPORTS) 56106b214cSGerd Hoffmann #define LEN_RUNTIME ((MAXINTRS + 1) * 0x20) 57f1ae32a1SGerd Hoffmann #define LEN_DOORBELL ((MAXSLOTS + 1) * 0x20) 58f1ae32a1SGerd Hoffmann 59106b214cSGerd Hoffmann #define OFF_OPER LEN_CAP 60106b214cSGerd Hoffmann #define OFF_RUNTIME 0x1000 61106b214cSGerd Hoffmann #define OFF_DOORBELL 0x2000 62f1ae32a1SGerd Hoffmann /* must be power of 2 */ 63106b214cSGerd Hoffmann #define LEN_REGS 0x4000 64f1ae32a1SGerd Hoffmann 65106b214cSGerd Hoffmann #if (OFF_OPER + LEN_OPER) > OFF_RUNTIME 66106b214cSGerd Hoffmann #error Increase OFF_RUNTIME 67106b214cSGerd Hoffmann #endif 68106b214cSGerd Hoffmann #if (OFF_RUNTIME + LEN_RUNTIME) > OFF_DOORBELL 69106b214cSGerd Hoffmann #error Increase OFF_DOORBELL 70106b214cSGerd Hoffmann #endif 71f1ae32a1SGerd Hoffmann #if (OFF_DOORBELL + LEN_DOORBELL) > LEN_REGS 72f1ae32a1SGerd Hoffmann # error Increase LEN_REGS 73f1ae32a1SGerd Hoffmann #endif 74f1ae32a1SGerd Hoffmann 75f1ae32a1SGerd Hoffmann #if MAXINTRS > 1 76f1ae32a1SGerd Hoffmann # error TODO: only one interrupter supported 77f1ae32a1SGerd Hoffmann #endif 78f1ae32a1SGerd Hoffmann 79f1ae32a1SGerd Hoffmann /* bit definitions */ 80f1ae32a1SGerd Hoffmann #define USBCMD_RS (1<<0) 81f1ae32a1SGerd Hoffmann #define USBCMD_HCRST (1<<1) 82f1ae32a1SGerd Hoffmann #define USBCMD_INTE (1<<2) 83f1ae32a1SGerd Hoffmann #define USBCMD_HSEE (1<<3) 84f1ae32a1SGerd Hoffmann #define USBCMD_LHCRST (1<<7) 85f1ae32a1SGerd Hoffmann #define USBCMD_CSS (1<<8) 86f1ae32a1SGerd Hoffmann #define USBCMD_CRS (1<<9) 87f1ae32a1SGerd Hoffmann #define USBCMD_EWE (1<<10) 88f1ae32a1SGerd Hoffmann #define USBCMD_EU3S (1<<11) 89f1ae32a1SGerd Hoffmann 90f1ae32a1SGerd Hoffmann #define USBSTS_HCH (1<<0) 91f1ae32a1SGerd Hoffmann #define USBSTS_HSE (1<<2) 92f1ae32a1SGerd Hoffmann #define USBSTS_EINT (1<<3) 93f1ae32a1SGerd Hoffmann #define USBSTS_PCD (1<<4) 94f1ae32a1SGerd Hoffmann #define USBSTS_SSS (1<<8) 95f1ae32a1SGerd Hoffmann #define USBSTS_RSS (1<<9) 96f1ae32a1SGerd Hoffmann #define USBSTS_SRE (1<<10) 97f1ae32a1SGerd Hoffmann #define USBSTS_CNR (1<<11) 98f1ae32a1SGerd Hoffmann #define USBSTS_HCE (1<<12) 99f1ae32a1SGerd Hoffmann 100f1ae32a1SGerd Hoffmann 101f1ae32a1SGerd Hoffmann #define PORTSC_CCS (1<<0) 102f1ae32a1SGerd Hoffmann #define PORTSC_PED (1<<1) 103f1ae32a1SGerd Hoffmann #define PORTSC_OCA (1<<3) 104f1ae32a1SGerd Hoffmann #define PORTSC_PR (1<<4) 105f1ae32a1SGerd Hoffmann #define PORTSC_PLS_SHIFT 5 106f1ae32a1SGerd Hoffmann #define PORTSC_PLS_MASK 0xf 107f1ae32a1SGerd Hoffmann #define PORTSC_PP (1<<9) 108f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_SHIFT 10 109f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_MASK 0xf 110f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_FULL (1<<10) 111f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_LOW (2<<10) 112f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_HIGH (3<<10) 113f1ae32a1SGerd Hoffmann #define PORTSC_SPEED_SUPER (4<<10) 114f1ae32a1SGerd Hoffmann #define PORTSC_PIC_SHIFT 14 115f1ae32a1SGerd Hoffmann #define PORTSC_PIC_MASK 0x3 116f1ae32a1SGerd Hoffmann #define PORTSC_LWS (1<<16) 117f1ae32a1SGerd Hoffmann #define PORTSC_CSC (1<<17) 118f1ae32a1SGerd Hoffmann #define PORTSC_PEC (1<<18) 119f1ae32a1SGerd Hoffmann #define PORTSC_WRC (1<<19) 120f1ae32a1SGerd Hoffmann #define PORTSC_OCC (1<<20) 121f1ae32a1SGerd Hoffmann #define PORTSC_PRC (1<<21) 122f1ae32a1SGerd Hoffmann #define PORTSC_PLC (1<<22) 123f1ae32a1SGerd Hoffmann #define PORTSC_CEC (1<<23) 124f1ae32a1SGerd Hoffmann #define PORTSC_CAS (1<<24) 125f1ae32a1SGerd Hoffmann #define PORTSC_WCE (1<<25) 126f1ae32a1SGerd Hoffmann #define PORTSC_WDE (1<<26) 127f1ae32a1SGerd Hoffmann #define PORTSC_WOE (1<<27) 128f1ae32a1SGerd Hoffmann #define PORTSC_DR (1<<30) 129f1ae32a1SGerd Hoffmann #define PORTSC_WPR (1<<31) 130f1ae32a1SGerd Hoffmann 131f1ae32a1SGerd Hoffmann #define CRCR_RCS (1<<0) 132f1ae32a1SGerd Hoffmann #define CRCR_CS (1<<1) 133f1ae32a1SGerd Hoffmann #define CRCR_CA (1<<2) 134f1ae32a1SGerd Hoffmann #define CRCR_CRR (1<<3) 135f1ae32a1SGerd Hoffmann 136f1ae32a1SGerd Hoffmann #define IMAN_IP (1<<0) 137f1ae32a1SGerd Hoffmann #define IMAN_IE (1<<1) 138f1ae32a1SGerd Hoffmann 139f1ae32a1SGerd Hoffmann #define ERDP_EHB (1<<3) 140f1ae32a1SGerd Hoffmann 141f1ae32a1SGerd Hoffmann #define TRB_SIZE 16 142f1ae32a1SGerd Hoffmann typedef struct XHCITRB { 143f1ae32a1SGerd Hoffmann uint64_t parameter; 144f1ae32a1SGerd Hoffmann uint32_t status; 145f1ae32a1SGerd Hoffmann uint32_t control; 14659a70ccdSDavid Gibson dma_addr_t addr; 147f1ae32a1SGerd Hoffmann bool ccs; 148f1ae32a1SGerd Hoffmann } XHCITRB; 149f1ae32a1SGerd Hoffmann 150f1ae32a1SGerd Hoffmann 151f1ae32a1SGerd Hoffmann typedef enum TRBType { 152f1ae32a1SGerd Hoffmann TRB_RESERVED = 0, 153f1ae32a1SGerd Hoffmann TR_NORMAL, 154f1ae32a1SGerd Hoffmann TR_SETUP, 155f1ae32a1SGerd Hoffmann TR_DATA, 156f1ae32a1SGerd Hoffmann TR_STATUS, 157f1ae32a1SGerd Hoffmann TR_ISOCH, 158f1ae32a1SGerd Hoffmann TR_LINK, 159f1ae32a1SGerd Hoffmann TR_EVDATA, 160f1ae32a1SGerd Hoffmann TR_NOOP, 161f1ae32a1SGerd Hoffmann CR_ENABLE_SLOT, 162f1ae32a1SGerd Hoffmann CR_DISABLE_SLOT, 163f1ae32a1SGerd Hoffmann CR_ADDRESS_DEVICE, 164f1ae32a1SGerd Hoffmann CR_CONFIGURE_ENDPOINT, 165f1ae32a1SGerd Hoffmann CR_EVALUATE_CONTEXT, 166f1ae32a1SGerd Hoffmann CR_RESET_ENDPOINT, 167f1ae32a1SGerd Hoffmann CR_STOP_ENDPOINT, 168f1ae32a1SGerd Hoffmann CR_SET_TR_DEQUEUE, 169f1ae32a1SGerd Hoffmann CR_RESET_DEVICE, 170f1ae32a1SGerd Hoffmann CR_FORCE_EVENT, 171f1ae32a1SGerd Hoffmann CR_NEGOTIATE_BW, 172f1ae32a1SGerd Hoffmann CR_SET_LATENCY_TOLERANCE, 173f1ae32a1SGerd Hoffmann CR_GET_PORT_BANDWIDTH, 174f1ae32a1SGerd Hoffmann CR_FORCE_HEADER, 175f1ae32a1SGerd Hoffmann CR_NOOP, 176f1ae32a1SGerd Hoffmann ER_TRANSFER = 32, 177f1ae32a1SGerd Hoffmann ER_COMMAND_COMPLETE, 178f1ae32a1SGerd Hoffmann ER_PORT_STATUS_CHANGE, 179f1ae32a1SGerd Hoffmann ER_BANDWIDTH_REQUEST, 180f1ae32a1SGerd Hoffmann ER_DOORBELL, 181f1ae32a1SGerd Hoffmann ER_HOST_CONTROLLER, 182f1ae32a1SGerd Hoffmann ER_DEVICE_NOTIFICATION, 183f1ae32a1SGerd Hoffmann ER_MFINDEX_WRAP, 184f1ae32a1SGerd Hoffmann /* vendor specific bits */ 185f1ae32a1SGerd Hoffmann CR_VENDOR_VIA_CHALLENGE_RESPONSE = 48, 186f1ae32a1SGerd Hoffmann CR_VENDOR_NEC_FIRMWARE_REVISION = 49, 187f1ae32a1SGerd Hoffmann CR_VENDOR_NEC_CHALLENGE_RESPONSE = 50, 188f1ae32a1SGerd Hoffmann } TRBType; 189f1ae32a1SGerd Hoffmann 190f1ae32a1SGerd Hoffmann #define CR_LINK TR_LINK 191f1ae32a1SGerd Hoffmann 192f1ae32a1SGerd Hoffmann typedef enum TRBCCode { 193f1ae32a1SGerd Hoffmann CC_INVALID = 0, 194f1ae32a1SGerd Hoffmann CC_SUCCESS, 195f1ae32a1SGerd Hoffmann CC_DATA_BUFFER_ERROR, 196f1ae32a1SGerd Hoffmann CC_BABBLE_DETECTED, 197f1ae32a1SGerd Hoffmann CC_USB_TRANSACTION_ERROR, 198f1ae32a1SGerd Hoffmann CC_TRB_ERROR, 199f1ae32a1SGerd Hoffmann CC_STALL_ERROR, 200f1ae32a1SGerd Hoffmann CC_RESOURCE_ERROR, 201f1ae32a1SGerd Hoffmann CC_BANDWIDTH_ERROR, 202f1ae32a1SGerd Hoffmann CC_NO_SLOTS_ERROR, 203f1ae32a1SGerd Hoffmann CC_INVALID_STREAM_TYPE_ERROR, 204f1ae32a1SGerd Hoffmann CC_SLOT_NOT_ENABLED_ERROR, 205f1ae32a1SGerd Hoffmann CC_EP_NOT_ENABLED_ERROR, 206f1ae32a1SGerd Hoffmann CC_SHORT_PACKET, 207f1ae32a1SGerd Hoffmann CC_RING_UNDERRUN, 208f1ae32a1SGerd Hoffmann CC_RING_OVERRUN, 209f1ae32a1SGerd Hoffmann CC_VF_ER_FULL, 210f1ae32a1SGerd Hoffmann CC_PARAMETER_ERROR, 211f1ae32a1SGerd Hoffmann CC_BANDWIDTH_OVERRUN, 212f1ae32a1SGerd Hoffmann CC_CONTEXT_STATE_ERROR, 213f1ae32a1SGerd Hoffmann CC_NO_PING_RESPONSE_ERROR, 214f1ae32a1SGerd Hoffmann CC_EVENT_RING_FULL_ERROR, 215f1ae32a1SGerd Hoffmann CC_INCOMPATIBLE_DEVICE_ERROR, 216f1ae32a1SGerd Hoffmann CC_MISSED_SERVICE_ERROR, 217f1ae32a1SGerd Hoffmann CC_COMMAND_RING_STOPPED, 218f1ae32a1SGerd Hoffmann CC_COMMAND_ABORTED, 219f1ae32a1SGerd Hoffmann CC_STOPPED, 220f1ae32a1SGerd Hoffmann CC_STOPPED_LENGTH_INVALID, 221f1ae32a1SGerd Hoffmann CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29, 222f1ae32a1SGerd Hoffmann CC_ISOCH_BUFFER_OVERRUN = 31, 223f1ae32a1SGerd Hoffmann CC_EVENT_LOST_ERROR, 224f1ae32a1SGerd Hoffmann CC_UNDEFINED_ERROR, 225f1ae32a1SGerd Hoffmann CC_INVALID_STREAM_ID_ERROR, 226f1ae32a1SGerd Hoffmann CC_SECONDARY_BANDWIDTH_ERROR, 227f1ae32a1SGerd Hoffmann CC_SPLIT_TRANSACTION_ERROR 228f1ae32a1SGerd Hoffmann } TRBCCode; 229f1ae32a1SGerd Hoffmann 230f1ae32a1SGerd Hoffmann #define TRB_C (1<<0) 231f1ae32a1SGerd Hoffmann #define TRB_TYPE_SHIFT 10 232f1ae32a1SGerd Hoffmann #define TRB_TYPE_MASK 0x3f 233f1ae32a1SGerd Hoffmann #define TRB_TYPE(t) (((t).control >> TRB_TYPE_SHIFT) & TRB_TYPE_MASK) 234f1ae32a1SGerd Hoffmann 235f1ae32a1SGerd Hoffmann #define TRB_EV_ED (1<<2) 236f1ae32a1SGerd Hoffmann 237f1ae32a1SGerd Hoffmann #define TRB_TR_ENT (1<<1) 238f1ae32a1SGerd Hoffmann #define TRB_TR_ISP (1<<2) 239f1ae32a1SGerd Hoffmann #define TRB_TR_NS (1<<3) 240f1ae32a1SGerd Hoffmann #define TRB_TR_CH (1<<4) 241f1ae32a1SGerd Hoffmann #define TRB_TR_IOC (1<<5) 242f1ae32a1SGerd Hoffmann #define TRB_TR_IDT (1<<6) 243f1ae32a1SGerd Hoffmann #define TRB_TR_TBC_SHIFT 7 244f1ae32a1SGerd Hoffmann #define TRB_TR_TBC_MASK 0x3 245f1ae32a1SGerd Hoffmann #define TRB_TR_BEI (1<<9) 246f1ae32a1SGerd Hoffmann #define TRB_TR_TLBPC_SHIFT 16 247f1ae32a1SGerd Hoffmann #define TRB_TR_TLBPC_MASK 0xf 248f1ae32a1SGerd Hoffmann #define TRB_TR_FRAMEID_SHIFT 20 249f1ae32a1SGerd Hoffmann #define TRB_TR_FRAMEID_MASK 0x7ff 250f1ae32a1SGerd Hoffmann #define TRB_TR_SIA (1<<31) 251f1ae32a1SGerd Hoffmann 252f1ae32a1SGerd Hoffmann #define TRB_TR_DIR (1<<16) 253f1ae32a1SGerd Hoffmann 254f1ae32a1SGerd Hoffmann #define TRB_CR_SLOTID_SHIFT 24 255f1ae32a1SGerd Hoffmann #define TRB_CR_SLOTID_MASK 0xff 256f1ae32a1SGerd Hoffmann #define TRB_CR_EPID_SHIFT 16 257f1ae32a1SGerd Hoffmann #define TRB_CR_EPID_MASK 0x1f 258f1ae32a1SGerd Hoffmann 259f1ae32a1SGerd Hoffmann #define TRB_CR_BSR (1<<9) 260f1ae32a1SGerd Hoffmann #define TRB_CR_DC (1<<9) 261f1ae32a1SGerd Hoffmann 262f1ae32a1SGerd Hoffmann #define TRB_LK_TC (1<<1) 263f1ae32a1SGerd Hoffmann 264f1ae32a1SGerd Hoffmann #define EP_TYPE_MASK 0x7 265f1ae32a1SGerd Hoffmann #define EP_TYPE_SHIFT 3 266f1ae32a1SGerd Hoffmann 267f1ae32a1SGerd Hoffmann #define EP_STATE_MASK 0x7 268f1ae32a1SGerd Hoffmann #define EP_DISABLED (0<<0) 269f1ae32a1SGerd Hoffmann #define EP_RUNNING (1<<0) 270f1ae32a1SGerd Hoffmann #define EP_HALTED (2<<0) 271f1ae32a1SGerd Hoffmann #define EP_STOPPED (3<<0) 272f1ae32a1SGerd Hoffmann #define EP_ERROR (4<<0) 273f1ae32a1SGerd Hoffmann 274f1ae32a1SGerd Hoffmann #define SLOT_STATE_MASK 0x1f 275f1ae32a1SGerd Hoffmann #define SLOT_STATE_SHIFT 27 276f1ae32a1SGerd Hoffmann #define SLOT_STATE(s) (((s)>>SLOT_STATE_SHIFT)&SLOT_STATE_MASK) 277f1ae32a1SGerd Hoffmann #define SLOT_ENABLED 0 278f1ae32a1SGerd Hoffmann #define SLOT_DEFAULT 1 279f1ae32a1SGerd Hoffmann #define SLOT_ADDRESSED 2 280f1ae32a1SGerd Hoffmann #define SLOT_CONFIGURED 3 281f1ae32a1SGerd Hoffmann 282f1ae32a1SGerd Hoffmann #define SLOT_CONTEXT_ENTRIES_MASK 0x1f 283f1ae32a1SGerd Hoffmann #define SLOT_CONTEXT_ENTRIES_SHIFT 27 284f1ae32a1SGerd Hoffmann 285f1ae32a1SGerd Hoffmann typedef enum EPType { 286f1ae32a1SGerd Hoffmann ET_INVALID = 0, 287f1ae32a1SGerd Hoffmann ET_ISO_OUT, 288f1ae32a1SGerd Hoffmann ET_BULK_OUT, 289f1ae32a1SGerd Hoffmann ET_INTR_OUT, 290f1ae32a1SGerd Hoffmann ET_CONTROL, 291f1ae32a1SGerd Hoffmann ET_ISO_IN, 292f1ae32a1SGerd Hoffmann ET_BULK_IN, 293f1ae32a1SGerd Hoffmann ET_INTR_IN, 294f1ae32a1SGerd Hoffmann } EPType; 295f1ae32a1SGerd Hoffmann 296f1ae32a1SGerd Hoffmann typedef struct XHCIRing { 29759a70ccdSDavid Gibson dma_addr_t base; 29859a70ccdSDavid Gibson dma_addr_t dequeue; 299f1ae32a1SGerd Hoffmann bool ccs; 300f1ae32a1SGerd Hoffmann } XHCIRing; 301f1ae32a1SGerd Hoffmann 302f1ae32a1SGerd Hoffmann typedef struct XHCIPort { 303f1ae32a1SGerd Hoffmann uint32_t portsc; 304*0846e635SGerd Hoffmann uint32_t portnr; 305*0846e635SGerd Hoffmann USBPort *uport; 306*0846e635SGerd Hoffmann uint32_t speedmask; 307f1ae32a1SGerd Hoffmann } XHCIPort; 308f1ae32a1SGerd Hoffmann 309f1ae32a1SGerd Hoffmann struct XHCIState; 310f1ae32a1SGerd Hoffmann typedef struct XHCIState XHCIState; 311f1ae32a1SGerd Hoffmann 312f1ae32a1SGerd Hoffmann typedef struct XHCITransfer { 313f1ae32a1SGerd Hoffmann XHCIState *xhci; 314f1ae32a1SGerd Hoffmann USBPacket packet; 315d5a15814SGerd Hoffmann QEMUSGList sgl; 316f1ae32a1SGerd Hoffmann bool running_async; 317f1ae32a1SGerd Hoffmann bool running_retry; 318f1ae32a1SGerd Hoffmann bool cancelled; 319f1ae32a1SGerd Hoffmann bool complete; 320f1ae32a1SGerd Hoffmann unsigned int iso_pkts; 321f1ae32a1SGerd Hoffmann unsigned int slotid; 322f1ae32a1SGerd Hoffmann unsigned int epid; 323f1ae32a1SGerd Hoffmann bool in_xfer; 324f1ae32a1SGerd Hoffmann bool iso_xfer; 325f1ae32a1SGerd Hoffmann 326f1ae32a1SGerd Hoffmann unsigned int trb_count; 327f1ae32a1SGerd Hoffmann unsigned int trb_alloced; 328f1ae32a1SGerd Hoffmann XHCITRB *trbs; 329f1ae32a1SGerd Hoffmann 330f1ae32a1SGerd Hoffmann TRBCCode status; 331f1ae32a1SGerd Hoffmann 332f1ae32a1SGerd Hoffmann unsigned int pkts; 333f1ae32a1SGerd Hoffmann unsigned int pktsize; 334f1ae32a1SGerd Hoffmann unsigned int cur_pkt; 3353d139684SGerd Hoffmann 3363d139684SGerd Hoffmann uint64_t mfindex_kick; 337f1ae32a1SGerd Hoffmann } XHCITransfer; 338f1ae32a1SGerd Hoffmann 339f1ae32a1SGerd Hoffmann typedef struct XHCIEPContext { 3403d139684SGerd Hoffmann XHCIState *xhci; 3413d139684SGerd Hoffmann unsigned int slotid; 3423d139684SGerd Hoffmann unsigned int epid; 3433d139684SGerd Hoffmann 344f1ae32a1SGerd Hoffmann XHCIRing ring; 345f1ae32a1SGerd Hoffmann unsigned int next_xfer; 346f1ae32a1SGerd Hoffmann unsigned int comp_xfer; 347f1ae32a1SGerd Hoffmann XHCITransfer transfers[TD_QUEUE]; 348f1ae32a1SGerd Hoffmann XHCITransfer *retry; 349f1ae32a1SGerd Hoffmann EPType type; 35059a70ccdSDavid Gibson dma_addr_t pctx; 351f1ae32a1SGerd Hoffmann unsigned int max_psize; 352f1ae32a1SGerd Hoffmann uint32_t state; 3533d139684SGerd Hoffmann 3543d139684SGerd Hoffmann /* iso xfer scheduling */ 3553d139684SGerd Hoffmann unsigned int interval; 3563d139684SGerd Hoffmann int64_t mfindex_last; 3573d139684SGerd Hoffmann QEMUTimer *kick_timer; 358f1ae32a1SGerd Hoffmann } XHCIEPContext; 359f1ae32a1SGerd Hoffmann 360f1ae32a1SGerd Hoffmann typedef struct XHCISlot { 361f1ae32a1SGerd Hoffmann bool enabled; 36259a70ccdSDavid Gibson dma_addr_t ctx; 363f1ae32a1SGerd Hoffmann unsigned int port; 364f1ae32a1SGerd Hoffmann unsigned int devaddr; 365f1ae32a1SGerd Hoffmann XHCIEPContext * eps[31]; 366f1ae32a1SGerd Hoffmann } XHCISlot; 367f1ae32a1SGerd Hoffmann 368f1ae32a1SGerd Hoffmann typedef struct XHCIEvent { 369f1ae32a1SGerd Hoffmann TRBType type; 370f1ae32a1SGerd Hoffmann TRBCCode ccode; 371f1ae32a1SGerd Hoffmann uint64_t ptr; 372f1ae32a1SGerd Hoffmann uint32_t length; 373f1ae32a1SGerd Hoffmann uint32_t flags; 374f1ae32a1SGerd Hoffmann uint8_t slotid; 375f1ae32a1SGerd Hoffmann uint8_t epid; 376f1ae32a1SGerd Hoffmann } XHCIEvent; 377f1ae32a1SGerd Hoffmann 378f1ae32a1SGerd Hoffmann struct XHCIState { 379f1ae32a1SGerd Hoffmann PCIDevice pci_dev; 380f1ae32a1SGerd Hoffmann USBBus bus; 381f1ae32a1SGerd Hoffmann qemu_irq irq; 382f1ae32a1SGerd Hoffmann MemoryRegion mem; 383f1ae32a1SGerd Hoffmann const char *name; 384f1ae32a1SGerd Hoffmann unsigned int devaddr; 385f1ae32a1SGerd Hoffmann 386*0846e635SGerd Hoffmann /* properties */ 387*0846e635SGerd Hoffmann uint32_t numports_2; 388*0846e635SGerd Hoffmann uint32_t numports_3; 389*0846e635SGerd Hoffmann uint32_t msi; 390*0846e635SGerd Hoffmann 391f1ae32a1SGerd Hoffmann /* Operational Registers */ 392f1ae32a1SGerd Hoffmann uint32_t usbcmd; 393f1ae32a1SGerd Hoffmann uint32_t usbsts; 394f1ae32a1SGerd Hoffmann uint32_t dnctrl; 395f1ae32a1SGerd Hoffmann uint32_t crcr_low; 396f1ae32a1SGerd Hoffmann uint32_t crcr_high; 397f1ae32a1SGerd Hoffmann uint32_t dcbaap_low; 398f1ae32a1SGerd Hoffmann uint32_t dcbaap_high; 399f1ae32a1SGerd Hoffmann uint32_t config; 400f1ae32a1SGerd Hoffmann 401*0846e635SGerd Hoffmann USBPort uports[MAX(MAXPORTS_2, MAXPORTS_3)]; 402f1ae32a1SGerd Hoffmann XHCIPort ports[MAXPORTS]; 403f1ae32a1SGerd Hoffmann XHCISlot slots[MAXSLOTS]; 404*0846e635SGerd Hoffmann uint32_t numports; 405f1ae32a1SGerd Hoffmann 406f1ae32a1SGerd Hoffmann /* Runtime Registers */ 407f1ae32a1SGerd Hoffmann uint32_t iman; 408f1ae32a1SGerd Hoffmann uint32_t imod; 409f1ae32a1SGerd Hoffmann uint32_t erstsz; 410f1ae32a1SGerd Hoffmann uint32_t erstba_low; 411f1ae32a1SGerd Hoffmann uint32_t erstba_high; 412f1ae32a1SGerd Hoffmann uint32_t erdp_low; 413f1ae32a1SGerd Hoffmann uint32_t erdp_high; 414f1ae32a1SGerd Hoffmann 41501546fa6SGerd Hoffmann int64_t mfindex_start; 41601546fa6SGerd Hoffmann QEMUTimer *mfwrap_timer; 41701546fa6SGerd Hoffmann 41859a70ccdSDavid Gibson dma_addr_t er_start; 419f1ae32a1SGerd Hoffmann uint32_t er_size; 420f1ae32a1SGerd Hoffmann bool er_pcs; 421f1ae32a1SGerd Hoffmann unsigned int er_ep_idx; 422f1ae32a1SGerd Hoffmann bool er_full; 423f1ae32a1SGerd Hoffmann 424f1ae32a1SGerd Hoffmann XHCIEvent ev_buffer[EV_QUEUE]; 425f1ae32a1SGerd Hoffmann unsigned int ev_buffer_put; 426f1ae32a1SGerd Hoffmann unsigned int ev_buffer_get; 427f1ae32a1SGerd Hoffmann 428f1ae32a1SGerd Hoffmann XHCIRing cmd_ring; 429f1ae32a1SGerd Hoffmann }; 430f1ae32a1SGerd Hoffmann 431f1ae32a1SGerd Hoffmann typedef struct XHCIEvRingSeg { 432f1ae32a1SGerd Hoffmann uint32_t addr_low; 433f1ae32a1SGerd Hoffmann uint32_t addr_high; 434f1ae32a1SGerd Hoffmann uint32_t size; 435f1ae32a1SGerd Hoffmann uint32_t rsvd; 436f1ae32a1SGerd Hoffmann } XHCIEvRingSeg; 437f1ae32a1SGerd Hoffmann 43801546fa6SGerd Hoffmann static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, 43901546fa6SGerd Hoffmann unsigned int epid); 44001546fa6SGerd Hoffmann static void xhci_event(XHCIState *xhci, XHCIEvent *event); 44101546fa6SGerd Hoffmann static void xhci_write_event(XHCIState *xhci, XHCIEvent *event); 44201546fa6SGerd Hoffmann 443f1ae32a1SGerd Hoffmann static const char *TRBType_names[] = { 444f1ae32a1SGerd Hoffmann [TRB_RESERVED] = "TRB_RESERVED", 445f1ae32a1SGerd Hoffmann [TR_NORMAL] = "TR_NORMAL", 446f1ae32a1SGerd Hoffmann [TR_SETUP] = "TR_SETUP", 447f1ae32a1SGerd Hoffmann [TR_DATA] = "TR_DATA", 448f1ae32a1SGerd Hoffmann [TR_STATUS] = "TR_STATUS", 449f1ae32a1SGerd Hoffmann [TR_ISOCH] = "TR_ISOCH", 450f1ae32a1SGerd Hoffmann [TR_LINK] = "TR_LINK", 451f1ae32a1SGerd Hoffmann [TR_EVDATA] = "TR_EVDATA", 452f1ae32a1SGerd Hoffmann [TR_NOOP] = "TR_NOOP", 453f1ae32a1SGerd Hoffmann [CR_ENABLE_SLOT] = "CR_ENABLE_SLOT", 454f1ae32a1SGerd Hoffmann [CR_DISABLE_SLOT] = "CR_DISABLE_SLOT", 455f1ae32a1SGerd Hoffmann [CR_ADDRESS_DEVICE] = "CR_ADDRESS_DEVICE", 456f1ae32a1SGerd Hoffmann [CR_CONFIGURE_ENDPOINT] = "CR_CONFIGURE_ENDPOINT", 457f1ae32a1SGerd Hoffmann [CR_EVALUATE_CONTEXT] = "CR_EVALUATE_CONTEXT", 458f1ae32a1SGerd Hoffmann [CR_RESET_ENDPOINT] = "CR_RESET_ENDPOINT", 459f1ae32a1SGerd Hoffmann [CR_STOP_ENDPOINT] = "CR_STOP_ENDPOINT", 460f1ae32a1SGerd Hoffmann [CR_SET_TR_DEQUEUE] = "CR_SET_TR_DEQUEUE", 461f1ae32a1SGerd Hoffmann [CR_RESET_DEVICE] = "CR_RESET_DEVICE", 462f1ae32a1SGerd Hoffmann [CR_FORCE_EVENT] = "CR_FORCE_EVENT", 463f1ae32a1SGerd Hoffmann [CR_NEGOTIATE_BW] = "CR_NEGOTIATE_BW", 464f1ae32a1SGerd Hoffmann [CR_SET_LATENCY_TOLERANCE] = "CR_SET_LATENCY_TOLERANCE", 465f1ae32a1SGerd Hoffmann [CR_GET_PORT_BANDWIDTH] = "CR_GET_PORT_BANDWIDTH", 466f1ae32a1SGerd Hoffmann [CR_FORCE_HEADER] = "CR_FORCE_HEADER", 467f1ae32a1SGerd Hoffmann [CR_NOOP] = "CR_NOOP", 468f1ae32a1SGerd Hoffmann [ER_TRANSFER] = "ER_TRANSFER", 469f1ae32a1SGerd Hoffmann [ER_COMMAND_COMPLETE] = "ER_COMMAND_COMPLETE", 470f1ae32a1SGerd Hoffmann [ER_PORT_STATUS_CHANGE] = "ER_PORT_STATUS_CHANGE", 471f1ae32a1SGerd Hoffmann [ER_BANDWIDTH_REQUEST] = "ER_BANDWIDTH_REQUEST", 472f1ae32a1SGerd Hoffmann [ER_DOORBELL] = "ER_DOORBELL", 473f1ae32a1SGerd Hoffmann [ER_HOST_CONTROLLER] = "ER_HOST_CONTROLLER", 474f1ae32a1SGerd Hoffmann [ER_DEVICE_NOTIFICATION] = "ER_DEVICE_NOTIFICATION", 475f1ae32a1SGerd Hoffmann [ER_MFINDEX_WRAP] = "ER_MFINDEX_WRAP", 476f1ae32a1SGerd Hoffmann [CR_VENDOR_VIA_CHALLENGE_RESPONSE] = "CR_VENDOR_VIA_CHALLENGE_RESPONSE", 477f1ae32a1SGerd Hoffmann [CR_VENDOR_NEC_FIRMWARE_REVISION] = "CR_VENDOR_NEC_FIRMWARE_REVISION", 478f1ae32a1SGerd Hoffmann [CR_VENDOR_NEC_CHALLENGE_RESPONSE] = "CR_VENDOR_NEC_CHALLENGE_RESPONSE", 479f1ae32a1SGerd Hoffmann }; 480f1ae32a1SGerd Hoffmann 481873123feSGerd Hoffmann static const char *TRBCCode_names[] = { 482873123feSGerd Hoffmann [CC_INVALID] = "CC_INVALID", 483873123feSGerd Hoffmann [CC_SUCCESS] = "CC_SUCCESS", 484873123feSGerd Hoffmann [CC_DATA_BUFFER_ERROR] = "CC_DATA_BUFFER_ERROR", 485873123feSGerd Hoffmann [CC_BABBLE_DETECTED] = "CC_BABBLE_DETECTED", 486873123feSGerd Hoffmann [CC_USB_TRANSACTION_ERROR] = "CC_USB_TRANSACTION_ERROR", 487873123feSGerd Hoffmann [CC_TRB_ERROR] = "CC_TRB_ERROR", 488873123feSGerd Hoffmann [CC_STALL_ERROR] = "CC_STALL_ERROR", 489873123feSGerd Hoffmann [CC_RESOURCE_ERROR] = "CC_RESOURCE_ERROR", 490873123feSGerd Hoffmann [CC_BANDWIDTH_ERROR] = "CC_BANDWIDTH_ERROR", 491873123feSGerd Hoffmann [CC_NO_SLOTS_ERROR] = "CC_NO_SLOTS_ERROR", 492873123feSGerd Hoffmann [CC_INVALID_STREAM_TYPE_ERROR] = "CC_INVALID_STREAM_TYPE_ERROR", 493873123feSGerd Hoffmann [CC_SLOT_NOT_ENABLED_ERROR] = "CC_SLOT_NOT_ENABLED_ERROR", 494873123feSGerd Hoffmann [CC_EP_NOT_ENABLED_ERROR] = "CC_EP_NOT_ENABLED_ERROR", 495873123feSGerd Hoffmann [CC_SHORT_PACKET] = "CC_SHORT_PACKET", 496873123feSGerd Hoffmann [CC_RING_UNDERRUN] = "CC_RING_UNDERRUN", 497873123feSGerd Hoffmann [CC_RING_OVERRUN] = "CC_RING_OVERRUN", 498873123feSGerd Hoffmann [CC_VF_ER_FULL] = "CC_VF_ER_FULL", 499873123feSGerd Hoffmann [CC_PARAMETER_ERROR] = "CC_PARAMETER_ERROR", 500873123feSGerd Hoffmann [CC_BANDWIDTH_OVERRUN] = "CC_BANDWIDTH_OVERRUN", 501873123feSGerd Hoffmann [CC_CONTEXT_STATE_ERROR] = "CC_CONTEXT_STATE_ERROR", 502873123feSGerd Hoffmann [CC_NO_PING_RESPONSE_ERROR] = "CC_NO_PING_RESPONSE_ERROR", 503873123feSGerd Hoffmann [CC_EVENT_RING_FULL_ERROR] = "CC_EVENT_RING_FULL_ERROR", 504873123feSGerd Hoffmann [CC_INCOMPATIBLE_DEVICE_ERROR] = "CC_INCOMPATIBLE_DEVICE_ERROR", 505873123feSGerd Hoffmann [CC_MISSED_SERVICE_ERROR] = "CC_MISSED_SERVICE_ERROR", 506873123feSGerd Hoffmann [CC_COMMAND_RING_STOPPED] = "CC_COMMAND_RING_STOPPED", 507873123feSGerd Hoffmann [CC_COMMAND_ABORTED] = "CC_COMMAND_ABORTED", 508873123feSGerd Hoffmann [CC_STOPPED] = "CC_STOPPED", 509873123feSGerd Hoffmann [CC_STOPPED_LENGTH_INVALID] = "CC_STOPPED_LENGTH_INVALID", 510873123feSGerd Hoffmann [CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR] 511873123feSGerd Hoffmann = "CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR", 512873123feSGerd Hoffmann [CC_ISOCH_BUFFER_OVERRUN] = "CC_ISOCH_BUFFER_OVERRUN", 513873123feSGerd Hoffmann [CC_EVENT_LOST_ERROR] = "CC_EVENT_LOST_ERROR", 514873123feSGerd Hoffmann [CC_UNDEFINED_ERROR] = "CC_UNDEFINED_ERROR", 515873123feSGerd Hoffmann [CC_INVALID_STREAM_ID_ERROR] = "CC_INVALID_STREAM_ID_ERROR", 516873123feSGerd Hoffmann [CC_SECONDARY_BANDWIDTH_ERROR] = "CC_SECONDARY_BANDWIDTH_ERROR", 517873123feSGerd Hoffmann [CC_SPLIT_TRANSACTION_ERROR] = "CC_SPLIT_TRANSACTION_ERROR", 518873123feSGerd Hoffmann }; 519873123feSGerd Hoffmann 520f1ae32a1SGerd Hoffmann static const char *lookup_name(uint32_t index, const char **list, uint32_t llen) 521f1ae32a1SGerd Hoffmann { 522f1ae32a1SGerd Hoffmann if (index >= llen || list[index] == NULL) { 523f1ae32a1SGerd Hoffmann return "???"; 524f1ae32a1SGerd Hoffmann } 525f1ae32a1SGerd Hoffmann return list[index]; 526f1ae32a1SGerd Hoffmann } 527f1ae32a1SGerd Hoffmann 528f1ae32a1SGerd Hoffmann static const char *trb_name(XHCITRB *trb) 529f1ae32a1SGerd Hoffmann { 530f1ae32a1SGerd Hoffmann return lookup_name(TRB_TYPE(*trb), TRBType_names, 531f1ae32a1SGerd Hoffmann ARRAY_SIZE(TRBType_names)); 532f1ae32a1SGerd Hoffmann } 533f1ae32a1SGerd Hoffmann 534873123feSGerd Hoffmann static const char *event_name(XHCIEvent *event) 535873123feSGerd Hoffmann { 536873123feSGerd Hoffmann return lookup_name(event->ccode, TRBCCode_names, 537873123feSGerd Hoffmann ARRAY_SIZE(TRBCCode_names)); 538873123feSGerd Hoffmann } 539873123feSGerd Hoffmann 54001546fa6SGerd Hoffmann static uint64_t xhci_mfindex_get(XHCIState *xhci) 54101546fa6SGerd Hoffmann { 54201546fa6SGerd Hoffmann int64_t now = qemu_get_clock_ns(vm_clock); 54301546fa6SGerd Hoffmann return (now - xhci->mfindex_start) / 125000; 54401546fa6SGerd Hoffmann } 54501546fa6SGerd Hoffmann 54601546fa6SGerd Hoffmann static void xhci_mfwrap_update(XHCIState *xhci) 54701546fa6SGerd Hoffmann { 54801546fa6SGerd Hoffmann const uint32_t bits = USBCMD_RS | USBCMD_EWE; 54901546fa6SGerd Hoffmann uint32_t mfindex, left; 55001546fa6SGerd Hoffmann int64_t now; 55101546fa6SGerd Hoffmann 55201546fa6SGerd Hoffmann if ((xhci->usbcmd & bits) == bits) { 55301546fa6SGerd Hoffmann now = qemu_get_clock_ns(vm_clock); 55401546fa6SGerd Hoffmann mfindex = ((now - xhci->mfindex_start) / 125000) & 0x3fff; 55501546fa6SGerd Hoffmann left = 0x4000 - mfindex; 55601546fa6SGerd Hoffmann qemu_mod_timer(xhci->mfwrap_timer, now + left * 125000); 55701546fa6SGerd Hoffmann } else { 55801546fa6SGerd Hoffmann qemu_del_timer(xhci->mfwrap_timer); 55901546fa6SGerd Hoffmann } 56001546fa6SGerd Hoffmann } 56101546fa6SGerd Hoffmann 56201546fa6SGerd Hoffmann static void xhci_mfwrap_timer(void *opaque) 56301546fa6SGerd Hoffmann { 56401546fa6SGerd Hoffmann XHCIState *xhci = opaque; 56501546fa6SGerd Hoffmann XHCIEvent wrap = { ER_MFINDEX_WRAP, CC_SUCCESS }; 56601546fa6SGerd Hoffmann 56701546fa6SGerd Hoffmann xhci_event(xhci, &wrap); 56801546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 56901546fa6SGerd Hoffmann } 570f1ae32a1SGerd Hoffmann 57159a70ccdSDavid Gibson static inline dma_addr_t xhci_addr64(uint32_t low, uint32_t high) 572f1ae32a1SGerd Hoffmann { 57359a70ccdSDavid Gibson if (sizeof(dma_addr_t) == 4) { 574f1ae32a1SGerd Hoffmann return low; 57559a70ccdSDavid Gibson } else { 57659a70ccdSDavid Gibson return low | (((dma_addr_t)high << 16) << 16); 57759a70ccdSDavid Gibson } 578f1ae32a1SGerd Hoffmann } 579f1ae32a1SGerd Hoffmann 58059a70ccdSDavid Gibson static inline dma_addr_t xhci_mask64(uint64_t addr) 581f1ae32a1SGerd Hoffmann { 58259a70ccdSDavid Gibson if (sizeof(dma_addr_t) == 4) { 583f1ae32a1SGerd Hoffmann return addr & 0xffffffff; 58459a70ccdSDavid Gibson } else { 58559a70ccdSDavid Gibson return addr; 58659a70ccdSDavid Gibson } 587f1ae32a1SGerd Hoffmann } 588f1ae32a1SGerd Hoffmann 589*0846e635SGerd Hoffmann static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) 590*0846e635SGerd Hoffmann { 591*0846e635SGerd Hoffmann int index; 592*0846e635SGerd Hoffmann 593*0846e635SGerd Hoffmann if (!uport->dev) { 594*0846e635SGerd Hoffmann return NULL; 595*0846e635SGerd Hoffmann } 596*0846e635SGerd Hoffmann switch (uport->dev->speed) { 597*0846e635SGerd Hoffmann case USB_SPEED_LOW: 598*0846e635SGerd Hoffmann case USB_SPEED_FULL: 599*0846e635SGerd Hoffmann case USB_SPEED_HIGH: 600*0846e635SGerd Hoffmann index = uport->index; 601*0846e635SGerd Hoffmann break; 602*0846e635SGerd Hoffmann case USB_SPEED_SUPER: 603*0846e635SGerd Hoffmann index = uport->index + xhci->numports_2; 604*0846e635SGerd Hoffmann break; 605*0846e635SGerd Hoffmann default: 606*0846e635SGerd Hoffmann return NULL; 607*0846e635SGerd Hoffmann } 608*0846e635SGerd Hoffmann return &xhci->ports[index]; 609*0846e635SGerd Hoffmann } 610*0846e635SGerd Hoffmann 611f1ae32a1SGerd Hoffmann static void xhci_irq_update(XHCIState *xhci) 612f1ae32a1SGerd Hoffmann { 613f1ae32a1SGerd Hoffmann int level = 0; 614f1ae32a1SGerd Hoffmann 615f1ae32a1SGerd Hoffmann if (xhci->iman & IMAN_IP && xhci->iman & IMAN_IE && 616215bff17SLai Jiangshan xhci->usbcmd & USBCMD_INTE) { 617f1ae32a1SGerd Hoffmann level = 1; 618f1ae32a1SGerd Hoffmann } 619f1ae32a1SGerd Hoffmann 620f1ae32a1SGerd Hoffmann if (xhci->msi && msi_enabled(&xhci->pci_dev)) { 621f1ae32a1SGerd Hoffmann if (level) { 6227acd279fSGerd Hoffmann trace_usb_xhci_irq_msi(0); 623f1ae32a1SGerd Hoffmann msi_notify(&xhci->pci_dev, 0); 624f1ae32a1SGerd Hoffmann } 625f1ae32a1SGerd Hoffmann } else { 6267acd279fSGerd Hoffmann trace_usb_xhci_irq_intx(level); 627f1ae32a1SGerd Hoffmann qemu_set_irq(xhci->irq, level); 628f1ae32a1SGerd Hoffmann } 629f1ae32a1SGerd Hoffmann } 630f1ae32a1SGerd Hoffmann 631f1ae32a1SGerd Hoffmann static inline int xhci_running(XHCIState *xhci) 632f1ae32a1SGerd Hoffmann { 633f1ae32a1SGerd Hoffmann return !(xhci->usbsts & USBSTS_HCH) && !xhci->er_full; 634f1ae32a1SGerd Hoffmann } 635f1ae32a1SGerd Hoffmann 636f1ae32a1SGerd Hoffmann static void xhci_die(XHCIState *xhci) 637f1ae32a1SGerd Hoffmann { 638f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_HCE; 639f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: asserted controller error\n"); 640f1ae32a1SGerd Hoffmann } 641f1ae32a1SGerd Hoffmann 642f1ae32a1SGerd Hoffmann static void xhci_write_event(XHCIState *xhci, XHCIEvent *event) 643f1ae32a1SGerd Hoffmann { 644f1ae32a1SGerd Hoffmann XHCITRB ev_trb; 64559a70ccdSDavid Gibson dma_addr_t addr; 646f1ae32a1SGerd Hoffmann 647f1ae32a1SGerd Hoffmann ev_trb.parameter = cpu_to_le64(event->ptr); 648f1ae32a1SGerd Hoffmann ev_trb.status = cpu_to_le32(event->length | (event->ccode << 24)); 649f1ae32a1SGerd Hoffmann ev_trb.control = (event->slotid << 24) | (event->epid << 16) | 650f1ae32a1SGerd Hoffmann event->flags | (event->type << TRB_TYPE_SHIFT); 651f1ae32a1SGerd Hoffmann if (xhci->er_pcs) { 652f1ae32a1SGerd Hoffmann ev_trb.control |= TRB_C; 653f1ae32a1SGerd Hoffmann } 654f1ae32a1SGerd Hoffmann ev_trb.control = cpu_to_le32(ev_trb.control); 655f1ae32a1SGerd Hoffmann 6567acd279fSGerd Hoffmann trace_usb_xhci_queue_event(xhci->er_ep_idx, trb_name(&ev_trb), 657873123feSGerd Hoffmann event_name(event), ev_trb.parameter, 658873123feSGerd Hoffmann ev_trb.status, ev_trb.control); 659f1ae32a1SGerd Hoffmann 660f1ae32a1SGerd Hoffmann addr = xhci->er_start + TRB_SIZE*xhci->er_ep_idx; 66159a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, addr, &ev_trb, TRB_SIZE); 662f1ae32a1SGerd Hoffmann 663f1ae32a1SGerd Hoffmann xhci->er_ep_idx++; 664f1ae32a1SGerd Hoffmann if (xhci->er_ep_idx >= xhci->er_size) { 665f1ae32a1SGerd Hoffmann xhci->er_ep_idx = 0; 666f1ae32a1SGerd Hoffmann xhci->er_pcs = !xhci->er_pcs; 667f1ae32a1SGerd Hoffmann } 668f1ae32a1SGerd Hoffmann } 669f1ae32a1SGerd Hoffmann 670f1ae32a1SGerd Hoffmann static void xhci_events_update(XHCIState *xhci) 671f1ae32a1SGerd Hoffmann { 67259a70ccdSDavid Gibson dma_addr_t erdp; 673f1ae32a1SGerd Hoffmann unsigned int dp_idx; 674f1ae32a1SGerd Hoffmann bool do_irq = 0; 675f1ae32a1SGerd Hoffmann 676f1ae32a1SGerd Hoffmann if (xhci->usbsts & USBSTS_HCH) { 677f1ae32a1SGerd Hoffmann return; 678f1ae32a1SGerd Hoffmann } 679f1ae32a1SGerd Hoffmann 680f1ae32a1SGerd Hoffmann erdp = xhci_addr64(xhci->erdp_low, xhci->erdp_high); 681f1ae32a1SGerd Hoffmann if (erdp < xhci->er_start || 682f1ae32a1SGerd Hoffmann erdp >= (xhci->er_start + TRB_SIZE*xhci->er_size)) { 68359a70ccdSDavid Gibson fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); 68459a70ccdSDavid Gibson fprintf(stderr, "xhci: ER at "DMA_ADDR_FMT" len %d\n", 685f1ae32a1SGerd Hoffmann xhci->er_start, xhci->er_size); 686f1ae32a1SGerd Hoffmann xhci_die(xhci); 687f1ae32a1SGerd Hoffmann return; 688f1ae32a1SGerd Hoffmann } 689f1ae32a1SGerd Hoffmann dp_idx = (erdp - xhci->er_start) / TRB_SIZE; 690f1ae32a1SGerd Hoffmann assert(dp_idx < xhci->er_size); 691f1ae32a1SGerd Hoffmann 692f1ae32a1SGerd Hoffmann /* NEC didn't read section 4.9.4 of the spec (v1.0 p139 top Note) and thus 693f1ae32a1SGerd Hoffmann * deadlocks when the ER is full. Hack it by holding off events until 694f1ae32a1SGerd Hoffmann * the driver decides to free at least half of the ring */ 695f1ae32a1SGerd Hoffmann if (xhci->er_full) { 696f1ae32a1SGerd Hoffmann int er_free = dp_idx - xhci->er_ep_idx; 697f1ae32a1SGerd Hoffmann if (er_free <= 0) { 698f1ae32a1SGerd Hoffmann er_free += xhci->er_size; 699f1ae32a1SGerd Hoffmann } 700f1ae32a1SGerd Hoffmann if (er_free < (xhci->er_size/2)) { 701f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring still " 702f1ae32a1SGerd Hoffmann "more than half full (hack)\n"); 703f1ae32a1SGerd Hoffmann return; 704f1ae32a1SGerd Hoffmann } 705f1ae32a1SGerd Hoffmann } 706f1ae32a1SGerd Hoffmann 707f1ae32a1SGerd Hoffmann while (xhci->ev_buffer_put != xhci->ev_buffer_get) { 708f1ae32a1SGerd Hoffmann assert(xhci->er_full); 709f1ae32a1SGerd Hoffmann if (((xhci->er_ep_idx+1) % xhci->er_size) == dp_idx) { 710f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring full again\n"); 711f1ae32a1SGerd Hoffmann #ifndef ER_FULL_HACK 712f1ae32a1SGerd Hoffmann XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR}; 713f1ae32a1SGerd Hoffmann xhci_write_event(xhci, &full); 714f1ae32a1SGerd Hoffmann #endif 715f1ae32a1SGerd Hoffmann do_irq = 1; 716f1ae32a1SGerd Hoffmann break; 717f1ae32a1SGerd Hoffmann } 718f1ae32a1SGerd Hoffmann XHCIEvent *event = &xhci->ev_buffer[xhci->ev_buffer_get]; 719f1ae32a1SGerd Hoffmann xhci_write_event(xhci, event); 720f1ae32a1SGerd Hoffmann xhci->ev_buffer_get++; 721f1ae32a1SGerd Hoffmann do_irq = 1; 722f1ae32a1SGerd Hoffmann if (xhci->ev_buffer_get == EV_QUEUE) { 723f1ae32a1SGerd Hoffmann xhci->ev_buffer_get = 0; 724f1ae32a1SGerd Hoffmann } 725f1ae32a1SGerd Hoffmann } 726f1ae32a1SGerd Hoffmann 727f1ae32a1SGerd Hoffmann if (do_irq) { 728f1ae32a1SGerd Hoffmann xhci->erdp_low |= ERDP_EHB; 729f1ae32a1SGerd Hoffmann xhci->iman |= IMAN_IP; 730f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_EINT; 731f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 732f1ae32a1SGerd Hoffmann } 733f1ae32a1SGerd Hoffmann 734f1ae32a1SGerd Hoffmann if (xhci->er_full && xhci->ev_buffer_put == xhci->ev_buffer_get) { 735f1ae32a1SGerd Hoffmann DPRINTF("xhci_events_update(): event ring no longer full\n"); 736f1ae32a1SGerd Hoffmann xhci->er_full = 0; 737f1ae32a1SGerd Hoffmann } 738f1ae32a1SGerd Hoffmann return; 739f1ae32a1SGerd Hoffmann } 740f1ae32a1SGerd Hoffmann 741f1ae32a1SGerd Hoffmann static void xhci_event(XHCIState *xhci, XHCIEvent *event) 742f1ae32a1SGerd Hoffmann { 74359a70ccdSDavid Gibson dma_addr_t erdp; 744f1ae32a1SGerd Hoffmann unsigned int dp_idx; 745f1ae32a1SGerd Hoffmann 746f1ae32a1SGerd Hoffmann if (xhci->er_full) { 747f1ae32a1SGerd Hoffmann DPRINTF("xhci_event(): ER full, queueing\n"); 748f1ae32a1SGerd Hoffmann if (((xhci->ev_buffer_put+1) % EV_QUEUE) == xhci->ev_buffer_get) { 749f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: event queue full, dropping event!\n"); 750f1ae32a1SGerd Hoffmann return; 751f1ae32a1SGerd Hoffmann } 752f1ae32a1SGerd Hoffmann xhci->ev_buffer[xhci->ev_buffer_put++] = *event; 753f1ae32a1SGerd Hoffmann if (xhci->ev_buffer_put == EV_QUEUE) { 754f1ae32a1SGerd Hoffmann xhci->ev_buffer_put = 0; 755f1ae32a1SGerd Hoffmann } 756f1ae32a1SGerd Hoffmann return; 757f1ae32a1SGerd Hoffmann } 758f1ae32a1SGerd Hoffmann 759f1ae32a1SGerd Hoffmann erdp = xhci_addr64(xhci->erdp_low, xhci->erdp_high); 760f1ae32a1SGerd Hoffmann if (erdp < xhci->er_start || 761f1ae32a1SGerd Hoffmann erdp >= (xhci->er_start + TRB_SIZE*xhci->er_size)) { 76259a70ccdSDavid Gibson fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp); 76359a70ccdSDavid Gibson fprintf(stderr, "xhci: ER at "DMA_ADDR_FMT" len %d\n", 764f1ae32a1SGerd Hoffmann xhci->er_start, xhci->er_size); 765f1ae32a1SGerd Hoffmann xhci_die(xhci); 766f1ae32a1SGerd Hoffmann return; 767f1ae32a1SGerd Hoffmann } 768f1ae32a1SGerd Hoffmann 769f1ae32a1SGerd Hoffmann dp_idx = (erdp - xhci->er_start) / TRB_SIZE; 770f1ae32a1SGerd Hoffmann assert(dp_idx < xhci->er_size); 771f1ae32a1SGerd Hoffmann 772f1ae32a1SGerd Hoffmann if ((xhci->er_ep_idx+1) % xhci->er_size == dp_idx) { 773f1ae32a1SGerd Hoffmann DPRINTF("xhci_event(): ER full, queueing\n"); 774f1ae32a1SGerd Hoffmann #ifndef ER_FULL_HACK 775f1ae32a1SGerd Hoffmann XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR}; 776f1ae32a1SGerd Hoffmann xhci_write_event(xhci, &full); 777f1ae32a1SGerd Hoffmann #endif 778f1ae32a1SGerd Hoffmann xhci->er_full = 1; 779f1ae32a1SGerd Hoffmann if (((xhci->ev_buffer_put+1) % EV_QUEUE) == xhci->ev_buffer_get) { 780f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: event queue full, dropping event!\n"); 781f1ae32a1SGerd Hoffmann return; 782f1ae32a1SGerd Hoffmann } 783f1ae32a1SGerd Hoffmann xhci->ev_buffer[xhci->ev_buffer_put++] = *event; 784f1ae32a1SGerd Hoffmann if (xhci->ev_buffer_put == EV_QUEUE) { 785f1ae32a1SGerd Hoffmann xhci->ev_buffer_put = 0; 786f1ae32a1SGerd Hoffmann } 787f1ae32a1SGerd Hoffmann } else { 788f1ae32a1SGerd Hoffmann xhci_write_event(xhci, event); 789f1ae32a1SGerd Hoffmann } 790f1ae32a1SGerd Hoffmann 791f1ae32a1SGerd Hoffmann xhci->erdp_low |= ERDP_EHB; 792f1ae32a1SGerd Hoffmann xhci->iman |= IMAN_IP; 793f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_EINT; 794f1ae32a1SGerd Hoffmann 795f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 796f1ae32a1SGerd Hoffmann } 797f1ae32a1SGerd Hoffmann 798f1ae32a1SGerd Hoffmann static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring, 79959a70ccdSDavid Gibson dma_addr_t base) 800f1ae32a1SGerd Hoffmann { 801f1ae32a1SGerd Hoffmann ring->base = base; 802f1ae32a1SGerd Hoffmann ring->dequeue = base; 803f1ae32a1SGerd Hoffmann ring->ccs = 1; 804f1ae32a1SGerd Hoffmann } 805f1ae32a1SGerd Hoffmann 806f1ae32a1SGerd Hoffmann static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb, 80759a70ccdSDavid Gibson dma_addr_t *addr) 808f1ae32a1SGerd Hoffmann { 809f1ae32a1SGerd Hoffmann while (1) { 810f1ae32a1SGerd Hoffmann TRBType type; 81159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ring->dequeue, trb, TRB_SIZE); 812f1ae32a1SGerd Hoffmann trb->addr = ring->dequeue; 813f1ae32a1SGerd Hoffmann trb->ccs = ring->ccs; 814f1ae32a1SGerd Hoffmann le64_to_cpus(&trb->parameter); 815f1ae32a1SGerd Hoffmann le32_to_cpus(&trb->status); 816f1ae32a1SGerd Hoffmann le32_to_cpus(&trb->control); 817f1ae32a1SGerd Hoffmann 8180703a4a7SGerd Hoffmann trace_usb_xhci_fetch_trb(ring->dequeue, trb_name(trb), 8190703a4a7SGerd Hoffmann trb->parameter, trb->status, trb->control); 820f1ae32a1SGerd Hoffmann 821f1ae32a1SGerd Hoffmann if ((trb->control & TRB_C) != ring->ccs) { 822f1ae32a1SGerd Hoffmann return 0; 823f1ae32a1SGerd Hoffmann } 824f1ae32a1SGerd Hoffmann 825f1ae32a1SGerd Hoffmann type = TRB_TYPE(*trb); 826f1ae32a1SGerd Hoffmann 827f1ae32a1SGerd Hoffmann if (type != TR_LINK) { 828f1ae32a1SGerd Hoffmann if (addr) { 829f1ae32a1SGerd Hoffmann *addr = ring->dequeue; 830f1ae32a1SGerd Hoffmann } 831f1ae32a1SGerd Hoffmann ring->dequeue += TRB_SIZE; 832f1ae32a1SGerd Hoffmann return type; 833f1ae32a1SGerd Hoffmann } else { 834f1ae32a1SGerd Hoffmann ring->dequeue = xhci_mask64(trb->parameter); 835f1ae32a1SGerd Hoffmann if (trb->control & TRB_LK_TC) { 836f1ae32a1SGerd Hoffmann ring->ccs = !ring->ccs; 837f1ae32a1SGerd Hoffmann } 838f1ae32a1SGerd Hoffmann } 839f1ae32a1SGerd Hoffmann } 840f1ae32a1SGerd Hoffmann } 841f1ae32a1SGerd Hoffmann 842f1ae32a1SGerd Hoffmann static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) 843f1ae32a1SGerd Hoffmann { 844f1ae32a1SGerd Hoffmann XHCITRB trb; 845f1ae32a1SGerd Hoffmann int length = 0; 84659a70ccdSDavid Gibson dma_addr_t dequeue = ring->dequeue; 847f1ae32a1SGerd Hoffmann bool ccs = ring->ccs; 848f1ae32a1SGerd Hoffmann /* hack to bundle together the two/three TDs that make a setup transfer */ 849f1ae32a1SGerd Hoffmann bool control_td_set = 0; 850f1ae32a1SGerd Hoffmann 851f1ae32a1SGerd Hoffmann while (1) { 852f1ae32a1SGerd Hoffmann TRBType type; 85359a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, dequeue, &trb, TRB_SIZE); 854f1ae32a1SGerd Hoffmann le64_to_cpus(&trb.parameter); 855f1ae32a1SGerd Hoffmann le32_to_cpus(&trb.status); 856f1ae32a1SGerd Hoffmann le32_to_cpus(&trb.control); 857f1ae32a1SGerd Hoffmann 858f1ae32a1SGerd Hoffmann if ((trb.control & TRB_C) != ccs) { 859f1ae32a1SGerd Hoffmann return -length; 860f1ae32a1SGerd Hoffmann } 861f1ae32a1SGerd Hoffmann 862f1ae32a1SGerd Hoffmann type = TRB_TYPE(trb); 863f1ae32a1SGerd Hoffmann 864f1ae32a1SGerd Hoffmann if (type == TR_LINK) { 865f1ae32a1SGerd Hoffmann dequeue = xhci_mask64(trb.parameter); 866f1ae32a1SGerd Hoffmann if (trb.control & TRB_LK_TC) { 867f1ae32a1SGerd Hoffmann ccs = !ccs; 868f1ae32a1SGerd Hoffmann } 869f1ae32a1SGerd Hoffmann continue; 870f1ae32a1SGerd Hoffmann } 871f1ae32a1SGerd Hoffmann 872f1ae32a1SGerd Hoffmann length += 1; 873f1ae32a1SGerd Hoffmann dequeue += TRB_SIZE; 874f1ae32a1SGerd Hoffmann 875f1ae32a1SGerd Hoffmann if (type == TR_SETUP) { 876f1ae32a1SGerd Hoffmann control_td_set = 1; 877f1ae32a1SGerd Hoffmann } else if (type == TR_STATUS) { 878f1ae32a1SGerd Hoffmann control_td_set = 0; 879f1ae32a1SGerd Hoffmann } 880f1ae32a1SGerd Hoffmann 881f1ae32a1SGerd Hoffmann if (!control_td_set && !(trb.control & TRB_TR_CH)) { 882f1ae32a1SGerd Hoffmann return length; 883f1ae32a1SGerd Hoffmann } 884f1ae32a1SGerd Hoffmann } 885f1ae32a1SGerd Hoffmann } 886f1ae32a1SGerd Hoffmann 887f1ae32a1SGerd Hoffmann static void xhci_er_reset(XHCIState *xhci) 888f1ae32a1SGerd Hoffmann { 889f1ae32a1SGerd Hoffmann XHCIEvRingSeg seg; 890f1ae32a1SGerd Hoffmann 891f1ae32a1SGerd Hoffmann /* cache the (sole) event ring segment location */ 892f1ae32a1SGerd Hoffmann if (xhci->erstsz != 1) { 893f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid value for ERSTSZ: %d\n", xhci->erstsz); 894f1ae32a1SGerd Hoffmann xhci_die(xhci); 895f1ae32a1SGerd Hoffmann return; 896f1ae32a1SGerd Hoffmann } 89759a70ccdSDavid Gibson dma_addr_t erstba = xhci_addr64(xhci->erstba_low, xhci->erstba_high); 89859a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, erstba, &seg, sizeof(seg)); 899f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.addr_low); 900f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.addr_high); 901f1ae32a1SGerd Hoffmann le32_to_cpus(&seg.size); 902f1ae32a1SGerd Hoffmann if (seg.size < 16 || seg.size > 4096) { 903f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid value for segment size: %d\n", seg.size); 904f1ae32a1SGerd Hoffmann xhci_die(xhci); 905f1ae32a1SGerd Hoffmann return; 906f1ae32a1SGerd Hoffmann } 907f1ae32a1SGerd Hoffmann xhci->er_start = xhci_addr64(seg.addr_low, seg.addr_high); 908f1ae32a1SGerd Hoffmann xhci->er_size = seg.size; 909f1ae32a1SGerd Hoffmann 910f1ae32a1SGerd Hoffmann xhci->er_ep_idx = 0; 911f1ae32a1SGerd Hoffmann xhci->er_pcs = 1; 912f1ae32a1SGerd Hoffmann xhci->er_full = 0; 913f1ae32a1SGerd Hoffmann 91459a70ccdSDavid Gibson DPRINTF("xhci: event ring:" DMA_ADDR_FMT " [%d]\n", 915f1ae32a1SGerd Hoffmann xhci->er_start, xhci->er_size); 916f1ae32a1SGerd Hoffmann } 917f1ae32a1SGerd Hoffmann 918f1ae32a1SGerd Hoffmann static void xhci_run(XHCIState *xhci) 919f1ae32a1SGerd Hoffmann { 920fc0ddacaSGerd Hoffmann trace_usb_xhci_run(); 921f1ae32a1SGerd Hoffmann xhci->usbsts &= ~USBSTS_HCH; 92201546fa6SGerd Hoffmann xhci->mfindex_start = qemu_get_clock_ns(vm_clock); 923f1ae32a1SGerd Hoffmann } 924f1ae32a1SGerd Hoffmann 925f1ae32a1SGerd Hoffmann static void xhci_stop(XHCIState *xhci) 926f1ae32a1SGerd Hoffmann { 927fc0ddacaSGerd Hoffmann trace_usb_xhci_stop(); 928f1ae32a1SGerd Hoffmann xhci->usbsts |= USBSTS_HCH; 929f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~CRCR_CRR; 930f1ae32a1SGerd Hoffmann } 931f1ae32a1SGerd Hoffmann 932f1ae32a1SGerd Hoffmann static void xhci_set_ep_state(XHCIState *xhci, XHCIEPContext *epctx, 933f1ae32a1SGerd Hoffmann uint32_t state) 934f1ae32a1SGerd Hoffmann { 935f1ae32a1SGerd Hoffmann uint32_t ctx[5]; 936f1ae32a1SGerd Hoffmann if (epctx->state == state) { 937f1ae32a1SGerd Hoffmann return; 938f1ae32a1SGerd Hoffmann } 939f1ae32a1SGerd Hoffmann 94059a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, epctx->pctx, ctx, sizeof(ctx)); 941f1ae32a1SGerd Hoffmann ctx[0] &= ~EP_STATE_MASK; 942f1ae32a1SGerd Hoffmann ctx[0] |= state; 943f1ae32a1SGerd Hoffmann ctx[2] = epctx->ring.dequeue | epctx->ring.ccs; 944f1ae32a1SGerd Hoffmann ctx[3] = (epctx->ring.dequeue >> 16) >> 16; 94559a70ccdSDavid Gibson DPRINTF("xhci: set epctx: " DMA_ADDR_FMT " state=%d dequeue=%08x%08x\n", 946f1ae32a1SGerd Hoffmann epctx->pctx, state, ctx[3], ctx[2]); 94759a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, epctx->pctx, ctx, sizeof(ctx)); 948f1ae32a1SGerd Hoffmann epctx->state = state; 949f1ae32a1SGerd Hoffmann } 950f1ae32a1SGerd Hoffmann 9513d139684SGerd Hoffmann static void xhci_ep_kick_timer(void *opaque) 9523d139684SGerd Hoffmann { 9533d139684SGerd Hoffmann XHCIEPContext *epctx = opaque; 9543d139684SGerd Hoffmann xhci_kick_ep(epctx->xhci, epctx->slotid, epctx->epid); 9553d139684SGerd Hoffmann } 9563d139684SGerd Hoffmann 957f1ae32a1SGerd Hoffmann static TRBCCode xhci_enable_ep(XHCIState *xhci, unsigned int slotid, 95859a70ccdSDavid Gibson unsigned int epid, dma_addr_t pctx, 959f1ae32a1SGerd Hoffmann uint32_t *ctx) 960f1ae32a1SGerd Hoffmann { 961f1ae32a1SGerd Hoffmann XHCISlot *slot; 962f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 96359a70ccdSDavid Gibson dma_addr_t dequeue; 964f1ae32a1SGerd Hoffmann int i; 965f1ae32a1SGerd Hoffmann 966c1f6b493SGerd Hoffmann trace_usb_xhci_ep_enable(slotid, epid); 967f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 968f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 969f1ae32a1SGerd Hoffmann 970f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 971f1ae32a1SGerd Hoffmann if (slot->eps[epid-1]) { 972f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot %d ep %d already enabled!\n", slotid, epid); 973f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 974f1ae32a1SGerd Hoffmann } 975f1ae32a1SGerd Hoffmann 976f1ae32a1SGerd Hoffmann epctx = g_malloc(sizeof(XHCIEPContext)); 977f1ae32a1SGerd Hoffmann memset(epctx, 0, sizeof(XHCIEPContext)); 9783d139684SGerd Hoffmann epctx->xhci = xhci; 9793d139684SGerd Hoffmann epctx->slotid = slotid; 9803d139684SGerd Hoffmann epctx->epid = epid; 981f1ae32a1SGerd Hoffmann 982f1ae32a1SGerd Hoffmann slot->eps[epid-1] = epctx; 983f1ae32a1SGerd Hoffmann 984f1ae32a1SGerd Hoffmann dequeue = xhci_addr64(ctx[2] & ~0xf, ctx[3]); 985f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &epctx->ring, dequeue); 986f1ae32a1SGerd Hoffmann epctx->ring.ccs = ctx[2] & 1; 987f1ae32a1SGerd Hoffmann 988f1ae32a1SGerd Hoffmann epctx->type = (ctx[1] >> EP_TYPE_SHIFT) & EP_TYPE_MASK; 989f1ae32a1SGerd Hoffmann DPRINTF("xhci: endpoint %d.%d type is %d\n", epid/2, epid%2, epctx->type); 990f1ae32a1SGerd Hoffmann epctx->pctx = pctx; 991f1ae32a1SGerd Hoffmann epctx->max_psize = ctx[1]>>16; 992f1ae32a1SGerd Hoffmann epctx->max_psize *= 1+((ctx[1]>>8)&0xff); 993f1ae32a1SGerd Hoffmann DPRINTF("xhci: endpoint %d.%d max transaction (burst) size is %d\n", 994f1ae32a1SGerd Hoffmann epid/2, epid%2, epctx->max_psize); 995f1ae32a1SGerd Hoffmann for (i = 0; i < ARRAY_SIZE(epctx->transfers); i++) { 996f1ae32a1SGerd Hoffmann usb_packet_init(&epctx->transfers[i].packet); 997f1ae32a1SGerd Hoffmann } 998f1ae32a1SGerd Hoffmann 9993d139684SGerd Hoffmann epctx->interval = 1 << (ctx[0] >> 16) & 0xff; 10003d139684SGerd Hoffmann epctx->mfindex_last = 0; 10013d139684SGerd Hoffmann epctx->kick_timer = qemu_new_timer_ns(vm_clock, xhci_ep_kick_timer, epctx); 10023d139684SGerd Hoffmann 1003f1ae32a1SGerd Hoffmann epctx->state = EP_RUNNING; 1004f1ae32a1SGerd Hoffmann ctx[0] &= ~EP_STATE_MASK; 1005f1ae32a1SGerd Hoffmann ctx[0] |= EP_RUNNING; 1006f1ae32a1SGerd Hoffmann 1007f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1008f1ae32a1SGerd Hoffmann } 1009f1ae32a1SGerd Hoffmann 1010f1ae32a1SGerd Hoffmann static int xhci_ep_nuke_xfers(XHCIState *xhci, unsigned int slotid, 1011f1ae32a1SGerd Hoffmann unsigned int epid) 1012f1ae32a1SGerd Hoffmann { 1013f1ae32a1SGerd Hoffmann XHCISlot *slot; 1014f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1015f1ae32a1SGerd Hoffmann int i, xferi, killed = 0; 1016f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1017f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1018f1ae32a1SGerd Hoffmann 1019f1ae32a1SGerd Hoffmann DPRINTF("xhci_ep_nuke_xfers(%d, %d)\n", slotid, epid); 1020f1ae32a1SGerd Hoffmann 1021f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1022f1ae32a1SGerd Hoffmann 1023f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1024f1ae32a1SGerd Hoffmann return 0; 1025f1ae32a1SGerd Hoffmann } 1026f1ae32a1SGerd Hoffmann 1027f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1028f1ae32a1SGerd Hoffmann 1029f1ae32a1SGerd Hoffmann xferi = epctx->next_xfer; 1030f1ae32a1SGerd Hoffmann for (i = 0; i < TD_QUEUE; i++) { 1031f1ae32a1SGerd Hoffmann XHCITransfer *t = &epctx->transfers[xferi]; 1032f1ae32a1SGerd Hoffmann if (t->running_async) { 1033f1ae32a1SGerd Hoffmann usb_cancel_packet(&t->packet); 1034f1ae32a1SGerd Hoffmann t->running_async = 0; 1035f1ae32a1SGerd Hoffmann t->cancelled = 1; 1036f1ae32a1SGerd Hoffmann DPRINTF("xhci: cancelling transfer %d, waiting for it to complete...\n", i); 1037f1ae32a1SGerd Hoffmann killed++; 1038f1ae32a1SGerd Hoffmann } 1039f1ae32a1SGerd Hoffmann if (t->running_retry) { 1040f1ae32a1SGerd Hoffmann t->running_retry = 0; 1041f1ae32a1SGerd Hoffmann epctx->retry = NULL; 10423d139684SGerd Hoffmann qemu_del_timer(epctx->kick_timer); 1043f1ae32a1SGerd Hoffmann } 1044f1ae32a1SGerd Hoffmann if (t->trbs) { 1045f1ae32a1SGerd Hoffmann g_free(t->trbs); 1046f1ae32a1SGerd Hoffmann } 1047f1ae32a1SGerd Hoffmann 1048f1ae32a1SGerd Hoffmann t->trbs = NULL; 1049f1ae32a1SGerd Hoffmann t->trb_count = t->trb_alloced = 0; 1050f1ae32a1SGerd Hoffmann xferi = (xferi + 1) % TD_QUEUE; 1051f1ae32a1SGerd Hoffmann } 1052f1ae32a1SGerd Hoffmann return killed; 1053f1ae32a1SGerd Hoffmann } 1054f1ae32a1SGerd Hoffmann 1055f1ae32a1SGerd Hoffmann static TRBCCode xhci_disable_ep(XHCIState *xhci, unsigned int slotid, 1056f1ae32a1SGerd Hoffmann unsigned int epid) 1057f1ae32a1SGerd Hoffmann { 1058f1ae32a1SGerd Hoffmann XHCISlot *slot; 1059f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1060f1ae32a1SGerd Hoffmann 1061c1f6b493SGerd Hoffmann trace_usb_xhci_ep_disable(slotid, epid); 1062f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1063f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1064f1ae32a1SGerd Hoffmann 1065f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1066f1ae32a1SGerd Hoffmann 1067f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1068f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d already disabled\n", slotid, epid); 1069f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1070f1ae32a1SGerd Hoffmann } 1071f1ae32a1SGerd Hoffmann 1072f1ae32a1SGerd Hoffmann xhci_ep_nuke_xfers(xhci, slotid, epid); 1073f1ae32a1SGerd Hoffmann 1074f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1075f1ae32a1SGerd Hoffmann 1076f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_DISABLED); 1077f1ae32a1SGerd Hoffmann 10783d139684SGerd Hoffmann qemu_free_timer(epctx->kick_timer); 1079f1ae32a1SGerd Hoffmann g_free(epctx); 1080f1ae32a1SGerd Hoffmann slot->eps[epid-1] = NULL; 1081f1ae32a1SGerd Hoffmann 1082f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1083f1ae32a1SGerd Hoffmann } 1084f1ae32a1SGerd Hoffmann 1085f1ae32a1SGerd Hoffmann static TRBCCode xhci_stop_ep(XHCIState *xhci, unsigned int slotid, 1086f1ae32a1SGerd Hoffmann unsigned int epid) 1087f1ae32a1SGerd Hoffmann { 1088f1ae32a1SGerd Hoffmann XHCISlot *slot; 1089f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1090f1ae32a1SGerd Hoffmann 1091c1f6b493SGerd Hoffmann trace_usb_xhci_ep_stop(slotid, epid); 1092f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1093f1ae32a1SGerd Hoffmann 1094f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1095f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1096f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1097f1ae32a1SGerd Hoffmann } 1098f1ae32a1SGerd Hoffmann 1099f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1100f1ae32a1SGerd Hoffmann 1101f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1102f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1103f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1104f1ae32a1SGerd Hoffmann } 1105f1ae32a1SGerd Hoffmann 1106f1ae32a1SGerd Hoffmann if (xhci_ep_nuke_xfers(xhci, slotid, epid) > 0) { 1107f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: FIXME: endpoint stopped w/ xfers running, " 1108f1ae32a1SGerd Hoffmann "data might be lost\n"); 1109f1ae32a1SGerd Hoffmann } 1110f1ae32a1SGerd Hoffmann 1111f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1112f1ae32a1SGerd Hoffmann 1113f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1114f1ae32a1SGerd Hoffmann 1115f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1116f1ae32a1SGerd Hoffmann } 1117f1ae32a1SGerd Hoffmann 1118f1ae32a1SGerd Hoffmann static TRBCCode xhci_reset_ep(XHCIState *xhci, unsigned int slotid, 1119f1ae32a1SGerd Hoffmann unsigned int epid) 1120f1ae32a1SGerd Hoffmann { 1121f1ae32a1SGerd Hoffmann XHCISlot *slot; 1122f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 1123f1ae32a1SGerd Hoffmann USBDevice *dev; 1124f1ae32a1SGerd Hoffmann 1125c1f6b493SGerd Hoffmann trace_usb_xhci_ep_reset(slotid, epid); 1126f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1127f1ae32a1SGerd Hoffmann 1128f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1129f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1130f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1131f1ae32a1SGerd Hoffmann } 1132f1ae32a1SGerd Hoffmann 1133f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1134f1ae32a1SGerd Hoffmann 1135f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1136f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1137f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1138f1ae32a1SGerd Hoffmann } 1139f1ae32a1SGerd Hoffmann 1140f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1141f1ae32a1SGerd Hoffmann 1142f1ae32a1SGerd Hoffmann if (epctx->state != EP_HALTED) { 1143f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: reset EP while EP %d not halted (%d)\n", 1144f1ae32a1SGerd Hoffmann epid, epctx->state); 1145f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1146f1ae32a1SGerd Hoffmann } 1147f1ae32a1SGerd Hoffmann 1148f1ae32a1SGerd Hoffmann if (xhci_ep_nuke_xfers(xhci, slotid, epid) > 0) { 1149f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: FIXME: endpoint reset w/ xfers running, " 1150f1ae32a1SGerd Hoffmann "data might be lost\n"); 1151f1ae32a1SGerd Hoffmann } 1152f1ae32a1SGerd Hoffmann 1153f1ae32a1SGerd Hoffmann uint8_t ep = epid>>1; 1154f1ae32a1SGerd Hoffmann 1155f1ae32a1SGerd Hoffmann if (epid & 1) { 1156f1ae32a1SGerd Hoffmann ep |= 0x80; 1157f1ae32a1SGerd Hoffmann } 1158f1ae32a1SGerd Hoffmann 1159*0846e635SGerd Hoffmann dev = xhci->ports[xhci->slots[slotid-1].port-1].uport->dev; 1160f1ae32a1SGerd Hoffmann if (!dev) { 1161f1ae32a1SGerd Hoffmann return CC_USB_TRANSACTION_ERROR; 1162f1ae32a1SGerd Hoffmann } 1163f1ae32a1SGerd Hoffmann 1164f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1165f1ae32a1SGerd Hoffmann 1166f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1167f1ae32a1SGerd Hoffmann } 1168f1ae32a1SGerd Hoffmann 1169f1ae32a1SGerd Hoffmann static TRBCCode xhci_set_ep_dequeue(XHCIState *xhci, unsigned int slotid, 1170f1ae32a1SGerd Hoffmann unsigned int epid, uint64_t pdequeue) 1171f1ae32a1SGerd Hoffmann { 1172f1ae32a1SGerd Hoffmann XHCISlot *slot; 1173f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 117459a70ccdSDavid Gibson dma_addr_t dequeue; 1175f1ae32a1SGerd Hoffmann 1176f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1177f1ae32a1SGerd Hoffmann 1178f1ae32a1SGerd Hoffmann if (epid < 1 || epid > 31) { 1179f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad ep %d\n", epid); 1180f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1181f1ae32a1SGerd Hoffmann } 1182f1ae32a1SGerd Hoffmann 1183d829fde9SGerd Hoffmann trace_usb_xhci_ep_set_dequeue(slotid, epid, pdequeue); 1184f1ae32a1SGerd Hoffmann dequeue = xhci_mask64(pdequeue); 1185f1ae32a1SGerd Hoffmann 1186f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1187f1ae32a1SGerd Hoffmann 1188f1ae32a1SGerd Hoffmann if (!slot->eps[epid-1]) { 1189f1ae32a1SGerd Hoffmann DPRINTF("xhci: slot %d ep %d not enabled\n", slotid, epid); 1190f1ae32a1SGerd Hoffmann return CC_EP_NOT_ENABLED_ERROR; 1191f1ae32a1SGerd Hoffmann } 1192f1ae32a1SGerd Hoffmann 1193f1ae32a1SGerd Hoffmann epctx = slot->eps[epid-1]; 1194f1ae32a1SGerd Hoffmann 1195f1ae32a1SGerd Hoffmann 1196f1ae32a1SGerd Hoffmann if (epctx->state != EP_STOPPED) { 1197f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: set EP dequeue pointer while EP %d not stopped\n", epid); 1198f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1199f1ae32a1SGerd Hoffmann } 1200f1ae32a1SGerd Hoffmann 1201f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &epctx->ring, dequeue & ~0xF); 1202f1ae32a1SGerd Hoffmann epctx->ring.ccs = dequeue & 1; 1203f1ae32a1SGerd Hoffmann 1204f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_STOPPED); 1205f1ae32a1SGerd Hoffmann 1206f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1207f1ae32a1SGerd Hoffmann } 1208f1ae32a1SGerd Hoffmann 1209d5a15814SGerd Hoffmann static int xhci_xfer_map(XHCITransfer *xfer) 1210f1ae32a1SGerd Hoffmann { 1211d5a15814SGerd Hoffmann int in_xfer = (xfer->packet.pid == USB_TOKEN_IN); 1212f1ae32a1SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1213d5a15814SGerd Hoffmann int i; 1214f1ae32a1SGerd Hoffmann 1215d5a15814SGerd Hoffmann pci_dma_sglist_init(&xfer->sgl, &xhci->pci_dev, xfer->trb_count); 1216f1ae32a1SGerd Hoffmann for (i = 0; i < xfer->trb_count; i++) { 1217f1ae32a1SGerd Hoffmann XHCITRB *trb = &xfer->trbs[i]; 121859a70ccdSDavid Gibson dma_addr_t addr; 1219f1ae32a1SGerd Hoffmann unsigned int chunk = 0; 1220f1ae32a1SGerd Hoffmann 1221f1ae32a1SGerd Hoffmann switch (TRB_TYPE(*trb)) { 1222f1ae32a1SGerd Hoffmann case TR_DATA: 1223f1ae32a1SGerd Hoffmann if ((!(trb->control & TRB_TR_DIR)) != (!in_xfer)) { 1224f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: data direction mismatch for TR_DATA\n"); 1225d5a15814SGerd Hoffmann goto err; 1226f1ae32a1SGerd Hoffmann } 1227f1ae32a1SGerd Hoffmann /* fallthrough */ 1228f1ae32a1SGerd Hoffmann case TR_NORMAL: 1229f1ae32a1SGerd Hoffmann case TR_ISOCH: 1230f1ae32a1SGerd Hoffmann addr = xhci_mask64(trb->parameter); 1231f1ae32a1SGerd Hoffmann chunk = trb->status & 0x1ffff; 1232f1ae32a1SGerd Hoffmann if (trb->control & TRB_TR_IDT) { 1233f1ae32a1SGerd Hoffmann if (chunk > 8 || in_xfer) { 1234f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid immediate data TRB\n"); 1235d5a15814SGerd Hoffmann goto err; 1236d5a15814SGerd Hoffmann } 1237d5a15814SGerd Hoffmann qemu_sglist_add(&xfer->sgl, trb->addr, chunk); 1238d5a15814SGerd Hoffmann } else { 1239d5a15814SGerd Hoffmann qemu_sglist_add(&xfer->sgl, addr, chunk); 1240d5a15814SGerd Hoffmann } 1241d5a15814SGerd Hoffmann break; 1242d5a15814SGerd Hoffmann } 1243d5a15814SGerd Hoffmann } 1244d5a15814SGerd Hoffmann 1245d5a15814SGerd Hoffmann usb_packet_map(&xfer->packet, &xfer->sgl); 1246d5a15814SGerd Hoffmann return 0; 1247d5a15814SGerd Hoffmann 1248d5a15814SGerd Hoffmann err: 1249d5a15814SGerd Hoffmann qemu_sglist_destroy(&xfer->sgl); 1250f1ae32a1SGerd Hoffmann xhci_die(xhci); 1251d5a15814SGerd Hoffmann return -1; 1252f1ae32a1SGerd Hoffmann } 1253d5a15814SGerd Hoffmann 1254d5a15814SGerd Hoffmann static void xhci_xfer_unmap(XHCITransfer *xfer) 1255d5a15814SGerd Hoffmann { 1256d5a15814SGerd Hoffmann usb_packet_unmap(&xfer->packet, &xfer->sgl); 1257d5a15814SGerd Hoffmann qemu_sglist_destroy(&xfer->sgl); 1258f1ae32a1SGerd Hoffmann } 1259d5a15814SGerd Hoffmann 1260d5a15814SGerd Hoffmann static void xhci_xfer_report(XHCITransfer *xfer) 1261d5a15814SGerd Hoffmann { 1262d5a15814SGerd Hoffmann uint32_t edtla = 0; 1263d5a15814SGerd Hoffmann unsigned int left; 1264d5a15814SGerd Hoffmann bool reported = 0; 1265d5a15814SGerd Hoffmann bool shortpkt = 0; 1266d5a15814SGerd Hoffmann XHCIEvent event = {ER_TRANSFER, CC_SUCCESS}; 1267d5a15814SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1268f1ae32a1SGerd Hoffmann int i; 1269d5a15814SGerd Hoffmann 1270d5a15814SGerd Hoffmann left = xfer->packet.result < 0 ? 0 : xfer->packet.result; 1271d5a15814SGerd Hoffmann 1272d5a15814SGerd Hoffmann for (i = 0; i < xfer->trb_count; i++) { 1273d5a15814SGerd Hoffmann XHCITRB *trb = &xfer->trbs[i]; 1274d5a15814SGerd Hoffmann unsigned int chunk = 0; 1275d5a15814SGerd Hoffmann 1276d5a15814SGerd Hoffmann switch (TRB_TYPE(*trb)) { 1277d5a15814SGerd Hoffmann case TR_DATA: 1278d5a15814SGerd Hoffmann case TR_NORMAL: 1279d5a15814SGerd Hoffmann case TR_ISOCH: 1280d5a15814SGerd Hoffmann chunk = trb->status & 0x1ffff; 1281d5a15814SGerd Hoffmann if (chunk > left) { 1282d5a15814SGerd Hoffmann chunk = left; 1283d5a15814SGerd Hoffmann if (xfer->status == CC_SUCCESS) { 1284d5a15814SGerd Hoffmann shortpkt = 1; 1285f1ae32a1SGerd Hoffmann } 1286f1ae32a1SGerd Hoffmann } 1287f1ae32a1SGerd Hoffmann left -= chunk; 1288f1ae32a1SGerd Hoffmann edtla += chunk; 1289f1ae32a1SGerd Hoffmann break; 1290f1ae32a1SGerd Hoffmann case TR_STATUS: 1291f1ae32a1SGerd Hoffmann reported = 0; 1292f1ae32a1SGerd Hoffmann shortpkt = 0; 1293f1ae32a1SGerd Hoffmann break; 1294f1ae32a1SGerd Hoffmann } 1295f1ae32a1SGerd Hoffmann 1296d5a15814SGerd Hoffmann if (!reported && ((trb->control & TRB_TR_IOC) || 1297d5a15814SGerd Hoffmann (shortpkt && (trb->control & TRB_TR_ISP)) || 1298d5a15814SGerd Hoffmann (xfer->status != CC_SUCCESS))) { 1299f1ae32a1SGerd Hoffmann event.slotid = xfer->slotid; 1300f1ae32a1SGerd Hoffmann event.epid = xfer->epid; 1301f1ae32a1SGerd Hoffmann event.length = (trb->status & 0x1ffff) - chunk; 1302f1ae32a1SGerd Hoffmann event.flags = 0; 1303f1ae32a1SGerd Hoffmann event.ptr = trb->addr; 1304f1ae32a1SGerd Hoffmann if (xfer->status == CC_SUCCESS) { 1305f1ae32a1SGerd Hoffmann event.ccode = shortpkt ? CC_SHORT_PACKET : CC_SUCCESS; 1306f1ae32a1SGerd Hoffmann } else { 1307f1ae32a1SGerd Hoffmann event.ccode = xfer->status; 1308f1ae32a1SGerd Hoffmann } 1309f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb) == TR_EVDATA) { 1310f1ae32a1SGerd Hoffmann event.ptr = trb->parameter; 1311f1ae32a1SGerd Hoffmann event.flags |= TRB_EV_ED; 1312f1ae32a1SGerd Hoffmann event.length = edtla & 0xffffff; 1313f1ae32a1SGerd Hoffmann DPRINTF("xhci_xfer_data: EDTLA=%d\n", event.length); 1314f1ae32a1SGerd Hoffmann edtla = 0; 1315f1ae32a1SGerd Hoffmann } 1316f1ae32a1SGerd Hoffmann xhci_event(xhci, &event); 1317f1ae32a1SGerd Hoffmann reported = 1; 1318d5a15814SGerd Hoffmann if (xfer->status != CC_SUCCESS) { 1319d5a15814SGerd Hoffmann return; 1320f1ae32a1SGerd Hoffmann } 1321f1ae32a1SGerd Hoffmann } 1322d5a15814SGerd Hoffmann } 1323f1ae32a1SGerd Hoffmann } 1324f1ae32a1SGerd Hoffmann 1325f1ae32a1SGerd Hoffmann static void xhci_stall_ep(XHCITransfer *xfer) 1326f1ae32a1SGerd Hoffmann { 1327f1ae32a1SGerd Hoffmann XHCIState *xhci = xfer->xhci; 1328f1ae32a1SGerd Hoffmann XHCISlot *slot = &xhci->slots[xfer->slotid-1]; 1329f1ae32a1SGerd Hoffmann XHCIEPContext *epctx = slot->eps[xfer->epid-1]; 1330f1ae32a1SGerd Hoffmann 1331f1ae32a1SGerd Hoffmann epctx->ring.dequeue = xfer->trbs[0].addr; 1332f1ae32a1SGerd Hoffmann epctx->ring.ccs = xfer->trbs[0].ccs; 1333f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_HALTED); 1334f1ae32a1SGerd Hoffmann DPRINTF("xhci: stalled slot %d ep %d\n", xfer->slotid, xfer->epid); 133559a70ccdSDavid Gibson DPRINTF("xhci: will continue at "DMA_ADDR_FMT"\n", epctx->ring.dequeue); 1336f1ae32a1SGerd Hoffmann } 1337f1ae32a1SGerd Hoffmann 1338f1ae32a1SGerd Hoffmann static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, 1339f1ae32a1SGerd Hoffmann XHCIEPContext *epctx); 1340f1ae32a1SGerd Hoffmann 13415c08106fSGerd Hoffmann static USBDevice *xhci_find_device(XHCIPort *port, uint8_t addr) 1342f1ae32a1SGerd Hoffmann { 13435c08106fSGerd Hoffmann if (!(port->portsc & PORTSC_PED)) { 13445c08106fSGerd Hoffmann return NULL; 13455c08106fSGerd Hoffmann } 1346*0846e635SGerd Hoffmann return usb_find_device(port->uport, addr); 13475c08106fSGerd Hoffmann } 13485c08106fSGerd Hoffmann 13495c08106fSGerd Hoffmann static int xhci_setup_packet(XHCITransfer *xfer) 13505c08106fSGerd Hoffmann { 13515c08106fSGerd Hoffmann XHCIState *xhci = xfer->xhci; 13525c08106fSGerd Hoffmann XHCIPort *port; 13535c08106fSGerd Hoffmann USBDevice *dev; 1354f1ae32a1SGerd Hoffmann USBEndpoint *ep; 1355f1ae32a1SGerd Hoffmann int dir; 1356f1ae32a1SGerd Hoffmann 1357f1ae32a1SGerd Hoffmann dir = xfer->in_xfer ? USB_TOKEN_IN : USB_TOKEN_OUT; 13585c08106fSGerd Hoffmann 13595c08106fSGerd Hoffmann if (xfer->packet.ep) { 13605c08106fSGerd Hoffmann ep = xfer->packet.ep; 13615c08106fSGerd Hoffmann dev = ep->dev; 13625c08106fSGerd Hoffmann } else { 13635c08106fSGerd Hoffmann port = &xhci->ports[xhci->slots[xfer->slotid-1].port-1]; 13645c08106fSGerd Hoffmann dev = xhci_find_device(port, xhci->slots[xfer->slotid-1].devaddr); 13655c08106fSGerd Hoffmann if (!dev) { 13665c08106fSGerd Hoffmann fprintf(stderr, "xhci: slot %d port %d has no device\n", 13675c08106fSGerd Hoffmann xfer->slotid, xhci->slots[xfer->slotid-1].port); 13685c08106fSGerd Hoffmann return -1; 13695c08106fSGerd Hoffmann } 1370f1ae32a1SGerd Hoffmann ep = usb_ep_get(dev, dir, xfer->epid >> 1); 13715c08106fSGerd Hoffmann } 13725c08106fSGerd Hoffmann 1373e983395dSGerd Hoffmann usb_packet_setup(&xfer->packet, dir, ep, xfer->trbs[0].addr); 1374d5a15814SGerd Hoffmann xhci_xfer_map(xfer); 1375f1ae32a1SGerd Hoffmann DPRINTF("xhci: setup packet pid 0x%x addr %d ep %d\n", 1376f1ae32a1SGerd Hoffmann xfer->packet.pid, dev->addr, ep->nr); 1377f1ae32a1SGerd Hoffmann return 0; 1378f1ae32a1SGerd Hoffmann } 1379f1ae32a1SGerd Hoffmann 1380f1ae32a1SGerd Hoffmann static int xhci_complete_packet(XHCITransfer *xfer, int ret) 1381f1ae32a1SGerd Hoffmann { 1382f1ae32a1SGerd Hoffmann if (ret == USB_RET_ASYNC) { 138397df650bSGerd Hoffmann trace_usb_xhci_xfer_async(xfer); 1384f1ae32a1SGerd Hoffmann xfer->running_async = 1; 1385f1ae32a1SGerd Hoffmann xfer->running_retry = 0; 1386f1ae32a1SGerd Hoffmann xfer->complete = 0; 1387f1ae32a1SGerd Hoffmann xfer->cancelled = 0; 1388f1ae32a1SGerd Hoffmann return 0; 1389f1ae32a1SGerd Hoffmann } else if (ret == USB_RET_NAK) { 139097df650bSGerd Hoffmann trace_usb_xhci_xfer_nak(xfer); 1391f1ae32a1SGerd Hoffmann xfer->running_async = 0; 1392f1ae32a1SGerd Hoffmann xfer->running_retry = 1; 1393f1ae32a1SGerd Hoffmann xfer->complete = 0; 1394f1ae32a1SGerd Hoffmann xfer->cancelled = 0; 1395f1ae32a1SGerd Hoffmann return 0; 1396f1ae32a1SGerd Hoffmann } else { 1397f1ae32a1SGerd Hoffmann xfer->running_async = 0; 1398f1ae32a1SGerd Hoffmann xfer->running_retry = 0; 1399f1ae32a1SGerd Hoffmann xfer->complete = 1; 1400d5a15814SGerd Hoffmann xhci_xfer_unmap(xfer); 1401f1ae32a1SGerd Hoffmann } 1402f1ae32a1SGerd Hoffmann 1403f1ae32a1SGerd Hoffmann if (ret >= 0) { 140497df650bSGerd Hoffmann trace_usb_xhci_xfer_success(xfer, ret); 1405d5a15814SGerd Hoffmann xfer->status = CC_SUCCESS; 1406d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1407f1ae32a1SGerd Hoffmann return 0; 1408f1ae32a1SGerd Hoffmann } 1409f1ae32a1SGerd Hoffmann 1410f1ae32a1SGerd Hoffmann /* error */ 141197df650bSGerd Hoffmann trace_usb_xhci_xfer_error(xfer, ret); 1412f1ae32a1SGerd Hoffmann switch (ret) { 1413f1ae32a1SGerd Hoffmann case USB_RET_NODEV: 1414f1ae32a1SGerd Hoffmann xfer->status = CC_USB_TRANSACTION_ERROR; 1415d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1416f1ae32a1SGerd Hoffmann xhci_stall_ep(xfer); 1417f1ae32a1SGerd Hoffmann break; 1418f1ae32a1SGerd Hoffmann case USB_RET_STALL: 1419f1ae32a1SGerd Hoffmann xfer->status = CC_STALL_ERROR; 1420d5a15814SGerd Hoffmann xhci_xfer_report(xfer); 1421f1ae32a1SGerd Hoffmann xhci_stall_ep(xfer); 1422f1ae32a1SGerd Hoffmann break; 1423f1ae32a1SGerd Hoffmann default: 1424f1ae32a1SGerd Hoffmann fprintf(stderr, "%s: FIXME: ret = %d\n", __FUNCTION__, ret); 1425f1ae32a1SGerd Hoffmann FIXME(); 1426f1ae32a1SGerd Hoffmann } 1427f1ae32a1SGerd Hoffmann return 0; 1428f1ae32a1SGerd Hoffmann } 1429f1ae32a1SGerd Hoffmann 1430f1ae32a1SGerd Hoffmann static int xhci_fire_ctl_transfer(XHCIState *xhci, XHCITransfer *xfer) 1431f1ae32a1SGerd Hoffmann { 1432f1ae32a1SGerd Hoffmann XHCITRB *trb_setup, *trb_status; 1433f1ae32a1SGerd Hoffmann uint8_t bmRequestType; 1434f1ae32a1SGerd Hoffmann int ret; 1435f1ae32a1SGerd Hoffmann 1436f1ae32a1SGerd Hoffmann trb_setup = &xfer->trbs[0]; 1437f1ae32a1SGerd Hoffmann trb_status = &xfer->trbs[xfer->trb_count-1]; 1438f1ae32a1SGerd Hoffmann 1439d5a15814SGerd Hoffmann trace_usb_xhci_xfer_start(xfer, xfer->slotid, xfer->epid); 144097df650bSGerd Hoffmann 1441f1ae32a1SGerd Hoffmann /* at most one Event Data TRB allowed after STATUS */ 1442f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_status) == TR_EVDATA && xfer->trb_count > 2) { 1443f1ae32a1SGerd Hoffmann trb_status--; 1444f1ae32a1SGerd Hoffmann } 1445f1ae32a1SGerd Hoffmann 1446f1ae32a1SGerd Hoffmann /* do some sanity checks */ 1447f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_setup) != TR_SETUP) { 1448f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: ep0 first TD not SETUP: %d\n", 1449f1ae32a1SGerd Hoffmann TRB_TYPE(*trb_setup)); 1450f1ae32a1SGerd Hoffmann return -1; 1451f1ae32a1SGerd Hoffmann } 1452f1ae32a1SGerd Hoffmann if (TRB_TYPE(*trb_status) != TR_STATUS) { 1453f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: ep0 last TD not STATUS: %d\n", 1454f1ae32a1SGerd Hoffmann TRB_TYPE(*trb_status)); 1455f1ae32a1SGerd Hoffmann return -1; 1456f1ae32a1SGerd Hoffmann } 1457f1ae32a1SGerd Hoffmann if (!(trb_setup->control & TRB_TR_IDT)) { 1458f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: Setup TRB doesn't have IDT set\n"); 1459f1ae32a1SGerd Hoffmann return -1; 1460f1ae32a1SGerd Hoffmann } 1461f1ae32a1SGerd Hoffmann if ((trb_setup->status & 0x1ffff) != 8) { 1462f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: Setup TRB has bad length (%d)\n", 1463f1ae32a1SGerd Hoffmann (trb_setup->status & 0x1ffff)); 1464f1ae32a1SGerd Hoffmann return -1; 1465f1ae32a1SGerd Hoffmann } 1466f1ae32a1SGerd Hoffmann 1467f1ae32a1SGerd Hoffmann bmRequestType = trb_setup->parameter; 1468f1ae32a1SGerd Hoffmann 1469f1ae32a1SGerd Hoffmann xfer->in_xfer = bmRequestType & USB_DIR_IN; 1470f1ae32a1SGerd Hoffmann xfer->iso_xfer = false; 1471f1ae32a1SGerd Hoffmann 14725c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 14735c08106fSGerd Hoffmann return -1; 14745c08106fSGerd Hoffmann } 1475f1ae32a1SGerd Hoffmann xfer->packet.parameter = trb_setup->parameter; 1476f1ae32a1SGerd Hoffmann 14775c08106fSGerd Hoffmann ret = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1478f1ae32a1SGerd Hoffmann 1479f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, ret); 1480f1ae32a1SGerd Hoffmann if (!xfer->running_async && !xfer->running_retry) { 1481f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid); 1482f1ae32a1SGerd Hoffmann } 1483f1ae32a1SGerd Hoffmann return 0; 1484f1ae32a1SGerd Hoffmann } 1485f1ae32a1SGerd Hoffmann 14863d139684SGerd Hoffmann static void xhci_calc_iso_kick(XHCIState *xhci, XHCITransfer *xfer, 14873d139684SGerd Hoffmann XHCIEPContext *epctx, uint64_t mfindex) 14883d139684SGerd Hoffmann { 14893d139684SGerd Hoffmann if (xfer->trbs[0].control & TRB_TR_SIA) { 14903d139684SGerd Hoffmann uint64_t asap = ((mfindex + epctx->interval - 1) & 14913d139684SGerd Hoffmann ~(epctx->interval-1)); 14923d139684SGerd Hoffmann if (asap >= epctx->mfindex_last && 14933d139684SGerd Hoffmann asap <= epctx->mfindex_last + epctx->interval * 4) { 14943d139684SGerd Hoffmann xfer->mfindex_kick = epctx->mfindex_last + epctx->interval; 14953d139684SGerd Hoffmann } else { 14963d139684SGerd Hoffmann xfer->mfindex_kick = asap; 14973d139684SGerd Hoffmann } 14983d139684SGerd Hoffmann } else { 14993d139684SGerd Hoffmann xfer->mfindex_kick = (xfer->trbs[0].control >> TRB_TR_FRAMEID_SHIFT) 15003d139684SGerd Hoffmann & TRB_TR_FRAMEID_MASK; 15013d139684SGerd Hoffmann xfer->mfindex_kick |= mfindex & ~0x3fff; 15023d139684SGerd Hoffmann if (xfer->mfindex_kick < mfindex) { 15033d139684SGerd Hoffmann xfer->mfindex_kick += 0x4000; 15043d139684SGerd Hoffmann } 15053d139684SGerd Hoffmann } 15063d139684SGerd Hoffmann } 15073d139684SGerd Hoffmann 15083d139684SGerd Hoffmann static void xhci_check_iso_kick(XHCIState *xhci, XHCITransfer *xfer, 15093d139684SGerd Hoffmann XHCIEPContext *epctx, uint64_t mfindex) 15103d139684SGerd Hoffmann { 15113d139684SGerd Hoffmann if (xfer->mfindex_kick > mfindex) { 15123d139684SGerd Hoffmann qemu_mod_timer(epctx->kick_timer, qemu_get_clock_ns(vm_clock) + 15133d139684SGerd Hoffmann (xfer->mfindex_kick - mfindex) * 125000); 15143d139684SGerd Hoffmann xfer->running_retry = 1; 15153d139684SGerd Hoffmann } else { 15163d139684SGerd Hoffmann epctx->mfindex_last = xfer->mfindex_kick; 15173d139684SGerd Hoffmann qemu_del_timer(epctx->kick_timer); 15183d139684SGerd Hoffmann xfer->running_retry = 0; 15193d139684SGerd Hoffmann } 15203d139684SGerd Hoffmann } 15213d139684SGerd Hoffmann 15223d139684SGerd Hoffmann 1523f1ae32a1SGerd Hoffmann static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) 1524f1ae32a1SGerd Hoffmann { 15253d139684SGerd Hoffmann uint64_t mfindex; 1526f1ae32a1SGerd Hoffmann int ret; 1527f1ae32a1SGerd Hoffmann 1528f1ae32a1SGerd Hoffmann DPRINTF("xhci_submit(slotid=%d,epid=%d)\n", xfer->slotid, xfer->epid); 1529f1ae32a1SGerd Hoffmann 1530f1ae32a1SGerd Hoffmann xfer->in_xfer = epctx->type>>2; 1531f1ae32a1SGerd Hoffmann 1532f1ae32a1SGerd Hoffmann switch(epctx->type) { 1533f1ae32a1SGerd Hoffmann case ET_INTR_OUT: 1534f1ae32a1SGerd Hoffmann case ET_INTR_IN: 1535f1ae32a1SGerd Hoffmann case ET_BULK_OUT: 1536f1ae32a1SGerd Hoffmann case ET_BULK_IN: 15373d139684SGerd Hoffmann xfer->pkts = 0; 15383d139684SGerd Hoffmann xfer->iso_xfer = false; 1539f1ae32a1SGerd Hoffmann break; 1540f1ae32a1SGerd Hoffmann case ET_ISO_OUT: 1541f1ae32a1SGerd Hoffmann case ET_ISO_IN: 15423d139684SGerd Hoffmann xfer->pkts = 1; 15433d139684SGerd Hoffmann xfer->iso_xfer = true; 15443d139684SGerd Hoffmann mfindex = xhci_mfindex_get(xhci); 15453d139684SGerd Hoffmann xhci_calc_iso_kick(xhci, xfer, epctx, mfindex); 15463d139684SGerd Hoffmann xhci_check_iso_kick(xhci, xfer, epctx, mfindex); 15473d139684SGerd Hoffmann if (xfer->running_retry) { 15483d139684SGerd Hoffmann return -1; 15493d139684SGerd Hoffmann } 1550f1ae32a1SGerd Hoffmann break; 1551f1ae32a1SGerd Hoffmann default: 1552f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: unknown or unhandled EP " 1553f1ae32a1SGerd Hoffmann "(type %d, in %d, ep %02x)\n", 1554f1ae32a1SGerd Hoffmann epctx->type, xfer->in_xfer, xfer->epid); 1555f1ae32a1SGerd Hoffmann return -1; 1556f1ae32a1SGerd Hoffmann } 1557f1ae32a1SGerd Hoffmann 15585c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 15595c08106fSGerd Hoffmann return -1; 15605c08106fSGerd Hoffmann } 15615c08106fSGerd Hoffmann ret = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1562f1ae32a1SGerd Hoffmann 1563f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, ret); 1564f1ae32a1SGerd Hoffmann if (!xfer->running_async && !xfer->running_retry) { 1565f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, xfer->slotid, xfer->epid); 1566f1ae32a1SGerd Hoffmann } 1567f1ae32a1SGerd Hoffmann return 0; 1568f1ae32a1SGerd Hoffmann } 1569f1ae32a1SGerd Hoffmann 1570f1ae32a1SGerd Hoffmann static int xhci_fire_transfer(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx) 1571f1ae32a1SGerd Hoffmann { 1572d5a15814SGerd Hoffmann trace_usb_xhci_xfer_start(xfer, xfer->slotid, xfer->epid); 1573f1ae32a1SGerd Hoffmann return xhci_submit(xhci, xfer, epctx); 1574f1ae32a1SGerd Hoffmann } 1575f1ae32a1SGerd Hoffmann 1576f1ae32a1SGerd Hoffmann static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, unsigned int epid) 1577f1ae32a1SGerd Hoffmann { 1578f1ae32a1SGerd Hoffmann XHCIEPContext *epctx; 15793d139684SGerd Hoffmann uint64_t mfindex; 1580f1ae32a1SGerd Hoffmann int length; 1581f1ae32a1SGerd Hoffmann int i; 1582f1ae32a1SGerd Hoffmann 1583c1f6b493SGerd Hoffmann trace_usb_xhci_ep_kick(slotid, epid); 1584f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1585f1ae32a1SGerd Hoffmann assert(epid >= 1 && epid <= 31); 1586f1ae32a1SGerd Hoffmann 1587f1ae32a1SGerd Hoffmann if (!xhci->slots[slotid-1].enabled) { 1588f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: xhci_kick_ep for disabled slot %d\n", slotid); 1589f1ae32a1SGerd Hoffmann return; 1590f1ae32a1SGerd Hoffmann } 1591f1ae32a1SGerd Hoffmann epctx = xhci->slots[slotid-1].eps[epid-1]; 1592f1ae32a1SGerd Hoffmann if (!epctx) { 1593f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: xhci_kick_ep for disabled endpoint %d,%d\n", 1594f1ae32a1SGerd Hoffmann epid, slotid); 1595f1ae32a1SGerd Hoffmann return; 1596f1ae32a1SGerd Hoffmann } 1597f1ae32a1SGerd Hoffmann 1598f1ae32a1SGerd Hoffmann if (epctx->retry) { 1599f1ae32a1SGerd Hoffmann XHCITransfer *xfer = epctx->retry; 1600f1ae32a1SGerd Hoffmann int result; 1601f1ae32a1SGerd Hoffmann 160297df650bSGerd Hoffmann trace_usb_xhci_xfer_retry(xfer); 1603f1ae32a1SGerd Hoffmann assert(xfer->running_retry); 16043d139684SGerd Hoffmann if (xfer->iso_xfer) { 16053d139684SGerd Hoffmann /* retry delayed iso transfer */ 16063d139684SGerd Hoffmann mfindex = xhci_mfindex_get(xhci); 16073d139684SGerd Hoffmann xhci_check_iso_kick(xhci, xfer, epctx, mfindex); 16083d139684SGerd Hoffmann if (xfer->running_retry) { 16093d139684SGerd Hoffmann return; 16103d139684SGerd Hoffmann } 16113d139684SGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 16123d139684SGerd Hoffmann return; 16133d139684SGerd Hoffmann } 16143d139684SGerd Hoffmann result = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 16153d139684SGerd Hoffmann assert(result != USB_RET_NAK); 16163d139684SGerd Hoffmann xhci_complete_packet(xfer, result); 16173d139684SGerd Hoffmann } else { 16183d139684SGerd Hoffmann /* retry nak'ed transfer */ 16195c08106fSGerd Hoffmann if (xhci_setup_packet(xfer) < 0) { 16205c08106fSGerd Hoffmann return; 16215c08106fSGerd Hoffmann } 1622f1ae32a1SGerd Hoffmann result = usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); 1623f1ae32a1SGerd Hoffmann if (result == USB_RET_NAK) { 1624f1ae32a1SGerd Hoffmann return; 1625f1ae32a1SGerd Hoffmann } 1626f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, result); 16273d139684SGerd Hoffmann } 1628f1ae32a1SGerd Hoffmann assert(!xfer->running_retry); 1629f1ae32a1SGerd Hoffmann epctx->retry = NULL; 1630f1ae32a1SGerd Hoffmann } 1631f1ae32a1SGerd Hoffmann 1632f1ae32a1SGerd Hoffmann if (epctx->state == EP_HALTED) { 1633f1ae32a1SGerd Hoffmann DPRINTF("xhci: ep halted, not running schedule\n"); 1634f1ae32a1SGerd Hoffmann return; 1635f1ae32a1SGerd Hoffmann } 1636f1ae32a1SGerd Hoffmann 1637f1ae32a1SGerd Hoffmann xhci_set_ep_state(xhci, epctx, EP_RUNNING); 1638f1ae32a1SGerd Hoffmann 1639f1ae32a1SGerd Hoffmann while (1) { 1640f1ae32a1SGerd Hoffmann XHCITransfer *xfer = &epctx->transfers[epctx->next_xfer]; 1641331e9406SGerd Hoffmann if (xfer->running_async || xfer->running_retry) { 1642f1ae32a1SGerd Hoffmann break; 1643f1ae32a1SGerd Hoffmann } 1644f1ae32a1SGerd Hoffmann length = xhci_ring_chain_length(xhci, &epctx->ring); 1645f1ae32a1SGerd Hoffmann if (length < 0) { 1646f1ae32a1SGerd Hoffmann break; 1647f1ae32a1SGerd Hoffmann } else if (length == 0) { 1648f1ae32a1SGerd Hoffmann break; 1649f1ae32a1SGerd Hoffmann } 1650f1ae32a1SGerd Hoffmann if (xfer->trbs && xfer->trb_alloced < length) { 1651f1ae32a1SGerd Hoffmann xfer->trb_count = 0; 1652f1ae32a1SGerd Hoffmann xfer->trb_alloced = 0; 1653f1ae32a1SGerd Hoffmann g_free(xfer->trbs); 1654f1ae32a1SGerd Hoffmann xfer->trbs = NULL; 1655f1ae32a1SGerd Hoffmann } 1656f1ae32a1SGerd Hoffmann if (!xfer->trbs) { 1657f1ae32a1SGerd Hoffmann xfer->trbs = g_malloc(sizeof(XHCITRB) * length); 1658f1ae32a1SGerd Hoffmann xfer->trb_alloced = length; 1659f1ae32a1SGerd Hoffmann } 1660f1ae32a1SGerd Hoffmann xfer->trb_count = length; 1661f1ae32a1SGerd Hoffmann 1662f1ae32a1SGerd Hoffmann for (i = 0; i < length; i++) { 1663f1ae32a1SGerd Hoffmann assert(xhci_ring_fetch(xhci, &epctx->ring, &xfer->trbs[i], NULL)); 1664f1ae32a1SGerd Hoffmann } 1665f1ae32a1SGerd Hoffmann xfer->xhci = xhci; 1666f1ae32a1SGerd Hoffmann xfer->epid = epid; 1667f1ae32a1SGerd Hoffmann xfer->slotid = slotid; 1668f1ae32a1SGerd Hoffmann 1669f1ae32a1SGerd Hoffmann if (epid == 1) { 1670f1ae32a1SGerd Hoffmann if (xhci_fire_ctl_transfer(xhci, xfer) >= 0) { 1671f1ae32a1SGerd Hoffmann epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; 1672f1ae32a1SGerd Hoffmann } else { 1673f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: error firing CTL transfer\n"); 1674f1ae32a1SGerd Hoffmann } 1675f1ae32a1SGerd Hoffmann } else { 1676f1ae32a1SGerd Hoffmann if (xhci_fire_transfer(xhci, xfer, epctx) >= 0) { 1677f1ae32a1SGerd Hoffmann epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; 1678f1ae32a1SGerd Hoffmann } else { 16793d139684SGerd Hoffmann if (!xfer->iso_xfer) { 1680f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: error firing data transfer\n"); 1681f1ae32a1SGerd Hoffmann } 1682f1ae32a1SGerd Hoffmann } 16833d139684SGerd Hoffmann } 1684f1ae32a1SGerd Hoffmann 1685f1ae32a1SGerd Hoffmann if (epctx->state == EP_HALTED) { 1686f1ae32a1SGerd Hoffmann break; 1687f1ae32a1SGerd Hoffmann } 1688f1ae32a1SGerd Hoffmann if (xfer->running_retry) { 1689f1ae32a1SGerd Hoffmann DPRINTF("xhci: xfer nacked, stopping schedule\n"); 1690f1ae32a1SGerd Hoffmann epctx->retry = xfer; 1691f1ae32a1SGerd Hoffmann break; 1692f1ae32a1SGerd Hoffmann } 1693f1ae32a1SGerd Hoffmann } 1694f1ae32a1SGerd Hoffmann } 1695f1ae32a1SGerd Hoffmann 1696f1ae32a1SGerd Hoffmann static TRBCCode xhci_enable_slot(XHCIState *xhci, unsigned int slotid) 1697f1ae32a1SGerd Hoffmann { 1698348f1037SGerd Hoffmann trace_usb_xhci_slot_enable(slotid); 1699f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1700f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].enabled = 1; 1701f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].port = 0; 1702f1ae32a1SGerd Hoffmann memset(xhci->slots[slotid-1].eps, 0, sizeof(XHCIEPContext*)*31); 1703f1ae32a1SGerd Hoffmann 1704f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1705f1ae32a1SGerd Hoffmann } 1706f1ae32a1SGerd Hoffmann 1707f1ae32a1SGerd Hoffmann static TRBCCode xhci_disable_slot(XHCIState *xhci, unsigned int slotid) 1708f1ae32a1SGerd Hoffmann { 1709f1ae32a1SGerd Hoffmann int i; 1710f1ae32a1SGerd Hoffmann 1711348f1037SGerd Hoffmann trace_usb_xhci_slot_disable(slotid); 1712f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1713f1ae32a1SGerd Hoffmann 1714f1ae32a1SGerd Hoffmann for (i = 1; i <= 31; i++) { 1715f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 1716f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1717f1ae32a1SGerd Hoffmann } 1718f1ae32a1SGerd Hoffmann } 1719f1ae32a1SGerd Hoffmann 1720f1ae32a1SGerd Hoffmann xhci->slots[slotid-1].enabled = 0; 1721f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1722f1ae32a1SGerd Hoffmann } 1723f1ae32a1SGerd Hoffmann 1724f1ae32a1SGerd Hoffmann static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid, 1725f1ae32a1SGerd Hoffmann uint64_t pictx, bool bsr) 1726f1ae32a1SGerd Hoffmann { 1727f1ae32a1SGerd Hoffmann XHCISlot *slot; 1728f1ae32a1SGerd Hoffmann USBDevice *dev; 172959a70ccdSDavid Gibson dma_addr_t ictx, octx, dcbaap; 1730f1ae32a1SGerd Hoffmann uint64_t poctx; 1731f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1732f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1733f1ae32a1SGerd Hoffmann uint32_t ep0_ctx[5]; 1734f1ae32a1SGerd Hoffmann unsigned int port; 1735f1ae32a1SGerd Hoffmann int i; 1736f1ae32a1SGerd Hoffmann TRBCCode res; 1737f1ae32a1SGerd Hoffmann 1738348f1037SGerd Hoffmann trace_usb_xhci_slot_address(slotid); 1739f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1740f1ae32a1SGerd Hoffmann 1741f1ae32a1SGerd Hoffmann dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); 174259a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, dcbaap + 8*slotid, &poctx, sizeof(poctx)); 1743f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1744f1ae32a1SGerd Hoffmann octx = xhci_mask64(le64_to_cpu(poctx)); 1745f1ae32a1SGerd Hoffmann 174659a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 174759a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1748f1ae32a1SGerd Hoffmann 174959a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1750f1ae32a1SGerd Hoffmann 1751f1ae32a1SGerd Hoffmann if (ictl_ctx[0] != 0x0 || ictl_ctx[1] != 0x3) { 1752f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1753f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1754f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1755f1ae32a1SGerd Hoffmann } 1756f1ae32a1SGerd Hoffmann 175759a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, slot_ctx, sizeof(slot_ctx)); 175859a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+64, ep0_ctx, sizeof(ep0_ctx)); 1759f1ae32a1SGerd Hoffmann 1760f1ae32a1SGerd Hoffmann DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", 1761f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1762f1ae32a1SGerd Hoffmann 1763f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", 1764f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 1765f1ae32a1SGerd Hoffmann 1766f1ae32a1SGerd Hoffmann port = (slot_ctx[1]>>16) & 0xFF; 1767*0846e635SGerd Hoffmann dev = xhci->ports[port-1].uport->dev; 1768f1ae32a1SGerd Hoffmann 1769*0846e635SGerd Hoffmann if (port < 1 || port > xhci->numports) { 1770f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad port %d\n", port); 1771f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1772f1ae32a1SGerd Hoffmann } else if (!dev) { 1773f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: port %d not connected\n", port); 1774f1ae32a1SGerd Hoffmann return CC_USB_TRANSACTION_ERROR; 1775f1ae32a1SGerd Hoffmann } 1776f1ae32a1SGerd Hoffmann 1777f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 1778f1ae32a1SGerd Hoffmann if (xhci->slots[i].port == port) { 1779f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: port %d already assigned to slot %d\n", 1780f1ae32a1SGerd Hoffmann port, i+1); 1781f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1782f1ae32a1SGerd Hoffmann } 1783f1ae32a1SGerd Hoffmann } 1784f1ae32a1SGerd Hoffmann 1785f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 1786f1ae32a1SGerd Hoffmann slot->port = port; 1787f1ae32a1SGerd Hoffmann slot->ctx = octx; 1788f1ae32a1SGerd Hoffmann 1789f1ae32a1SGerd Hoffmann if (bsr) { 1790f1ae32a1SGerd Hoffmann slot_ctx[3] = SLOT_DEFAULT << SLOT_STATE_SHIFT; 1791f1ae32a1SGerd Hoffmann } else { 1792f1ae32a1SGerd Hoffmann slot->devaddr = xhci->devaddr++; 1793f1ae32a1SGerd Hoffmann slot_ctx[3] = (SLOT_ADDRESSED << SLOT_STATE_SHIFT) | slot->devaddr; 1794f1ae32a1SGerd Hoffmann DPRINTF("xhci: device address is %d\n", slot->devaddr); 1795f1ae32a1SGerd Hoffmann usb_device_handle_control(dev, NULL, 1796f1ae32a1SGerd Hoffmann DeviceOutRequest | USB_REQ_SET_ADDRESS, 1797f1ae32a1SGerd Hoffmann slot->devaddr, 0, 0, NULL); 1798f1ae32a1SGerd Hoffmann } 1799f1ae32a1SGerd Hoffmann 1800f1ae32a1SGerd Hoffmann res = xhci_enable_ep(xhci, slotid, 1, octx+32, ep0_ctx); 1801f1ae32a1SGerd Hoffmann 1802f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1803f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1804f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", 1805f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 1806f1ae32a1SGerd Hoffmann 180759a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 180859a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 1809f1ae32a1SGerd Hoffmann 1810f1ae32a1SGerd Hoffmann return res; 1811f1ae32a1SGerd Hoffmann } 1812f1ae32a1SGerd Hoffmann 1813f1ae32a1SGerd Hoffmann 1814f1ae32a1SGerd Hoffmann static TRBCCode xhci_configure_slot(XHCIState *xhci, unsigned int slotid, 1815f1ae32a1SGerd Hoffmann uint64_t pictx, bool dc) 1816f1ae32a1SGerd Hoffmann { 181759a70ccdSDavid Gibson dma_addr_t ictx, octx; 1818f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1819f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1820f1ae32a1SGerd Hoffmann uint32_t islot_ctx[4]; 1821f1ae32a1SGerd Hoffmann uint32_t ep_ctx[5]; 1822f1ae32a1SGerd Hoffmann int i; 1823f1ae32a1SGerd Hoffmann TRBCCode res; 1824f1ae32a1SGerd Hoffmann 1825348f1037SGerd Hoffmann trace_usb_xhci_slot_configure(slotid); 1826f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1827f1ae32a1SGerd Hoffmann 1828f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1829f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 1830f1ae32a1SGerd Hoffmann 183159a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 183259a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1833f1ae32a1SGerd Hoffmann 1834f1ae32a1SGerd Hoffmann if (dc) { 1835f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 1836f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 1837f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1838f1ae32a1SGerd Hoffmann } 1839f1ae32a1SGerd Hoffmann } 1840f1ae32a1SGerd Hoffmann 184159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1842f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 1843f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_ADDRESSED << SLOT_STATE_SHIFT; 1844f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1845f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 184659a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1847f1ae32a1SGerd Hoffmann 1848f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1849f1ae32a1SGerd Hoffmann } 1850f1ae32a1SGerd Hoffmann 185159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1852f1ae32a1SGerd Hoffmann 1853f1ae32a1SGerd Hoffmann if ((ictl_ctx[0] & 0x3) != 0x0 || (ictl_ctx[1] & 0x3) != 0x1) { 1854f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1855f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1856f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1857f1ae32a1SGerd Hoffmann } 1858f1ae32a1SGerd Hoffmann 185959a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, islot_ctx, sizeof(islot_ctx)); 186059a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1861f1ae32a1SGerd Hoffmann 1862f1ae32a1SGerd Hoffmann if (SLOT_STATE(slot_ctx[3]) < SLOT_ADDRESSED) { 1863f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid slot state %08x\n", slot_ctx[3]); 1864f1ae32a1SGerd Hoffmann return CC_CONTEXT_STATE_ERROR; 1865f1ae32a1SGerd Hoffmann } 1866f1ae32a1SGerd Hoffmann 1867f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 1868f1ae32a1SGerd Hoffmann if (ictl_ctx[0] & (1<<i)) { 1869f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1870f1ae32a1SGerd Hoffmann } 1871f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & (1<<i)) { 187259a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32+(32*i), ep_ctx, 187359a70ccdSDavid Gibson sizeof(ep_ctx)); 1874f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep%d.%d context: %08x %08x %08x %08x %08x\n", 1875f1ae32a1SGerd Hoffmann i/2, i%2, ep_ctx[0], ep_ctx[1], ep_ctx[2], 1876f1ae32a1SGerd Hoffmann ep_ctx[3], ep_ctx[4]); 1877f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1878f1ae32a1SGerd Hoffmann res = xhci_enable_ep(xhci, slotid, i, octx+(32*i), ep_ctx); 1879f1ae32a1SGerd Hoffmann if (res != CC_SUCCESS) { 1880f1ae32a1SGerd Hoffmann return res; 1881f1ae32a1SGerd Hoffmann } 1882f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep%d.%d context: %08x %08x %08x %08x %08x\n", 1883f1ae32a1SGerd Hoffmann i/2, i%2, ep_ctx[0], ep_ctx[1], ep_ctx[2], 1884f1ae32a1SGerd Hoffmann ep_ctx[3], ep_ctx[4]); 188559a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+(32*i), ep_ctx, sizeof(ep_ctx)); 1886f1ae32a1SGerd Hoffmann } 1887f1ae32a1SGerd Hoffmann } 1888f1ae32a1SGerd Hoffmann 1889f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 1890f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_CONFIGURED << SLOT_STATE_SHIFT; 1891f1ae32a1SGerd Hoffmann slot_ctx[0] &= ~(SLOT_CONTEXT_ENTRIES_MASK << SLOT_CONTEXT_ENTRIES_SHIFT); 1892f1ae32a1SGerd Hoffmann slot_ctx[0] |= islot_ctx[0] & (SLOT_CONTEXT_ENTRIES_MASK << 1893f1ae32a1SGerd Hoffmann SLOT_CONTEXT_ENTRIES_SHIFT); 1894f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1895f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1896f1ae32a1SGerd Hoffmann 189759a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1898f1ae32a1SGerd Hoffmann 1899f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1900f1ae32a1SGerd Hoffmann } 1901f1ae32a1SGerd Hoffmann 1902f1ae32a1SGerd Hoffmann 1903f1ae32a1SGerd Hoffmann static TRBCCode xhci_evaluate_slot(XHCIState *xhci, unsigned int slotid, 1904f1ae32a1SGerd Hoffmann uint64_t pictx) 1905f1ae32a1SGerd Hoffmann { 190659a70ccdSDavid Gibson dma_addr_t ictx, octx; 1907f1ae32a1SGerd Hoffmann uint32_t ictl_ctx[2]; 1908f1ae32a1SGerd Hoffmann uint32_t iep0_ctx[5]; 1909f1ae32a1SGerd Hoffmann uint32_t ep0_ctx[5]; 1910f1ae32a1SGerd Hoffmann uint32_t islot_ctx[4]; 1911f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 1912f1ae32a1SGerd Hoffmann 1913348f1037SGerd Hoffmann trace_usb_xhci_slot_evaluate(slotid); 1914f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1915f1ae32a1SGerd Hoffmann 1916f1ae32a1SGerd Hoffmann ictx = xhci_mask64(pictx); 1917f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 1918f1ae32a1SGerd Hoffmann 191959a70ccdSDavid Gibson DPRINTF("xhci: input context at "DMA_ADDR_FMT"\n", ictx); 192059a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1921f1ae32a1SGerd Hoffmann 192259a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx, ictl_ctx, sizeof(ictl_ctx)); 1923f1ae32a1SGerd Hoffmann 1924f1ae32a1SGerd Hoffmann if (ictl_ctx[0] != 0x0 || ictl_ctx[1] & ~0x3) { 1925f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: invalid input context control %08x %08x\n", 1926f1ae32a1SGerd Hoffmann ictl_ctx[0], ictl_ctx[1]); 1927f1ae32a1SGerd Hoffmann return CC_TRB_ERROR; 1928f1ae32a1SGerd Hoffmann } 1929f1ae32a1SGerd Hoffmann 1930f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & 0x1) { 193159a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+32, islot_ctx, sizeof(islot_ctx)); 1932f1ae32a1SGerd Hoffmann 1933f1ae32a1SGerd Hoffmann DPRINTF("xhci: input slot context: %08x %08x %08x %08x\n", 1934f1ae32a1SGerd Hoffmann islot_ctx[0], islot_ctx[1], islot_ctx[2], islot_ctx[3]); 1935f1ae32a1SGerd Hoffmann 193659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1937f1ae32a1SGerd Hoffmann 1938f1ae32a1SGerd Hoffmann slot_ctx[1] &= ~0xFFFF; /* max exit latency */ 1939f1ae32a1SGerd Hoffmann slot_ctx[1] |= islot_ctx[1] & 0xFFFF; 1940f1ae32a1SGerd Hoffmann slot_ctx[2] &= ~0xFF00000; /* interrupter target */ 1941f1ae32a1SGerd Hoffmann slot_ctx[2] |= islot_ctx[2] & 0xFF000000; 1942f1ae32a1SGerd Hoffmann 1943f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1944f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 1945f1ae32a1SGerd Hoffmann 194659a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1947f1ae32a1SGerd Hoffmann } 1948f1ae32a1SGerd Hoffmann 1949f1ae32a1SGerd Hoffmann if (ictl_ctx[1] & 0x2) { 195059a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, ictx+64, iep0_ctx, sizeof(iep0_ctx)); 1951f1ae32a1SGerd Hoffmann 1952f1ae32a1SGerd Hoffmann DPRINTF("xhci: input ep0 context: %08x %08x %08x %08x %08x\n", 1953f1ae32a1SGerd Hoffmann iep0_ctx[0], iep0_ctx[1], iep0_ctx[2], 1954f1ae32a1SGerd Hoffmann iep0_ctx[3], iep0_ctx[4]); 1955f1ae32a1SGerd Hoffmann 195659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 1957f1ae32a1SGerd Hoffmann 1958f1ae32a1SGerd Hoffmann ep0_ctx[1] &= ~0xFFFF0000; /* max packet size*/ 1959f1ae32a1SGerd Hoffmann ep0_ctx[1] |= iep0_ctx[1] & 0xFFFF0000; 1960f1ae32a1SGerd Hoffmann 1961f1ae32a1SGerd Hoffmann DPRINTF("xhci: output ep0 context: %08x %08x %08x %08x %08x\n", 1962f1ae32a1SGerd Hoffmann ep0_ctx[0], ep0_ctx[1], ep0_ctx[2], ep0_ctx[3], ep0_ctx[4]); 1963f1ae32a1SGerd Hoffmann 196459a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx+32, ep0_ctx, sizeof(ep0_ctx)); 1965f1ae32a1SGerd Hoffmann } 1966f1ae32a1SGerd Hoffmann 1967f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1968f1ae32a1SGerd Hoffmann } 1969f1ae32a1SGerd Hoffmann 1970f1ae32a1SGerd Hoffmann static TRBCCode xhci_reset_slot(XHCIState *xhci, unsigned int slotid) 1971f1ae32a1SGerd Hoffmann { 1972f1ae32a1SGerd Hoffmann uint32_t slot_ctx[4]; 197359a70ccdSDavid Gibson dma_addr_t octx; 1974f1ae32a1SGerd Hoffmann int i; 1975f1ae32a1SGerd Hoffmann 1976348f1037SGerd Hoffmann trace_usb_xhci_slot_reset(slotid); 1977f1ae32a1SGerd Hoffmann assert(slotid >= 1 && slotid <= MAXSLOTS); 1978f1ae32a1SGerd Hoffmann 1979f1ae32a1SGerd Hoffmann octx = xhci->slots[slotid-1].ctx; 1980f1ae32a1SGerd Hoffmann 198159a70ccdSDavid Gibson DPRINTF("xhci: output context at "DMA_ADDR_FMT"\n", octx); 1982f1ae32a1SGerd Hoffmann 1983f1ae32a1SGerd Hoffmann for (i = 2; i <= 31; i++) { 1984f1ae32a1SGerd Hoffmann if (xhci->slots[slotid-1].eps[i-1]) { 1985f1ae32a1SGerd Hoffmann xhci_disable_ep(xhci, slotid, i); 1986f1ae32a1SGerd Hoffmann } 1987f1ae32a1SGerd Hoffmann } 1988f1ae32a1SGerd Hoffmann 198959a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1990f1ae32a1SGerd Hoffmann slot_ctx[3] &= ~(SLOT_STATE_MASK << SLOT_STATE_SHIFT); 1991f1ae32a1SGerd Hoffmann slot_ctx[3] |= SLOT_DEFAULT << SLOT_STATE_SHIFT; 1992f1ae32a1SGerd Hoffmann DPRINTF("xhci: output slot context: %08x %08x %08x %08x\n", 1993f1ae32a1SGerd Hoffmann slot_ctx[0], slot_ctx[1], slot_ctx[2], slot_ctx[3]); 199459a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, octx, slot_ctx, sizeof(slot_ctx)); 1995f1ae32a1SGerd Hoffmann 1996f1ae32a1SGerd Hoffmann return CC_SUCCESS; 1997f1ae32a1SGerd Hoffmann } 1998f1ae32a1SGerd Hoffmann 1999f1ae32a1SGerd Hoffmann static unsigned int xhci_get_slot(XHCIState *xhci, XHCIEvent *event, XHCITRB *trb) 2000f1ae32a1SGerd Hoffmann { 2001f1ae32a1SGerd Hoffmann unsigned int slotid; 2002f1ae32a1SGerd Hoffmann slotid = (trb->control >> TRB_CR_SLOTID_SHIFT) & TRB_CR_SLOTID_MASK; 2003f1ae32a1SGerd Hoffmann if (slotid < 1 || slotid > MAXSLOTS) { 2004f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad slot id %d\n", slotid); 2005f1ae32a1SGerd Hoffmann event->ccode = CC_TRB_ERROR; 2006f1ae32a1SGerd Hoffmann return 0; 2007f1ae32a1SGerd Hoffmann } else if (!xhci->slots[slotid-1].enabled) { 2008f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: slot id %d not enabled\n", slotid); 2009f1ae32a1SGerd Hoffmann event->ccode = CC_SLOT_NOT_ENABLED_ERROR; 2010f1ae32a1SGerd Hoffmann return 0; 2011f1ae32a1SGerd Hoffmann } 2012f1ae32a1SGerd Hoffmann return slotid; 2013f1ae32a1SGerd Hoffmann } 2014f1ae32a1SGerd Hoffmann 2015f1ae32a1SGerd Hoffmann static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx) 2016f1ae32a1SGerd Hoffmann { 201759a70ccdSDavid Gibson dma_addr_t ctx; 2018*0846e635SGerd Hoffmann uint8_t bw_ctx[xhci->numports+1]; 2019f1ae32a1SGerd Hoffmann 2020f1ae32a1SGerd Hoffmann DPRINTF("xhci_get_port_bandwidth()\n"); 2021f1ae32a1SGerd Hoffmann 2022f1ae32a1SGerd Hoffmann ctx = xhci_mask64(pctx); 2023f1ae32a1SGerd Hoffmann 202459a70ccdSDavid Gibson DPRINTF("xhci: bandwidth context at "DMA_ADDR_FMT"\n", ctx); 2025f1ae32a1SGerd Hoffmann 2026f1ae32a1SGerd Hoffmann /* TODO: actually implement real values here */ 2027f1ae32a1SGerd Hoffmann bw_ctx[0] = 0; 2028*0846e635SGerd Hoffmann memset(&bw_ctx[1], 80, xhci->numports); /* 80% */ 202959a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, ctx, bw_ctx, sizeof(bw_ctx)); 2030f1ae32a1SGerd Hoffmann 2031f1ae32a1SGerd Hoffmann return CC_SUCCESS; 2032f1ae32a1SGerd Hoffmann } 2033f1ae32a1SGerd Hoffmann 2034f1ae32a1SGerd Hoffmann static uint32_t rotl(uint32_t v, unsigned count) 2035f1ae32a1SGerd Hoffmann { 2036f1ae32a1SGerd Hoffmann count &= 31; 2037f1ae32a1SGerd Hoffmann return (v << count) | (v >> (32 - count)); 2038f1ae32a1SGerd Hoffmann } 2039f1ae32a1SGerd Hoffmann 2040f1ae32a1SGerd Hoffmann 2041f1ae32a1SGerd Hoffmann static uint32_t xhci_nec_challenge(uint32_t hi, uint32_t lo) 2042f1ae32a1SGerd Hoffmann { 2043f1ae32a1SGerd Hoffmann uint32_t val; 2044f1ae32a1SGerd Hoffmann val = rotl(lo - 0x49434878, 32 - ((hi>>8) & 0x1F)); 2045f1ae32a1SGerd Hoffmann val += rotl(lo + 0x49434878, hi & 0x1F); 2046f1ae32a1SGerd Hoffmann val -= rotl(hi ^ 0x49434878, (lo >> 16) & 0x1F); 2047f1ae32a1SGerd Hoffmann return ~val; 2048f1ae32a1SGerd Hoffmann } 2049f1ae32a1SGerd Hoffmann 205059a70ccdSDavid Gibson static void xhci_via_challenge(XHCIState *xhci, uint64_t addr) 2051f1ae32a1SGerd Hoffmann { 2052f1ae32a1SGerd Hoffmann uint32_t buf[8]; 2053f1ae32a1SGerd Hoffmann uint32_t obuf[8]; 205459a70ccdSDavid Gibson dma_addr_t paddr = xhci_mask64(addr); 2055f1ae32a1SGerd Hoffmann 205659a70ccdSDavid Gibson pci_dma_read(&xhci->pci_dev, paddr, &buf, 32); 2057f1ae32a1SGerd Hoffmann 2058f1ae32a1SGerd Hoffmann memcpy(obuf, buf, sizeof(obuf)); 2059f1ae32a1SGerd Hoffmann 2060f1ae32a1SGerd Hoffmann if ((buf[0] & 0xff) == 2) { 2061f1ae32a1SGerd Hoffmann obuf[0] = 0x49932000 + 0x54dc200 * buf[2] + 0x7429b578 * buf[3]; 2062f1ae32a1SGerd Hoffmann obuf[0] |= (buf[2] * buf[3]) & 0xff; 2063f1ae32a1SGerd Hoffmann obuf[1] = 0x0132bb37 + 0xe89 * buf[2] + 0xf09 * buf[3]; 2064f1ae32a1SGerd Hoffmann obuf[2] = 0x0066c2e9 + 0x2091 * buf[2] + 0x19bd * buf[3]; 2065f1ae32a1SGerd Hoffmann obuf[3] = 0xd5281342 + 0x2cc9691 * buf[2] + 0x2367662 * buf[3]; 2066f1ae32a1SGerd Hoffmann obuf[4] = 0x0123c75c + 0x1595 * buf[2] + 0x19ec * buf[3]; 2067f1ae32a1SGerd Hoffmann obuf[5] = 0x00f695de + 0x26fd * buf[2] + 0x3e9 * buf[3]; 2068f1ae32a1SGerd Hoffmann obuf[6] = obuf[2] ^ obuf[3] ^ 0x29472956; 2069f1ae32a1SGerd Hoffmann obuf[7] = obuf[2] ^ obuf[3] ^ 0x65866593; 2070f1ae32a1SGerd Hoffmann } 2071f1ae32a1SGerd Hoffmann 207259a70ccdSDavid Gibson pci_dma_write(&xhci->pci_dev, paddr, &obuf, 32); 2073f1ae32a1SGerd Hoffmann } 2074f1ae32a1SGerd Hoffmann 2075f1ae32a1SGerd Hoffmann static void xhci_process_commands(XHCIState *xhci) 2076f1ae32a1SGerd Hoffmann { 2077f1ae32a1SGerd Hoffmann XHCITRB trb; 2078f1ae32a1SGerd Hoffmann TRBType type; 2079f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_COMMAND_COMPLETE, CC_SUCCESS}; 208059a70ccdSDavid Gibson dma_addr_t addr; 2081f1ae32a1SGerd Hoffmann unsigned int i, slotid = 0; 2082f1ae32a1SGerd Hoffmann 2083f1ae32a1SGerd Hoffmann DPRINTF("xhci_process_commands()\n"); 2084f1ae32a1SGerd Hoffmann if (!xhci_running(xhci)) { 2085f1ae32a1SGerd Hoffmann DPRINTF("xhci_process_commands() called while xHC stopped or paused\n"); 2086f1ae32a1SGerd Hoffmann return; 2087f1ae32a1SGerd Hoffmann } 2088f1ae32a1SGerd Hoffmann 2089f1ae32a1SGerd Hoffmann xhci->crcr_low |= CRCR_CRR; 2090f1ae32a1SGerd Hoffmann 2091f1ae32a1SGerd Hoffmann while ((type = xhci_ring_fetch(xhci, &xhci->cmd_ring, &trb, &addr))) { 2092f1ae32a1SGerd Hoffmann event.ptr = addr; 2093f1ae32a1SGerd Hoffmann switch (type) { 2094f1ae32a1SGerd Hoffmann case CR_ENABLE_SLOT: 2095f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 2096f1ae32a1SGerd Hoffmann if (!xhci->slots[i].enabled) { 2097f1ae32a1SGerd Hoffmann break; 2098f1ae32a1SGerd Hoffmann } 2099f1ae32a1SGerd Hoffmann } 2100f1ae32a1SGerd Hoffmann if (i >= MAXSLOTS) { 2101f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: no device slots available\n"); 2102f1ae32a1SGerd Hoffmann event.ccode = CC_NO_SLOTS_ERROR; 2103f1ae32a1SGerd Hoffmann } else { 2104f1ae32a1SGerd Hoffmann slotid = i+1; 2105f1ae32a1SGerd Hoffmann event.ccode = xhci_enable_slot(xhci, slotid); 2106f1ae32a1SGerd Hoffmann } 2107f1ae32a1SGerd Hoffmann break; 2108f1ae32a1SGerd Hoffmann case CR_DISABLE_SLOT: 2109f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2110f1ae32a1SGerd Hoffmann if (slotid) { 2111f1ae32a1SGerd Hoffmann event.ccode = xhci_disable_slot(xhci, slotid); 2112f1ae32a1SGerd Hoffmann } 2113f1ae32a1SGerd Hoffmann break; 2114f1ae32a1SGerd Hoffmann case CR_ADDRESS_DEVICE: 2115f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2116f1ae32a1SGerd Hoffmann if (slotid) { 2117f1ae32a1SGerd Hoffmann event.ccode = xhci_address_slot(xhci, slotid, trb.parameter, 2118f1ae32a1SGerd Hoffmann trb.control & TRB_CR_BSR); 2119f1ae32a1SGerd Hoffmann } 2120f1ae32a1SGerd Hoffmann break; 2121f1ae32a1SGerd Hoffmann case CR_CONFIGURE_ENDPOINT: 2122f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2123f1ae32a1SGerd Hoffmann if (slotid) { 2124f1ae32a1SGerd Hoffmann event.ccode = xhci_configure_slot(xhci, slotid, trb.parameter, 2125f1ae32a1SGerd Hoffmann trb.control & TRB_CR_DC); 2126f1ae32a1SGerd Hoffmann } 2127f1ae32a1SGerd Hoffmann break; 2128f1ae32a1SGerd Hoffmann case CR_EVALUATE_CONTEXT: 2129f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2130f1ae32a1SGerd Hoffmann if (slotid) { 2131f1ae32a1SGerd Hoffmann event.ccode = xhci_evaluate_slot(xhci, slotid, trb.parameter); 2132f1ae32a1SGerd Hoffmann } 2133f1ae32a1SGerd Hoffmann break; 2134f1ae32a1SGerd Hoffmann case CR_STOP_ENDPOINT: 2135f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2136f1ae32a1SGerd Hoffmann if (slotid) { 2137f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2138f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2139f1ae32a1SGerd Hoffmann event.ccode = xhci_stop_ep(xhci, slotid, epid); 2140f1ae32a1SGerd Hoffmann } 2141f1ae32a1SGerd Hoffmann break; 2142f1ae32a1SGerd Hoffmann case CR_RESET_ENDPOINT: 2143f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2144f1ae32a1SGerd Hoffmann if (slotid) { 2145f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2146f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2147f1ae32a1SGerd Hoffmann event.ccode = xhci_reset_ep(xhci, slotid, epid); 2148f1ae32a1SGerd Hoffmann } 2149f1ae32a1SGerd Hoffmann break; 2150f1ae32a1SGerd Hoffmann case CR_SET_TR_DEQUEUE: 2151f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2152f1ae32a1SGerd Hoffmann if (slotid) { 2153f1ae32a1SGerd Hoffmann unsigned int epid = (trb.control >> TRB_CR_EPID_SHIFT) 2154f1ae32a1SGerd Hoffmann & TRB_CR_EPID_MASK; 2155f1ae32a1SGerd Hoffmann event.ccode = xhci_set_ep_dequeue(xhci, slotid, epid, 2156f1ae32a1SGerd Hoffmann trb.parameter); 2157f1ae32a1SGerd Hoffmann } 2158f1ae32a1SGerd Hoffmann break; 2159f1ae32a1SGerd Hoffmann case CR_RESET_DEVICE: 2160f1ae32a1SGerd Hoffmann slotid = xhci_get_slot(xhci, &event, &trb); 2161f1ae32a1SGerd Hoffmann if (slotid) { 2162f1ae32a1SGerd Hoffmann event.ccode = xhci_reset_slot(xhci, slotid); 2163f1ae32a1SGerd Hoffmann } 2164f1ae32a1SGerd Hoffmann break; 2165f1ae32a1SGerd Hoffmann case CR_GET_PORT_BANDWIDTH: 2166f1ae32a1SGerd Hoffmann event.ccode = xhci_get_port_bandwidth(xhci, trb.parameter); 2167f1ae32a1SGerd Hoffmann break; 2168f1ae32a1SGerd Hoffmann case CR_VENDOR_VIA_CHALLENGE_RESPONSE: 216959a70ccdSDavid Gibson xhci_via_challenge(xhci, trb.parameter); 2170f1ae32a1SGerd Hoffmann break; 2171f1ae32a1SGerd Hoffmann case CR_VENDOR_NEC_FIRMWARE_REVISION: 2172f1ae32a1SGerd Hoffmann event.type = 48; /* NEC reply */ 2173f1ae32a1SGerd Hoffmann event.length = 0x3025; 2174f1ae32a1SGerd Hoffmann break; 2175f1ae32a1SGerd Hoffmann case CR_VENDOR_NEC_CHALLENGE_RESPONSE: 2176f1ae32a1SGerd Hoffmann { 2177f1ae32a1SGerd Hoffmann uint32_t chi = trb.parameter >> 32; 2178f1ae32a1SGerd Hoffmann uint32_t clo = trb.parameter; 2179f1ae32a1SGerd Hoffmann uint32_t val = xhci_nec_challenge(chi, clo); 2180f1ae32a1SGerd Hoffmann event.length = val & 0xFFFF; 2181f1ae32a1SGerd Hoffmann event.epid = val >> 16; 2182f1ae32a1SGerd Hoffmann slotid = val >> 24; 2183f1ae32a1SGerd Hoffmann event.type = 48; /* NEC reply */ 2184f1ae32a1SGerd Hoffmann } 2185f1ae32a1SGerd Hoffmann break; 2186f1ae32a1SGerd Hoffmann default: 2187f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: unimplemented command %d\n", type); 2188f1ae32a1SGerd Hoffmann event.ccode = CC_TRB_ERROR; 2189f1ae32a1SGerd Hoffmann break; 2190f1ae32a1SGerd Hoffmann } 2191f1ae32a1SGerd Hoffmann event.slotid = slotid; 2192f1ae32a1SGerd Hoffmann xhci_event(xhci, &event); 2193f1ae32a1SGerd Hoffmann } 2194f1ae32a1SGerd Hoffmann } 2195f1ae32a1SGerd Hoffmann 2196f1ae32a1SGerd Hoffmann static void xhci_update_port(XHCIState *xhci, XHCIPort *port, int is_detach) 2197f1ae32a1SGerd Hoffmann { 2198f1ae32a1SGerd Hoffmann port->portsc = PORTSC_PP; 2199*0846e635SGerd Hoffmann if (port->uport->dev && port->uport->dev->attached && !is_detach && 2200*0846e635SGerd Hoffmann (1 << port->uport->dev->speed) & port->speedmask) { 2201f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_CCS; 2202*0846e635SGerd Hoffmann switch (port->uport->dev->speed) { 2203f1ae32a1SGerd Hoffmann case USB_SPEED_LOW: 2204f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_LOW; 2205f1ae32a1SGerd Hoffmann break; 2206f1ae32a1SGerd Hoffmann case USB_SPEED_FULL: 2207f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_FULL; 2208f1ae32a1SGerd Hoffmann break; 2209f1ae32a1SGerd Hoffmann case USB_SPEED_HIGH: 2210f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_SPEED_HIGH; 2211f1ae32a1SGerd Hoffmann break; 2212*0846e635SGerd Hoffmann case USB_SPEED_SUPER: 2213*0846e635SGerd Hoffmann port->portsc |= PORTSC_SPEED_SUPER; 2214*0846e635SGerd Hoffmann break; 2215f1ae32a1SGerd Hoffmann } 2216f1ae32a1SGerd Hoffmann } 2217f1ae32a1SGerd Hoffmann 2218f1ae32a1SGerd Hoffmann if (xhci_running(xhci)) { 2219f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_CSC; 2220*0846e635SGerd Hoffmann XHCIEvent ev = { ER_PORT_STATUS_CHANGE, CC_SUCCESS, 2221*0846e635SGerd Hoffmann port->portnr << 24}; 2222f1ae32a1SGerd Hoffmann xhci_event(xhci, &ev); 2223*0846e635SGerd Hoffmann DPRINTF("xhci: port change event for port %d\n", port->portnr); 2224f1ae32a1SGerd Hoffmann } 2225f1ae32a1SGerd Hoffmann } 2226f1ae32a1SGerd Hoffmann 222764619739SJan Kiszka static void xhci_reset(DeviceState *dev) 2228f1ae32a1SGerd Hoffmann { 222964619739SJan Kiszka XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev.qdev, dev); 2230f1ae32a1SGerd Hoffmann int i; 2231f1ae32a1SGerd Hoffmann 22322d754a10SGerd Hoffmann trace_usb_xhci_reset(); 2233f1ae32a1SGerd Hoffmann if (!(xhci->usbsts & USBSTS_HCH)) { 2234f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: reset while running!\n"); 2235f1ae32a1SGerd Hoffmann } 2236f1ae32a1SGerd Hoffmann 2237f1ae32a1SGerd Hoffmann xhci->usbcmd = 0; 2238f1ae32a1SGerd Hoffmann xhci->usbsts = USBSTS_HCH; 2239f1ae32a1SGerd Hoffmann xhci->dnctrl = 0; 2240f1ae32a1SGerd Hoffmann xhci->crcr_low = 0; 2241f1ae32a1SGerd Hoffmann xhci->crcr_high = 0; 2242f1ae32a1SGerd Hoffmann xhci->dcbaap_low = 0; 2243f1ae32a1SGerd Hoffmann xhci->dcbaap_high = 0; 2244f1ae32a1SGerd Hoffmann xhci->config = 0; 2245f1ae32a1SGerd Hoffmann xhci->devaddr = 2; 2246f1ae32a1SGerd Hoffmann 2247f1ae32a1SGerd Hoffmann for (i = 0; i < MAXSLOTS; i++) { 2248f1ae32a1SGerd Hoffmann xhci_disable_slot(xhci, i+1); 2249f1ae32a1SGerd Hoffmann } 2250f1ae32a1SGerd Hoffmann 2251*0846e635SGerd Hoffmann for (i = 0; i < xhci->numports; i++) { 2252f1ae32a1SGerd Hoffmann xhci_update_port(xhci, xhci->ports + i, 0); 2253f1ae32a1SGerd Hoffmann } 2254f1ae32a1SGerd Hoffmann 2255f1ae32a1SGerd Hoffmann xhci->iman = 0; 2256f1ae32a1SGerd Hoffmann xhci->imod = 0; 2257f1ae32a1SGerd Hoffmann xhci->erstsz = 0; 2258f1ae32a1SGerd Hoffmann xhci->erstba_low = 0; 2259f1ae32a1SGerd Hoffmann xhci->erstba_high = 0; 2260f1ae32a1SGerd Hoffmann xhci->erdp_low = 0; 2261f1ae32a1SGerd Hoffmann xhci->erdp_high = 0; 2262f1ae32a1SGerd Hoffmann 2263f1ae32a1SGerd Hoffmann xhci->er_ep_idx = 0; 2264f1ae32a1SGerd Hoffmann xhci->er_pcs = 1; 2265f1ae32a1SGerd Hoffmann xhci->er_full = 0; 2266f1ae32a1SGerd Hoffmann xhci->ev_buffer_put = 0; 2267f1ae32a1SGerd Hoffmann xhci->ev_buffer_get = 0; 226801546fa6SGerd Hoffmann 226901546fa6SGerd Hoffmann xhci->mfindex_start = qemu_get_clock_ns(vm_clock); 227001546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 2271f1ae32a1SGerd Hoffmann } 2272f1ae32a1SGerd Hoffmann 2273f1ae32a1SGerd Hoffmann static uint32_t xhci_cap_read(XHCIState *xhci, uint32_t reg) 2274f1ae32a1SGerd Hoffmann { 22752d754a10SGerd Hoffmann uint32_t ret; 2276f1ae32a1SGerd Hoffmann 2277f1ae32a1SGerd Hoffmann switch (reg) { 2278f1ae32a1SGerd Hoffmann case 0x00: /* HCIVERSION, CAPLENGTH */ 22792d754a10SGerd Hoffmann ret = 0x01000000 | LEN_CAP; 22802d754a10SGerd Hoffmann break; 2281f1ae32a1SGerd Hoffmann case 0x04: /* HCSPARAMS 1 */ 2282*0846e635SGerd Hoffmann ret = ((xhci->numports_2+xhci->numports_3)<<24) 2283*0846e635SGerd Hoffmann | (MAXINTRS<<8) | MAXSLOTS; 22842d754a10SGerd Hoffmann break; 2285f1ae32a1SGerd Hoffmann case 0x08: /* HCSPARAMS 2 */ 22862d754a10SGerd Hoffmann ret = 0x0000000f; 22872d754a10SGerd Hoffmann break; 2288f1ae32a1SGerd Hoffmann case 0x0c: /* HCSPARAMS 3 */ 22892d754a10SGerd Hoffmann ret = 0x00000000; 22902d754a10SGerd Hoffmann break; 2291f1ae32a1SGerd Hoffmann case 0x10: /* HCCPARAMS */ 22922d754a10SGerd Hoffmann if (sizeof(dma_addr_t) == 4) { 22932d754a10SGerd Hoffmann ret = 0x00081000; 22942d754a10SGerd Hoffmann } else { 22952d754a10SGerd Hoffmann ret = 0x00081001; 22962d754a10SGerd Hoffmann } 22972d754a10SGerd Hoffmann break; 2298f1ae32a1SGerd Hoffmann case 0x14: /* DBOFF */ 22992d754a10SGerd Hoffmann ret = OFF_DOORBELL; 23002d754a10SGerd Hoffmann break; 2301f1ae32a1SGerd Hoffmann case 0x18: /* RTSOFF */ 23022d754a10SGerd Hoffmann ret = OFF_RUNTIME; 23032d754a10SGerd Hoffmann break; 2304f1ae32a1SGerd Hoffmann 2305f1ae32a1SGerd Hoffmann /* extended capabilities */ 2306f1ae32a1SGerd Hoffmann case 0x20: /* Supported Protocol:00 */ 23072d754a10SGerd Hoffmann ret = 0x02000402; /* USB 2.0 */ 23082d754a10SGerd Hoffmann break; 2309f1ae32a1SGerd Hoffmann case 0x24: /* Supported Protocol:04 */ 23102d754a10SGerd Hoffmann ret = 0x20425455; /* "USB " */ 23112d754a10SGerd Hoffmann break; 2312f1ae32a1SGerd Hoffmann case 0x28: /* Supported Protocol:08 */ 2313*0846e635SGerd Hoffmann ret = 0x00000001 | (xhci->numports_2<<8); 23142d754a10SGerd Hoffmann break; 2315f1ae32a1SGerd Hoffmann case 0x2c: /* Supported Protocol:0c */ 23162d754a10SGerd Hoffmann ret = 0x00000000; /* reserved */ 23172d754a10SGerd Hoffmann break; 2318f1ae32a1SGerd Hoffmann case 0x30: /* Supported Protocol:00 */ 23192d754a10SGerd Hoffmann ret = 0x03000002; /* USB 3.0 */ 23202d754a10SGerd Hoffmann break; 2321f1ae32a1SGerd Hoffmann case 0x34: /* Supported Protocol:04 */ 23222d754a10SGerd Hoffmann ret = 0x20425455; /* "USB " */ 23232d754a10SGerd Hoffmann break; 2324f1ae32a1SGerd Hoffmann case 0x38: /* Supported Protocol:08 */ 2325*0846e635SGerd Hoffmann ret = 0x00000000 | (xhci->numports_2+1) | (xhci->numports_3<<8); 23262d754a10SGerd Hoffmann break; 2327f1ae32a1SGerd Hoffmann case 0x3c: /* Supported Protocol:0c */ 23282d754a10SGerd Hoffmann ret = 0x00000000; /* reserved */ 23292d754a10SGerd Hoffmann break; 2330f1ae32a1SGerd Hoffmann default: 2331f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_cap_read: reg %d unimplemented\n", reg); 23322d754a10SGerd Hoffmann ret = 0; 2333f1ae32a1SGerd Hoffmann } 23342d754a10SGerd Hoffmann 23352d754a10SGerd Hoffmann trace_usb_xhci_cap_read(reg, ret); 23362d754a10SGerd Hoffmann return ret; 2337f1ae32a1SGerd Hoffmann } 2338f1ae32a1SGerd Hoffmann 2339f1ae32a1SGerd Hoffmann static uint32_t xhci_port_read(XHCIState *xhci, uint32_t reg) 2340f1ae32a1SGerd Hoffmann { 2341f1ae32a1SGerd Hoffmann uint32_t port = reg >> 4; 23422d754a10SGerd Hoffmann uint32_t ret; 23432d754a10SGerd Hoffmann 2344*0846e635SGerd Hoffmann if (port >= xhci->numports) { 2345f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read: port %d out of bounds\n", port); 23462d754a10SGerd Hoffmann ret = 0; 23472d754a10SGerd Hoffmann goto out; 2348f1ae32a1SGerd Hoffmann } 2349f1ae32a1SGerd Hoffmann 2350f1ae32a1SGerd Hoffmann switch (reg & 0xf) { 2351f1ae32a1SGerd Hoffmann case 0x00: /* PORTSC */ 23522d754a10SGerd Hoffmann ret = xhci->ports[port].portsc; 23532d754a10SGerd Hoffmann break; 2354f1ae32a1SGerd Hoffmann case 0x04: /* PORTPMSC */ 2355f1ae32a1SGerd Hoffmann case 0x08: /* PORTLI */ 23562d754a10SGerd Hoffmann ret = 0; 23572d754a10SGerd Hoffmann break; 2358f1ae32a1SGerd Hoffmann case 0x0c: /* reserved */ 2359f1ae32a1SGerd Hoffmann default: 2360f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read (port %d): reg 0x%x unimplemented\n", 2361f1ae32a1SGerd Hoffmann port, reg); 23622d754a10SGerd Hoffmann ret = 0; 2363f1ae32a1SGerd Hoffmann } 23642d754a10SGerd Hoffmann 23652d754a10SGerd Hoffmann out: 23662d754a10SGerd Hoffmann trace_usb_xhci_port_read(port, reg & 0x0f, ret); 23672d754a10SGerd Hoffmann return ret; 2368f1ae32a1SGerd Hoffmann } 2369f1ae32a1SGerd Hoffmann 2370f1ae32a1SGerd Hoffmann static void xhci_port_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2371f1ae32a1SGerd Hoffmann { 2372f1ae32a1SGerd Hoffmann uint32_t port = reg >> 4; 2373f1ae32a1SGerd Hoffmann uint32_t portsc; 2374f1ae32a1SGerd Hoffmann 23752d754a10SGerd Hoffmann trace_usb_xhci_port_write(port, reg & 0x0f, val); 23762d754a10SGerd Hoffmann 2377*0846e635SGerd Hoffmann if (port >= xhci->numports) { 2378f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_read: port %d out of bounds\n", port); 2379f1ae32a1SGerd Hoffmann return; 2380f1ae32a1SGerd Hoffmann } 2381f1ae32a1SGerd Hoffmann 2382f1ae32a1SGerd Hoffmann switch (reg & 0xf) { 2383f1ae32a1SGerd Hoffmann case 0x00: /* PORTSC */ 2384f1ae32a1SGerd Hoffmann portsc = xhci->ports[port].portsc; 2385f1ae32a1SGerd Hoffmann /* write-1-to-clear bits*/ 2386f1ae32a1SGerd Hoffmann portsc &= ~(val & (PORTSC_CSC|PORTSC_PEC|PORTSC_WRC|PORTSC_OCC| 2387f1ae32a1SGerd Hoffmann PORTSC_PRC|PORTSC_PLC|PORTSC_CEC)); 2388f1ae32a1SGerd Hoffmann if (val & PORTSC_LWS) { 2389f1ae32a1SGerd Hoffmann /* overwrite PLS only when LWS=1 */ 2390f1ae32a1SGerd Hoffmann portsc &= ~(PORTSC_PLS_MASK << PORTSC_PLS_SHIFT); 2391f1ae32a1SGerd Hoffmann portsc |= val & (PORTSC_PLS_MASK << PORTSC_PLS_SHIFT); 2392f1ae32a1SGerd Hoffmann } 2393f1ae32a1SGerd Hoffmann /* read/write bits */ 2394f1ae32a1SGerd Hoffmann portsc &= ~(PORTSC_PP|PORTSC_WCE|PORTSC_WDE|PORTSC_WOE); 2395f1ae32a1SGerd Hoffmann portsc |= (val & (PORTSC_PP|PORTSC_WCE|PORTSC_WDE|PORTSC_WOE)); 2396f1ae32a1SGerd Hoffmann /* write-1-to-start bits */ 2397f1ae32a1SGerd Hoffmann if (val & PORTSC_PR) { 2398f1ae32a1SGerd Hoffmann DPRINTF("xhci: port %d reset\n", port); 2399*0846e635SGerd Hoffmann usb_device_reset(xhci->ports[port].uport->dev); 2400f1ae32a1SGerd Hoffmann portsc |= PORTSC_PRC | PORTSC_PED; 2401f1ae32a1SGerd Hoffmann } 2402f1ae32a1SGerd Hoffmann xhci->ports[port].portsc = portsc; 2403f1ae32a1SGerd Hoffmann break; 2404f1ae32a1SGerd Hoffmann case 0x04: /* PORTPMSC */ 2405f1ae32a1SGerd Hoffmann case 0x08: /* PORTLI */ 2406f1ae32a1SGerd Hoffmann default: 2407f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_port_write (port %d): reg 0x%x unimplemented\n", 2408f1ae32a1SGerd Hoffmann port, reg); 2409f1ae32a1SGerd Hoffmann } 2410f1ae32a1SGerd Hoffmann } 2411f1ae32a1SGerd Hoffmann 2412f1ae32a1SGerd Hoffmann static uint32_t xhci_oper_read(XHCIState *xhci, uint32_t reg) 2413f1ae32a1SGerd Hoffmann { 24142d754a10SGerd Hoffmann uint32_t ret; 2415f1ae32a1SGerd Hoffmann 2416f1ae32a1SGerd Hoffmann if (reg >= 0x400) { 2417f1ae32a1SGerd Hoffmann return xhci_port_read(xhci, reg - 0x400); 2418f1ae32a1SGerd Hoffmann } 2419f1ae32a1SGerd Hoffmann 2420f1ae32a1SGerd Hoffmann switch (reg) { 2421f1ae32a1SGerd Hoffmann case 0x00: /* USBCMD */ 24222d754a10SGerd Hoffmann ret = xhci->usbcmd; 24232d754a10SGerd Hoffmann break; 2424f1ae32a1SGerd Hoffmann case 0x04: /* USBSTS */ 24252d754a10SGerd Hoffmann ret = xhci->usbsts; 24262d754a10SGerd Hoffmann break; 2427f1ae32a1SGerd Hoffmann case 0x08: /* PAGESIZE */ 24282d754a10SGerd Hoffmann ret = 1; /* 4KiB */ 24292d754a10SGerd Hoffmann break; 2430f1ae32a1SGerd Hoffmann case 0x14: /* DNCTRL */ 24312d754a10SGerd Hoffmann ret = xhci->dnctrl; 24322d754a10SGerd Hoffmann break; 2433f1ae32a1SGerd Hoffmann case 0x18: /* CRCR low */ 24342d754a10SGerd Hoffmann ret = xhci->crcr_low & ~0xe; 24352d754a10SGerd Hoffmann break; 2436f1ae32a1SGerd Hoffmann case 0x1c: /* CRCR high */ 24372d754a10SGerd Hoffmann ret = xhci->crcr_high; 24382d754a10SGerd Hoffmann break; 2439f1ae32a1SGerd Hoffmann case 0x30: /* DCBAAP low */ 24402d754a10SGerd Hoffmann ret = xhci->dcbaap_low; 24412d754a10SGerd Hoffmann break; 2442f1ae32a1SGerd Hoffmann case 0x34: /* DCBAAP high */ 24432d754a10SGerd Hoffmann ret = xhci->dcbaap_high; 24442d754a10SGerd Hoffmann break; 2445f1ae32a1SGerd Hoffmann case 0x38: /* CONFIG */ 24462d754a10SGerd Hoffmann ret = xhci->config; 24472d754a10SGerd Hoffmann break; 2448f1ae32a1SGerd Hoffmann default: 2449f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_read: reg 0x%x unimplemented\n", reg); 24502d754a10SGerd Hoffmann ret = 0; 2451f1ae32a1SGerd Hoffmann } 24522d754a10SGerd Hoffmann 24532d754a10SGerd Hoffmann trace_usb_xhci_oper_read(reg, ret); 24542d754a10SGerd Hoffmann return ret; 2455f1ae32a1SGerd Hoffmann } 2456f1ae32a1SGerd Hoffmann 2457f1ae32a1SGerd Hoffmann static void xhci_oper_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2458f1ae32a1SGerd Hoffmann { 2459f1ae32a1SGerd Hoffmann if (reg >= 0x400) { 2460f1ae32a1SGerd Hoffmann xhci_port_write(xhci, reg - 0x400, val); 2461f1ae32a1SGerd Hoffmann return; 2462f1ae32a1SGerd Hoffmann } 2463f1ae32a1SGerd Hoffmann 24642d754a10SGerd Hoffmann trace_usb_xhci_oper_write(reg, val); 24652d754a10SGerd Hoffmann 2466f1ae32a1SGerd Hoffmann switch (reg) { 2467f1ae32a1SGerd Hoffmann case 0x00: /* USBCMD */ 2468f1ae32a1SGerd Hoffmann if ((val & USBCMD_RS) && !(xhci->usbcmd & USBCMD_RS)) { 2469f1ae32a1SGerd Hoffmann xhci_run(xhci); 2470f1ae32a1SGerd Hoffmann } else if (!(val & USBCMD_RS) && (xhci->usbcmd & USBCMD_RS)) { 2471f1ae32a1SGerd Hoffmann xhci_stop(xhci); 2472f1ae32a1SGerd Hoffmann } 2473f1ae32a1SGerd Hoffmann xhci->usbcmd = val & 0xc0f; 247401546fa6SGerd Hoffmann xhci_mfwrap_update(xhci); 2475f1ae32a1SGerd Hoffmann if (val & USBCMD_HCRST) { 247664619739SJan Kiszka xhci_reset(&xhci->pci_dev.qdev); 2477f1ae32a1SGerd Hoffmann } 2478f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 2479f1ae32a1SGerd Hoffmann break; 2480f1ae32a1SGerd Hoffmann 2481f1ae32a1SGerd Hoffmann case 0x04: /* USBSTS */ 2482f1ae32a1SGerd Hoffmann /* these bits are write-1-to-clear */ 2483f1ae32a1SGerd Hoffmann xhci->usbsts &= ~(val & (USBSTS_HSE|USBSTS_EINT|USBSTS_PCD|USBSTS_SRE)); 2484f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 2485f1ae32a1SGerd Hoffmann break; 2486f1ae32a1SGerd Hoffmann 2487f1ae32a1SGerd Hoffmann case 0x14: /* DNCTRL */ 2488f1ae32a1SGerd Hoffmann xhci->dnctrl = val & 0xffff; 2489f1ae32a1SGerd Hoffmann break; 2490f1ae32a1SGerd Hoffmann case 0x18: /* CRCR low */ 2491f1ae32a1SGerd Hoffmann xhci->crcr_low = (val & 0xffffffcf) | (xhci->crcr_low & CRCR_CRR); 2492f1ae32a1SGerd Hoffmann break; 2493f1ae32a1SGerd Hoffmann case 0x1c: /* CRCR high */ 2494f1ae32a1SGerd Hoffmann xhci->crcr_high = val; 2495f1ae32a1SGerd Hoffmann if (xhci->crcr_low & (CRCR_CA|CRCR_CS) && (xhci->crcr_low & CRCR_CRR)) { 2496f1ae32a1SGerd Hoffmann XHCIEvent event = {ER_COMMAND_COMPLETE, CC_COMMAND_RING_STOPPED}; 2497f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~CRCR_CRR; 2498f1ae32a1SGerd Hoffmann xhci_event(xhci, &event); 2499f1ae32a1SGerd Hoffmann DPRINTF("xhci: command ring stopped (CRCR=%08x)\n", xhci->crcr_low); 2500f1ae32a1SGerd Hoffmann } else { 250159a70ccdSDavid Gibson dma_addr_t base = xhci_addr64(xhci->crcr_low & ~0x3f, val); 2502f1ae32a1SGerd Hoffmann xhci_ring_init(xhci, &xhci->cmd_ring, base); 2503f1ae32a1SGerd Hoffmann } 2504f1ae32a1SGerd Hoffmann xhci->crcr_low &= ~(CRCR_CA | CRCR_CS); 2505f1ae32a1SGerd Hoffmann break; 2506f1ae32a1SGerd Hoffmann case 0x30: /* DCBAAP low */ 2507f1ae32a1SGerd Hoffmann xhci->dcbaap_low = val & 0xffffffc0; 2508f1ae32a1SGerd Hoffmann break; 2509f1ae32a1SGerd Hoffmann case 0x34: /* DCBAAP high */ 2510f1ae32a1SGerd Hoffmann xhci->dcbaap_high = val; 2511f1ae32a1SGerd Hoffmann break; 2512f1ae32a1SGerd Hoffmann case 0x38: /* CONFIG */ 2513f1ae32a1SGerd Hoffmann xhci->config = val & 0xff; 2514f1ae32a1SGerd Hoffmann break; 2515f1ae32a1SGerd Hoffmann default: 2516f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_write: reg 0x%x unimplemented\n", reg); 2517f1ae32a1SGerd Hoffmann } 2518f1ae32a1SGerd Hoffmann } 2519f1ae32a1SGerd Hoffmann 2520f1ae32a1SGerd Hoffmann static uint32_t xhci_runtime_read(XHCIState *xhci, uint32_t reg) 2521f1ae32a1SGerd Hoffmann { 25222d754a10SGerd Hoffmann uint32_t ret; 2523f1ae32a1SGerd Hoffmann 2524f1ae32a1SGerd Hoffmann switch (reg) { 2525f1ae32a1SGerd Hoffmann case 0x00: /* MFINDEX */ 252601546fa6SGerd Hoffmann ret = xhci_mfindex_get(xhci) & 0x3fff; 25272d754a10SGerd Hoffmann break; 2528f1ae32a1SGerd Hoffmann case 0x20: /* IMAN */ 25292d754a10SGerd Hoffmann ret = xhci->iman; 25302d754a10SGerd Hoffmann break; 2531f1ae32a1SGerd Hoffmann case 0x24: /* IMOD */ 25322d754a10SGerd Hoffmann ret = xhci->imod; 25332d754a10SGerd Hoffmann break; 2534f1ae32a1SGerd Hoffmann case 0x28: /* ERSTSZ */ 25352d754a10SGerd Hoffmann ret = xhci->erstsz; 25362d754a10SGerd Hoffmann break; 2537f1ae32a1SGerd Hoffmann case 0x30: /* ERSTBA low */ 25382d754a10SGerd Hoffmann ret = xhci->erstba_low; 25392d754a10SGerd Hoffmann break; 2540f1ae32a1SGerd Hoffmann case 0x34: /* ERSTBA high */ 25412d754a10SGerd Hoffmann ret = xhci->erstba_high; 25422d754a10SGerd Hoffmann break; 2543f1ae32a1SGerd Hoffmann case 0x38: /* ERDP low */ 25442d754a10SGerd Hoffmann ret = xhci->erdp_low; 25452d754a10SGerd Hoffmann break; 2546f1ae32a1SGerd Hoffmann case 0x3c: /* ERDP high */ 25472d754a10SGerd Hoffmann ret = xhci->erdp_high; 25482d754a10SGerd Hoffmann break; 2549f1ae32a1SGerd Hoffmann default: 2550f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_runtime_read: reg 0x%x unimplemented\n", reg); 25512d754a10SGerd Hoffmann ret = 0; 2552f1ae32a1SGerd Hoffmann } 25532d754a10SGerd Hoffmann 25542d754a10SGerd Hoffmann trace_usb_xhci_runtime_read(reg, ret); 25552d754a10SGerd Hoffmann return ret; 2556f1ae32a1SGerd Hoffmann } 2557f1ae32a1SGerd Hoffmann 2558f1ae32a1SGerd Hoffmann static void xhci_runtime_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2559f1ae32a1SGerd Hoffmann { 25608e9f18b6SGerd Hoffmann trace_usb_xhci_runtime_write(reg, val); 2561f1ae32a1SGerd Hoffmann 2562f1ae32a1SGerd Hoffmann switch (reg) { 2563f1ae32a1SGerd Hoffmann case 0x20: /* IMAN */ 2564f1ae32a1SGerd Hoffmann if (val & IMAN_IP) { 2565f1ae32a1SGerd Hoffmann xhci->iman &= ~IMAN_IP; 2566f1ae32a1SGerd Hoffmann } 2567f1ae32a1SGerd Hoffmann xhci->iman &= ~IMAN_IE; 2568f1ae32a1SGerd Hoffmann xhci->iman |= val & IMAN_IE; 2569f1ae32a1SGerd Hoffmann xhci_irq_update(xhci); 2570f1ae32a1SGerd Hoffmann break; 2571f1ae32a1SGerd Hoffmann case 0x24: /* IMOD */ 2572f1ae32a1SGerd Hoffmann xhci->imod = val; 2573f1ae32a1SGerd Hoffmann break; 2574f1ae32a1SGerd Hoffmann case 0x28: /* ERSTSZ */ 2575f1ae32a1SGerd Hoffmann xhci->erstsz = val & 0xffff; 2576f1ae32a1SGerd Hoffmann break; 2577f1ae32a1SGerd Hoffmann case 0x30: /* ERSTBA low */ 2578f1ae32a1SGerd Hoffmann /* XXX NEC driver bug: it doesn't align this to 64 bytes 2579f1ae32a1SGerd Hoffmann xhci->erstba_low = val & 0xffffffc0; */ 2580f1ae32a1SGerd Hoffmann xhci->erstba_low = val & 0xfffffff0; 2581f1ae32a1SGerd Hoffmann break; 2582f1ae32a1SGerd Hoffmann case 0x34: /* ERSTBA high */ 2583f1ae32a1SGerd Hoffmann xhci->erstba_high = val; 2584f1ae32a1SGerd Hoffmann xhci_er_reset(xhci); 2585f1ae32a1SGerd Hoffmann break; 2586f1ae32a1SGerd Hoffmann case 0x38: /* ERDP low */ 2587f1ae32a1SGerd Hoffmann if (val & ERDP_EHB) { 2588f1ae32a1SGerd Hoffmann xhci->erdp_low &= ~ERDP_EHB; 2589f1ae32a1SGerd Hoffmann } 2590f1ae32a1SGerd Hoffmann xhci->erdp_low = (val & ~ERDP_EHB) | (xhci->erdp_low & ERDP_EHB); 2591f1ae32a1SGerd Hoffmann break; 2592f1ae32a1SGerd Hoffmann case 0x3c: /* ERDP high */ 2593f1ae32a1SGerd Hoffmann xhci->erdp_high = val; 2594f1ae32a1SGerd Hoffmann xhci_events_update(xhci); 2595f1ae32a1SGerd Hoffmann break; 2596f1ae32a1SGerd Hoffmann default: 2597f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_oper_write: reg 0x%x unimplemented\n", reg); 2598f1ae32a1SGerd Hoffmann } 2599f1ae32a1SGerd Hoffmann } 2600f1ae32a1SGerd Hoffmann 2601f1ae32a1SGerd Hoffmann static uint32_t xhci_doorbell_read(XHCIState *xhci, uint32_t reg) 2602f1ae32a1SGerd Hoffmann { 2603f1ae32a1SGerd Hoffmann /* doorbells always read as 0 */ 26042d754a10SGerd Hoffmann trace_usb_xhci_doorbell_read(reg, 0); 2605f1ae32a1SGerd Hoffmann return 0; 2606f1ae32a1SGerd Hoffmann } 2607f1ae32a1SGerd Hoffmann 2608f1ae32a1SGerd Hoffmann static void xhci_doorbell_write(XHCIState *xhci, uint32_t reg, uint32_t val) 2609f1ae32a1SGerd Hoffmann { 26102d754a10SGerd Hoffmann trace_usb_xhci_doorbell_write(reg, val); 2611f1ae32a1SGerd Hoffmann 2612f1ae32a1SGerd Hoffmann if (!xhci_running(xhci)) { 2613f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: wrote doorbell while xHC stopped or paused\n"); 2614f1ae32a1SGerd Hoffmann return; 2615f1ae32a1SGerd Hoffmann } 2616f1ae32a1SGerd Hoffmann 2617f1ae32a1SGerd Hoffmann reg >>= 2; 2618f1ae32a1SGerd Hoffmann 2619f1ae32a1SGerd Hoffmann if (reg == 0) { 2620f1ae32a1SGerd Hoffmann if (val == 0) { 2621f1ae32a1SGerd Hoffmann xhci_process_commands(xhci); 2622f1ae32a1SGerd Hoffmann } else { 2623f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell 0 write: 0x%x\n", val); 2624f1ae32a1SGerd Hoffmann } 2625f1ae32a1SGerd Hoffmann } else { 2626f1ae32a1SGerd Hoffmann if (reg > MAXSLOTS) { 2627f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell %d\n", reg); 2628f1ae32a1SGerd Hoffmann } else if (val > 31) { 2629f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci: bad doorbell %d write: 0x%x\n", reg, val); 2630f1ae32a1SGerd Hoffmann } else { 2631f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, reg, val); 2632f1ae32a1SGerd Hoffmann } 2633f1ae32a1SGerd Hoffmann } 2634f1ae32a1SGerd Hoffmann } 2635f1ae32a1SGerd Hoffmann 2636f1ae32a1SGerd Hoffmann static uint64_t xhci_mem_read(void *ptr, target_phys_addr_t addr, 2637f1ae32a1SGerd Hoffmann unsigned size) 2638f1ae32a1SGerd Hoffmann { 2639f1ae32a1SGerd Hoffmann XHCIState *xhci = ptr; 2640f1ae32a1SGerd Hoffmann 2641f1ae32a1SGerd Hoffmann /* Only aligned reads are allowed on xHCI */ 2642f1ae32a1SGerd Hoffmann if (addr & 3) { 2643f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_read: Mis-aligned read\n"); 2644f1ae32a1SGerd Hoffmann return 0; 2645f1ae32a1SGerd Hoffmann } 2646f1ae32a1SGerd Hoffmann 2647f1ae32a1SGerd Hoffmann if (addr < LEN_CAP) { 2648f1ae32a1SGerd Hoffmann return xhci_cap_read(xhci, addr); 2649f1ae32a1SGerd Hoffmann } else if (addr >= OFF_OPER && addr < (OFF_OPER + LEN_OPER)) { 2650f1ae32a1SGerd Hoffmann return xhci_oper_read(xhci, addr - OFF_OPER); 2651f1ae32a1SGerd Hoffmann } else if (addr >= OFF_RUNTIME && addr < (OFF_RUNTIME + LEN_RUNTIME)) { 2652f1ae32a1SGerd Hoffmann return xhci_runtime_read(xhci, addr - OFF_RUNTIME); 2653f1ae32a1SGerd Hoffmann } else if (addr >= OFF_DOORBELL && addr < (OFF_DOORBELL + LEN_DOORBELL)) { 2654f1ae32a1SGerd Hoffmann return xhci_doorbell_read(xhci, addr - OFF_DOORBELL); 2655f1ae32a1SGerd Hoffmann } else { 2656f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_read: Bad offset %x\n", (int)addr); 2657f1ae32a1SGerd Hoffmann return 0; 2658f1ae32a1SGerd Hoffmann } 2659f1ae32a1SGerd Hoffmann } 2660f1ae32a1SGerd Hoffmann 2661f1ae32a1SGerd Hoffmann static void xhci_mem_write(void *ptr, target_phys_addr_t addr, 2662f1ae32a1SGerd Hoffmann uint64_t val, unsigned size) 2663f1ae32a1SGerd Hoffmann { 2664f1ae32a1SGerd Hoffmann XHCIState *xhci = ptr; 2665f1ae32a1SGerd Hoffmann 2666f1ae32a1SGerd Hoffmann /* Only aligned writes are allowed on xHCI */ 2667f1ae32a1SGerd Hoffmann if (addr & 3) { 2668f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_write: Mis-aligned write\n"); 2669f1ae32a1SGerd Hoffmann return; 2670f1ae32a1SGerd Hoffmann } 2671f1ae32a1SGerd Hoffmann 2672f1ae32a1SGerd Hoffmann if (addr >= OFF_OPER && addr < (OFF_OPER + LEN_OPER)) { 2673f1ae32a1SGerd Hoffmann xhci_oper_write(xhci, addr - OFF_OPER, val); 2674f1ae32a1SGerd Hoffmann } else if (addr >= OFF_RUNTIME && addr < (OFF_RUNTIME + LEN_RUNTIME)) { 2675f1ae32a1SGerd Hoffmann xhci_runtime_write(xhci, addr - OFF_RUNTIME, val); 2676f1ae32a1SGerd Hoffmann } else if (addr >= OFF_DOORBELL && addr < (OFF_DOORBELL + LEN_DOORBELL)) { 2677f1ae32a1SGerd Hoffmann xhci_doorbell_write(xhci, addr - OFF_DOORBELL, val); 2678f1ae32a1SGerd Hoffmann } else { 2679f1ae32a1SGerd Hoffmann fprintf(stderr, "xhci_mem_write: Bad offset %x\n", (int)addr); 2680f1ae32a1SGerd Hoffmann } 2681f1ae32a1SGerd Hoffmann } 2682f1ae32a1SGerd Hoffmann 2683f1ae32a1SGerd Hoffmann static const MemoryRegionOps xhci_mem_ops = { 2684f1ae32a1SGerd Hoffmann .read = xhci_mem_read, 2685f1ae32a1SGerd Hoffmann .write = xhci_mem_write, 2686f1ae32a1SGerd Hoffmann .valid.min_access_size = 4, 2687f1ae32a1SGerd Hoffmann .valid.max_access_size = 4, 2688f1ae32a1SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 2689f1ae32a1SGerd Hoffmann }; 2690f1ae32a1SGerd Hoffmann 2691f1ae32a1SGerd Hoffmann static void xhci_attach(USBPort *usbport) 2692f1ae32a1SGerd Hoffmann { 2693f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 2694*0846e635SGerd Hoffmann XHCIPort *port = xhci_lookup_port(xhci, usbport); 2695f1ae32a1SGerd Hoffmann 2696f1ae32a1SGerd Hoffmann xhci_update_port(xhci, port, 0); 2697f1ae32a1SGerd Hoffmann } 2698f1ae32a1SGerd Hoffmann 2699f1ae32a1SGerd Hoffmann static void xhci_detach(USBPort *usbport) 2700f1ae32a1SGerd Hoffmann { 2701f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 2702*0846e635SGerd Hoffmann XHCIPort *port = xhci_lookup_port(xhci, usbport); 2703f1ae32a1SGerd Hoffmann 2704f1ae32a1SGerd Hoffmann xhci_update_port(xhci, port, 1); 2705f1ae32a1SGerd Hoffmann } 2706f1ae32a1SGerd Hoffmann 2707f1ae32a1SGerd Hoffmann static void xhci_wakeup(USBPort *usbport) 2708f1ae32a1SGerd Hoffmann { 2709f1ae32a1SGerd Hoffmann XHCIState *xhci = usbport->opaque; 2710*0846e635SGerd Hoffmann XHCIPort *port = xhci_lookup_port(xhci, usbport); 2711*0846e635SGerd Hoffmann XHCIEvent ev = { ER_PORT_STATUS_CHANGE, CC_SUCCESS, 2712*0846e635SGerd Hoffmann port->portnr << 24}; 2713f1ae32a1SGerd Hoffmann uint32_t pls; 2714f1ae32a1SGerd Hoffmann 2715f1ae32a1SGerd Hoffmann pls = (port->portsc >> PORTSC_PLS_SHIFT) & PORTSC_PLS_MASK; 2716f1ae32a1SGerd Hoffmann if (pls != 3) { 2717f1ae32a1SGerd Hoffmann return; 2718f1ae32a1SGerd Hoffmann } 2719f1ae32a1SGerd Hoffmann port->portsc |= 0xf << PORTSC_PLS_SHIFT; 2720f1ae32a1SGerd Hoffmann if (port->portsc & PORTSC_PLC) { 2721f1ae32a1SGerd Hoffmann return; 2722f1ae32a1SGerd Hoffmann } 2723f1ae32a1SGerd Hoffmann port->portsc |= PORTSC_PLC; 2724f1ae32a1SGerd Hoffmann xhci_event(xhci, &ev); 2725f1ae32a1SGerd Hoffmann } 2726f1ae32a1SGerd Hoffmann 2727f1ae32a1SGerd Hoffmann static void xhci_complete(USBPort *port, USBPacket *packet) 2728f1ae32a1SGerd Hoffmann { 2729f1ae32a1SGerd Hoffmann XHCITransfer *xfer = container_of(packet, XHCITransfer, packet); 2730f1ae32a1SGerd Hoffmann 2731f1ae32a1SGerd Hoffmann xhci_complete_packet(xfer, packet->result); 2732f1ae32a1SGerd Hoffmann xhci_kick_ep(xfer->xhci, xfer->slotid, xfer->epid); 2733f1ae32a1SGerd Hoffmann } 2734f1ae32a1SGerd Hoffmann 2735f1ae32a1SGerd Hoffmann static void xhci_child_detach(USBPort *port, USBDevice *child) 2736f1ae32a1SGerd Hoffmann { 2737f1ae32a1SGerd Hoffmann FIXME(); 2738f1ae32a1SGerd Hoffmann } 2739f1ae32a1SGerd Hoffmann 2740f1ae32a1SGerd Hoffmann static USBPortOps xhci_port_ops = { 2741f1ae32a1SGerd Hoffmann .attach = xhci_attach, 2742f1ae32a1SGerd Hoffmann .detach = xhci_detach, 2743f1ae32a1SGerd Hoffmann .wakeup = xhci_wakeup, 2744f1ae32a1SGerd Hoffmann .complete = xhci_complete, 2745f1ae32a1SGerd Hoffmann .child_detach = xhci_child_detach, 2746f1ae32a1SGerd Hoffmann }; 2747f1ae32a1SGerd Hoffmann 2748f1ae32a1SGerd Hoffmann static int xhci_find_slotid(XHCIState *xhci, USBDevice *dev) 2749f1ae32a1SGerd Hoffmann { 2750f1ae32a1SGerd Hoffmann XHCISlot *slot; 2751f1ae32a1SGerd Hoffmann int slotid; 2752f1ae32a1SGerd Hoffmann 2753f1ae32a1SGerd Hoffmann for (slotid = 1; slotid <= MAXSLOTS; slotid++) { 2754f1ae32a1SGerd Hoffmann slot = &xhci->slots[slotid-1]; 2755f1ae32a1SGerd Hoffmann if (slot->devaddr == dev->addr) { 2756f1ae32a1SGerd Hoffmann return slotid; 2757f1ae32a1SGerd Hoffmann } 2758f1ae32a1SGerd Hoffmann } 2759f1ae32a1SGerd Hoffmann return 0; 2760f1ae32a1SGerd Hoffmann } 2761f1ae32a1SGerd Hoffmann 2762f1ae32a1SGerd Hoffmann static int xhci_find_epid(USBEndpoint *ep) 2763f1ae32a1SGerd Hoffmann { 2764f1ae32a1SGerd Hoffmann if (ep->nr == 0) { 2765f1ae32a1SGerd Hoffmann return 1; 2766f1ae32a1SGerd Hoffmann } 2767f1ae32a1SGerd Hoffmann if (ep->pid == USB_TOKEN_IN) { 2768f1ae32a1SGerd Hoffmann return ep->nr * 2 + 1; 2769f1ae32a1SGerd Hoffmann } else { 2770f1ae32a1SGerd Hoffmann return ep->nr * 2; 2771f1ae32a1SGerd Hoffmann } 2772f1ae32a1SGerd Hoffmann } 2773f1ae32a1SGerd Hoffmann 2774f1ae32a1SGerd Hoffmann static void xhci_wakeup_endpoint(USBBus *bus, USBEndpoint *ep) 2775f1ae32a1SGerd Hoffmann { 2776f1ae32a1SGerd Hoffmann XHCIState *xhci = container_of(bus, XHCIState, bus); 2777f1ae32a1SGerd Hoffmann int slotid; 2778f1ae32a1SGerd Hoffmann 2779f1ae32a1SGerd Hoffmann DPRINTF("%s\n", __func__); 2780f1ae32a1SGerd Hoffmann slotid = xhci_find_slotid(xhci, ep->dev); 2781f1ae32a1SGerd Hoffmann if (slotid == 0 || !xhci->slots[slotid-1].enabled) { 2782f1ae32a1SGerd Hoffmann DPRINTF("%s: oops, no slot for dev %d\n", __func__, ep->dev->addr); 2783f1ae32a1SGerd Hoffmann return; 2784f1ae32a1SGerd Hoffmann } 2785f1ae32a1SGerd Hoffmann xhci_kick_ep(xhci, slotid, xhci_find_epid(ep)); 2786f1ae32a1SGerd Hoffmann } 2787f1ae32a1SGerd Hoffmann 2788f1ae32a1SGerd Hoffmann static USBBusOps xhci_bus_ops = { 2789f1ae32a1SGerd Hoffmann .wakeup_endpoint = xhci_wakeup_endpoint, 2790f1ae32a1SGerd Hoffmann }; 2791f1ae32a1SGerd Hoffmann 2792f1ae32a1SGerd Hoffmann static void usb_xhci_init(XHCIState *xhci, DeviceState *dev) 2793f1ae32a1SGerd Hoffmann { 2794*0846e635SGerd Hoffmann XHCIPort *port; 2795*0846e635SGerd Hoffmann int i, usbports, speedmask; 2796f1ae32a1SGerd Hoffmann 2797f1ae32a1SGerd Hoffmann xhci->usbsts = USBSTS_HCH; 2798f1ae32a1SGerd Hoffmann 2799*0846e635SGerd Hoffmann if (xhci->numports_2 > MAXPORTS_2) { 2800*0846e635SGerd Hoffmann xhci->numports_2 = MAXPORTS_2; 2801*0846e635SGerd Hoffmann } 2802*0846e635SGerd Hoffmann if (xhci->numports_3 > MAXPORTS_3) { 2803*0846e635SGerd Hoffmann xhci->numports_3 = MAXPORTS_3; 2804*0846e635SGerd Hoffmann } 2805*0846e635SGerd Hoffmann usbports = MAX(xhci->numports_2, xhci->numports_3); 2806*0846e635SGerd Hoffmann xhci->numports = xhci->numports_2 + xhci->numports_3; 2807*0846e635SGerd Hoffmann 2808f1ae32a1SGerd Hoffmann usb_bus_new(&xhci->bus, &xhci_bus_ops, &xhci->pci_dev.qdev); 2809f1ae32a1SGerd Hoffmann 2810*0846e635SGerd Hoffmann for (i = 0; i < usbports; i++) { 2811*0846e635SGerd Hoffmann speedmask = 0; 2812*0846e635SGerd Hoffmann if (i < xhci->numports_2) { 2813*0846e635SGerd Hoffmann port = &xhci->ports[i]; 2814*0846e635SGerd Hoffmann port->portnr = i + 1; 2815*0846e635SGerd Hoffmann port->uport = &xhci->uports[i]; 2816*0846e635SGerd Hoffmann port->speedmask = 2817f1ae32a1SGerd Hoffmann USB_SPEED_MASK_LOW | 2818f1ae32a1SGerd Hoffmann USB_SPEED_MASK_FULL | 2819*0846e635SGerd Hoffmann USB_SPEED_MASK_HIGH; 2820*0846e635SGerd Hoffmann speedmask |= port->speedmask; 2821f1ae32a1SGerd Hoffmann } 2822*0846e635SGerd Hoffmann if (i < xhci->numports_3) { 2823*0846e635SGerd Hoffmann port = &xhci->ports[i + xhci->numports_2]; 2824*0846e635SGerd Hoffmann port->portnr = i + 1 + xhci->numports_2; 2825*0846e635SGerd Hoffmann port->uport = &xhci->uports[i]; 2826*0846e635SGerd Hoffmann port->speedmask = USB_SPEED_MASK_SUPER; 2827*0846e635SGerd Hoffmann speedmask |= port->speedmask; 2828*0846e635SGerd Hoffmann } 2829*0846e635SGerd Hoffmann usb_register_port(&xhci->bus, &xhci->uports[i], xhci, i, 2830*0846e635SGerd Hoffmann &xhci_port_ops, speedmask); 2831f1ae32a1SGerd Hoffmann } 2832f1ae32a1SGerd Hoffmann } 2833f1ae32a1SGerd Hoffmann 2834f1ae32a1SGerd Hoffmann static int usb_xhci_initfn(struct PCIDevice *dev) 2835f1ae32a1SGerd Hoffmann { 2836f1ae32a1SGerd Hoffmann int ret; 2837f1ae32a1SGerd Hoffmann 2838f1ae32a1SGerd Hoffmann XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev, dev); 2839f1ae32a1SGerd Hoffmann 2840f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_CLASS_PROG] = 0x30; /* xHCI */ 2841f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin 1 */ 2842f1ae32a1SGerd Hoffmann xhci->pci_dev.config[PCI_CACHE_LINE_SIZE] = 0x10; 2843f1ae32a1SGerd Hoffmann xhci->pci_dev.config[0x60] = 0x30; /* release number */ 2844f1ae32a1SGerd Hoffmann 2845f1ae32a1SGerd Hoffmann usb_xhci_init(xhci, &dev->qdev); 2846f1ae32a1SGerd Hoffmann 284701546fa6SGerd Hoffmann xhci->mfwrap_timer = qemu_new_timer_ns(vm_clock, xhci_mfwrap_timer, xhci); 284801546fa6SGerd Hoffmann 2849f1ae32a1SGerd Hoffmann xhci->irq = xhci->pci_dev.irq[0]; 2850f1ae32a1SGerd Hoffmann 2851f1ae32a1SGerd Hoffmann memory_region_init_io(&xhci->mem, &xhci_mem_ops, xhci, 2852f1ae32a1SGerd Hoffmann "xhci", LEN_REGS); 2853f1ae32a1SGerd Hoffmann pci_register_bar(&xhci->pci_dev, 0, 2854f1ae32a1SGerd Hoffmann PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64, 2855f1ae32a1SGerd Hoffmann &xhci->mem); 2856f1ae32a1SGerd Hoffmann 2857f1ae32a1SGerd Hoffmann ret = pcie_cap_init(&xhci->pci_dev, 0xa0, PCI_EXP_TYPE_ENDPOINT, 0); 2858f1ae32a1SGerd Hoffmann assert(ret >= 0); 2859f1ae32a1SGerd Hoffmann 2860f1ae32a1SGerd Hoffmann if (xhci->msi) { 2861f1ae32a1SGerd Hoffmann ret = msi_init(&xhci->pci_dev, 0x70, 1, true, false); 2862f1ae32a1SGerd Hoffmann assert(ret >= 0); 2863f1ae32a1SGerd Hoffmann } 2864f1ae32a1SGerd Hoffmann 2865f1ae32a1SGerd Hoffmann return 0; 2866f1ae32a1SGerd Hoffmann } 2867f1ae32a1SGerd Hoffmann 2868f1ae32a1SGerd Hoffmann static void xhci_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, 2869f1ae32a1SGerd Hoffmann int len) 2870f1ae32a1SGerd Hoffmann { 2871f1ae32a1SGerd Hoffmann XHCIState *xhci = DO_UPCAST(XHCIState, pci_dev, dev); 2872f1ae32a1SGerd Hoffmann 2873f1ae32a1SGerd Hoffmann pci_default_write_config(dev, addr, val, len); 2874f1ae32a1SGerd Hoffmann if (xhci->msi) { 2875f1ae32a1SGerd Hoffmann msi_write_config(dev, addr, val, len); 2876f1ae32a1SGerd Hoffmann } 2877f1ae32a1SGerd Hoffmann } 2878f1ae32a1SGerd Hoffmann 2879f1ae32a1SGerd Hoffmann static const VMStateDescription vmstate_xhci = { 2880f1ae32a1SGerd Hoffmann .name = "xhci", 2881f1ae32a1SGerd Hoffmann .unmigratable = 1, 2882f1ae32a1SGerd Hoffmann }; 2883f1ae32a1SGerd Hoffmann 2884f1ae32a1SGerd Hoffmann static Property xhci_properties[] = { 2885f1ae32a1SGerd Hoffmann DEFINE_PROP_UINT32("msi", XHCIState, msi, 0), 2886*0846e635SGerd Hoffmann DEFINE_PROP_UINT32("p2", XHCIState, numports_2, 4), 2887*0846e635SGerd Hoffmann DEFINE_PROP_UINT32("p3", XHCIState, numports_3, 4), 2888f1ae32a1SGerd Hoffmann DEFINE_PROP_END_OF_LIST(), 2889f1ae32a1SGerd Hoffmann }; 2890f1ae32a1SGerd Hoffmann 2891f1ae32a1SGerd Hoffmann static void xhci_class_init(ObjectClass *klass, void *data) 2892f1ae32a1SGerd Hoffmann { 2893f1ae32a1SGerd Hoffmann PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2894f1ae32a1SGerd Hoffmann DeviceClass *dc = DEVICE_CLASS(klass); 2895f1ae32a1SGerd Hoffmann 2896f1ae32a1SGerd Hoffmann dc->vmsd = &vmstate_xhci; 2897f1ae32a1SGerd Hoffmann dc->props = xhci_properties; 289864619739SJan Kiszka dc->reset = xhci_reset; 2899f1ae32a1SGerd Hoffmann k->init = usb_xhci_initfn; 2900f1ae32a1SGerd Hoffmann k->vendor_id = PCI_VENDOR_ID_NEC; 2901f1ae32a1SGerd Hoffmann k->device_id = PCI_DEVICE_ID_NEC_UPD720200; 2902f1ae32a1SGerd Hoffmann k->class_id = PCI_CLASS_SERIAL_USB; 2903f1ae32a1SGerd Hoffmann k->revision = 0x03; 2904f1ae32a1SGerd Hoffmann k->is_express = 1; 2905f1ae32a1SGerd Hoffmann k->config_write = xhci_write_config; 2906f1ae32a1SGerd Hoffmann } 2907f1ae32a1SGerd Hoffmann 2908f1ae32a1SGerd Hoffmann static TypeInfo xhci_info = { 2909f1ae32a1SGerd Hoffmann .name = "nec-usb-xhci", 2910f1ae32a1SGerd Hoffmann .parent = TYPE_PCI_DEVICE, 2911f1ae32a1SGerd Hoffmann .instance_size = sizeof(XHCIState), 2912f1ae32a1SGerd Hoffmann .class_init = xhci_class_init, 2913f1ae32a1SGerd Hoffmann }; 2914f1ae32a1SGerd Hoffmann 2915f1ae32a1SGerd Hoffmann static void xhci_register_types(void) 2916f1ae32a1SGerd Hoffmann { 2917f1ae32a1SGerd Hoffmann type_register_static(&xhci_info); 2918f1ae32a1SGerd Hoffmann } 2919f1ae32a1SGerd Hoffmann 2920f1ae32a1SGerd Hoffmann type_init(xhci_register_types) 2921