1 /* 2 * USB UHCI controller emulation 3 * 4 * Copyright (c) 2005 Fabrice Bellard 5 * 6 * Copyright (c) 2008 Max Krasnyansky 7 * Magor rewrite of the UHCI data structures parser and frame processor 8 * Support for fully async operation and multiple outstanding transactions 9 * 10 * Permission is hereby granted, free of charge, to any person obtaining a copy 11 * of this software and associated documentation files (the "Software"), to deal 12 * in the Software without restriction, including without limitation the rights 13 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 14 * copies of the Software, and to permit persons to whom the Software is 15 * furnished to do so, subject to the following conditions: 16 * 17 * The above copyright notice and this permission notice shall be included in 18 * all copies or substantial portions of the Software. 19 * 20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 23 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 24 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 25 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 26 * THE SOFTWARE. 27 */ 28 #ifndef HW_USB_HCD_UHCI_H 29 #define HW_USB_HCD_UHCI_H 30 31 #include "exec/memory.h" 32 #include "qemu/timer.h" 33 #include "hw/pci/pci_device.h" 34 #include "hw/usb.h" 35 #include "hw/sysbus.h" 36 37 typedef struct UHCIQueue UHCIQueue; 38 39 #define UHCI_PORTS 2 40 41 typedef struct UHCIPort { 42 USBPort port; 43 uint16_t ctrl; 44 } UHCIPort; 45 46 typedef struct UHCIState UHCIState; 47 48 struct UHCIState { 49 MemoryRegion mem; 50 AddressSpace *as; 51 void (*uhci_reset)(UHCIState *); 52 USBBus bus; /* Note unused when we're a companion controller */ 53 uint16_t cmd; /* cmd register */ 54 uint16_t status; 55 uint16_t intr; /* interrupt enable register */ 56 uint16_t frnum; /* frame number */ 57 uint32_t fl_base_addr; /* frame list base address */ 58 uint8_t sof_timing; 59 uint8_t status2; /* bit 0 and 1 are used to generate UHCI_STS_USBINT */ 60 int64_t expire_time; 61 QEMUTimer *frame_timer; 62 QEMUBH *bh; 63 uint32_t frame_bytes; 64 uint32_t frame_bandwidth; 65 bool completions_only; 66 UHCIPort ports[UHCI_PORTS]; 67 qemu_irq irq; 68 /* Interrupts that should be raised at the end of the current frame. */ 69 uint32_t pending_int_mask; 70 71 /* Active packets */ 72 QTAILQ_HEAD(, UHCIQueue) queues; 73 uint8_t num_ports_vmstate; 74 75 /* Properties */ 76 char *masterbus; 77 uint32_t firstport; 78 uint32_t maxframes; 79 }; 80 81 #define TYPE_UHCI "uhci-usb" 82 OBJECT_DECLARE_TYPE(UHCIState, UHCIDeviceClass, UHCI) 83 84 extern const VMStateDescription vmstate_uhci_state; 85 86 void uhci_data_class_init(ObjectClass *klass, void *data); 87 void usb_uhci_common_realize(PCIDevice *dev, Error **errp); 88 void usb_uhci_init(UHCIState *s, DeviceState *dev, Error **errp); 89 void uhci_state_reset(UHCIState *s); 90 void usb_uhci_exit(UHCIState *s); 91 92 #define TYPE_PIIX3_USB_UHCI "piix3-usb-uhci" 93 #define TYPE_PIIX4_USB_UHCI "piix4-usb-uhci" 94 #define TYPE_ICH9_USB_UHCI(fn) "ich9-usb-uhci" #fn 95 96 #endif 97