xref: /openbmc/qemu/hw/usb/hcd-ohci.h (revision 88cd34ee)
1 /*
2  * QEMU USB OHCI Emulation
3  * Copyright (c) 2004 Gianni Tedesco
4  * Copyright (c) 2006 CodeSourcery
5  * Copyright (c) 2006 Openedhand Ltd.
6  *
7  * This library is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * This library is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #ifndef HCD_OHCI_H
22 #define HCD_OHCI_H
23 
24 #include "sysemu/dma.h"
25 #include "hw/usb.h"
26 
27 /* Number of Downstream Ports on the root hub: */
28 #define OHCI_MAX_PORTS 15
29 
30 typedef struct OHCIPort {
31     USBPort port;
32     uint32_t ctrl;
33 } OHCIPort;
34 
35 typedef struct OHCIState {
36     USBBus bus;
37     qemu_irq irq;
38     MemoryRegion mem;
39     AddressSpace *as;
40     uint32_t num_ports;
41     const char *name;
42 
43     QEMUTimer *eof_timer;
44     int64_t sof_time;
45 
46     /* OHCI state */
47     /* Control partition */
48     uint32_t ctl, status;
49     uint32_t intr_status;
50     uint32_t intr;
51 
52     /* memory pointer partition */
53     uint32_t hcca;
54     uint32_t ctrl_head, ctrl_cur;
55     uint32_t bulk_head, bulk_cur;
56     uint32_t per_cur;
57     uint32_t done;
58     int32_t done_count;
59 
60     /* Frame counter partition */
61     uint16_t fsmps;
62     uint8_t fit;
63     uint16_t fi;
64     uint8_t frt;
65     uint16_t frame_number;
66     uint16_t padding;
67     uint32_t pstart;
68     uint32_t lst;
69 
70     /* Root Hub partition */
71     uint32_t rhdesc_a, rhdesc_b;
72     uint32_t rhstatus;
73     OHCIPort rhport[OHCI_MAX_PORTS];
74 
75     /* PXA27x Non-OHCI events */
76     uint32_t hstatus;
77     uint32_t hmask;
78     uint32_t hreset;
79     uint32_t htest;
80 
81     /* SM501 local memory offset */
82     dma_addr_t localmem_base;
83 
84     /* Active packets.  */
85     uint32_t old_ctl;
86     USBPacket usb_packet;
87     uint8_t usb_buf[8192];
88     uint32_t async_td;
89     bool async_complete;
90 
91     void (*ohci_die)(struct OHCIState *ohci);
92 } OHCIState;
93 
94 #define TYPE_SYSBUS_OHCI "sysbus-ohci"
95 #define SYSBUS_OHCI(obj) OBJECT_CHECK(OHCISysBusState, (obj), TYPE_SYSBUS_OHCI)
96 
97 typedef struct {
98     /*< private >*/
99     SysBusDevice parent_obj;
100     /*< public >*/
101 
102     OHCIState ohci;
103     char *masterbus;
104     uint32_t num_ports;
105     uint32_t firstport;
106     dma_addr_t dma_offset;
107 } OHCISysBusState;
108 
109 extern const VMStateDescription vmstate_ohci_state;
110 
111 void usb_ohci_init(OHCIState *ohci, DeviceState *dev, uint32_t num_ports,
112                    dma_addr_t localmem_base, char *masterbus,
113                    uint32_t firstport, AddressSpace *as,
114                    void (*ohci_die_fn)(struct OHCIState *), Error **errp);
115 void ohci_bus_stop(OHCIState *ohci);
116 void ohci_stop_endpoints(OHCIState *ohci);
117 void ohci_hard_reset(OHCIState *ohci);
118 void ohci_sysbus_die(struct OHCIState *ohci);
119 
120 #endif
121