1f1ae32a1SGerd Hoffmann /* 2f1ae32a1SGerd Hoffmann * QEMU USB EHCI Emulation 3f1ae32a1SGerd Hoffmann * 4f1ae32a1SGerd Hoffmann * Copyright(c) 2008 Emutex Ltd. (address@hidden) 5*522079ddSHans de Goede * Copyright(c) 2011-2012 Red Hat, Inc. 6*522079ddSHans de Goede * 7*522079ddSHans de Goede * Red Hat Authors: 8*522079ddSHans de Goede * Gerd Hoffmann <kraxel@redhat.com> 9*522079ddSHans de Goede * Hans de Goede <hdegoede@redhat.com> 10f1ae32a1SGerd Hoffmann * 11f1ae32a1SGerd Hoffmann * EHCI project was started by Mark Burkley, with contributions by 12f1ae32a1SGerd Hoffmann * Niels de Vos. David S. Ahern continued working on it. Kevin Wolf, 13f1ae32a1SGerd Hoffmann * Jan Kiszka and Vincent Palatin contributed bugfixes. 14f1ae32a1SGerd Hoffmann * 15f1ae32a1SGerd Hoffmann * 16f1ae32a1SGerd Hoffmann * This library is free software; you can redistribute it and/or 17f1ae32a1SGerd Hoffmann * modify it under the terms of the GNU Lesser General Public 18f1ae32a1SGerd Hoffmann * License as published by the Free Software Foundation; either 19f1ae32a1SGerd Hoffmann * version 2 of the License, or(at your option) any later version. 20f1ae32a1SGerd Hoffmann * 21f1ae32a1SGerd Hoffmann * This library is distributed in the hope that it will be useful, 22f1ae32a1SGerd Hoffmann * but WITHOUT ANY WARRANTY; without even the implied warranty of 23f1ae32a1SGerd Hoffmann * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 24f1ae32a1SGerd Hoffmann * Lesser General Public License for more details. 25f1ae32a1SGerd Hoffmann * 26f1ae32a1SGerd Hoffmann * You should have received a copy of the GNU General Public License 27f1ae32a1SGerd Hoffmann * along with this program; if not, see <http://www.gnu.org/licenses/>. 28f1ae32a1SGerd Hoffmann */ 29f1ae32a1SGerd Hoffmann 30f1ae32a1SGerd Hoffmann #include "hw/hw.h" 31f1ae32a1SGerd Hoffmann #include "qemu-timer.h" 32f1ae32a1SGerd Hoffmann #include "hw/usb.h" 33f1ae32a1SGerd Hoffmann #include "hw/pci.h" 34f1ae32a1SGerd Hoffmann #include "monitor.h" 35f1ae32a1SGerd Hoffmann #include "trace.h" 36f1ae32a1SGerd Hoffmann #include "dma.h" 37f1ae32a1SGerd Hoffmann 38f1ae32a1SGerd Hoffmann #define EHCI_DEBUG 0 39f1ae32a1SGerd Hoffmann 40f1ae32a1SGerd Hoffmann #if EHCI_DEBUG 41f1ae32a1SGerd Hoffmann #define DPRINTF printf 42f1ae32a1SGerd Hoffmann #else 43f1ae32a1SGerd Hoffmann #define DPRINTF(...) 44f1ae32a1SGerd Hoffmann #endif 45f1ae32a1SGerd Hoffmann 46f1ae32a1SGerd Hoffmann /* internal processing - reset HC to try and recover */ 47f1ae32a1SGerd Hoffmann #define USB_RET_PROCERR (-99) 48f1ae32a1SGerd Hoffmann 49f1ae32a1SGerd Hoffmann #define MMIO_SIZE 0x1000 50f1ae32a1SGerd Hoffmann 51f1ae32a1SGerd Hoffmann /* Capability Registers Base Address - section 2.2 */ 52f1ae32a1SGerd Hoffmann #define CAPREGBASE 0x0000 53f1ae32a1SGerd Hoffmann #define CAPLENGTH CAPREGBASE + 0x0000 // 1-byte, 0x0001 reserved 54f1ae32a1SGerd Hoffmann #define HCIVERSION CAPREGBASE + 0x0002 // 2-bytes, i/f version # 55f1ae32a1SGerd Hoffmann #define HCSPARAMS CAPREGBASE + 0x0004 // 4-bytes, structural params 56f1ae32a1SGerd Hoffmann #define HCCPARAMS CAPREGBASE + 0x0008 // 4-bytes, capability params 57f1ae32a1SGerd Hoffmann #define EECP HCCPARAMS + 1 58f1ae32a1SGerd Hoffmann #define HCSPPORTROUTE1 CAPREGBASE + 0x000c 59f1ae32a1SGerd Hoffmann #define HCSPPORTROUTE2 CAPREGBASE + 0x0010 60f1ae32a1SGerd Hoffmann 61f1ae32a1SGerd Hoffmann #define OPREGBASE 0x0020 // Operational Registers Base Address 62f1ae32a1SGerd Hoffmann 63f1ae32a1SGerd Hoffmann #define USBCMD OPREGBASE + 0x0000 64f1ae32a1SGerd Hoffmann #define USBCMD_RUNSTOP (1 << 0) // run / Stop 65f1ae32a1SGerd Hoffmann #define USBCMD_HCRESET (1 << 1) // HC Reset 66f1ae32a1SGerd Hoffmann #define USBCMD_FLS (3 << 2) // Frame List Size 67f1ae32a1SGerd Hoffmann #define USBCMD_FLS_SH 2 // Frame List Size Shift 68f1ae32a1SGerd Hoffmann #define USBCMD_PSE (1 << 4) // Periodic Schedule Enable 69f1ae32a1SGerd Hoffmann #define USBCMD_ASE (1 << 5) // Asynch Schedule Enable 70f1ae32a1SGerd Hoffmann #define USBCMD_IAAD (1 << 6) // Int Asynch Advance Doorbell 71f1ae32a1SGerd Hoffmann #define USBCMD_LHCR (1 << 7) // Light Host Controller Reset 72f1ae32a1SGerd Hoffmann #define USBCMD_ASPMC (3 << 8) // Async Sched Park Mode Count 73f1ae32a1SGerd Hoffmann #define USBCMD_ASPME (1 << 11) // Async Sched Park Mode Enable 74f1ae32a1SGerd Hoffmann #define USBCMD_ITC (0x7f << 16) // Int Threshold Control 75f1ae32a1SGerd Hoffmann #define USBCMD_ITC_SH 16 // Int Threshold Control Shift 76f1ae32a1SGerd Hoffmann 77f1ae32a1SGerd Hoffmann #define USBSTS OPREGBASE + 0x0004 78f1ae32a1SGerd Hoffmann #define USBSTS_RO_MASK 0x0000003f 79f1ae32a1SGerd Hoffmann #define USBSTS_INT (1 << 0) // USB Interrupt 80f1ae32a1SGerd Hoffmann #define USBSTS_ERRINT (1 << 1) // Error Interrupt 81f1ae32a1SGerd Hoffmann #define USBSTS_PCD (1 << 2) // Port Change Detect 82f1ae32a1SGerd Hoffmann #define USBSTS_FLR (1 << 3) // Frame List Rollover 83f1ae32a1SGerd Hoffmann #define USBSTS_HSE (1 << 4) // Host System Error 84f1ae32a1SGerd Hoffmann #define USBSTS_IAA (1 << 5) // Interrupt on Async Advance 85f1ae32a1SGerd Hoffmann #define USBSTS_HALT (1 << 12) // HC Halted 86f1ae32a1SGerd Hoffmann #define USBSTS_REC (1 << 13) // Reclamation 87f1ae32a1SGerd Hoffmann #define USBSTS_PSS (1 << 14) // Periodic Schedule Status 88f1ae32a1SGerd Hoffmann #define USBSTS_ASS (1 << 15) // Asynchronous Schedule Status 89f1ae32a1SGerd Hoffmann 90f1ae32a1SGerd Hoffmann /* 91f1ae32a1SGerd Hoffmann * Interrupt enable bits correspond to the interrupt active bits in USBSTS 92f1ae32a1SGerd Hoffmann * so no need to redefine here. 93f1ae32a1SGerd Hoffmann */ 94f1ae32a1SGerd Hoffmann #define USBINTR OPREGBASE + 0x0008 95f1ae32a1SGerd Hoffmann #define USBINTR_MASK 0x0000003f 96f1ae32a1SGerd Hoffmann 97f1ae32a1SGerd Hoffmann #define FRINDEX OPREGBASE + 0x000c 98f1ae32a1SGerd Hoffmann #define CTRLDSSEGMENT OPREGBASE + 0x0010 99f1ae32a1SGerd Hoffmann #define PERIODICLISTBASE OPREGBASE + 0x0014 100f1ae32a1SGerd Hoffmann #define ASYNCLISTADDR OPREGBASE + 0x0018 101f1ae32a1SGerd Hoffmann #define ASYNCLISTADDR_MASK 0xffffffe0 102f1ae32a1SGerd Hoffmann 103f1ae32a1SGerd Hoffmann #define CONFIGFLAG OPREGBASE + 0x0040 104f1ae32a1SGerd Hoffmann 105f1ae32a1SGerd Hoffmann #define PORTSC (OPREGBASE + 0x0044) 106f1ae32a1SGerd Hoffmann #define PORTSC_BEGIN PORTSC 107f1ae32a1SGerd Hoffmann #define PORTSC_END (PORTSC + 4 * NB_PORTS) 108f1ae32a1SGerd Hoffmann /* 109f1ae32a1SGerd Hoffmann * Bits that are reserved or are read-only are masked out of values 110f1ae32a1SGerd Hoffmann * written to us by software 111f1ae32a1SGerd Hoffmann */ 112f1ae32a1SGerd Hoffmann #define PORTSC_RO_MASK 0x007001c0 113f1ae32a1SGerd Hoffmann #define PORTSC_RWC_MASK 0x0000002a 114f1ae32a1SGerd Hoffmann #define PORTSC_WKOC_E (1 << 22) // Wake on Over Current Enable 115f1ae32a1SGerd Hoffmann #define PORTSC_WKDS_E (1 << 21) // Wake on Disconnect Enable 116f1ae32a1SGerd Hoffmann #define PORTSC_WKCN_E (1 << 20) // Wake on Connect Enable 117f1ae32a1SGerd Hoffmann #define PORTSC_PTC (15 << 16) // Port Test Control 118f1ae32a1SGerd Hoffmann #define PORTSC_PTC_SH 16 // Port Test Control shift 119f1ae32a1SGerd Hoffmann #define PORTSC_PIC (3 << 14) // Port Indicator Control 120f1ae32a1SGerd Hoffmann #define PORTSC_PIC_SH 14 // Port Indicator Control Shift 121f1ae32a1SGerd Hoffmann #define PORTSC_POWNER (1 << 13) // Port Owner 122f1ae32a1SGerd Hoffmann #define PORTSC_PPOWER (1 << 12) // Port Power 123f1ae32a1SGerd Hoffmann #define PORTSC_LINESTAT (3 << 10) // Port Line Status 124f1ae32a1SGerd Hoffmann #define PORTSC_LINESTAT_SH 10 // Port Line Status Shift 125f1ae32a1SGerd Hoffmann #define PORTSC_PRESET (1 << 8) // Port Reset 126f1ae32a1SGerd Hoffmann #define PORTSC_SUSPEND (1 << 7) // Port Suspend 127f1ae32a1SGerd Hoffmann #define PORTSC_FPRES (1 << 6) // Force Port Resume 128f1ae32a1SGerd Hoffmann #define PORTSC_OCC (1 << 5) // Over Current Change 129f1ae32a1SGerd Hoffmann #define PORTSC_OCA (1 << 4) // Over Current Active 130f1ae32a1SGerd Hoffmann #define PORTSC_PEDC (1 << 3) // Port Enable/Disable Change 131f1ae32a1SGerd Hoffmann #define PORTSC_PED (1 << 2) // Port Enable/Disable 132f1ae32a1SGerd Hoffmann #define PORTSC_CSC (1 << 1) // Connect Status Change 133f1ae32a1SGerd Hoffmann #define PORTSC_CONNECT (1 << 0) // Current Connect Status 134f1ae32a1SGerd Hoffmann 135f1ae32a1SGerd Hoffmann #define FRAME_TIMER_FREQ 1000 136f1ae32a1SGerd Hoffmann #define FRAME_TIMER_NS (1000000000 / FRAME_TIMER_FREQ) 137f1ae32a1SGerd Hoffmann 138f1ae32a1SGerd Hoffmann #define NB_MAXINTRATE 8 // Max rate at which controller issues ints 139f1ae32a1SGerd Hoffmann #define NB_PORTS 6 // Number of downstream ports 140f1ae32a1SGerd Hoffmann #define BUFF_SIZE 5*4096 // Max bytes to transfer per transaction 141f1ae32a1SGerd Hoffmann #define MAX_QH 100 // Max allowable queue heads in a chain 142f1ae32a1SGerd Hoffmann 143f1ae32a1SGerd Hoffmann /* Internal periodic / asynchronous schedule state machine states 144f1ae32a1SGerd Hoffmann */ 145f1ae32a1SGerd Hoffmann typedef enum { 146f1ae32a1SGerd Hoffmann EST_INACTIVE = 1000, 147f1ae32a1SGerd Hoffmann EST_ACTIVE, 148f1ae32a1SGerd Hoffmann EST_EXECUTING, 149f1ae32a1SGerd Hoffmann EST_SLEEPING, 150f1ae32a1SGerd Hoffmann /* The following states are internal to the state machine function 151f1ae32a1SGerd Hoffmann */ 152f1ae32a1SGerd Hoffmann EST_WAITLISTHEAD, 153f1ae32a1SGerd Hoffmann EST_FETCHENTRY, 154f1ae32a1SGerd Hoffmann EST_FETCHQH, 155f1ae32a1SGerd Hoffmann EST_FETCHITD, 156f1ae32a1SGerd Hoffmann EST_FETCHSITD, 157f1ae32a1SGerd Hoffmann EST_ADVANCEQUEUE, 158f1ae32a1SGerd Hoffmann EST_FETCHQTD, 159f1ae32a1SGerd Hoffmann EST_EXECUTE, 160f1ae32a1SGerd Hoffmann EST_WRITEBACK, 161f1ae32a1SGerd Hoffmann EST_HORIZONTALQH 162f1ae32a1SGerd Hoffmann } EHCI_STATES; 163f1ae32a1SGerd Hoffmann 164f1ae32a1SGerd Hoffmann /* macros for accessing fields within next link pointer entry */ 165f1ae32a1SGerd Hoffmann #define NLPTR_GET(x) ((x) & 0xffffffe0) 166f1ae32a1SGerd Hoffmann #define NLPTR_TYPE_GET(x) (((x) >> 1) & 3) 167f1ae32a1SGerd Hoffmann #define NLPTR_TBIT(x) ((x) & 1) // 1=invalid, 0=valid 168f1ae32a1SGerd Hoffmann 169f1ae32a1SGerd Hoffmann /* link pointer types */ 170f1ae32a1SGerd Hoffmann #define NLPTR_TYPE_ITD 0 // isoc xfer descriptor 171f1ae32a1SGerd Hoffmann #define NLPTR_TYPE_QH 1 // queue head 172f1ae32a1SGerd Hoffmann #define NLPTR_TYPE_STITD 2 // split xaction, isoc xfer descriptor 173f1ae32a1SGerd Hoffmann #define NLPTR_TYPE_FSTN 3 // frame span traversal node 174f1ae32a1SGerd Hoffmann 175f1ae32a1SGerd Hoffmann 176f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 3.3 177f1ae32a1SGerd Hoffmann */ 178f1ae32a1SGerd Hoffmann typedef struct EHCIitd { 179f1ae32a1SGerd Hoffmann uint32_t next; 180f1ae32a1SGerd Hoffmann 181f1ae32a1SGerd Hoffmann uint32_t transact[8]; 182f1ae32a1SGerd Hoffmann #define ITD_XACT_ACTIVE (1 << 31) 183f1ae32a1SGerd Hoffmann #define ITD_XACT_DBERROR (1 << 30) 184f1ae32a1SGerd Hoffmann #define ITD_XACT_BABBLE (1 << 29) 185f1ae32a1SGerd Hoffmann #define ITD_XACT_XACTERR (1 << 28) 186f1ae32a1SGerd Hoffmann #define ITD_XACT_LENGTH_MASK 0x0fff0000 187f1ae32a1SGerd Hoffmann #define ITD_XACT_LENGTH_SH 16 188f1ae32a1SGerd Hoffmann #define ITD_XACT_IOC (1 << 15) 189f1ae32a1SGerd Hoffmann #define ITD_XACT_PGSEL_MASK 0x00007000 190f1ae32a1SGerd Hoffmann #define ITD_XACT_PGSEL_SH 12 191f1ae32a1SGerd Hoffmann #define ITD_XACT_OFFSET_MASK 0x00000fff 192f1ae32a1SGerd Hoffmann 193f1ae32a1SGerd Hoffmann uint32_t bufptr[7]; 194f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_MASK 0xfffff000 195f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_SH 12 196f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_EP_MASK 0x00000f00 197f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_EP_SH 8 198f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_DEVADDR_MASK 0x0000007f 199f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_DEVADDR_SH 0 200f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_DIRECTION (1 << 11) 201f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_MAXPKT_MASK 0x000007ff 202f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_MAXPKT_SH 0 203f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_MULT_MASK 0x00000003 204f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_MULT_SH 0 205f1ae32a1SGerd Hoffmann } EHCIitd; 206f1ae32a1SGerd Hoffmann 207f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 3.4 208f1ae32a1SGerd Hoffmann */ 209f1ae32a1SGerd Hoffmann typedef struct EHCIsitd { 210f1ae32a1SGerd Hoffmann uint32_t next; // Standard next link pointer 211f1ae32a1SGerd Hoffmann uint32_t epchar; 212f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_IO (1 << 31) 213f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_PORTNUM_MASK 0x7f000000 214f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_PORTNUM_SH 24 215f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_HUBADD_MASK 0x007f0000 216f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_HUBADDR_SH 16 217f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_EPNUM_MASK 0x00000f00 218f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_EPNUM_SH 8 219f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_DEVADDR_MASK 0x0000007f 220f1ae32a1SGerd Hoffmann 221f1ae32a1SGerd Hoffmann uint32_t uframe; 222f1ae32a1SGerd Hoffmann #define SITD_UFRAME_CMASK_MASK 0x0000ff00 223f1ae32a1SGerd Hoffmann #define SITD_UFRAME_CMASK_SH 8 224f1ae32a1SGerd Hoffmann #define SITD_UFRAME_SMASK_MASK 0x000000ff 225f1ae32a1SGerd Hoffmann 226f1ae32a1SGerd Hoffmann uint32_t results; 227f1ae32a1SGerd Hoffmann #define SITD_RESULTS_IOC (1 << 31) 228f1ae32a1SGerd Hoffmann #define SITD_RESULTS_PGSEL (1 << 30) 229f1ae32a1SGerd Hoffmann #define SITD_RESULTS_TBYTES_MASK 0x03ff0000 230f1ae32a1SGerd Hoffmann #define SITD_RESULTS_TYBYTES_SH 16 231f1ae32a1SGerd Hoffmann #define SITD_RESULTS_CPROGMASK_MASK 0x0000ff00 232f1ae32a1SGerd Hoffmann #define SITD_RESULTS_CPROGMASK_SH 8 233f1ae32a1SGerd Hoffmann #define SITD_RESULTS_ACTIVE (1 << 7) 234f1ae32a1SGerd Hoffmann #define SITD_RESULTS_ERR (1 << 6) 235f1ae32a1SGerd Hoffmann #define SITD_RESULTS_DBERR (1 << 5) 236f1ae32a1SGerd Hoffmann #define SITD_RESULTS_BABBLE (1 << 4) 237f1ae32a1SGerd Hoffmann #define SITD_RESULTS_XACTERR (1 << 3) 238f1ae32a1SGerd Hoffmann #define SITD_RESULTS_MISSEDUF (1 << 2) 239f1ae32a1SGerd Hoffmann #define SITD_RESULTS_SPLITXSTATE (1 << 1) 240f1ae32a1SGerd Hoffmann 241f1ae32a1SGerd Hoffmann uint32_t bufptr[2]; 242f1ae32a1SGerd Hoffmann #define SITD_BUFPTR_MASK 0xfffff000 243f1ae32a1SGerd Hoffmann #define SITD_BUFPTR_CURROFF_MASK 0x00000fff 244f1ae32a1SGerd Hoffmann #define SITD_BUFPTR_TPOS_MASK 0x00000018 245f1ae32a1SGerd Hoffmann #define SITD_BUFPTR_TPOS_SH 3 246f1ae32a1SGerd Hoffmann #define SITD_BUFPTR_TCNT_MASK 0x00000007 247f1ae32a1SGerd Hoffmann 248f1ae32a1SGerd Hoffmann uint32_t backptr; // Standard next link pointer 249f1ae32a1SGerd Hoffmann } EHCIsitd; 250f1ae32a1SGerd Hoffmann 251f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 3.5 252f1ae32a1SGerd Hoffmann */ 253f1ae32a1SGerd Hoffmann typedef struct EHCIqtd { 254f1ae32a1SGerd Hoffmann uint32_t next; // Standard next link pointer 255f1ae32a1SGerd Hoffmann uint32_t altnext; // Standard next link pointer 256f1ae32a1SGerd Hoffmann uint32_t token; 257f1ae32a1SGerd Hoffmann #define QTD_TOKEN_DTOGGLE (1 << 31) 258f1ae32a1SGerd Hoffmann #define QTD_TOKEN_TBYTES_MASK 0x7fff0000 259f1ae32a1SGerd Hoffmann #define QTD_TOKEN_TBYTES_SH 16 260f1ae32a1SGerd Hoffmann #define QTD_TOKEN_IOC (1 << 15) 261f1ae32a1SGerd Hoffmann #define QTD_TOKEN_CPAGE_MASK 0x00007000 262f1ae32a1SGerd Hoffmann #define QTD_TOKEN_CPAGE_SH 12 263f1ae32a1SGerd Hoffmann #define QTD_TOKEN_CERR_MASK 0x00000c00 264f1ae32a1SGerd Hoffmann #define QTD_TOKEN_CERR_SH 10 265f1ae32a1SGerd Hoffmann #define QTD_TOKEN_PID_MASK 0x00000300 266f1ae32a1SGerd Hoffmann #define QTD_TOKEN_PID_SH 8 267f1ae32a1SGerd Hoffmann #define QTD_TOKEN_ACTIVE (1 << 7) 268f1ae32a1SGerd Hoffmann #define QTD_TOKEN_HALT (1 << 6) 269f1ae32a1SGerd Hoffmann #define QTD_TOKEN_DBERR (1 << 5) 270f1ae32a1SGerd Hoffmann #define QTD_TOKEN_BABBLE (1 << 4) 271f1ae32a1SGerd Hoffmann #define QTD_TOKEN_XACTERR (1 << 3) 272f1ae32a1SGerd Hoffmann #define QTD_TOKEN_MISSEDUF (1 << 2) 273f1ae32a1SGerd Hoffmann #define QTD_TOKEN_SPLITXSTATE (1 << 1) 274f1ae32a1SGerd Hoffmann #define QTD_TOKEN_PING (1 << 0) 275f1ae32a1SGerd Hoffmann 276f1ae32a1SGerd Hoffmann uint32_t bufptr[5]; // Standard buffer pointer 277f1ae32a1SGerd Hoffmann #define QTD_BUFPTR_MASK 0xfffff000 278f1ae32a1SGerd Hoffmann #define QTD_BUFPTR_SH 12 279f1ae32a1SGerd Hoffmann } EHCIqtd; 280f1ae32a1SGerd Hoffmann 281f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 3.6 282f1ae32a1SGerd Hoffmann */ 283f1ae32a1SGerd Hoffmann typedef struct EHCIqh { 284f1ae32a1SGerd Hoffmann uint32_t next; // Standard next link pointer 285f1ae32a1SGerd Hoffmann 286f1ae32a1SGerd Hoffmann /* endpoint characteristics */ 287f1ae32a1SGerd Hoffmann uint32_t epchar; 288f1ae32a1SGerd Hoffmann #define QH_EPCHAR_RL_MASK 0xf0000000 289f1ae32a1SGerd Hoffmann #define QH_EPCHAR_RL_SH 28 290f1ae32a1SGerd Hoffmann #define QH_EPCHAR_C (1 << 27) 291f1ae32a1SGerd Hoffmann #define QH_EPCHAR_MPLEN_MASK 0x07FF0000 292f1ae32a1SGerd Hoffmann #define QH_EPCHAR_MPLEN_SH 16 293f1ae32a1SGerd Hoffmann #define QH_EPCHAR_H (1 << 15) 294f1ae32a1SGerd Hoffmann #define QH_EPCHAR_DTC (1 << 14) 295f1ae32a1SGerd Hoffmann #define QH_EPCHAR_EPS_MASK 0x00003000 296f1ae32a1SGerd Hoffmann #define QH_EPCHAR_EPS_SH 12 297f1ae32a1SGerd Hoffmann #define EHCI_QH_EPS_FULL 0 298f1ae32a1SGerd Hoffmann #define EHCI_QH_EPS_LOW 1 299f1ae32a1SGerd Hoffmann #define EHCI_QH_EPS_HIGH 2 300f1ae32a1SGerd Hoffmann #define EHCI_QH_EPS_RESERVED 3 301f1ae32a1SGerd Hoffmann 302f1ae32a1SGerd Hoffmann #define QH_EPCHAR_EP_MASK 0x00000f00 303f1ae32a1SGerd Hoffmann #define QH_EPCHAR_EP_SH 8 304f1ae32a1SGerd Hoffmann #define QH_EPCHAR_I (1 << 7) 305f1ae32a1SGerd Hoffmann #define QH_EPCHAR_DEVADDR_MASK 0x0000007f 306f1ae32a1SGerd Hoffmann #define QH_EPCHAR_DEVADDR_SH 0 307f1ae32a1SGerd Hoffmann 308f1ae32a1SGerd Hoffmann /* endpoint capabilities */ 309f1ae32a1SGerd Hoffmann uint32_t epcap; 310f1ae32a1SGerd Hoffmann #define QH_EPCAP_MULT_MASK 0xc0000000 311f1ae32a1SGerd Hoffmann #define QH_EPCAP_MULT_SH 30 312f1ae32a1SGerd Hoffmann #define QH_EPCAP_PORTNUM_MASK 0x3f800000 313f1ae32a1SGerd Hoffmann #define QH_EPCAP_PORTNUM_SH 23 314f1ae32a1SGerd Hoffmann #define QH_EPCAP_HUBADDR_MASK 0x007f0000 315f1ae32a1SGerd Hoffmann #define QH_EPCAP_HUBADDR_SH 16 316f1ae32a1SGerd Hoffmann #define QH_EPCAP_CMASK_MASK 0x0000ff00 317f1ae32a1SGerd Hoffmann #define QH_EPCAP_CMASK_SH 8 318f1ae32a1SGerd Hoffmann #define QH_EPCAP_SMASK_MASK 0x000000ff 319f1ae32a1SGerd Hoffmann #define QH_EPCAP_SMASK_SH 0 320f1ae32a1SGerd Hoffmann 321f1ae32a1SGerd Hoffmann uint32_t current_qtd; // Standard next link pointer 322f1ae32a1SGerd Hoffmann uint32_t next_qtd; // Standard next link pointer 323f1ae32a1SGerd Hoffmann uint32_t altnext_qtd; 324f1ae32a1SGerd Hoffmann #define QH_ALTNEXT_NAKCNT_MASK 0x0000001e 325f1ae32a1SGerd Hoffmann #define QH_ALTNEXT_NAKCNT_SH 1 326f1ae32a1SGerd Hoffmann 327f1ae32a1SGerd Hoffmann uint32_t token; // Same as QTD token 328f1ae32a1SGerd Hoffmann uint32_t bufptr[5]; // Standard buffer pointer 329f1ae32a1SGerd Hoffmann #define BUFPTR_CPROGMASK_MASK 0x000000ff 330f1ae32a1SGerd Hoffmann #define BUFPTR_FRAMETAG_MASK 0x0000001f 331f1ae32a1SGerd Hoffmann #define BUFPTR_SBYTES_MASK 0x00000fe0 332f1ae32a1SGerd Hoffmann #define BUFPTR_SBYTES_SH 5 333f1ae32a1SGerd Hoffmann } EHCIqh; 334f1ae32a1SGerd Hoffmann 335f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 3.7 336f1ae32a1SGerd Hoffmann */ 337f1ae32a1SGerd Hoffmann typedef struct EHCIfstn { 338f1ae32a1SGerd Hoffmann uint32_t next; // Standard next link pointer 339f1ae32a1SGerd Hoffmann uint32_t backptr; // Standard next link pointer 340f1ae32a1SGerd Hoffmann } EHCIfstn; 341f1ae32a1SGerd Hoffmann 342eb36a88eSGerd Hoffmann typedef struct EHCIPacket EHCIPacket; 343f1ae32a1SGerd Hoffmann typedef struct EHCIQueue EHCIQueue; 344f1ae32a1SGerd Hoffmann typedef struct EHCIState EHCIState; 345f1ae32a1SGerd Hoffmann 346f1ae32a1SGerd Hoffmann enum async_state { 347f1ae32a1SGerd Hoffmann EHCI_ASYNC_NONE = 0, 348f1ae32a1SGerd Hoffmann EHCI_ASYNC_INFLIGHT, 349f1ae32a1SGerd Hoffmann EHCI_ASYNC_FINISHED, 350f1ae32a1SGerd Hoffmann }; 351f1ae32a1SGerd Hoffmann 352eb36a88eSGerd Hoffmann struct EHCIPacket { 353eb36a88eSGerd Hoffmann EHCIQueue *queue; 354eb36a88eSGerd Hoffmann QTAILQ_ENTRY(EHCIPacket) next; 355eb36a88eSGerd Hoffmann 356eb36a88eSGerd Hoffmann EHCIqtd qtd; /* copy of current QTD (being worked on) */ 357eb36a88eSGerd Hoffmann uint32_t qtdaddr; /* address QTD read from */ 358eb36a88eSGerd Hoffmann 359eb36a88eSGerd Hoffmann USBPacket packet; 360eb36a88eSGerd Hoffmann QEMUSGList sgl; 361eb36a88eSGerd Hoffmann int pid; 362eb36a88eSGerd Hoffmann uint32_t tbytes; 363eb36a88eSGerd Hoffmann enum async_state async; 364eb36a88eSGerd Hoffmann int usb_status; 365eb36a88eSGerd Hoffmann }; 366eb36a88eSGerd Hoffmann 367f1ae32a1SGerd Hoffmann struct EHCIQueue { 368f1ae32a1SGerd Hoffmann EHCIState *ehci; 369f1ae32a1SGerd Hoffmann QTAILQ_ENTRY(EHCIQueue) next; 370f1ae32a1SGerd Hoffmann uint32_t seen; 371f1ae32a1SGerd Hoffmann uint64_t ts; 372ae0138a8SGerd Hoffmann int async; 373f1ae32a1SGerd Hoffmann 374f1ae32a1SGerd Hoffmann /* cached data from guest - needs to be flushed 375f1ae32a1SGerd Hoffmann * when guest removes an entry (doorbell, handshake sequence) 376f1ae32a1SGerd Hoffmann */ 377eb36a88eSGerd Hoffmann EHCIqh qh; /* copy of current QH (being worked on) */ 378eb36a88eSGerd Hoffmann uint32_t qhaddr; /* address QH read from */ 379eb36a88eSGerd Hoffmann uint32_t qtdaddr; /* address QTD read from */ 380e59928b3SGerd Hoffmann USBDevice *dev; 381eb36a88eSGerd Hoffmann QTAILQ_HEAD(, EHCIPacket) packets; 382f1ae32a1SGerd Hoffmann }; 383f1ae32a1SGerd Hoffmann 384f1ae32a1SGerd Hoffmann typedef QTAILQ_HEAD(EHCIQueueHead, EHCIQueue) EHCIQueueHead; 385f1ae32a1SGerd Hoffmann 386f1ae32a1SGerd Hoffmann struct EHCIState { 387f1ae32a1SGerd Hoffmann PCIDevice dev; 388f1ae32a1SGerd Hoffmann USBBus bus; 389f1ae32a1SGerd Hoffmann qemu_irq irq; 390f1ae32a1SGerd Hoffmann MemoryRegion mem; 391f1ae32a1SGerd Hoffmann int companion_count; 392f1ae32a1SGerd Hoffmann 393f1ae32a1SGerd Hoffmann /* properties */ 394f1ae32a1SGerd Hoffmann uint32_t maxframes; 395f1ae32a1SGerd Hoffmann 396f1ae32a1SGerd Hoffmann /* 397f1ae32a1SGerd Hoffmann * EHCI spec version 1.0 Section 2.3 398f1ae32a1SGerd Hoffmann * Host Controller Operational Registers 399f1ae32a1SGerd Hoffmann */ 400f1ae32a1SGerd Hoffmann union { 401f1ae32a1SGerd Hoffmann uint8_t mmio[MMIO_SIZE]; 402f1ae32a1SGerd Hoffmann struct { 403f1ae32a1SGerd Hoffmann uint8_t cap[OPREGBASE]; 404f1ae32a1SGerd Hoffmann uint32_t usbcmd; 405f1ae32a1SGerd Hoffmann uint32_t usbsts; 406f1ae32a1SGerd Hoffmann uint32_t usbintr; 407f1ae32a1SGerd Hoffmann uint32_t frindex; 408f1ae32a1SGerd Hoffmann uint32_t ctrldssegment; 409f1ae32a1SGerd Hoffmann uint32_t periodiclistbase; 410f1ae32a1SGerd Hoffmann uint32_t asynclistaddr; 411f1ae32a1SGerd Hoffmann uint32_t notused[9]; 412f1ae32a1SGerd Hoffmann uint32_t configflag; 413f1ae32a1SGerd Hoffmann uint32_t portsc[NB_PORTS]; 414f1ae32a1SGerd Hoffmann }; 415f1ae32a1SGerd Hoffmann }; 416f1ae32a1SGerd Hoffmann 417f1ae32a1SGerd Hoffmann /* 418f1ae32a1SGerd Hoffmann * Internal states, shadow registers, etc 419f1ae32a1SGerd Hoffmann */ 420f1ae32a1SGerd Hoffmann QEMUTimer *frame_timer; 4210fb3e299SGerd Hoffmann QEMUBH *async_bh; 4229a773408SGerd Hoffmann uint32_t astate; /* Current state in asynchronous schedule */ 4239a773408SGerd Hoffmann uint32_t pstate; /* Current state in periodic schedule */ 424f1ae32a1SGerd Hoffmann USBPort ports[NB_PORTS]; 425f1ae32a1SGerd Hoffmann USBPort *companion_ports[NB_PORTS]; 426f1ae32a1SGerd Hoffmann uint32_t usbsts_pending; 4277efc17afSGerd Hoffmann uint32_t usbsts_frindex; 428f1ae32a1SGerd Hoffmann EHCIQueueHead aqueues; 429f1ae32a1SGerd Hoffmann EHCIQueueHead pqueues; 430f1ae32a1SGerd Hoffmann 4319a773408SGerd Hoffmann /* which address to look at next */ 4329a773408SGerd Hoffmann uint32_t a_fetch_addr; 4339a773408SGerd Hoffmann uint32_t p_fetch_addr; 434f1ae32a1SGerd Hoffmann 435f1ae32a1SGerd Hoffmann USBPacket ipacket; 436f1ae32a1SGerd Hoffmann QEMUSGList isgl; 437f1ae32a1SGerd Hoffmann 438f1ae32a1SGerd Hoffmann uint64_t last_run_ns; 4393a215326SGerd Hoffmann uint32_t async_stepdown; 440f1ae32a1SGerd Hoffmann }; 441f1ae32a1SGerd Hoffmann 442f1ae32a1SGerd Hoffmann #define SET_LAST_RUN_CLOCK(s) \ 443f1ae32a1SGerd Hoffmann (s)->last_run_ns = qemu_get_clock_ns(vm_clock); 444f1ae32a1SGerd Hoffmann 445f1ae32a1SGerd Hoffmann /* nifty macros from Arnon's EHCI version */ 446f1ae32a1SGerd Hoffmann #define get_field(data, field) \ 447f1ae32a1SGerd Hoffmann (((data) & field##_MASK) >> field##_SH) 448f1ae32a1SGerd Hoffmann 449f1ae32a1SGerd Hoffmann #define set_field(data, newval, field) do { \ 450f1ae32a1SGerd Hoffmann uint32_t val = *data; \ 451f1ae32a1SGerd Hoffmann val &= ~ field##_MASK; \ 452f1ae32a1SGerd Hoffmann val |= ((newval) << field##_SH) & field##_MASK; \ 453f1ae32a1SGerd Hoffmann *data = val; \ 454f1ae32a1SGerd Hoffmann } while(0) 455f1ae32a1SGerd Hoffmann 456f1ae32a1SGerd Hoffmann static const char *ehci_state_names[] = { 457f1ae32a1SGerd Hoffmann [EST_INACTIVE] = "INACTIVE", 458f1ae32a1SGerd Hoffmann [EST_ACTIVE] = "ACTIVE", 459f1ae32a1SGerd Hoffmann [EST_EXECUTING] = "EXECUTING", 460f1ae32a1SGerd Hoffmann [EST_SLEEPING] = "SLEEPING", 461f1ae32a1SGerd Hoffmann [EST_WAITLISTHEAD] = "WAITLISTHEAD", 462f1ae32a1SGerd Hoffmann [EST_FETCHENTRY] = "FETCH ENTRY", 463f1ae32a1SGerd Hoffmann [EST_FETCHQH] = "FETCH QH", 464f1ae32a1SGerd Hoffmann [EST_FETCHITD] = "FETCH ITD", 465f1ae32a1SGerd Hoffmann [EST_ADVANCEQUEUE] = "ADVANCEQUEUE", 466f1ae32a1SGerd Hoffmann [EST_FETCHQTD] = "FETCH QTD", 467f1ae32a1SGerd Hoffmann [EST_EXECUTE] = "EXECUTE", 468f1ae32a1SGerd Hoffmann [EST_WRITEBACK] = "WRITEBACK", 469f1ae32a1SGerd Hoffmann [EST_HORIZONTALQH] = "HORIZONTALQH", 470f1ae32a1SGerd Hoffmann }; 471f1ae32a1SGerd Hoffmann 472f1ae32a1SGerd Hoffmann static const char *ehci_mmio_names[] = { 473f1ae32a1SGerd Hoffmann [CAPLENGTH] = "CAPLENGTH", 474f1ae32a1SGerd Hoffmann [HCIVERSION] = "HCIVERSION", 475f1ae32a1SGerd Hoffmann [HCSPARAMS] = "HCSPARAMS", 476f1ae32a1SGerd Hoffmann [HCCPARAMS] = "HCCPARAMS", 477f1ae32a1SGerd Hoffmann [USBCMD] = "USBCMD", 478f1ae32a1SGerd Hoffmann [USBSTS] = "USBSTS", 479f1ae32a1SGerd Hoffmann [USBINTR] = "USBINTR", 480f1ae32a1SGerd Hoffmann [FRINDEX] = "FRINDEX", 481f1ae32a1SGerd Hoffmann [PERIODICLISTBASE] = "P-LIST BASE", 482f1ae32a1SGerd Hoffmann [ASYNCLISTADDR] = "A-LIST ADDR", 483f1ae32a1SGerd Hoffmann [PORTSC_BEGIN] = "PORTSC #0", 484f1ae32a1SGerd Hoffmann [PORTSC_BEGIN + 4] = "PORTSC #1", 485f1ae32a1SGerd Hoffmann [PORTSC_BEGIN + 8] = "PORTSC #2", 486f1ae32a1SGerd Hoffmann [PORTSC_BEGIN + 12] = "PORTSC #3", 487f1ae32a1SGerd Hoffmann [PORTSC_BEGIN + 16] = "PORTSC #4", 488f1ae32a1SGerd Hoffmann [PORTSC_BEGIN + 20] = "PORTSC #5", 489f1ae32a1SGerd Hoffmann [CONFIGFLAG] = "CONFIGFLAG", 490f1ae32a1SGerd Hoffmann }; 491f1ae32a1SGerd Hoffmann 492f1ae32a1SGerd Hoffmann static const char *nr2str(const char **n, size_t len, uint32_t nr) 493f1ae32a1SGerd Hoffmann { 494f1ae32a1SGerd Hoffmann if (nr < len && n[nr] != NULL) { 495f1ae32a1SGerd Hoffmann return n[nr]; 496f1ae32a1SGerd Hoffmann } else { 497f1ae32a1SGerd Hoffmann return "unknown"; 498f1ae32a1SGerd Hoffmann } 499f1ae32a1SGerd Hoffmann } 500f1ae32a1SGerd Hoffmann 501f1ae32a1SGerd Hoffmann static const char *state2str(uint32_t state) 502f1ae32a1SGerd Hoffmann { 503f1ae32a1SGerd Hoffmann return nr2str(ehci_state_names, ARRAY_SIZE(ehci_state_names), state); 504f1ae32a1SGerd Hoffmann } 505f1ae32a1SGerd Hoffmann 506f1ae32a1SGerd Hoffmann static const char *addr2str(target_phys_addr_t addr) 507f1ae32a1SGerd Hoffmann { 508f1ae32a1SGerd Hoffmann return nr2str(ehci_mmio_names, ARRAY_SIZE(ehci_mmio_names), addr); 509f1ae32a1SGerd Hoffmann } 510f1ae32a1SGerd Hoffmann 511f1ae32a1SGerd Hoffmann static void ehci_trace_usbsts(uint32_t mask, int state) 512f1ae32a1SGerd Hoffmann { 513f1ae32a1SGerd Hoffmann /* interrupts */ 514f1ae32a1SGerd Hoffmann if (mask & USBSTS_INT) { 515f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("INT", state); 516f1ae32a1SGerd Hoffmann } 517f1ae32a1SGerd Hoffmann if (mask & USBSTS_ERRINT) { 518f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("ERRINT", state); 519f1ae32a1SGerd Hoffmann } 520f1ae32a1SGerd Hoffmann if (mask & USBSTS_PCD) { 521f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("PCD", state); 522f1ae32a1SGerd Hoffmann } 523f1ae32a1SGerd Hoffmann if (mask & USBSTS_FLR) { 524f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("FLR", state); 525f1ae32a1SGerd Hoffmann } 526f1ae32a1SGerd Hoffmann if (mask & USBSTS_HSE) { 527f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("HSE", state); 528f1ae32a1SGerd Hoffmann } 529f1ae32a1SGerd Hoffmann if (mask & USBSTS_IAA) { 530f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("IAA", state); 531f1ae32a1SGerd Hoffmann } 532f1ae32a1SGerd Hoffmann 533f1ae32a1SGerd Hoffmann /* status */ 534f1ae32a1SGerd Hoffmann if (mask & USBSTS_HALT) { 535f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("HALT", state); 536f1ae32a1SGerd Hoffmann } 537f1ae32a1SGerd Hoffmann if (mask & USBSTS_REC) { 538f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("REC", state); 539f1ae32a1SGerd Hoffmann } 540f1ae32a1SGerd Hoffmann if (mask & USBSTS_PSS) { 541f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("PSS", state); 542f1ae32a1SGerd Hoffmann } 543f1ae32a1SGerd Hoffmann if (mask & USBSTS_ASS) { 544f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("ASS", state); 545f1ae32a1SGerd Hoffmann } 546f1ae32a1SGerd Hoffmann } 547f1ae32a1SGerd Hoffmann 548f1ae32a1SGerd Hoffmann static inline void ehci_set_usbsts(EHCIState *s, int mask) 549f1ae32a1SGerd Hoffmann { 550f1ae32a1SGerd Hoffmann if ((s->usbsts & mask) == mask) { 551f1ae32a1SGerd Hoffmann return; 552f1ae32a1SGerd Hoffmann } 553f1ae32a1SGerd Hoffmann ehci_trace_usbsts(mask, 1); 554f1ae32a1SGerd Hoffmann s->usbsts |= mask; 555f1ae32a1SGerd Hoffmann } 556f1ae32a1SGerd Hoffmann 557f1ae32a1SGerd Hoffmann static inline void ehci_clear_usbsts(EHCIState *s, int mask) 558f1ae32a1SGerd Hoffmann { 559f1ae32a1SGerd Hoffmann if ((s->usbsts & mask) == 0) { 560f1ae32a1SGerd Hoffmann return; 561f1ae32a1SGerd Hoffmann } 562f1ae32a1SGerd Hoffmann ehci_trace_usbsts(mask, 0); 563f1ae32a1SGerd Hoffmann s->usbsts &= ~mask; 564f1ae32a1SGerd Hoffmann } 565f1ae32a1SGerd Hoffmann 5667efc17afSGerd Hoffmann /* update irq line */ 5677efc17afSGerd Hoffmann static inline void ehci_update_irq(EHCIState *s) 568f1ae32a1SGerd Hoffmann { 569f1ae32a1SGerd Hoffmann int level = 0; 570f1ae32a1SGerd Hoffmann 571f1ae32a1SGerd Hoffmann if ((s->usbsts & USBINTR_MASK) & s->usbintr) { 572f1ae32a1SGerd Hoffmann level = 1; 573f1ae32a1SGerd Hoffmann } 574f1ae32a1SGerd Hoffmann 5757efc17afSGerd Hoffmann trace_usb_ehci_irq(level, s->frindex, s->usbsts, s->usbintr); 576f1ae32a1SGerd Hoffmann qemu_set_irq(s->irq, level); 577f1ae32a1SGerd Hoffmann } 578f1ae32a1SGerd Hoffmann 5797efc17afSGerd Hoffmann /* flag interrupt condition */ 5807efc17afSGerd Hoffmann static inline void ehci_raise_irq(EHCIState *s, int intr) 581f1ae32a1SGerd Hoffmann { 5826d3b6d3dSGerd Hoffmann if (intr & (USBSTS_PCD | USBSTS_FLR | USBSTS_HSE)) { 5836d3b6d3dSGerd Hoffmann s->usbsts |= intr; 5846d3b6d3dSGerd Hoffmann ehci_update_irq(s); 5856d3b6d3dSGerd Hoffmann } else { 586f1ae32a1SGerd Hoffmann s->usbsts_pending |= intr; 587f1ae32a1SGerd Hoffmann } 5886d3b6d3dSGerd Hoffmann } 589f1ae32a1SGerd Hoffmann 5907efc17afSGerd Hoffmann /* 5917efc17afSGerd Hoffmann * Commit pending interrupts (added via ehci_raise_irq), 5927efc17afSGerd Hoffmann * at the rate allowed by "Interrupt Threshold Control". 5937efc17afSGerd Hoffmann */ 5947efc17afSGerd Hoffmann static inline void ehci_commit_irq(EHCIState *s) 595f1ae32a1SGerd Hoffmann { 5967efc17afSGerd Hoffmann uint32_t itc; 5977efc17afSGerd Hoffmann 598f1ae32a1SGerd Hoffmann if (!s->usbsts_pending) { 599f1ae32a1SGerd Hoffmann return; 600f1ae32a1SGerd Hoffmann } 6017efc17afSGerd Hoffmann if (s->usbsts_frindex > s->frindex) { 6027efc17afSGerd Hoffmann return; 6037efc17afSGerd Hoffmann } 6047efc17afSGerd Hoffmann 6057efc17afSGerd Hoffmann itc = (s->usbcmd >> 16) & 0xff; 6067efc17afSGerd Hoffmann s->usbsts |= s->usbsts_pending; 607f1ae32a1SGerd Hoffmann s->usbsts_pending = 0; 6087efc17afSGerd Hoffmann s->usbsts_frindex = s->frindex + itc; 6097efc17afSGerd Hoffmann ehci_update_irq(s); 610f1ae32a1SGerd Hoffmann } 611f1ae32a1SGerd Hoffmann 612daf25307SGerd Hoffmann static void ehci_update_halt(EHCIState *s) 613daf25307SGerd Hoffmann { 614daf25307SGerd Hoffmann if (s->usbcmd & USBCMD_RUNSTOP) { 615daf25307SGerd Hoffmann ehci_clear_usbsts(s, USBSTS_HALT); 616daf25307SGerd Hoffmann } else { 617daf25307SGerd Hoffmann if (s->astate == EST_INACTIVE && s->pstate == EST_INACTIVE) { 618daf25307SGerd Hoffmann ehci_set_usbsts(s, USBSTS_HALT); 619daf25307SGerd Hoffmann } 620daf25307SGerd Hoffmann } 621daf25307SGerd Hoffmann } 622daf25307SGerd Hoffmann 623f1ae32a1SGerd Hoffmann static void ehci_set_state(EHCIState *s, int async, int state) 624f1ae32a1SGerd Hoffmann { 625f1ae32a1SGerd Hoffmann if (async) { 626f1ae32a1SGerd Hoffmann trace_usb_ehci_state("async", state2str(state)); 627f1ae32a1SGerd Hoffmann s->astate = state; 628b53f685dSGerd Hoffmann if (s->astate == EST_INACTIVE) { 629b53f685dSGerd Hoffmann ehci_clear_usbsts(s, USBSTS_ASS); 630daf25307SGerd Hoffmann ehci_update_halt(s); 631b53f685dSGerd Hoffmann } else { 632b53f685dSGerd Hoffmann ehci_set_usbsts(s, USBSTS_ASS); 633b53f685dSGerd Hoffmann } 634f1ae32a1SGerd Hoffmann } else { 635f1ae32a1SGerd Hoffmann trace_usb_ehci_state("periodic", state2str(state)); 636f1ae32a1SGerd Hoffmann s->pstate = state; 637b53f685dSGerd Hoffmann if (s->pstate == EST_INACTIVE) { 638b53f685dSGerd Hoffmann ehci_clear_usbsts(s, USBSTS_PSS); 639daf25307SGerd Hoffmann ehci_update_halt(s); 640b53f685dSGerd Hoffmann } else { 641b53f685dSGerd Hoffmann ehci_set_usbsts(s, USBSTS_PSS); 642b53f685dSGerd Hoffmann } 643f1ae32a1SGerd Hoffmann } 644f1ae32a1SGerd Hoffmann } 645f1ae32a1SGerd Hoffmann 646f1ae32a1SGerd Hoffmann static int ehci_get_state(EHCIState *s, int async) 647f1ae32a1SGerd Hoffmann { 648f1ae32a1SGerd Hoffmann return async ? s->astate : s->pstate; 649f1ae32a1SGerd Hoffmann } 650f1ae32a1SGerd Hoffmann 651f1ae32a1SGerd Hoffmann static void ehci_set_fetch_addr(EHCIState *s, int async, uint32_t addr) 652f1ae32a1SGerd Hoffmann { 653f1ae32a1SGerd Hoffmann if (async) { 654f1ae32a1SGerd Hoffmann s->a_fetch_addr = addr; 655f1ae32a1SGerd Hoffmann } else { 656f1ae32a1SGerd Hoffmann s->p_fetch_addr = addr; 657f1ae32a1SGerd Hoffmann } 658f1ae32a1SGerd Hoffmann } 659f1ae32a1SGerd Hoffmann 660f1ae32a1SGerd Hoffmann static int ehci_get_fetch_addr(EHCIState *s, int async) 661f1ae32a1SGerd Hoffmann { 662f1ae32a1SGerd Hoffmann return async ? s->a_fetch_addr : s->p_fetch_addr; 663f1ae32a1SGerd Hoffmann } 664f1ae32a1SGerd Hoffmann 665f1ae32a1SGerd Hoffmann static void ehci_trace_qh(EHCIQueue *q, target_phys_addr_t addr, EHCIqh *qh) 666f1ae32a1SGerd Hoffmann { 667f1ae32a1SGerd Hoffmann /* need three here due to argument count limits */ 668f1ae32a1SGerd Hoffmann trace_usb_ehci_qh_ptrs(q, addr, qh->next, 669f1ae32a1SGerd Hoffmann qh->current_qtd, qh->next_qtd, qh->altnext_qtd); 670f1ae32a1SGerd Hoffmann trace_usb_ehci_qh_fields(addr, 671f1ae32a1SGerd Hoffmann get_field(qh->epchar, QH_EPCHAR_RL), 672f1ae32a1SGerd Hoffmann get_field(qh->epchar, QH_EPCHAR_MPLEN), 673f1ae32a1SGerd Hoffmann get_field(qh->epchar, QH_EPCHAR_EPS), 674f1ae32a1SGerd Hoffmann get_field(qh->epchar, QH_EPCHAR_EP), 675f1ae32a1SGerd Hoffmann get_field(qh->epchar, QH_EPCHAR_DEVADDR)); 676f1ae32a1SGerd Hoffmann trace_usb_ehci_qh_bits(addr, 677f1ae32a1SGerd Hoffmann (bool)(qh->epchar & QH_EPCHAR_C), 678f1ae32a1SGerd Hoffmann (bool)(qh->epchar & QH_EPCHAR_H), 679f1ae32a1SGerd Hoffmann (bool)(qh->epchar & QH_EPCHAR_DTC), 680f1ae32a1SGerd Hoffmann (bool)(qh->epchar & QH_EPCHAR_I)); 681f1ae32a1SGerd Hoffmann } 682f1ae32a1SGerd Hoffmann 683f1ae32a1SGerd Hoffmann static void ehci_trace_qtd(EHCIQueue *q, target_phys_addr_t addr, EHCIqtd *qtd) 684f1ae32a1SGerd Hoffmann { 685f1ae32a1SGerd Hoffmann /* need three here due to argument count limits */ 686f1ae32a1SGerd Hoffmann trace_usb_ehci_qtd_ptrs(q, addr, qtd->next, qtd->altnext); 687f1ae32a1SGerd Hoffmann trace_usb_ehci_qtd_fields(addr, 688f1ae32a1SGerd Hoffmann get_field(qtd->token, QTD_TOKEN_TBYTES), 689f1ae32a1SGerd Hoffmann get_field(qtd->token, QTD_TOKEN_CPAGE), 690f1ae32a1SGerd Hoffmann get_field(qtd->token, QTD_TOKEN_CERR), 691f1ae32a1SGerd Hoffmann get_field(qtd->token, QTD_TOKEN_PID)); 692f1ae32a1SGerd Hoffmann trace_usb_ehci_qtd_bits(addr, 693f1ae32a1SGerd Hoffmann (bool)(qtd->token & QTD_TOKEN_IOC), 694f1ae32a1SGerd Hoffmann (bool)(qtd->token & QTD_TOKEN_ACTIVE), 695f1ae32a1SGerd Hoffmann (bool)(qtd->token & QTD_TOKEN_HALT), 696f1ae32a1SGerd Hoffmann (bool)(qtd->token & QTD_TOKEN_BABBLE), 697f1ae32a1SGerd Hoffmann (bool)(qtd->token & QTD_TOKEN_XACTERR)); 698f1ae32a1SGerd Hoffmann } 699f1ae32a1SGerd Hoffmann 700f1ae32a1SGerd Hoffmann static void ehci_trace_itd(EHCIState *s, target_phys_addr_t addr, EHCIitd *itd) 701f1ae32a1SGerd Hoffmann { 702f1ae32a1SGerd Hoffmann trace_usb_ehci_itd(addr, itd->next, 703f1ae32a1SGerd Hoffmann get_field(itd->bufptr[1], ITD_BUFPTR_MAXPKT), 704f1ae32a1SGerd Hoffmann get_field(itd->bufptr[2], ITD_BUFPTR_MULT), 705f1ae32a1SGerd Hoffmann get_field(itd->bufptr[0], ITD_BUFPTR_EP), 706f1ae32a1SGerd Hoffmann get_field(itd->bufptr[0], ITD_BUFPTR_DEVADDR)); 707f1ae32a1SGerd Hoffmann } 708f1ae32a1SGerd Hoffmann 709f1ae32a1SGerd Hoffmann static void ehci_trace_sitd(EHCIState *s, target_phys_addr_t addr, 710f1ae32a1SGerd Hoffmann EHCIsitd *sitd) 711f1ae32a1SGerd Hoffmann { 712f1ae32a1SGerd Hoffmann trace_usb_ehci_sitd(addr, sitd->next, 713f1ae32a1SGerd Hoffmann (bool)(sitd->results & SITD_RESULTS_ACTIVE)); 714f1ae32a1SGerd Hoffmann } 715f1ae32a1SGerd Hoffmann 716ec807d12SGerd Hoffmann static inline bool ehci_enabled(EHCIState *s) 717ec807d12SGerd Hoffmann { 718ec807d12SGerd Hoffmann return s->usbcmd & USBCMD_RUNSTOP; 719ec807d12SGerd Hoffmann } 720ec807d12SGerd Hoffmann 721ec807d12SGerd Hoffmann static inline bool ehci_async_enabled(EHCIState *s) 722ec807d12SGerd Hoffmann { 723ec807d12SGerd Hoffmann return ehci_enabled(s) && (s->usbcmd & USBCMD_ASE); 724ec807d12SGerd Hoffmann } 725ec807d12SGerd Hoffmann 726ec807d12SGerd Hoffmann static inline bool ehci_periodic_enabled(EHCIState *s) 727ec807d12SGerd Hoffmann { 728ec807d12SGerd Hoffmann return ehci_enabled(s) && (s->usbcmd & USBCMD_PSE); 729ec807d12SGerd Hoffmann } 730ec807d12SGerd Hoffmann 731eb36a88eSGerd Hoffmann /* packet management */ 732eb36a88eSGerd Hoffmann 733eb36a88eSGerd Hoffmann static EHCIPacket *ehci_alloc_packet(EHCIQueue *q) 734eb36a88eSGerd Hoffmann { 735eb36a88eSGerd Hoffmann EHCIPacket *p; 736eb36a88eSGerd Hoffmann 737eb36a88eSGerd Hoffmann p = g_new0(EHCIPacket, 1); 738eb36a88eSGerd Hoffmann p->queue = q; 739eb36a88eSGerd Hoffmann usb_packet_init(&p->packet); 740eb36a88eSGerd Hoffmann QTAILQ_INSERT_TAIL(&q->packets, p, next); 741eb36a88eSGerd Hoffmann trace_usb_ehci_packet_action(p->queue, p, "alloc"); 742eb36a88eSGerd Hoffmann return p; 743eb36a88eSGerd Hoffmann } 744eb36a88eSGerd Hoffmann 745eb36a88eSGerd Hoffmann static void ehci_free_packet(EHCIPacket *p) 746eb36a88eSGerd Hoffmann { 747eb36a88eSGerd Hoffmann trace_usb_ehci_packet_action(p->queue, p, "free"); 748eb36a88eSGerd Hoffmann if (p->async == EHCI_ASYNC_INFLIGHT) { 749eb36a88eSGerd Hoffmann usb_cancel_packet(&p->packet); 750eb36a88eSGerd Hoffmann } 751eb36a88eSGerd Hoffmann QTAILQ_REMOVE(&p->queue->packets, p, next); 752eb36a88eSGerd Hoffmann usb_packet_cleanup(&p->packet); 753eb36a88eSGerd Hoffmann g_free(p); 754eb36a88eSGerd Hoffmann } 755eb36a88eSGerd Hoffmann 756f1ae32a1SGerd Hoffmann /* queue management */ 757f1ae32a1SGerd Hoffmann 7588f6d5e26SGerd Hoffmann static EHCIQueue *ehci_alloc_queue(EHCIState *ehci, uint32_t addr, int async) 759f1ae32a1SGerd Hoffmann { 760f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues; 761f1ae32a1SGerd Hoffmann EHCIQueue *q; 762f1ae32a1SGerd Hoffmann 763f1ae32a1SGerd Hoffmann q = g_malloc0(sizeof(*q)); 764f1ae32a1SGerd Hoffmann q->ehci = ehci; 7658f6d5e26SGerd Hoffmann q->qhaddr = addr; 766ae0138a8SGerd Hoffmann q->async = async; 767eb36a88eSGerd Hoffmann QTAILQ_INIT(&q->packets); 768f1ae32a1SGerd Hoffmann QTAILQ_INSERT_HEAD(head, q, next); 769f1ae32a1SGerd Hoffmann trace_usb_ehci_queue_action(q, "alloc"); 770f1ae32a1SGerd Hoffmann return q; 771f1ae32a1SGerd Hoffmann } 772f1ae32a1SGerd Hoffmann 773c7cdca3bSGerd Hoffmann static void ehci_cancel_queue(EHCIQueue *q) 774c7cdca3bSGerd Hoffmann { 775c7cdca3bSGerd Hoffmann EHCIPacket *p; 776c7cdca3bSGerd Hoffmann 777c7cdca3bSGerd Hoffmann p = QTAILQ_FIRST(&q->packets); 778c7cdca3bSGerd Hoffmann if (p == NULL) { 779c7cdca3bSGerd Hoffmann return; 780c7cdca3bSGerd Hoffmann } 781c7cdca3bSGerd Hoffmann 782c7cdca3bSGerd Hoffmann trace_usb_ehci_queue_action(q, "cancel"); 783c7cdca3bSGerd Hoffmann do { 784c7cdca3bSGerd Hoffmann ehci_free_packet(p); 785c7cdca3bSGerd Hoffmann } while ((p = QTAILQ_FIRST(&q->packets)) != NULL); 786c7cdca3bSGerd Hoffmann } 787c7cdca3bSGerd Hoffmann 788dafe31fcSHans de Goede static void ehci_reset_queue(EHCIQueue *q) 789dafe31fcSHans de Goede { 790dafe31fcSHans de Goede trace_usb_ehci_queue_action(q, "reset"); 791dafe31fcSHans de Goede ehci_cancel_queue(q); 792dafe31fcSHans de Goede q->dev = NULL; 793dafe31fcSHans de Goede q->qtdaddr = 0; 794dafe31fcSHans de Goede } 795dafe31fcSHans de Goede 796ae0138a8SGerd Hoffmann static void ehci_free_queue(EHCIQueue *q) 797f1ae32a1SGerd Hoffmann { 798ae0138a8SGerd Hoffmann EHCIQueueHead *head = q->async ? &q->ehci->aqueues : &q->ehci->pqueues; 799eb36a88eSGerd Hoffmann 800f1ae32a1SGerd Hoffmann trace_usb_ehci_queue_action(q, "free"); 801c7cdca3bSGerd Hoffmann ehci_cancel_queue(q); 802f1ae32a1SGerd Hoffmann QTAILQ_REMOVE(head, q, next); 803f1ae32a1SGerd Hoffmann g_free(q); 804f1ae32a1SGerd Hoffmann } 805f1ae32a1SGerd Hoffmann 806f1ae32a1SGerd Hoffmann static EHCIQueue *ehci_find_queue_by_qh(EHCIState *ehci, uint32_t addr, 807f1ae32a1SGerd Hoffmann int async) 808f1ae32a1SGerd Hoffmann { 809f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues; 810f1ae32a1SGerd Hoffmann EHCIQueue *q; 811f1ae32a1SGerd Hoffmann 812f1ae32a1SGerd Hoffmann QTAILQ_FOREACH(q, head, next) { 813f1ae32a1SGerd Hoffmann if (addr == q->qhaddr) { 814f1ae32a1SGerd Hoffmann return q; 815f1ae32a1SGerd Hoffmann } 816f1ae32a1SGerd Hoffmann } 817f1ae32a1SGerd Hoffmann return NULL; 818f1ae32a1SGerd Hoffmann } 819f1ae32a1SGerd Hoffmann 82066f092d2SHans de Goede static void ehci_queues_rip_unused(EHCIState *ehci, int async, int flush) 821f1ae32a1SGerd Hoffmann { 822f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues; 8233a215326SGerd Hoffmann uint64_t maxage = FRAME_TIMER_NS * ehci->maxframes * 4; 824f1ae32a1SGerd Hoffmann EHCIQueue *q, *tmp; 825f1ae32a1SGerd Hoffmann 826f1ae32a1SGerd Hoffmann QTAILQ_FOREACH_SAFE(q, head, next, tmp) { 827f1ae32a1SGerd Hoffmann if (q->seen) { 828f1ae32a1SGerd Hoffmann q->seen = 0; 829f1ae32a1SGerd Hoffmann q->ts = ehci->last_run_ns; 830f1ae32a1SGerd Hoffmann continue; 831f1ae32a1SGerd Hoffmann } 83266f092d2SHans de Goede if (!flush && ehci->last_run_ns < q->ts + maxage) { 833f1ae32a1SGerd Hoffmann continue; 834f1ae32a1SGerd Hoffmann } 835ae0138a8SGerd Hoffmann ehci_free_queue(q); 836f1ae32a1SGerd Hoffmann } 837f1ae32a1SGerd Hoffmann } 838f1ae32a1SGerd Hoffmann 839f1ae32a1SGerd Hoffmann static void ehci_queues_rip_device(EHCIState *ehci, USBDevice *dev, int async) 840f1ae32a1SGerd Hoffmann { 841f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues; 842f1ae32a1SGerd Hoffmann EHCIQueue *q, *tmp; 843f1ae32a1SGerd Hoffmann 844f1ae32a1SGerd Hoffmann QTAILQ_FOREACH_SAFE(q, head, next, tmp) { 845e59928b3SGerd Hoffmann if (q->dev != dev) { 846f1ae32a1SGerd Hoffmann continue; 847f1ae32a1SGerd Hoffmann } 848ae0138a8SGerd Hoffmann ehci_free_queue(q); 849f1ae32a1SGerd Hoffmann } 850f1ae32a1SGerd Hoffmann } 851f1ae32a1SGerd Hoffmann 852f1ae32a1SGerd Hoffmann static void ehci_queues_rip_all(EHCIState *ehci, int async) 853f1ae32a1SGerd Hoffmann { 854f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues; 855f1ae32a1SGerd Hoffmann EHCIQueue *q, *tmp; 856f1ae32a1SGerd Hoffmann 857f1ae32a1SGerd Hoffmann QTAILQ_FOREACH_SAFE(q, head, next, tmp) { 858ae0138a8SGerd Hoffmann ehci_free_queue(q); 859f1ae32a1SGerd Hoffmann } 860f1ae32a1SGerd Hoffmann } 861f1ae32a1SGerd Hoffmann 862f1ae32a1SGerd Hoffmann /* Attach or detach a device on root hub */ 863f1ae32a1SGerd Hoffmann 864f1ae32a1SGerd Hoffmann static void ehci_attach(USBPort *port) 865f1ae32a1SGerd Hoffmann { 866f1ae32a1SGerd Hoffmann EHCIState *s = port->opaque; 867f1ae32a1SGerd Hoffmann uint32_t *portsc = &s->portsc[port->index]; 86830e9d412SGerd Hoffmann const char *owner = (*portsc & PORTSC_POWNER) ? "comp" : "ehci"; 869f1ae32a1SGerd Hoffmann 87030e9d412SGerd Hoffmann trace_usb_ehci_port_attach(port->index, owner, port->dev->product_desc); 871f1ae32a1SGerd Hoffmann 872f1ae32a1SGerd Hoffmann if (*portsc & PORTSC_POWNER) { 873f1ae32a1SGerd Hoffmann USBPort *companion = s->companion_ports[port->index]; 874f1ae32a1SGerd Hoffmann companion->dev = port->dev; 875f1ae32a1SGerd Hoffmann companion->ops->attach(companion); 876f1ae32a1SGerd Hoffmann return; 877f1ae32a1SGerd Hoffmann } 878f1ae32a1SGerd Hoffmann 879f1ae32a1SGerd Hoffmann *portsc |= PORTSC_CONNECT; 880f1ae32a1SGerd Hoffmann *portsc |= PORTSC_CSC; 881f1ae32a1SGerd Hoffmann 8827efc17afSGerd Hoffmann ehci_raise_irq(s, USBSTS_PCD); 8837efc17afSGerd Hoffmann ehci_commit_irq(s); 884f1ae32a1SGerd Hoffmann } 885f1ae32a1SGerd Hoffmann 886f1ae32a1SGerd Hoffmann static void ehci_detach(USBPort *port) 887f1ae32a1SGerd Hoffmann { 888f1ae32a1SGerd Hoffmann EHCIState *s = port->opaque; 889f1ae32a1SGerd Hoffmann uint32_t *portsc = &s->portsc[port->index]; 89030e9d412SGerd Hoffmann const char *owner = (*portsc & PORTSC_POWNER) ? "comp" : "ehci"; 891f1ae32a1SGerd Hoffmann 89230e9d412SGerd Hoffmann trace_usb_ehci_port_detach(port->index, owner); 893f1ae32a1SGerd Hoffmann 894f1ae32a1SGerd Hoffmann if (*portsc & PORTSC_POWNER) { 895f1ae32a1SGerd Hoffmann USBPort *companion = s->companion_ports[port->index]; 896f1ae32a1SGerd Hoffmann companion->ops->detach(companion); 897f1ae32a1SGerd Hoffmann companion->dev = NULL; 898f1ae32a1SGerd Hoffmann /* 899f1ae32a1SGerd Hoffmann * EHCI spec 4.2.2: "When a disconnect occurs... On the event, 900f1ae32a1SGerd Hoffmann * the port ownership is returned immediately to the EHCI controller." 901f1ae32a1SGerd Hoffmann */ 902f1ae32a1SGerd Hoffmann *portsc &= ~PORTSC_POWNER; 903f1ae32a1SGerd Hoffmann return; 904f1ae32a1SGerd Hoffmann } 905f1ae32a1SGerd Hoffmann 906f1ae32a1SGerd Hoffmann ehci_queues_rip_device(s, port->dev, 0); 907f1ae32a1SGerd Hoffmann ehci_queues_rip_device(s, port->dev, 1); 908f1ae32a1SGerd Hoffmann 909f1ae32a1SGerd Hoffmann *portsc &= ~(PORTSC_CONNECT|PORTSC_PED); 910f1ae32a1SGerd Hoffmann *portsc |= PORTSC_CSC; 911f1ae32a1SGerd Hoffmann 9127efc17afSGerd Hoffmann ehci_raise_irq(s, USBSTS_PCD); 9137efc17afSGerd Hoffmann ehci_commit_irq(s); 914f1ae32a1SGerd Hoffmann } 915f1ae32a1SGerd Hoffmann 916f1ae32a1SGerd Hoffmann static void ehci_child_detach(USBPort *port, USBDevice *child) 917f1ae32a1SGerd Hoffmann { 918f1ae32a1SGerd Hoffmann EHCIState *s = port->opaque; 919f1ae32a1SGerd Hoffmann uint32_t portsc = s->portsc[port->index]; 920f1ae32a1SGerd Hoffmann 921f1ae32a1SGerd Hoffmann if (portsc & PORTSC_POWNER) { 922f1ae32a1SGerd Hoffmann USBPort *companion = s->companion_ports[port->index]; 923f1ae32a1SGerd Hoffmann companion->ops->child_detach(companion, child); 924f1ae32a1SGerd Hoffmann return; 925f1ae32a1SGerd Hoffmann } 926f1ae32a1SGerd Hoffmann 927f1ae32a1SGerd Hoffmann ehci_queues_rip_device(s, child, 0); 928f1ae32a1SGerd Hoffmann ehci_queues_rip_device(s, child, 1); 929f1ae32a1SGerd Hoffmann } 930f1ae32a1SGerd Hoffmann 931f1ae32a1SGerd Hoffmann static void ehci_wakeup(USBPort *port) 932f1ae32a1SGerd Hoffmann { 933f1ae32a1SGerd Hoffmann EHCIState *s = port->opaque; 934f1ae32a1SGerd Hoffmann uint32_t portsc = s->portsc[port->index]; 935f1ae32a1SGerd Hoffmann 936f1ae32a1SGerd Hoffmann if (portsc & PORTSC_POWNER) { 937f1ae32a1SGerd Hoffmann USBPort *companion = s->companion_ports[port->index]; 938f1ae32a1SGerd Hoffmann if (companion->ops->wakeup) { 939f1ae32a1SGerd Hoffmann companion->ops->wakeup(companion); 94037952117SHans de Goede } 94137952117SHans de Goede return; 94237952117SHans de Goede } 94337952117SHans de Goede 9440f588df8SGerd Hoffmann qemu_bh_schedule(s->async_bh); 945f1ae32a1SGerd Hoffmann } 946f1ae32a1SGerd Hoffmann 947f1ae32a1SGerd Hoffmann static int ehci_register_companion(USBBus *bus, USBPort *ports[], 948f1ae32a1SGerd Hoffmann uint32_t portcount, uint32_t firstport) 949f1ae32a1SGerd Hoffmann { 950f1ae32a1SGerd Hoffmann EHCIState *s = container_of(bus, EHCIState, bus); 951f1ae32a1SGerd Hoffmann uint32_t i; 952f1ae32a1SGerd Hoffmann 953f1ae32a1SGerd Hoffmann if (firstport + portcount > NB_PORTS) { 954f1ae32a1SGerd Hoffmann qerror_report(QERR_INVALID_PARAMETER_VALUE, "firstport", 955f1ae32a1SGerd Hoffmann "firstport on masterbus"); 956f1ae32a1SGerd Hoffmann error_printf_unless_qmp( 957f1ae32a1SGerd Hoffmann "firstport value of %u makes companion take ports %u - %u, which " 958f1ae32a1SGerd Hoffmann "is outside of the valid range of 0 - %u\n", firstport, firstport, 959f1ae32a1SGerd Hoffmann firstport + portcount - 1, NB_PORTS - 1); 960f1ae32a1SGerd Hoffmann return -1; 961f1ae32a1SGerd Hoffmann } 962f1ae32a1SGerd Hoffmann 963f1ae32a1SGerd Hoffmann for (i = 0; i < portcount; i++) { 964f1ae32a1SGerd Hoffmann if (s->companion_ports[firstport + i]) { 965f1ae32a1SGerd Hoffmann qerror_report(QERR_INVALID_PARAMETER_VALUE, "masterbus", 966f1ae32a1SGerd Hoffmann "an USB masterbus"); 967f1ae32a1SGerd Hoffmann error_printf_unless_qmp( 968f1ae32a1SGerd Hoffmann "port %u on masterbus %s already has a companion assigned\n", 969f1ae32a1SGerd Hoffmann firstport + i, bus->qbus.name); 970f1ae32a1SGerd Hoffmann return -1; 971f1ae32a1SGerd Hoffmann } 972f1ae32a1SGerd Hoffmann } 973f1ae32a1SGerd Hoffmann 974f1ae32a1SGerd Hoffmann for (i = 0; i < portcount; i++) { 975f1ae32a1SGerd Hoffmann s->companion_ports[firstport + i] = ports[i]; 976f1ae32a1SGerd Hoffmann s->ports[firstport + i].speedmask |= 977f1ae32a1SGerd Hoffmann USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL; 978f1ae32a1SGerd Hoffmann /* Ensure devs attached before the initial reset go to the companion */ 979f1ae32a1SGerd Hoffmann s->portsc[firstport + i] = PORTSC_POWNER; 980f1ae32a1SGerd Hoffmann } 981f1ae32a1SGerd Hoffmann 982f1ae32a1SGerd Hoffmann s->companion_count++; 983f1ae32a1SGerd Hoffmann s->mmio[0x05] = (s->companion_count << 4) | portcount; 984f1ae32a1SGerd Hoffmann 985f1ae32a1SGerd Hoffmann return 0; 986f1ae32a1SGerd Hoffmann } 987f1ae32a1SGerd Hoffmann 988f1ae32a1SGerd Hoffmann static USBDevice *ehci_find_device(EHCIState *ehci, uint8_t addr) 989f1ae32a1SGerd Hoffmann { 990f1ae32a1SGerd Hoffmann USBDevice *dev; 991f1ae32a1SGerd Hoffmann USBPort *port; 992f1ae32a1SGerd Hoffmann int i; 993f1ae32a1SGerd Hoffmann 994f1ae32a1SGerd Hoffmann for (i = 0; i < NB_PORTS; i++) { 995f1ae32a1SGerd Hoffmann port = &ehci->ports[i]; 996f1ae32a1SGerd Hoffmann if (!(ehci->portsc[i] & PORTSC_PED)) { 997f1ae32a1SGerd Hoffmann DPRINTF("Port %d not enabled\n", i); 998f1ae32a1SGerd Hoffmann continue; 999f1ae32a1SGerd Hoffmann } 1000f1ae32a1SGerd Hoffmann dev = usb_find_device(port, addr); 1001f1ae32a1SGerd Hoffmann if (dev != NULL) { 1002f1ae32a1SGerd Hoffmann return dev; 1003f1ae32a1SGerd Hoffmann } 1004f1ae32a1SGerd Hoffmann } 1005f1ae32a1SGerd Hoffmann return NULL; 1006f1ae32a1SGerd Hoffmann } 1007f1ae32a1SGerd Hoffmann 1008f1ae32a1SGerd Hoffmann /* 4.1 host controller initialization */ 1009f1ae32a1SGerd Hoffmann static void ehci_reset(void *opaque) 1010f1ae32a1SGerd Hoffmann { 1011f1ae32a1SGerd Hoffmann EHCIState *s = opaque; 1012f1ae32a1SGerd Hoffmann int i; 1013f1ae32a1SGerd Hoffmann USBDevice *devs[NB_PORTS]; 1014f1ae32a1SGerd Hoffmann 1015f1ae32a1SGerd Hoffmann trace_usb_ehci_reset(); 1016f1ae32a1SGerd Hoffmann 1017f1ae32a1SGerd Hoffmann /* 1018f1ae32a1SGerd Hoffmann * Do the detach before touching portsc, so that it correctly gets send to 1019f1ae32a1SGerd Hoffmann * us or to our companion based on PORTSC_POWNER before the reset. 1020f1ae32a1SGerd Hoffmann */ 1021f1ae32a1SGerd Hoffmann for(i = 0; i < NB_PORTS; i++) { 1022f1ae32a1SGerd Hoffmann devs[i] = s->ports[i].dev; 1023f1ae32a1SGerd Hoffmann if (devs[i] && devs[i]->attached) { 1024f1ae32a1SGerd Hoffmann usb_detach(&s->ports[i]); 1025f1ae32a1SGerd Hoffmann } 1026f1ae32a1SGerd Hoffmann } 1027f1ae32a1SGerd Hoffmann 1028f1ae32a1SGerd Hoffmann memset(&s->mmio[OPREGBASE], 0x00, MMIO_SIZE - OPREGBASE); 1029f1ae32a1SGerd Hoffmann 1030f1ae32a1SGerd Hoffmann s->usbcmd = NB_MAXINTRATE << USBCMD_ITC_SH; 1031f1ae32a1SGerd Hoffmann s->usbsts = USBSTS_HALT; 10327efc17afSGerd Hoffmann s->usbsts_pending = 0; 10337efc17afSGerd Hoffmann s->usbsts_frindex = 0; 1034f1ae32a1SGerd Hoffmann 1035f1ae32a1SGerd Hoffmann s->astate = EST_INACTIVE; 1036f1ae32a1SGerd Hoffmann s->pstate = EST_INACTIVE; 1037f1ae32a1SGerd Hoffmann 1038f1ae32a1SGerd Hoffmann for(i = 0; i < NB_PORTS; i++) { 1039f1ae32a1SGerd Hoffmann if (s->companion_ports[i]) { 1040f1ae32a1SGerd Hoffmann s->portsc[i] = PORTSC_POWNER | PORTSC_PPOWER; 1041f1ae32a1SGerd Hoffmann } else { 1042f1ae32a1SGerd Hoffmann s->portsc[i] = PORTSC_PPOWER; 1043f1ae32a1SGerd Hoffmann } 1044f1ae32a1SGerd Hoffmann if (devs[i] && devs[i]->attached) { 1045f1ae32a1SGerd Hoffmann usb_attach(&s->ports[i]); 1046f1ae32a1SGerd Hoffmann usb_device_reset(devs[i]); 1047f1ae32a1SGerd Hoffmann } 1048f1ae32a1SGerd Hoffmann } 1049f1ae32a1SGerd Hoffmann ehci_queues_rip_all(s, 0); 1050f1ae32a1SGerd Hoffmann ehci_queues_rip_all(s, 1); 1051f1ae32a1SGerd Hoffmann qemu_del_timer(s->frame_timer); 10520fb3e299SGerd Hoffmann qemu_bh_cancel(s->async_bh); 1053f1ae32a1SGerd Hoffmann } 1054f1ae32a1SGerd Hoffmann 1055f1ae32a1SGerd Hoffmann static uint32_t ehci_mem_readb(void *ptr, target_phys_addr_t addr) 1056f1ae32a1SGerd Hoffmann { 1057f1ae32a1SGerd Hoffmann EHCIState *s = ptr; 1058f1ae32a1SGerd Hoffmann uint32_t val; 1059f1ae32a1SGerd Hoffmann 1060f1ae32a1SGerd Hoffmann val = s->mmio[addr]; 1061f1ae32a1SGerd Hoffmann 1062f1ae32a1SGerd Hoffmann return val; 1063f1ae32a1SGerd Hoffmann } 1064f1ae32a1SGerd Hoffmann 1065f1ae32a1SGerd Hoffmann static uint32_t ehci_mem_readw(void *ptr, target_phys_addr_t addr) 1066f1ae32a1SGerd Hoffmann { 1067f1ae32a1SGerd Hoffmann EHCIState *s = ptr; 1068f1ae32a1SGerd Hoffmann uint32_t val; 1069f1ae32a1SGerd Hoffmann 1070f1ae32a1SGerd Hoffmann val = s->mmio[addr] | (s->mmio[addr+1] << 8); 1071f1ae32a1SGerd Hoffmann 1072f1ae32a1SGerd Hoffmann return val; 1073f1ae32a1SGerd Hoffmann } 1074f1ae32a1SGerd Hoffmann 1075f1ae32a1SGerd Hoffmann static uint32_t ehci_mem_readl(void *ptr, target_phys_addr_t addr) 1076f1ae32a1SGerd Hoffmann { 1077f1ae32a1SGerd Hoffmann EHCIState *s = ptr; 1078f1ae32a1SGerd Hoffmann uint32_t val; 1079f1ae32a1SGerd Hoffmann 1080f1ae32a1SGerd Hoffmann val = s->mmio[addr] | (s->mmio[addr+1] << 8) | 1081f1ae32a1SGerd Hoffmann (s->mmio[addr+2] << 16) | (s->mmio[addr+3] << 24); 1082f1ae32a1SGerd Hoffmann 1083f1ae32a1SGerd Hoffmann trace_usb_ehci_mmio_readl(addr, addr2str(addr), val); 1084f1ae32a1SGerd Hoffmann return val; 1085f1ae32a1SGerd Hoffmann } 1086f1ae32a1SGerd Hoffmann 1087f1ae32a1SGerd Hoffmann static void ehci_mem_writeb(void *ptr, target_phys_addr_t addr, uint32_t val) 1088f1ae32a1SGerd Hoffmann { 1089f1ae32a1SGerd Hoffmann fprintf(stderr, "EHCI doesn't handle byte writes to MMIO\n"); 1090f1ae32a1SGerd Hoffmann exit(1); 1091f1ae32a1SGerd Hoffmann } 1092f1ae32a1SGerd Hoffmann 1093f1ae32a1SGerd Hoffmann static void ehci_mem_writew(void *ptr, target_phys_addr_t addr, uint32_t val) 1094f1ae32a1SGerd Hoffmann { 1095f1ae32a1SGerd Hoffmann fprintf(stderr, "EHCI doesn't handle 16-bit writes to MMIO\n"); 1096f1ae32a1SGerd Hoffmann exit(1); 1097f1ae32a1SGerd Hoffmann } 1098f1ae32a1SGerd Hoffmann 1099f1ae32a1SGerd Hoffmann static void handle_port_owner_write(EHCIState *s, int port, uint32_t owner) 1100f1ae32a1SGerd Hoffmann { 1101f1ae32a1SGerd Hoffmann USBDevice *dev = s->ports[port].dev; 1102f1ae32a1SGerd Hoffmann uint32_t *portsc = &s->portsc[port]; 1103f1ae32a1SGerd Hoffmann uint32_t orig; 1104f1ae32a1SGerd Hoffmann 1105f1ae32a1SGerd Hoffmann if (s->companion_ports[port] == NULL) 1106f1ae32a1SGerd Hoffmann return; 1107f1ae32a1SGerd Hoffmann 1108f1ae32a1SGerd Hoffmann owner = owner & PORTSC_POWNER; 1109f1ae32a1SGerd Hoffmann orig = *portsc & PORTSC_POWNER; 1110f1ae32a1SGerd Hoffmann 1111f1ae32a1SGerd Hoffmann if (!(owner ^ orig)) { 1112f1ae32a1SGerd Hoffmann return; 1113f1ae32a1SGerd Hoffmann } 1114f1ae32a1SGerd Hoffmann 1115f1ae32a1SGerd Hoffmann if (dev && dev->attached) { 1116f1ae32a1SGerd Hoffmann usb_detach(&s->ports[port]); 1117f1ae32a1SGerd Hoffmann } 1118f1ae32a1SGerd Hoffmann 1119f1ae32a1SGerd Hoffmann *portsc &= ~PORTSC_POWNER; 1120f1ae32a1SGerd Hoffmann *portsc |= owner; 1121f1ae32a1SGerd Hoffmann 1122f1ae32a1SGerd Hoffmann if (dev && dev->attached) { 1123f1ae32a1SGerd Hoffmann usb_attach(&s->ports[port]); 1124f1ae32a1SGerd Hoffmann } 1125f1ae32a1SGerd Hoffmann } 1126f1ae32a1SGerd Hoffmann 1127f1ae32a1SGerd Hoffmann static void handle_port_status_write(EHCIState *s, int port, uint32_t val) 1128f1ae32a1SGerd Hoffmann { 1129f1ae32a1SGerd Hoffmann uint32_t *portsc = &s->portsc[port]; 1130f1ae32a1SGerd Hoffmann USBDevice *dev = s->ports[port].dev; 1131f1ae32a1SGerd Hoffmann 1132f1ae32a1SGerd Hoffmann /* Clear rwc bits */ 1133f1ae32a1SGerd Hoffmann *portsc &= ~(val & PORTSC_RWC_MASK); 1134f1ae32a1SGerd Hoffmann /* The guest may clear, but not set the PED bit */ 1135f1ae32a1SGerd Hoffmann *portsc &= val | ~PORTSC_PED; 1136f1ae32a1SGerd Hoffmann /* POWNER is masked out by RO_MASK as it is RO when we've no companion */ 1137f1ae32a1SGerd Hoffmann handle_port_owner_write(s, port, val); 1138f1ae32a1SGerd Hoffmann /* And finally apply RO_MASK */ 1139f1ae32a1SGerd Hoffmann val &= PORTSC_RO_MASK; 1140f1ae32a1SGerd Hoffmann 1141f1ae32a1SGerd Hoffmann if ((val & PORTSC_PRESET) && !(*portsc & PORTSC_PRESET)) { 1142f1ae32a1SGerd Hoffmann trace_usb_ehci_port_reset(port, 1); 1143f1ae32a1SGerd Hoffmann } 1144f1ae32a1SGerd Hoffmann 1145f1ae32a1SGerd Hoffmann if (!(val & PORTSC_PRESET) &&(*portsc & PORTSC_PRESET)) { 1146f1ae32a1SGerd Hoffmann trace_usb_ehci_port_reset(port, 0); 1147f1ae32a1SGerd Hoffmann if (dev && dev->attached) { 1148f1ae32a1SGerd Hoffmann usb_port_reset(&s->ports[port]); 1149f1ae32a1SGerd Hoffmann *portsc &= ~PORTSC_CSC; 1150f1ae32a1SGerd Hoffmann } 1151f1ae32a1SGerd Hoffmann 1152f1ae32a1SGerd Hoffmann /* 1153f1ae32a1SGerd Hoffmann * Table 2.16 Set the enable bit(and enable bit change) to indicate 1154f1ae32a1SGerd Hoffmann * to SW that this port has a high speed device attached 1155f1ae32a1SGerd Hoffmann */ 1156f1ae32a1SGerd Hoffmann if (dev && dev->attached && (dev->speedmask & USB_SPEED_MASK_HIGH)) { 1157f1ae32a1SGerd Hoffmann val |= PORTSC_PED; 1158f1ae32a1SGerd Hoffmann } 1159f1ae32a1SGerd Hoffmann } 1160f1ae32a1SGerd Hoffmann 1161f1ae32a1SGerd Hoffmann *portsc &= ~PORTSC_RO_MASK; 1162f1ae32a1SGerd Hoffmann *portsc |= val; 1163f1ae32a1SGerd Hoffmann } 1164f1ae32a1SGerd Hoffmann 1165f1ae32a1SGerd Hoffmann static void ehci_mem_writel(void *ptr, target_phys_addr_t addr, uint32_t val) 1166f1ae32a1SGerd Hoffmann { 1167f1ae32a1SGerd Hoffmann EHCIState *s = ptr; 1168f1ae32a1SGerd Hoffmann uint32_t *mmio = (uint32_t *)(&s->mmio[addr]); 1169f1ae32a1SGerd Hoffmann uint32_t old = *mmio; 1170f1ae32a1SGerd Hoffmann int i; 1171f1ae32a1SGerd Hoffmann 1172f1ae32a1SGerd Hoffmann trace_usb_ehci_mmio_writel(addr, addr2str(addr), val); 1173f1ae32a1SGerd Hoffmann 1174f1ae32a1SGerd Hoffmann /* Only aligned reads are allowed on OHCI */ 1175f1ae32a1SGerd Hoffmann if (addr & 3) { 1176f1ae32a1SGerd Hoffmann fprintf(stderr, "usb-ehci: Mis-aligned write to addr 0x" 1177f1ae32a1SGerd Hoffmann TARGET_FMT_plx "\n", addr); 1178f1ae32a1SGerd Hoffmann return; 1179f1ae32a1SGerd Hoffmann } 1180f1ae32a1SGerd Hoffmann 1181f1ae32a1SGerd Hoffmann if (addr >= PORTSC && addr < PORTSC + 4 * NB_PORTS) { 1182f1ae32a1SGerd Hoffmann handle_port_status_write(s, (addr-PORTSC)/4, val); 1183f1ae32a1SGerd Hoffmann trace_usb_ehci_mmio_change(addr, addr2str(addr), *mmio, old); 1184f1ae32a1SGerd Hoffmann return; 1185f1ae32a1SGerd Hoffmann } 1186f1ae32a1SGerd Hoffmann 1187f1ae32a1SGerd Hoffmann if (addr < OPREGBASE) { 1188f1ae32a1SGerd Hoffmann fprintf(stderr, "usb-ehci: write attempt to read-only register" 1189f1ae32a1SGerd Hoffmann TARGET_FMT_plx "\n", addr); 1190f1ae32a1SGerd Hoffmann return; 1191f1ae32a1SGerd Hoffmann } 1192f1ae32a1SGerd Hoffmann 1193f1ae32a1SGerd Hoffmann 1194f1ae32a1SGerd Hoffmann /* Do any register specific pre-write processing here. */ 1195f1ae32a1SGerd Hoffmann switch(addr) { 1196f1ae32a1SGerd Hoffmann case USBCMD: 11977046530cSGerd Hoffmann if (val & USBCMD_HCRESET) { 11987046530cSGerd Hoffmann ehci_reset(s); 11997046530cSGerd Hoffmann val = s->usbcmd; 12007046530cSGerd Hoffmann break; 12017046530cSGerd Hoffmann } 12027046530cSGerd Hoffmann 1203f1ae32a1SGerd Hoffmann /* not supporting dynamic frame list size at the moment */ 1204f1ae32a1SGerd Hoffmann if ((val & USBCMD_FLS) && !(s->usbcmd & USBCMD_FLS)) { 1205f1ae32a1SGerd Hoffmann fprintf(stderr, "attempt to set frame list size -- value %d\n", 1206f1ae32a1SGerd Hoffmann val & USBCMD_FLS); 1207f1ae32a1SGerd Hoffmann val &= ~USBCMD_FLS; 1208f1ae32a1SGerd Hoffmann } 120947d073ccSHans de Goede 1210a1c3e4b8SHans de Goede if (val & USBCMD_IAAD) { 1211a1c3e4b8SHans de Goede /* 1212a1c3e4b8SHans de Goede * Process IAAD immediately, otherwise the Linux IAAD watchdog may 1213a1c3e4b8SHans de Goede * trigger and re-use a qh without us seeing the unlink. 1214a1c3e4b8SHans de Goede */ 1215a1c3e4b8SHans de Goede s->async_stepdown = 0; 1216a1c3e4b8SHans de Goede qemu_bh_schedule(s->async_bh); 1217a1c3e4b8SHans de Goede } 1218a1c3e4b8SHans de Goede 121947d073ccSHans de Goede if (((USBCMD_RUNSTOP | USBCMD_PSE | USBCMD_ASE) & val) != 122047d073ccSHans de Goede ((USBCMD_RUNSTOP | USBCMD_PSE | USBCMD_ASE) & s->usbcmd)) { 122147d073ccSHans de Goede if (s->pstate == EST_INACTIVE) { 122247d073ccSHans de Goede SET_LAST_RUN_CLOCK(s); 122347d073ccSHans de Goede } 122447d073ccSHans de Goede s->usbcmd = val; /* Set usbcmd for ehci_update_halt() */ 122547d073ccSHans de Goede ehci_update_halt(s); 122647d073ccSHans de Goede s->async_stepdown = 0; 122747d073ccSHans de Goede qemu_mod_timer(s->frame_timer, qemu_get_clock_ns(vm_clock)); 122847d073ccSHans de Goede } 1229f1ae32a1SGerd Hoffmann break; 1230f1ae32a1SGerd Hoffmann 1231f1ae32a1SGerd Hoffmann case USBSTS: 1232a31f0531SJim Meyering val &= USBSTS_RO_MASK; // bits 6 through 31 are RO 1233a31f0531SJim Meyering ehci_clear_usbsts(s, val); // bits 0 through 5 are R/WC 1234f1ae32a1SGerd Hoffmann val = s->usbsts; 12357efc17afSGerd Hoffmann ehci_update_irq(s); 1236f1ae32a1SGerd Hoffmann break; 1237f1ae32a1SGerd Hoffmann 1238f1ae32a1SGerd Hoffmann case USBINTR: 1239f1ae32a1SGerd Hoffmann val &= USBINTR_MASK; 1240f1ae32a1SGerd Hoffmann break; 1241f1ae32a1SGerd Hoffmann 12428a771f77SHans de Goede case FRINDEX: 12438a771f77SHans de Goede val &= 0x00003ff8; /* frindex is 14bits and always a multiple of 8 */ 12448a771f77SHans de Goede break; 12458a771f77SHans de Goede 1246f1ae32a1SGerd Hoffmann case CONFIGFLAG: 1247f1ae32a1SGerd Hoffmann val &= 0x1; 1248f1ae32a1SGerd Hoffmann if (val) { 1249f1ae32a1SGerd Hoffmann for(i = 0; i < NB_PORTS; i++) 1250f1ae32a1SGerd Hoffmann handle_port_owner_write(s, i, 0); 1251f1ae32a1SGerd Hoffmann } 1252f1ae32a1SGerd Hoffmann break; 1253f1ae32a1SGerd Hoffmann 1254f1ae32a1SGerd Hoffmann case PERIODICLISTBASE: 1255ec807d12SGerd Hoffmann if (ehci_periodic_enabled(s)) { 1256f1ae32a1SGerd Hoffmann fprintf(stderr, 1257f1ae32a1SGerd Hoffmann "ehci: PERIODIC list base register set while periodic schedule\n" 1258f1ae32a1SGerd Hoffmann " is enabled and HC is enabled\n"); 1259f1ae32a1SGerd Hoffmann } 1260f1ae32a1SGerd Hoffmann break; 1261f1ae32a1SGerd Hoffmann 1262f1ae32a1SGerd Hoffmann case ASYNCLISTADDR: 1263ec807d12SGerd Hoffmann if (ehci_async_enabled(s)) { 1264f1ae32a1SGerd Hoffmann fprintf(stderr, 1265f1ae32a1SGerd Hoffmann "ehci: ASYNC list address register set while async schedule\n" 1266f1ae32a1SGerd Hoffmann " is enabled and HC is enabled\n"); 1267f1ae32a1SGerd Hoffmann } 1268f1ae32a1SGerd Hoffmann break; 1269f1ae32a1SGerd Hoffmann } 1270f1ae32a1SGerd Hoffmann 1271f1ae32a1SGerd Hoffmann *mmio = val; 1272f1ae32a1SGerd Hoffmann trace_usb_ehci_mmio_change(addr, addr2str(addr), *mmio, old); 1273f1ae32a1SGerd Hoffmann } 1274f1ae32a1SGerd Hoffmann 1275f1ae32a1SGerd Hoffmann 1276f1ae32a1SGerd Hoffmann // TODO : Put in common header file, duplication from usb-ohci.c 1277f1ae32a1SGerd Hoffmann 1278f1ae32a1SGerd Hoffmann /* Get an array of dwords from main memory */ 1279f1ae32a1SGerd Hoffmann static inline int get_dwords(EHCIState *ehci, uint32_t addr, 1280f1ae32a1SGerd Hoffmann uint32_t *buf, int num) 1281f1ae32a1SGerd Hoffmann { 1282f1ae32a1SGerd Hoffmann int i; 1283f1ae32a1SGerd Hoffmann 1284f1ae32a1SGerd Hoffmann for(i = 0; i < num; i++, buf++, addr += sizeof(*buf)) { 1285f1ae32a1SGerd Hoffmann pci_dma_read(&ehci->dev, addr, buf, sizeof(*buf)); 1286f1ae32a1SGerd Hoffmann *buf = le32_to_cpu(*buf); 1287f1ae32a1SGerd Hoffmann } 1288f1ae32a1SGerd Hoffmann 1289f1ae32a1SGerd Hoffmann return 1; 1290f1ae32a1SGerd Hoffmann } 1291f1ae32a1SGerd Hoffmann 1292f1ae32a1SGerd Hoffmann /* Put an array of dwords in to main memory */ 1293f1ae32a1SGerd Hoffmann static inline int put_dwords(EHCIState *ehci, uint32_t addr, 1294f1ae32a1SGerd Hoffmann uint32_t *buf, int num) 1295f1ae32a1SGerd Hoffmann { 1296f1ae32a1SGerd Hoffmann int i; 1297f1ae32a1SGerd Hoffmann 1298f1ae32a1SGerd Hoffmann for(i = 0; i < num; i++, buf++, addr += sizeof(*buf)) { 1299f1ae32a1SGerd Hoffmann uint32_t tmp = cpu_to_le32(*buf); 1300f1ae32a1SGerd Hoffmann pci_dma_write(&ehci->dev, addr, &tmp, sizeof(tmp)); 1301f1ae32a1SGerd Hoffmann } 1302f1ae32a1SGerd Hoffmann 1303f1ae32a1SGerd Hoffmann return 1; 1304f1ae32a1SGerd Hoffmann } 1305f1ae32a1SGerd Hoffmann 1306a5e0139aSGerd Hoffmann /* 1307a5e0139aSGerd Hoffmann * Write the qh back to guest physical memory. This step isn't 1308a5e0139aSGerd Hoffmann * in the EHCI spec but we need to do it since we don't share 1309a5e0139aSGerd Hoffmann * physical memory with our guest VM. 1310a5e0139aSGerd Hoffmann * 1311a5e0139aSGerd Hoffmann * The first three dwords are read-only for the EHCI, so skip them 1312a5e0139aSGerd Hoffmann * when writing back the qh. 1313a5e0139aSGerd Hoffmann */ 1314a5e0139aSGerd Hoffmann static void ehci_flush_qh(EHCIQueue *q) 1315a5e0139aSGerd Hoffmann { 1316a5e0139aSGerd Hoffmann uint32_t *qh = (uint32_t *) &q->qh; 1317a5e0139aSGerd Hoffmann uint32_t dwords = sizeof(EHCIqh) >> 2; 1318a5e0139aSGerd Hoffmann uint32_t addr = NLPTR_GET(q->qhaddr); 1319a5e0139aSGerd Hoffmann 1320a5e0139aSGerd Hoffmann put_dwords(q->ehci, addr + 3 * sizeof(uint32_t), qh + 3, dwords - 3); 1321a5e0139aSGerd Hoffmann } 1322a5e0139aSGerd Hoffmann 1323f1ae32a1SGerd Hoffmann // 4.10.2 1324f1ae32a1SGerd Hoffmann 1325f1ae32a1SGerd Hoffmann static int ehci_qh_do_overlay(EHCIQueue *q) 1326f1ae32a1SGerd Hoffmann { 1327eb36a88eSGerd Hoffmann EHCIPacket *p = QTAILQ_FIRST(&q->packets); 1328f1ae32a1SGerd Hoffmann int i; 1329f1ae32a1SGerd Hoffmann int dtoggle; 1330f1ae32a1SGerd Hoffmann int ping; 1331f1ae32a1SGerd Hoffmann int eps; 1332f1ae32a1SGerd Hoffmann int reload; 1333f1ae32a1SGerd Hoffmann 1334eb36a88eSGerd Hoffmann assert(p != NULL); 1335eb36a88eSGerd Hoffmann assert(p->qtdaddr == q->qtdaddr); 1336eb36a88eSGerd Hoffmann 1337f1ae32a1SGerd Hoffmann // remember values in fields to preserve in qh after overlay 1338f1ae32a1SGerd Hoffmann 1339f1ae32a1SGerd Hoffmann dtoggle = q->qh.token & QTD_TOKEN_DTOGGLE; 1340f1ae32a1SGerd Hoffmann ping = q->qh.token & QTD_TOKEN_PING; 1341f1ae32a1SGerd Hoffmann 1342eb36a88eSGerd Hoffmann q->qh.current_qtd = p->qtdaddr; 1343eb36a88eSGerd Hoffmann q->qh.next_qtd = p->qtd.next; 1344eb36a88eSGerd Hoffmann q->qh.altnext_qtd = p->qtd.altnext; 1345eb36a88eSGerd Hoffmann q->qh.token = p->qtd.token; 1346f1ae32a1SGerd Hoffmann 1347f1ae32a1SGerd Hoffmann 1348f1ae32a1SGerd Hoffmann eps = get_field(q->qh.epchar, QH_EPCHAR_EPS); 1349f1ae32a1SGerd Hoffmann if (eps == EHCI_QH_EPS_HIGH) { 1350f1ae32a1SGerd Hoffmann q->qh.token &= ~QTD_TOKEN_PING; 1351f1ae32a1SGerd Hoffmann q->qh.token |= ping; 1352f1ae32a1SGerd Hoffmann } 1353f1ae32a1SGerd Hoffmann 1354f1ae32a1SGerd Hoffmann reload = get_field(q->qh.epchar, QH_EPCHAR_RL); 1355f1ae32a1SGerd Hoffmann set_field(&q->qh.altnext_qtd, reload, QH_ALTNEXT_NAKCNT); 1356f1ae32a1SGerd Hoffmann 1357f1ae32a1SGerd Hoffmann for (i = 0; i < 5; i++) { 1358eb36a88eSGerd Hoffmann q->qh.bufptr[i] = p->qtd.bufptr[i]; 1359f1ae32a1SGerd Hoffmann } 1360f1ae32a1SGerd Hoffmann 1361f1ae32a1SGerd Hoffmann if (!(q->qh.epchar & QH_EPCHAR_DTC)) { 1362f1ae32a1SGerd Hoffmann // preserve QH DT bit 1363f1ae32a1SGerd Hoffmann q->qh.token &= ~QTD_TOKEN_DTOGGLE; 1364f1ae32a1SGerd Hoffmann q->qh.token |= dtoggle; 1365f1ae32a1SGerd Hoffmann } 1366f1ae32a1SGerd Hoffmann 1367f1ae32a1SGerd Hoffmann q->qh.bufptr[1] &= ~BUFPTR_CPROGMASK_MASK; 1368f1ae32a1SGerd Hoffmann q->qh.bufptr[2] &= ~BUFPTR_FRAMETAG_MASK; 1369f1ae32a1SGerd Hoffmann 1370a5e0139aSGerd Hoffmann ehci_flush_qh(q); 1371f1ae32a1SGerd Hoffmann 1372f1ae32a1SGerd Hoffmann return 0; 1373f1ae32a1SGerd Hoffmann } 1374f1ae32a1SGerd Hoffmann 1375eb36a88eSGerd Hoffmann static int ehci_init_transfer(EHCIPacket *p) 1376f1ae32a1SGerd Hoffmann { 1377f1ae32a1SGerd Hoffmann uint32_t cpage, offset, bytes, plen; 1378f1ae32a1SGerd Hoffmann dma_addr_t page; 1379f1ae32a1SGerd Hoffmann 1380eb36a88eSGerd Hoffmann cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE); 1381eb36a88eSGerd Hoffmann bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES); 1382eb36a88eSGerd Hoffmann offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK; 1383eb36a88eSGerd Hoffmann pci_dma_sglist_init(&p->sgl, &p->queue->ehci->dev, 5); 1384f1ae32a1SGerd Hoffmann 1385f1ae32a1SGerd Hoffmann while (bytes > 0) { 1386f1ae32a1SGerd Hoffmann if (cpage > 4) { 1387f1ae32a1SGerd Hoffmann fprintf(stderr, "cpage out of range (%d)\n", cpage); 1388f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1389f1ae32a1SGerd Hoffmann } 1390f1ae32a1SGerd Hoffmann 1391eb36a88eSGerd Hoffmann page = p->qtd.bufptr[cpage] & QTD_BUFPTR_MASK; 1392f1ae32a1SGerd Hoffmann page += offset; 1393f1ae32a1SGerd Hoffmann plen = bytes; 1394f1ae32a1SGerd Hoffmann if (plen > 4096 - offset) { 1395f1ae32a1SGerd Hoffmann plen = 4096 - offset; 1396f1ae32a1SGerd Hoffmann offset = 0; 1397f1ae32a1SGerd Hoffmann cpage++; 1398f1ae32a1SGerd Hoffmann } 1399f1ae32a1SGerd Hoffmann 1400eb36a88eSGerd Hoffmann qemu_sglist_add(&p->sgl, page, plen); 1401f1ae32a1SGerd Hoffmann bytes -= plen; 1402f1ae32a1SGerd Hoffmann } 1403f1ae32a1SGerd Hoffmann return 0; 1404f1ae32a1SGerd Hoffmann } 1405f1ae32a1SGerd Hoffmann 1406f1ae32a1SGerd Hoffmann static void ehci_finish_transfer(EHCIQueue *q, int status) 1407f1ae32a1SGerd Hoffmann { 1408f1ae32a1SGerd Hoffmann uint32_t cpage, offset; 1409f1ae32a1SGerd Hoffmann 1410f1ae32a1SGerd Hoffmann if (status > 0) { 1411f1ae32a1SGerd Hoffmann /* update cpage & offset */ 1412f1ae32a1SGerd Hoffmann cpage = get_field(q->qh.token, QTD_TOKEN_CPAGE); 1413f1ae32a1SGerd Hoffmann offset = q->qh.bufptr[0] & ~QTD_BUFPTR_MASK; 1414f1ae32a1SGerd Hoffmann 1415f1ae32a1SGerd Hoffmann offset += status; 1416f1ae32a1SGerd Hoffmann cpage += offset >> QTD_BUFPTR_SH; 1417f1ae32a1SGerd Hoffmann offset &= ~QTD_BUFPTR_MASK; 1418f1ae32a1SGerd Hoffmann 1419f1ae32a1SGerd Hoffmann set_field(&q->qh.token, cpage, QTD_TOKEN_CPAGE); 1420f1ae32a1SGerd Hoffmann q->qh.bufptr[0] &= QTD_BUFPTR_MASK; 1421f1ae32a1SGerd Hoffmann q->qh.bufptr[0] |= offset; 1422f1ae32a1SGerd Hoffmann } 1423f1ae32a1SGerd Hoffmann } 1424f1ae32a1SGerd Hoffmann 1425f1ae32a1SGerd Hoffmann static void ehci_async_complete_packet(USBPort *port, USBPacket *packet) 1426f1ae32a1SGerd Hoffmann { 1427eb36a88eSGerd Hoffmann EHCIPacket *p; 1428f1ae32a1SGerd Hoffmann EHCIState *s = port->opaque; 1429f1ae32a1SGerd Hoffmann uint32_t portsc = s->portsc[port->index]; 1430f1ae32a1SGerd Hoffmann 1431f1ae32a1SGerd Hoffmann if (portsc & PORTSC_POWNER) { 1432f1ae32a1SGerd Hoffmann USBPort *companion = s->companion_ports[port->index]; 1433f1ae32a1SGerd Hoffmann companion->ops->complete(companion, packet); 1434f1ae32a1SGerd Hoffmann return; 1435f1ae32a1SGerd Hoffmann } 1436f1ae32a1SGerd Hoffmann 1437eb36a88eSGerd Hoffmann p = container_of(packet, EHCIPacket, packet); 1438eb36a88eSGerd Hoffmann trace_usb_ehci_packet_action(p->queue, p, "wakeup"); 1439eb36a88eSGerd Hoffmann assert(p->async == EHCI_ASYNC_INFLIGHT); 1440eb36a88eSGerd Hoffmann p->async = EHCI_ASYNC_FINISHED; 1441eb36a88eSGerd Hoffmann p->usb_status = packet->result; 1442ae710b99SGerd Hoffmann 1443ae710b99SGerd Hoffmann if (p->queue->async) { 1444ae710b99SGerd Hoffmann qemu_bh_schedule(p->queue->ehci->async_bh); 1445ae710b99SGerd Hoffmann } 1446f1ae32a1SGerd Hoffmann } 1447f1ae32a1SGerd Hoffmann 1448f1ae32a1SGerd Hoffmann static void ehci_execute_complete(EHCIQueue *q) 1449f1ae32a1SGerd Hoffmann { 1450eb36a88eSGerd Hoffmann EHCIPacket *p = QTAILQ_FIRST(&q->packets); 1451eb36a88eSGerd Hoffmann 1452eb36a88eSGerd Hoffmann assert(p != NULL); 1453eb36a88eSGerd Hoffmann assert(p->qtdaddr == q->qtdaddr); 1454eb36a88eSGerd Hoffmann assert(p->async != EHCI_ASYNC_INFLIGHT); 1455eb36a88eSGerd Hoffmann p->async = EHCI_ASYNC_NONE; 1456f1ae32a1SGerd Hoffmann 1457f1ae32a1SGerd Hoffmann DPRINTF("execute_complete: qhaddr 0x%x, next %x, qtdaddr 0x%x, status %d\n", 1458f1ae32a1SGerd Hoffmann q->qhaddr, q->qh.next, q->qtdaddr, q->usb_status); 1459f1ae32a1SGerd Hoffmann 1460eb36a88eSGerd Hoffmann if (p->usb_status < 0) { 1461eb36a88eSGerd Hoffmann switch (p->usb_status) { 1462f1ae32a1SGerd Hoffmann case USB_RET_IOERROR: 1463f1ae32a1SGerd Hoffmann case USB_RET_NODEV: 1464f1ae32a1SGerd Hoffmann q->qh.token |= (QTD_TOKEN_HALT | QTD_TOKEN_XACTERR); 1465f1ae32a1SGerd Hoffmann set_field(&q->qh.token, 0, QTD_TOKEN_CERR); 14667efc17afSGerd Hoffmann ehci_raise_irq(q->ehci, USBSTS_ERRINT); 1467f1ae32a1SGerd Hoffmann break; 1468f1ae32a1SGerd Hoffmann case USB_RET_STALL: 1469f1ae32a1SGerd Hoffmann q->qh.token |= QTD_TOKEN_HALT; 14707efc17afSGerd Hoffmann ehci_raise_irq(q->ehci, USBSTS_ERRINT); 1471f1ae32a1SGerd Hoffmann break; 1472f1ae32a1SGerd Hoffmann case USB_RET_NAK: 1473f1ae32a1SGerd Hoffmann set_field(&q->qh.altnext_qtd, 0, QH_ALTNEXT_NAKCNT); 1474f1ae32a1SGerd Hoffmann return; /* We're not done yet with this transaction */ 1475f1ae32a1SGerd Hoffmann case USB_RET_BABBLE: 1476f1ae32a1SGerd Hoffmann q->qh.token |= (QTD_TOKEN_HALT | QTD_TOKEN_BABBLE); 14777efc17afSGerd Hoffmann ehci_raise_irq(q->ehci, USBSTS_ERRINT); 1478f1ae32a1SGerd Hoffmann break; 1479f1ae32a1SGerd Hoffmann default: 1480f1ae32a1SGerd Hoffmann /* should not be triggerable */ 1481eb36a88eSGerd Hoffmann fprintf(stderr, "USB invalid response %d\n", p->usb_status); 1482f1ae32a1SGerd Hoffmann assert(0); 1483f1ae32a1SGerd Hoffmann break; 1484f1ae32a1SGerd Hoffmann } 1485f1ae32a1SGerd Hoffmann } else { 1486f1ae32a1SGerd Hoffmann // TODO check 4.12 for splits 1487f1ae32a1SGerd Hoffmann 1488eb36a88eSGerd Hoffmann if (p->tbytes && p->pid == USB_TOKEN_IN) { 1489eb36a88eSGerd Hoffmann p->tbytes -= p->usb_status; 1490f1ae32a1SGerd Hoffmann } else { 1491eb36a88eSGerd Hoffmann p->tbytes = 0; 1492f1ae32a1SGerd Hoffmann } 1493f1ae32a1SGerd Hoffmann 1494eb36a88eSGerd Hoffmann DPRINTF("updating tbytes to %d\n", p->tbytes); 1495eb36a88eSGerd Hoffmann set_field(&q->qh.token, p->tbytes, QTD_TOKEN_TBYTES); 1496f1ae32a1SGerd Hoffmann } 1497eb36a88eSGerd Hoffmann ehci_finish_transfer(q, p->usb_status); 1498e2f89926SDavid Gibson usb_packet_unmap(&p->packet, &p->sgl); 1499eb36a88eSGerd Hoffmann qemu_sglist_destroy(&p->sgl); 1500f1ae32a1SGerd Hoffmann 1501f1ae32a1SGerd Hoffmann q->qh.token ^= QTD_TOKEN_DTOGGLE; 1502f1ae32a1SGerd Hoffmann q->qh.token &= ~QTD_TOKEN_ACTIVE; 1503f1ae32a1SGerd Hoffmann 1504f1ae32a1SGerd Hoffmann if (q->qh.token & QTD_TOKEN_IOC) { 15057efc17afSGerd Hoffmann ehci_raise_irq(q->ehci, USBSTS_INT); 1506f1ae32a1SGerd Hoffmann } 1507f1ae32a1SGerd Hoffmann } 1508f1ae32a1SGerd Hoffmann 1509f1ae32a1SGerd Hoffmann // 4.10.3 1510f1ae32a1SGerd Hoffmann 1511773dc9cdSGerd Hoffmann static int ehci_execute(EHCIPacket *p, const char *action) 1512f1ae32a1SGerd Hoffmann { 1513f1ae32a1SGerd Hoffmann USBEndpoint *ep; 1514f1ae32a1SGerd Hoffmann int ret; 1515f1ae32a1SGerd Hoffmann int endp; 1516f1ae32a1SGerd Hoffmann 15174224558fSGerd Hoffmann if (!(p->qtd.token & QTD_TOKEN_ACTIVE)) { 15184224558fSGerd Hoffmann fprintf(stderr, "Attempting to execute inactive qtd\n"); 1519f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1520f1ae32a1SGerd Hoffmann } 1521f1ae32a1SGerd Hoffmann 15224224558fSGerd Hoffmann p->tbytes = (p->qtd.token & QTD_TOKEN_TBYTES_MASK) >> QTD_TOKEN_TBYTES_SH; 1523eb36a88eSGerd Hoffmann if (p->tbytes > BUFF_SIZE) { 1524f1ae32a1SGerd Hoffmann fprintf(stderr, "Request for more bytes than allowed\n"); 1525f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1526f1ae32a1SGerd Hoffmann } 1527f1ae32a1SGerd Hoffmann 15284224558fSGerd Hoffmann p->pid = (p->qtd.token & QTD_TOKEN_PID_MASK) >> QTD_TOKEN_PID_SH; 1529eb36a88eSGerd Hoffmann switch (p->pid) { 1530eb36a88eSGerd Hoffmann case 0: 1531eb36a88eSGerd Hoffmann p->pid = USB_TOKEN_OUT; 1532eb36a88eSGerd Hoffmann break; 1533eb36a88eSGerd Hoffmann case 1: 1534eb36a88eSGerd Hoffmann p->pid = USB_TOKEN_IN; 1535eb36a88eSGerd Hoffmann break; 1536eb36a88eSGerd Hoffmann case 2: 1537eb36a88eSGerd Hoffmann p->pid = USB_TOKEN_SETUP; 1538eb36a88eSGerd Hoffmann break; 1539eb36a88eSGerd Hoffmann default: 1540eb36a88eSGerd Hoffmann fprintf(stderr, "bad token\n"); 1541eb36a88eSGerd Hoffmann break; 1542f1ae32a1SGerd Hoffmann } 1543f1ae32a1SGerd Hoffmann 1544eb36a88eSGerd Hoffmann if (ehci_init_transfer(p) != 0) { 1545f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1546f1ae32a1SGerd Hoffmann } 1547f1ae32a1SGerd Hoffmann 15484224558fSGerd Hoffmann endp = get_field(p->queue->qh.epchar, QH_EPCHAR_EP); 1549e59928b3SGerd Hoffmann ep = usb_ep_get(p->queue->dev, p->pid, endp); 1550f1ae32a1SGerd Hoffmann 1551e983395dSGerd Hoffmann usb_packet_setup(&p->packet, p->pid, ep, p->qtdaddr); 1552eb36a88eSGerd Hoffmann usb_packet_map(&p->packet, &p->sgl); 1553f1ae32a1SGerd Hoffmann 1554773dc9cdSGerd Hoffmann trace_usb_ehci_packet_action(p->queue, p, action); 1555e59928b3SGerd Hoffmann ret = usb_handle_packet(p->queue->dev, &p->packet); 1556f1ae32a1SGerd Hoffmann DPRINTF("submit: qh %x next %x qtd %x pid %x len %zd " 1557f1ae32a1SGerd Hoffmann "(total %d) endp %x ret %d\n", 1558f1ae32a1SGerd Hoffmann q->qhaddr, q->qh.next, q->qtdaddr, q->pid, 1559f1ae32a1SGerd Hoffmann q->packet.iov.size, q->tbytes, endp, ret); 1560f1ae32a1SGerd Hoffmann 1561f1ae32a1SGerd Hoffmann if (ret > BUFF_SIZE) { 1562f1ae32a1SGerd Hoffmann fprintf(stderr, "ret from usb_handle_packet > BUFF_SIZE\n"); 1563f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1564f1ae32a1SGerd Hoffmann } 1565f1ae32a1SGerd Hoffmann 1566f1ae32a1SGerd Hoffmann return ret; 1567f1ae32a1SGerd Hoffmann } 1568f1ae32a1SGerd Hoffmann 1569f1ae32a1SGerd Hoffmann /* 4.7.2 1570f1ae32a1SGerd Hoffmann */ 1571f1ae32a1SGerd Hoffmann 1572f1ae32a1SGerd Hoffmann static int ehci_process_itd(EHCIState *ehci, 1573e983395dSGerd Hoffmann EHCIitd *itd, 1574e983395dSGerd Hoffmann uint32_t addr) 1575f1ae32a1SGerd Hoffmann { 1576f1ae32a1SGerd Hoffmann USBDevice *dev; 1577f1ae32a1SGerd Hoffmann USBEndpoint *ep; 1578f1ae32a1SGerd Hoffmann int ret; 1579f1ae32a1SGerd Hoffmann uint32_t i, len, pid, dir, devaddr, endp; 1580f1ae32a1SGerd Hoffmann uint32_t pg, off, ptr1, ptr2, max, mult; 1581f1ae32a1SGerd Hoffmann 1582f1ae32a1SGerd Hoffmann dir =(itd->bufptr[1] & ITD_BUFPTR_DIRECTION); 1583f1ae32a1SGerd Hoffmann devaddr = get_field(itd->bufptr[0], ITD_BUFPTR_DEVADDR); 1584f1ae32a1SGerd Hoffmann endp = get_field(itd->bufptr[0], ITD_BUFPTR_EP); 1585f1ae32a1SGerd Hoffmann max = get_field(itd->bufptr[1], ITD_BUFPTR_MAXPKT); 1586f1ae32a1SGerd Hoffmann mult = get_field(itd->bufptr[2], ITD_BUFPTR_MULT); 1587f1ae32a1SGerd Hoffmann 1588f1ae32a1SGerd Hoffmann for(i = 0; i < 8; i++) { 1589f1ae32a1SGerd Hoffmann if (itd->transact[i] & ITD_XACT_ACTIVE) { 1590f1ae32a1SGerd Hoffmann pg = get_field(itd->transact[i], ITD_XACT_PGSEL); 1591f1ae32a1SGerd Hoffmann off = itd->transact[i] & ITD_XACT_OFFSET_MASK; 1592f1ae32a1SGerd Hoffmann ptr1 = (itd->bufptr[pg] & ITD_BUFPTR_MASK); 1593f1ae32a1SGerd Hoffmann ptr2 = (itd->bufptr[pg+1] & ITD_BUFPTR_MASK); 1594f1ae32a1SGerd Hoffmann len = get_field(itd->transact[i], ITD_XACT_LENGTH); 1595f1ae32a1SGerd Hoffmann 1596f1ae32a1SGerd Hoffmann if (len > max * mult) { 1597f1ae32a1SGerd Hoffmann len = max * mult; 1598f1ae32a1SGerd Hoffmann } 1599f1ae32a1SGerd Hoffmann 1600f1ae32a1SGerd Hoffmann if (len > BUFF_SIZE) { 1601f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1602f1ae32a1SGerd Hoffmann } 1603f1ae32a1SGerd Hoffmann 1604f1ae32a1SGerd Hoffmann pci_dma_sglist_init(&ehci->isgl, &ehci->dev, 2); 1605f1ae32a1SGerd Hoffmann if (off + len > 4096) { 1606f1ae32a1SGerd Hoffmann /* transfer crosses page border */ 1607f1ae32a1SGerd Hoffmann uint32_t len2 = off + len - 4096; 1608f1ae32a1SGerd Hoffmann uint32_t len1 = len - len2; 1609f1ae32a1SGerd Hoffmann qemu_sglist_add(&ehci->isgl, ptr1 + off, len1); 1610f1ae32a1SGerd Hoffmann qemu_sglist_add(&ehci->isgl, ptr2, len2); 1611f1ae32a1SGerd Hoffmann } else { 1612f1ae32a1SGerd Hoffmann qemu_sglist_add(&ehci->isgl, ptr1 + off, len); 1613f1ae32a1SGerd Hoffmann } 1614f1ae32a1SGerd Hoffmann 1615f1ae32a1SGerd Hoffmann pid = dir ? USB_TOKEN_IN : USB_TOKEN_OUT; 1616f1ae32a1SGerd Hoffmann 1617f1ae32a1SGerd Hoffmann dev = ehci_find_device(ehci, devaddr); 1618f1ae32a1SGerd Hoffmann ep = usb_ep_get(dev, pid, endp); 16197ce86aa1SHans de Goede if (ep && ep->type == USB_ENDPOINT_XFER_ISOC) { 1620e983395dSGerd Hoffmann usb_packet_setup(&ehci->ipacket, pid, ep, addr); 1621f1ae32a1SGerd Hoffmann usb_packet_map(&ehci->ipacket, &ehci->isgl); 1622f1ae32a1SGerd Hoffmann ret = usb_handle_packet(dev, &ehci->ipacket); 1623f1ae32a1SGerd Hoffmann assert(ret != USB_RET_ASYNC); 1624e2f89926SDavid Gibson usb_packet_unmap(&ehci->ipacket, &ehci->isgl); 1625f1ae32a1SGerd Hoffmann } else { 1626f1ae32a1SGerd Hoffmann DPRINTF("ISOCH: attempt to addess non-iso endpoint\n"); 1627f1ae32a1SGerd Hoffmann ret = USB_RET_NAK; 1628f1ae32a1SGerd Hoffmann } 1629f1ae32a1SGerd Hoffmann qemu_sglist_destroy(&ehci->isgl); 1630f1ae32a1SGerd Hoffmann 1631f1ae32a1SGerd Hoffmann if (ret < 0) { 1632f1ae32a1SGerd Hoffmann switch (ret) { 1633f1ae32a1SGerd Hoffmann default: 1634f1ae32a1SGerd Hoffmann fprintf(stderr, "Unexpected iso usb result: %d\n", ret); 1635f1ae32a1SGerd Hoffmann /* Fall through */ 1636f1ae32a1SGerd Hoffmann case USB_RET_IOERROR: 1637f1ae32a1SGerd Hoffmann case USB_RET_NODEV: 1638f1ae32a1SGerd Hoffmann /* 3.3.2: XACTERR is only allowed on IN transactions */ 1639f1ae32a1SGerd Hoffmann if (dir) { 1640f1ae32a1SGerd Hoffmann itd->transact[i] |= ITD_XACT_XACTERR; 16417efc17afSGerd Hoffmann ehci_raise_irq(ehci, USBSTS_ERRINT); 1642f1ae32a1SGerd Hoffmann } 1643f1ae32a1SGerd Hoffmann break; 1644f1ae32a1SGerd Hoffmann case USB_RET_BABBLE: 1645f1ae32a1SGerd Hoffmann itd->transact[i] |= ITD_XACT_BABBLE; 16467efc17afSGerd Hoffmann ehci_raise_irq(ehci, USBSTS_ERRINT); 1647f1ae32a1SGerd Hoffmann break; 1648f1ae32a1SGerd Hoffmann case USB_RET_NAK: 1649f1ae32a1SGerd Hoffmann /* no data for us, so do a zero-length transfer */ 1650f1ae32a1SGerd Hoffmann ret = 0; 1651f1ae32a1SGerd Hoffmann break; 1652f1ae32a1SGerd Hoffmann } 1653f1ae32a1SGerd Hoffmann } 1654f1ae32a1SGerd Hoffmann if (ret >= 0) { 1655f1ae32a1SGerd Hoffmann if (!dir) { 1656f1ae32a1SGerd Hoffmann /* OUT */ 1657f1ae32a1SGerd Hoffmann set_field(&itd->transact[i], len - ret, ITD_XACT_LENGTH); 1658f1ae32a1SGerd Hoffmann } else { 1659f1ae32a1SGerd Hoffmann /* IN */ 1660f1ae32a1SGerd Hoffmann set_field(&itd->transact[i], ret, ITD_XACT_LENGTH); 1661f1ae32a1SGerd Hoffmann } 1662f1ae32a1SGerd Hoffmann } 1663f1ae32a1SGerd Hoffmann if (itd->transact[i] & ITD_XACT_IOC) { 16647efc17afSGerd Hoffmann ehci_raise_irq(ehci, USBSTS_INT); 1665f1ae32a1SGerd Hoffmann } 1666f1ae32a1SGerd Hoffmann itd->transact[i] &= ~ITD_XACT_ACTIVE; 1667f1ae32a1SGerd Hoffmann } 1668f1ae32a1SGerd Hoffmann } 1669f1ae32a1SGerd Hoffmann return 0; 1670f1ae32a1SGerd Hoffmann } 1671f1ae32a1SGerd Hoffmann 1672cd665715SGerd Hoffmann 1673f1ae32a1SGerd Hoffmann /* This state is the entry point for asynchronous schedule 1674f1ae32a1SGerd Hoffmann * processing. Entry here consitutes a EHCI start event state (4.8.5) 1675f1ae32a1SGerd Hoffmann */ 1676f1ae32a1SGerd Hoffmann static int ehci_state_waitlisthead(EHCIState *ehci, int async) 1677f1ae32a1SGerd Hoffmann { 1678f1ae32a1SGerd Hoffmann EHCIqh qh; 1679f1ae32a1SGerd Hoffmann int i = 0; 1680f1ae32a1SGerd Hoffmann int again = 0; 1681f1ae32a1SGerd Hoffmann uint32_t entry = ehci->asynclistaddr; 1682f1ae32a1SGerd Hoffmann 1683f1ae32a1SGerd Hoffmann /* set reclamation flag at start event (4.8.6) */ 1684f1ae32a1SGerd Hoffmann if (async) { 1685f1ae32a1SGerd Hoffmann ehci_set_usbsts(ehci, USBSTS_REC); 1686f1ae32a1SGerd Hoffmann } 1687f1ae32a1SGerd Hoffmann 168866f092d2SHans de Goede ehci_queues_rip_unused(ehci, async, 0); 1689f1ae32a1SGerd Hoffmann 1690f1ae32a1SGerd Hoffmann /* Find the head of the list (4.9.1.1) */ 1691f1ae32a1SGerd Hoffmann for(i = 0; i < MAX_QH; i++) { 1692f1ae32a1SGerd Hoffmann get_dwords(ehci, NLPTR_GET(entry), (uint32_t *) &qh, 1693f1ae32a1SGerd Hoffmann sizeof(EHCIqh) >> 2); 1694f1ae32a1SGerd Hoffmann ehci_trace_qh(NULL, NLPTR_GET(entry), &qh); 1695f1ae32a1SGerd Hoffmann 1696f1ae32a1SGerd Hoffmann if (qh.epchar & QH_EPCHAR_H) { 1697f1ae32a1SGerd Hoffmann if (async) { 1698f1ae32a1SGerd Hoffmann entry |= (NLPTR_TYPE_QH << 1); 1699f1ae32a1SGerd Hoffmann } 1700f1ae32a1SGerd Hoffmann 1701f1ae32a1SGerd Hoffmann ehci_set_fetch_addr(ehci, async, entry); 1702f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHENTRY); 1703f1ae32a1SGerd Hoffmann again = 1; 1704f1ae32a1SGerd Hoffmann goto out; 1705f1ae32a1SGerd Hoffmann } 1706f1ae32a1SGerd Hoffmann 1707f1ae32a1SGerd Hoffmann entry = qh.next; 1708f1ae32a1SGerd Hoffmann if (entry == ehci->asynclistaddr) { 1709f1ae32a1SGerd Hoffmann break; 1710f1ae32a1SGerd Hoffmann } 1711f1ae32a1SGerd Hoffmann } 1712f1ae32a1SGerd Hoffmann 1713f1ae32a1SGerd Hoffmann /* no head found for list. */ 1714f1ae32a1SGerd Hoffmann 1715f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 1716f1ae32a1SGerd Hoffmann 1717f1ae32a1SGerd Hoffmann out: 1718f1ae32a1SGerd Hoffmann return again; 1719f1ae32a1SGerd Hoffmann } 1720f1ae32a1SGerd Hoffmann 1721f1ae32a1SGerd Hoffmann 1722f1ae32a1SGerd Hoffmann /* This state is the entry point for periodic schedule processing as 1723f1ae32a1SGerd Hoffmann * well as being a continuation state for async processing. 1724f1ae32a1SGerd Hoffmann */ 1725f1ae32a1SGerd Hoffmann static int ehci_state_fetchentry(EHCIState *ehci, int async) 1726f1ae32a1SGerd Hoffmann { 1727f1ae32a1SGerd Hoffmann int again = 0; 1728f1ae32a1SGerd Hoffmann uint32_t entry = ehci_get_fetch_addr(ehci, async); 1729f1ae32a1SGerd Hoffmann 1730f1ae32a1SGerd Hoffmann if (NLPTR_TBIT(entry)) { 1731f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 1732f1ae32a1SGerd Hoffmann goto out; 1733f1ae32a1SGerd Hoffmann } 1734f1ae32a1SGerd Hoffmann 1735f1ae32a1SGerd Hoffmann /* section 4.8, only QH in async schedule */ 1736f1ae32a1SGerd Hoffmann if (async && (NLPTR_TYPE_GET(entry) != NLPTR_TYPE_QH)) { 1737f1ae32a1SGerd Hoffmann fprintf(stderr, "non queue head request in async schedule\n"); 1738f1ae32a1SGerd Hoffmann return -1; 1739f1ae32a1SGerd Hoffmann } 1740f1ae32a1SGerd Hoffmann 1741f1ae32a1SGerd Hoffmann switch (NLPTR_TYPE_GET(entry)) { 1742f1ae32a1SGerd Hoffmann case NLPTR_TYPE_QH: 1743f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHQH); 1744f1ae32a1SGerd Hoffmann again = 1; 1745f1ae32a1SGerd Hoffmann break; 1746f1ae32a1SGerd Hoffmann 1747f1ae32a1SGerd Hoffmann case NLPTR_TYPE_ITD: 1748f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHITD); 1749f1ae32a1SGerd Hoffmann again = 1; 1750f1ae32a1SGerd Hoffmann break; 1751f1ae32a1SGerd Hoffmann 1752f1ae32a1SGerd Hoffmann case NLPTR_TYPE_STITD: 1753f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHSITD); 1754f1ae32a1SGerd Hoffmann again = 1; 1755f1ae32a1SGerd Hoffmann break; 1756f1ae32a1SGerd Hoffmann 1757f1ae32a1SGerd Hoffmann default: 1758f1ae32a1SGerd Hoffmann /* TODO: handle FSTN type */ 1759f1ae32a1SGerd Hoffmann fprintf(stderr, "FETCHENTRY: entry at %X is of type %d " 1760f1ae32a1SGerd Hoffmann "which is not supported yet\n", entry, NLPTR_TYPE_GET(entry)); 1761f1ae32a1SGerd Hoffmann return -1; 1762f1ae32a1SGerd Hoffmann } 1763f1ae32a1SGerd Hoffmann 1764f1ae32a1SGerd Hoffmann out: 1765f1ae32a1SGerd Hoffmann return again; 1766f1ae32a1SGerd Hoffmann } 1767f1ae32a1SGerd Hoffmann 1768f1ae32a1SGerd Hoffmann static EHCIQueue *ehci_state_fetchqh(EHCIState *ehci, int async) 1769f1ae32a1SGerd Hoffmann { 1770eb36a88eSGerd Hoffmann EHCIPacket *p; 1771dafe31fcSHans de Goede uint32_t entry, devaddr, endp; 1772f1ae32a1SGerd Hoffmann EHCIQueue *q; 1773dafe31fcSHans de Goede EHCIqh qh; 1774f1ae32a1SGerd Hoffmann 1775f1ae32a1SGerd Hoffmann entry = ehci_get_fetch_addr(ehci, async); 1776f1ae32a1SGerd Hoffmann q = ehci_find_queue_by_qh(ehci, entry, async); 1777f1ae32a1SGerd Hoffmann if (NULL == q) { 17788f6d5e26SGerd Hoffmann q = ehci_alloc_queue(ehci, entry, async); 1779f1ae32a1SGerd Hoffmann } 1780eb36a88eSGerd Hoffmann p = QTAILQ_FIRST(&q->packets); 1781f1ae32a1SGerd Hoffmann 17828f6d5e26SGerd Hoffmann q->seen++; 1783f1ae32a1SGerd Hoffmann if (q->seen > 1) { 1784f1ae32a1SGerd Hoffmann /* we are going in circles -- stop processing */ 1785f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 1786f1ae32a1SGerd Hoffmann q = NULL; 1787f1ae32a1SGerd Hoffmann goto out; 1788f1ae32a1SGerd Hoffmann } 1789f1ae32a1SGerd Hoffmann 1790f1ae32a1SGerd Hoffmann get_dwords(ehci, NLPTR_GET(q->qhaddr), 1791dafe31fcSHans de Goede (uint32_t *) &qh, sizeof(EHCIqh) >> 2); 1792dafe31fcSHans de Goede ehci_trace_qh(q, NLPTR_GET(q->qhaddr), &qh); 1793f1ae32a1SGerd Hoffmann 1794dafe31fcSHans de Goede /* 1795dafe31fcSHans de Goede * The overlay area of the qh should never be changed by the guest, 1796dafe31fcSHans de Goede * except when idle, in which case the reset is a nop. 1797dafe31fcSHans de Goede */ 1798dafe31fcSHans de Goede devaddr = get_field(qh.epchar, QH_EPCHAR_DEVADDR); 1799dafe31fcSHans de Goede endp = get_field(qh.epchar, QH_EPCHAR_EP); 1800dafe31fcSHans de Goede if ((devaddr != get_field(q->qh.epchar, QH_EPCHAR_DEVADDR)) || 1801dafe31fcSHans de Goede (endp != get_field(q->qh.epchar, QH_EPCHAR_EP)) || 1802dafe31fcSHans de Goede (memcmp(&qh.current_qtd, &q->qh.current_qtd, 1803dafe31fcSHans de Goede 9 * sizeof(uint32_t)) != 0) || 1804dafe31fcSHans de Goede (q->dev != NULL && q->dev->addr != devaddr)) { 1805dafe31fcSHans de Goede ehci_reset_queue(q); 1806dafe31fcSHans de Goede p = NULL; 1807e59928b3SGerd Hoffmann } 1808dafe31fcSHans de Goede q->qh = qh; 1809dafe31fcSHans de Goede 1810e59928b3SGerd Hoffmann if (q->dev == NULL) { 1811e59928b3SGerd Hoffmann q->dev = ehci_find_device(q->ehci, devaddr); 1812e59928b3SGerd Hoffmann } 1813e59928b3SGerd Hoffmann 1814eb36a88eSGerd Hoffmann if (p && p->async == EHCI_ASYNC_FINISHED) { 1815f1ae32a1SGerd Hoffmann /* I/O finished -- continue processing queue */ 1816773dc9cdSGerd Hoffmann trace_usb_ehci_packet_action(p->queue, p, "complete"); 1817f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_EXECUTING); 1818f1ae32a1SGerd Hoffmann goto out; 1819f1ae32a1SGerd Hoffmann } 1820f1ae32a1SGerd Hoffmann 1821f1ae32a1SGerd Hoffmann if (async && (q->qh.epchar & QH_EPCHAR_H)) { 1822f1ae32a1SGerd Hoffmann 1823f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 4.8.3 & 4.10.1 */ 1824f1ae32a1SGerd Hoffmann if (ehci->usbsts & USBSTS_REC) { 1825f1ae32a1SGerd Hoffmann ehci_clear_usbsts(ehci, USBSTS_REC); 1826f1ae32a1SGerd Hoffmann } else { 1827f1ae32a1SGerd Hoffmann DPRINTF("FETCHQH: QH 0x%08x. H-bit set, reclamation status reset" 1828f1ae32a1SGerd Hoffmann " - done processing\n", q->qhaddr); 1829f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 1830f1ae32a1SGerd Hoffmann q = NULL; 1831f1ae32a1SGerd Hoffmann goto out; 1832f1ae32a1SGerd Hoffmann } 1833f1ae32a1SGerd Hoffmann } 1834f1ae32a1SGerd Hoffmann 1835f1ae32a1SGerd Hoffmann #if EHCI_DEBUG 1836f1ae32a1SGerd Hoffmann if (q->qhaddr != q->qh.next) { 1837f1ae32a1SGerd Hoffmann DPRINTF("FETCHQH: QH 0x%08x (h %x halt %x active %x) next 0x%08x\n", 1838f1ae32a1SGerd Hoffmann q->qhaddr, 1839f1ae32a1SGerd Hoffmann q->qh.epchar & QH_EPCHAR_H, 1840f1ae32a1SGerd Hoffmann q->qh.token & QTD_TOKEN_HALT, 1841f1ae32a1SGerd Hoffmann q->qh.token & QTD_TOKEN_ACTIVE, 1842f1ae32a1SGerd Hoffmann q->qh.next); 1843f1ae32a1SGerd Hoffmann } 1844f1ae32a1SGerd Hoffmann #endif 1845f1ae32a1SGerd Hoffmann 1846f1ae32a1SGerd Hoffmann if (q->qh.token & QTD_TOKEN_HALT) { 1847f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_HORIZONTALQH); 1848f1ae32a1SGerd Hoffmann 1849f1ae32a1SGerd Hoffmann } else if ((q->qh.token & QTD_TOKEN_ACTIVE) && 1850f1ae32a1SGerd Hoffmann (NLPTR_TBIT(q->qh.current_qtd) == 0)) { 1851f1ae32a1SGerd Hoffmann q->qtdaddr = q->qh.current_qtd; 1852f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHQTD); 1853f1ae32a1SGerd Hoffmann 1854f1ae32a1SGerd Hoffmann } else { 1855f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 4.10.2 */ 1856f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ADVANCEQUEUE); 1857f1ae32a1SGerd Hoffmann } 1858f1ae32a1SGerd Hoffmann 1859f1ae32a1SGerd Hoffmann out: 1860f1ae32a1SGerd Hoffmann return q; 1861f1ae32a1SGerd Hoffmann } 1862f1ae32a1SGerd Hoffmann 1863f1ae32a1SGerd Hoffmann static int ehci_state_fetchitd(EHCIState *ehci, int async) 1864f1ae32a1SGerd Hoffmann { 1865f1ae32a1SGerd Hoffmann uint32_t entry; 1866f1ae32a1SGerd Hoffmann EHCIitd itd; 1867f1ae32a1SGerd Hoffmann 1868f1ae32a1SGerd Hoffmann assert(!async); 1869f1ae32a1SGerd Hoffmann entry = ehci_get_fetch_addr(ehci, async); 1870f1ae32a1SGerd Hoffmann 1871f1ae32a1SGerd Hoffmann get_dwords(ehci, NLPTR_GET(entry), (uint32_t *) &itd, 1872f1ae32a1SGerd Hoffmann sizeof(EHCIitd) >> 2); 1873f1ae32a1SGerd Hoffmann ehci_trace_itd(ehci, entry, &itd); 1874f1ae32a1SGerd Hoffmann 1875e983395dSGerd Hoffmann if (ehci_process_itd(ehci, &itd, entry) != 0) { 1876f1ae32a1SGerd Hoffmann return -1; 1877f1ae32a1SGerd Hoffmann } 1878f1ae32a1SGerd Hoffmann 1879f1ae32a1SGerd Hoffmann put_dwords(ehci, NLPTR_GET(entry), (uint32_t *) &itd, 1880f1ae32a1SGerd Hoffmann sizeof(EHCIitd) >> 2); 1881f1ae32a1SGerd Hoffmann ehci_set_fetch_addr(ehci, async, itd.next); 1882f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHENTRY); 1883f1ae32a1SGerd Hoffmann 1884f1ae32a1SGerd Hoffmann return 1; 1885f1ae32a1SGerd Hoffmann } 1886f1ae32a1SGerd Hoffmann 1887f1ae32a1SGerd Hoffmann static int ehci_state_fetchsitd(EHCIState *ehci, int async) 1888f1ae32a1SGerd Hoffmann { 1889f1ae32a1SGerd Hoffmann uint32_t entry; 1890f1ae32a1SGerd Hoffmann EHCIsitd sitd; 1891f1ae32a1SGerd Hoffmann 1892f1ae32a1SGerd Hoffmann assert(!async); 1893f1ae32a1SGerd Hoffmann entry = ehci_get_fetch_addr(ehci, async); 1894f1ae32a1SGerd Hoffmann 1895f1ae32a1SGerd Hoffmann get_dwords(ehci, NLPTR_GET(entry), (uint32_t *)&sitd, 1896f1ae32a1SGerd Hoffmann sizeof(EHCIsitd) >> 2); 1897f1ae32a1SGerd Hoffmann ehci_trace_sitd(ehci, entry, &sitd); 1898f1ae32a1SGerd Hoffmann 1899f1ae32a1SGerd Hoffmann if (!(sitd.results & SITD_RESULTS_ACTIVE)) { 1900f1ae32a1SGerd Hoffmann /* siTD is not active, nothing to do */; 1901f1ae32a1SGerd Hoffmann } else { 1902f1ae32a1SGerd Hoffmann /* TODO: split transfers are not implemented */ 1903f1ae32a1SGerd Hoffmann fprintf(stderr, "WARNING: Skipping active siTD\n"); 1904f1ae32a1SGerd Hoffmann } 1905f1ae32a1SGerd Hoffmann 1906f1ae32a1SGerd Hoffmann ehci_set_fetch_addr(ehci, async, sitd.next); 1907f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHENTRY); 1908f1ae32a1SGerd Hoffmann return 1; 1909f1ae32a1SGerd Hoffmann } 1910f1ae32a1SGerd Hoffmann 1911f1ae32a1SGerd Hoffmann /* Section 4.10.2 - paragraph 3 */ 1912ae0138a8SGerd Hoffmann static int ehci_state_advqueue(EHCIQueue *q) 1913f1ae32a1SGerd Hoffmann { 1914f1ae32a1SGerd Hoffmann #if 0 1915f1ae32a1SGerd Hoffmann /* TO-DO: 4.10.2 - paragraph 2 1916f1ae32a1SGerd Hoffmann * if I-bit is set to 1 and QH is not active 1917f1ae32a1SGerd Hoffmann * go to horizontal QH 1918f1ae32a1SGerd Hoffmann */ 1919f1ae32a1SGerd Hoffmann if (I-bit set) { 1920f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_HORIZONTALQH); 1921f1ae32a1SGerd Hoffmann goto out; 1922f1ae32a1SGerd Hoffmann } 1923f1ae32a1SGerd Hoffmann #endif 1924f1ae32a1SGerd Hoffmann 1925f1ae32a1SGerd Hoffmann /* 1926f1ae32a1SGerd Hoffmann * want data and alt-next qTD is valid 1927f1ae32a1SGerd Hoffmann */ 1928f1ae32a1SGerd Hoffmann if (((q->qh.token & QTD_TOKEN_TBYTES_MASK) != 0) && 1929f1ae32a1SGerd Hoffmann (NLPTR_TBIT(q->qh.altnext_qtd) == 0)) { 1930f1ae32a1SGerd Hoffmann q->qtdaddr = q->qh.altnext_qtd; 1931ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_FETCHQTD); 1932f1ae32a1SGerd Hoffmann 1933f1ae32a1SGerd Hoffmann /* 1934f1ae32a1SGerd Hoffmann * next qTD is valid 1935f1ae32a1SGerd Hoffmann */ 1936f1ae32a1SGerd Hoffmann } else if (NLPTR_TBIT(q->qh.next_qtd) == 0) { 1937f1ae32a1SGerd Hoffmann q->qtdaddr = q->qh.next_qtd; 1938ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_FETCHQTD); 1939f1ae32a1SGerd Hoffmann 1940f1ae32a1SGerd Hoffmann /* 1941f1ae32a1SGerd Hoffmann * no valid qTD, try next QH 1942f1ae32a1SGerd Hoffmann */ 1943f1ae32a1SGerd Hoffmann } else { 1944ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH); 1945f1ae32a1SGerd Hoffmann } 1946f1ae32a1SGerd Hoffmann 1947f1ae32a1SGerd Hoffmann return 1; 1948f1ae32a1SGerd Hoffmann } 1949f1ae32a1SGerd Hoffmann 1950f1ae32a1SGerd Hoffmann /* Section 4.10.2 - paragraph 4 */ 1951ae0138a8SGerd Hoffmann static int ehci_state_fetchqtd(EHCIQueue *q) 1952f1ae32a1SGerd Hoffmann { 1953eb36a88eSGerd Hoffmann EHCIqtd qtd; 1954eb36a88eSGerd Hoffmann EHCIPacket *p; 1955f1ae32a1SGerd Hoffmann int again = 0; 1956f1ae32a1SGerd Hoffmann 1957eb36a88eSGerd Hoffmann get_dwords(q->ehci, NLPTR_GET(q->qtdaddr), (uint32_t *) &qtd, 1958f1ae32a1SGerd Hoffmann sizeof(EHCIqtd) >> 2); 1959eb36a88eSGerd Hoffmann ehci_trace_qtd(q, NLPTR_GET(q->qtdaddr), &qtd); 1960f1ae32a1SGerd Hoffmann 1961773dc9cdSGerd Hoffmann p = QTAILQ_FIRST(&q->packets); 1962287fd3f1SGerd Hoffmann if (p != NULL) { 1963287fd3f1SGerd Hoffmann if (p->qtdaddr != q->qtdaddr || 1964287fd3f1SGerd Hoffmann (!NLPTR_TBIT(p->qtd.next) && (p->qtd.next != qtd.next)) || 1965287fd3f1SGerd Hoffmann (!NLPTR_TBIT(p->qtd.altnext) && (p->qtd.altnext != qtd.altnext)) || 1966287fd3f1SGerd Hoffmann p->qtd.bufptr[0] != qtd.bufptr[0]) { 1967287fd3f1SGerd Hoffmann /* guest bug: guest updated active QH or qTD underneath us */ 1968287fd3f1SGerd Hoffmann ehci_cancel_queue(q); 1969287fd3f1SGerd Hoffmann p = NULL; 1970287fd3f1SGerd Hoffmann } else { 1971287fd3f1SGerd Hoffmann p->qtd = qtd; 1972287fd3f1SGerd Hoffmann ehci_qh_do_overlay(q); 1973287fd3f1SGerd Hoffmann } 1974287fd3f1SGerd Hoffmann } 1975287fd3f1SGerd Hoffmann 1976287fd3f1SGerd Hoffmann if (!(qtd.token & QTD_TOKEN_ACTIVE)) { 1977287fd3f1SGerd Hoffmann if (p != NULL) { 1978287fd3f1SGerd Hoffmann /* transfer canceled by guest (clear active) */ 1979c7cdca3bSGerd Hoffmann ehci_cancel_queue(q); 1980c7cdca3bSGerd Hoffmann p = NULL; 1981773dc9cdSGerd Hoffmann } 1982287fd3f1SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH); 1983287fd3f1SGerd Hoffmann again = 1; 1984287fd3f1SGerd Hoffmann } else if (p != NULL) { 1985adf47834SHans de Goede switch (p->async) { 1986adf47834SHans de Goede case EHCI_ASYNC_NONE: 1987adf47834SHans de Goede /* Previously nacked packet (likely interrupt ep) */ 1988adf47834SHans de Goede ehci_set_state(q->ehci, q->async, EST_EXECUTE); 1989adf47834SHans de Goede break; 1990adf47834SHans de Goede case EHCI_ASYNC_INFLIGHT: 1991adf47834SHans de Goede /* Unfinyshed async handled packet, go horizontal */ 1992ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH); 1993adf47834SHans de Goede break; 1994adf47834SHans de Goede case EHCI_ASYNC_FINISHED: 1995adf47834SHans de Goede /* Should never happen, as this case is caught by fetchqh */ 1996ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_EXECUTING); 1997adf47834SHans de Goede break; 1998773dc9cdSGerd Hoffmann } 1999773dc9cdSGerd Hoffmann again = 1; 2000287fd3f1SGerd Hoffmann } else { 2001eb36a88eSGerd Hoffmann p = ehci_alloc_packet(q); 2002eb36a88eSGerd Hoffmann p->qtdaddr = q->qtdaddr; 2003eb36a88eSGerd Hoffmann p->qtd = qtd; 2004ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_EXECUTE); 2005f1ae32a1SGerd Hoffmann again = 1; 2006f1ae32a1SGerd Hoffmann } 2007f1ae32a1SGerd Hoffmann 2008f1ae32a1SGerd Hoffmann return again; 2009f1ae32a1SGerd Hoffmann } 2010f1ae32a1SGerd Hoffmann 2011ae0138a8SGerd Hoffmann static int ehci_state_horizqh(EHCIQueue *q) 2012f1ae32a1SGerd Hoffmann { 2013f1ae32a1SGerd Hoffmann int again = 0; 2014f1ae32a1SGerd Hoffmann 2015ae0138a8SGerd Hoffmann if (ehci_get_fetch_addr(q->ehci, q->async) != q->qh.next) { 2016ae0138a8SGerd Hoffmann ehci_set_fetch_addr(q->ehci, q->async, q->qh.next); 2017ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_FETCHENTRY); 2018f1ae32a1SGerd Hoffmann again = 1; 2019f1ae32a1SGerd Hoffmann } else { 2020ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_ACTIVE); 2021f1ae32a1SGerd Hoffmann } 2022f1ae32a1SGerd Hoffmann 2023f1ae32a1SGerd Hoffmann return again; 2024f1ae32a1SGerd Hoffmann } 2025f1ae32a1SGerd Hoffmann 2026ae0138a8SGerd Hoffmann static void ehci_fill_queue(EHCIPacket *p) 2027773dc9cdSGerd Hoffmann { 2028773dc9cdSGerd Hoffmann EHCIQueue *q = p->queue; 2029773dc9cdSGerd Hoffmann EHCIqtd qtd = p->qtd; 2030773dc9cdSGerd Hoffmann uint32_t qtdaddr; 2031773dc9cdSGerd Hoffmann 2032773dc9cdSGerd Hoffmann for (;;) { 2033773dc9cdSGerd Hoffmann if (NLPTR_TBIT(qtd.altnext) == 0) { 2034773dc9cdSGerd Hoffmann break; 2035773dc9cdSGerd Hoffmann } 2036773dc9cdSGerd Hoffmann if (NLPTR_TBIT(qtd.next) != 0) { 2037773dc9cdSGerd Hoffmann break; 2038773dc9cdSGerd Hoffmann } 2039773dc9cdSGerd Hoffmann qtdaddr = qtd.next; 2040773dc9cdSGerd Hoffmann get_dwords(q->ehci, NLPTR_GET(qtdaddr), 2041773dc9cdSGerd Hoffmann (uint32_t *) &qtd, sizeof(EHCIqtd) >> 2); 2042773dc9cdSGerd Hoffmann ehci_trace_qtd(q, NLPTR_GET(qtdaddr), &qtd); 2043773dc9cdSGerd Hoffmann if (!(qtd.token & QTD_TOKEN_ACTIVE)) { 2044773dc9cdSGerd Hoffmann break; 2045773dc9cdSGerd Hoffmann } 2046773dc9cdSGerd Hoffmann p = ehci_alloc_packet(q); 2047773dc9cdSGerd Hoffmann p->qtdaddr = qtdaddr; 2048773dc9cdSGerd Hoffmann p->qtd = qtd; 2049773dc9cdSGerd Hoffmann p->usb_status = ehci_execute(p, "queue"); 2050df6839c7SAlejandro Martinez Ruiz assert(p->usb_status == USB_RET_ASYNC); 2051773dc9cdSGerd Hoffmann p->async = EHCI_ASYNC_INFLIGHT; 2052773dc9cdSGerd Hoffmann } 2053773dc9cdSGerd Hoffmann } 2054773dc9cdSGerd Hoffmann 2055ae0138a8SGerd Hoffmann static int ehci_state_execute(EHCIQueue *q) 2056f1ae32a1SGerd Hoffmann { 2057eb36a88eSGerd Hoffmann EHCIPacket *p = QTAILQ_FIRST(&q->packets); 2058f1ae32a1SGerd Hoffmann int again = 0; 2059f1ae32a1SGerd Hoffmann 2060eb36a88eSGerd Hoffmann assert(p != NULL); 2061eb36a88eSGerd Hoffmann assert(p->qtdaddr == q->qtdaddr); 2062eb36a88eSGerd Hoffmann 2063f1ae32a1SGerd Hoffmann if (ehci_qh_do_overlay(q) != 0) { 2064f1ae32a1SGerd Hoffmann return -1; 2065f1ae32a1SGerd Hoffmann } 2066f1ae32a1SGerd Hoffmann 2067f1ae32a1SGerd Hoffmann // TODO verify enough time remains in the uframe as in 4.4.1.1 2068f1ae32a1SGerd Hoffmann // TODO write back ptr to async list when done or out of time 2069f1ae32a1SGerd Hoffmann // TODO Windows does not seem to ever set the MULT field 2070f1ae32a1SGerd Hoffmann 2071ae0138a8SGerd Hoffmann if (!q->async) { 2072f1ae32a1SGerd Hoffmann int transactCtr = get_field(q->qh.epcap, QH_EPCAP_MULT); 2073f1ae32a1SGerd Hoffmann if (!transactCtr) { 2074ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH); 2075f1ae32a1SGerd Hoffmann again = 1; 2076f1ae32a1SGerd Hoffmann goto out; 2077f1ae32a1SGerd Hoffmann } 2078f1ae32a1SGerd Hoffmann } 2079f1ae32a1SGerd Hoffmann 2080ae0138a8SGerd Hoffmann if (q->async) { 2081f1ae32a1SGerd Hoffmann ehci_set_usbsts(q->ehci, USBSTS_REC); 2082f1ae32a1SGerd Hoffmann } 2083f1ae32a1SGerd Hoffmann 2084773dc9cdSGerd Hoffmann p->usb_status = ehci_execute(p, "process"); 2085eb36a88eSGerd Hoffmann if (p->usb_status == USB_RET_PROCERR) { 2086f1ae32a1SGerd Hoffmann again = -1; 2087f1ae32a1SGerd Hoffmann goto out; 2088f1ae32a1SGerd Hoffmann } 2089eb36a88eSGerd Hoffmann if (p->usb_status == USB_RET_ASYNC) { 2090f1ae32a1SGerd Hoffmann ehci_flush_qh(q); 2091773dc9cdSGerd Hoffmann trace_usb_ehci_packet_action(p->queue, p, "async"); 2092eb36a88eSGerd Hoffmann p->async = EHCI_ASYNC_INFLIGHT; 2093ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH); 2094f1ae32a1SGerd Hoffmann again = 1; 2095ae0138a8SGerd Hoffmann ehci_fill_queue(p); 2096f1ae32a1SGerd Hoffmann goto out; 2097f1ae32a1SGerd Hoffmann } 2098f1ae32a1SGerd Hoffmann 2099ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_EXECUTING); 2100f1ae32a1SGerd Hoffmann again = 1; 2101f1ae32a1SGerd Hoffmann 2102f1ae32a1SGerd Hoffmann out: 2103f1ae32a1SGerd Hoffmann return again; 2104f1ae32a1SGerd Hoffmann } 2105f1ae32a1SGerd Hoffmann 2106ae0138a8SGerd Hoffmann static int ehci_state_executing(EHCIQueue *q) 2107f1ae32a1SGerd Hoffmann { 2108eb36a88eSGerd Hoffmann EHCIPacket *p = QTAILQ_FIRST(&q->packets); 2109f1ae32a1SGerd Hoffmann 2110eb36a88eSGerd Hoffmann assert(p != NULL); 2111eb36a88eSGerd Hoffmann assert(p->qtdaddr == q->qtdaddr); 2112eb36a88eSGerd Hoffmann 2113f1ae32a1SGerd Hoffmann ehci_execute_complete(q); 2114f1ae32a1SGerd Hoffmann 2115f1ae32a1SGerd Hoffmann // 4.10.3 2116ae0138a8SGerd Hoffmann if (!q->async) { 2117f1ae32a1SGerd Hoffmann int transactCtr = get_field(q->qh.epcap, QH_EPCAP_MULT); 2118f1ae32a1SGerd Hoffmann transactCtr--; 2119f1ae32a1SGerd Hoffmann set_field(&q->qh.epcap, transactCtr, QH_EPCAP_MULT); 2120f1ae32a1SGerd Hoffmann // 4.10.3, bottom of page 82, should exit this state when transaction 2121f1ae32a1SGerd Hoffmann // counter decrements to 0 2122f1ae32a1SGerd Hoffmann } 2123f1ae32a1SGerd Hoffmann 2124f1ae32a1SGerd Hoffmann /* 4.10.5 */ 2125eb36a88eSGerd Hoffmann if (p->usb_status == USB_RET_NAK) { 2126ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH); 2127f1ae32a1SGerd Hoffmann } else { 2128ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_WRITEBACK); 2129f1ae32a1SGerd Hoffmann } 2130f1ae32a1SGerd Hoffmann 2131f1ae32a1SGerd Hoffmann ehci_flush_qh(q); 2132574ef171SHans de Goede return 1; 2133f1ae32a1SGerd Hoffmann } 2134f1ae32a1SGerd Hoffmann 2135f1ae32a1SGerd Hoffmann 2136ae0138a8SGerd Hoffmann static int ehci_state_writeback(EHCIQueue *q) 2137f1ae32a1SGerd Hoffmann { 2138eb36a88eSGerd Hoffmann EHCIPacket *p = QTAILQ_FIRST(&q->packets); 21394ed1c57aSGerd Hoffmann uint32_t *qtd, addr; 2140f1ae32a1SGerd Hoffmann int again = 0; 2141f1ae32a1SGerd Hoffmann 2142f1ae32a1SGerd Hoffmann /* Write back the QTD from the QH area */ 2143eb36a88eSGerd Hoffmann assert(p != NULL); 2144eb36a88eSGerd Hoffmann assert(p->qtdaddr == q->qtdaddr); 2145eb36a88eSGerd Hoffmann 2146eb36a88eSGerd Hoffmann ehci_trace_qtd(q, NLPTR_GET(p->qtdaddr), (EHCIqtd *) &q->qh.next_qtd); 21474ed1c57aSGerd Hoffmann qtd = (uint32_t *) &q->qh.next_qtd; 21484ed1c57aSGerd Hoffmann addr = NLPTR_GET(p->qtdaddr); 21494ed1c57aSGerd Hoffmann put_dwords(q->ehci, addr + 2 * sizeof(uint32_t), qtd + 2, 2); 2150eb36a88eSGerd Hoffmann ehci_free_packet(p); 2151f1ae32a1SGerd Hoffmann 2152f1ae32a1SGerd Hoffmann /* 2153f1ae32a1SGerd Hoffmann * EHCI specs say go horizontal here. 2154f1ae32a1SGerd Hoffmann * 2155f1ae32a1SGerd Hoffmann * We can also advance the queue here for performance reasons. We 2156f1ae32a1SGerd Hoffmann * need to take care to only take that shortcut in case we've 2157f1ae32a1SGerd Hoffmann * processed the qtd just written back without errors, i.e. halt 2158f1ae32a1SGerd Hoffmann * bit is clear. 2159f1ae32a1SGerd Hoffmann */ 2160f1ae32a1SGerd Hoffmann if (q->qh.token & QTD_TOKEN_HALT) { 21610132b4b6SHans de Goede /* 21620132b4b6SHans de Goede * We should not do any further processing on a halted queue! 21630132b4b6SHans de Goede * This is esp. important for bulk endpoints with pipelining enabled 21640132b4b6SHans de Goede * (redirection to a real USB device), where we must cancel all the 21650132b4b6SHans de Goede * transfers after this one so that: 21660132b4b6SHans de Goede * 1) If they've completed already, they are not processed further 21670132b4b6SHans de Goede * causing more stalls, originating from the same failed transfer 21680132b4b6SHans de Goede * 2) If still in flight, they are cancelled before the guest does 21690132b4b6SHans de Goede * a clear stall, otherwise the guest and device can loose sync! 21700132b4b6SHans de Goede */ 21710132b4b6SHans de Goede while ((p = QTAILQ_FIRST(&q->packets)) != NULL) { 21720132b4b6SHans de Goede ehci_free_packet(p); 21730132b4b6SHans de Goede } 2174ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH); 2175f1ae32a1SGerd Hoffmann again = 1; 2176f1ae32a1SGerd Hoffmann } else { 2177ae0138a8SGerd Hoffmann ehci_set_state(q->ehci, q->async, EST_ADVANCEQUEUE); 2178f1ae32a1SGerd Hoffmann again = 1; 2179f1ae32a1SGerd Hoffmann } 2180f1ae32a1SGerd Hoffmann return again; 2181f1ae32a1SGerd Hoffmann } 2182f1ae32a1SGerd Hoffmann 2183f1ae32a1SGerd Hoffmann /* 2184f1ae32a1SGerd Hoffmann * This is the state machine that is common to both async and periodic 2185f1ae32a1SGerd Hoffmann */ 2186f1ae32a1SGerd Hoffmann 2187ae0138a8SGerd Hoffmann static void ehci_advance_state(EHCIState *ehci, int async) 2188f1ae32a1SGerd Hoffmann { 2189f1ae32a1SGerd Hoffmann EHCIQueue *q = NULL; 2190f1ae32a1SGerd Hoffmann int again; 2191f1ae32a1SGerd Hoffmann 2192f1ae32a1SGerd Hoffmann do { 2193f1ae32a1SGerd Hoffmann switch(ehci_get_state(ehci, async)) { 2194f1ae32a1SGerd Hoffmann case EST_WAITLISTHEAD: 2195f1ae32a1SGerd Hoffmann again = ehci_state_waitlisthead(ehci, async); 2196f1ae32a1SGerd Hoffmann break; 2197f1ae32a1SGerd Hoffmann 2198f1ae32a1SGerd Hoffmann case EST_FETCHENTRY: 2199f1ae32a1SGerd Hoffmann again = ehci_state_fetchentry(ehci, async); 2200f1ae32a1SGerd Hoffmann break; 2201f1ae32a1SGerd Hoffmann 2202f1ae32a1SGerd Hoffmann case EST_FETCHQH: 2203f1ae32a1SGerd Hoffmann q = ehci_state_fetchqh(ehci, async); 2204ae0138a8SGerd Hoffmann if (q != NULL) { 2205ae0138a8SGerd Hoffmann assert(q->async == async); 2206ae0138a8SGerd Hoffmann again = 1; 2207ae0138a8SGerd Hoffmann } else { 2208ae0138a8SGerd Hoffmann again = 0; 2209ae0138a8SGerd Hoffmann } 2210f1ae32a1SGerd Hoffmann break; 2211f1ae32a1SGerd Hoffmann 2212f1ae32a1SGerd Hoffmann case EST_FETCHITD: 2213f1ae32a1SGerd Hoffmann again = ehci_state_fetchitd(ehci, async); 2214f1ae32a1SGerd Hoffmann break; 2215f1ae32a1SGerd Hoffmann 2216f1ae32a1SGerd Hoffmann case EST_FETCHSITD: 2217f1ae32a1SGerd Hoffmann again = ehci_state_fetchsitd(ehci, async); 2218f1ae32a1SGerd Hoffmann break; 2219f1ae32a1SGerd Hoffmann 2220f1ae32a1SGerd Hoffmann case EST_ADVANCEQUEUE: 2221ae0138a8SGerd Hoffmann again = ehci_state_advqueue(q); 2222f1ae32a1SGerd Hoffmann break; 2223f1ae32a1SGerd Hoffmann 2224f1ae32a1SGerd Hoffmann case EST_FETCHQTD: 2225ae0138a8SGerd Hoffmann again = ehci_state_fetchqtd(q); 2226f1ae32a1SGerd Hoffmann break; 2227f1ae32a1SGerd Hoffmann 2228f1ae32a1SGerd Hoffmann case EST_HORIZONTALQH: 2229ae0138a8SGerd Hoffmann again = ehci_state_horizqh(q); 2230f1ae32a1SGerd Hoffmann break; 2231f1ae32a1SGerd Hoffmann 2232f1ae32a1SGerd Hoffmann case EST_EXECUTE: 2233ae0138a8SGerd Hoffmann again = ehci_state_execute(q); 22343a215326SGerd Hoffmann if (async) { 22353a215326SGerd Hoffmann ehci->async_stepdown = 0; 22363a215326SGerd Hoffmann } 2237f1ae32a1SGerd Hoffmann break; 2238f1ae32a1SGerd Hoffmann 2239f1ae32a1SGerd Hoffmann case EST_EXECUTING: 2240f1ae32a1SGerd Hoffmann assert(q != NULL); 22413a215326SGerd Hoffmann if (async) { 22423a215326SGerd Hoffmann ehci->async_stepdown = 0; 22433a215326SGerd Hoffmann } 2244ae0138a8SGerd Hoffmann again = ehci_state_executing(q); 2245f1ae32a1SGerd Hoffmann break; 2246f1ae32a1SGerd Hoffmann 2247f1ae32a1SGerd Hoffmann case EST_WRITEBACK: 2248f1ae32a1SGerd Hoffmann assert(q != NULL); 2249ae0138a8SGerd Hoffmann again = ehci_state_writeback(q); 2250f1ae32a1SGerd Hoffmann break; 2251f1ae32a1SGerd Hoffmann 2252f1ae32a1SGerd Hoffmann default: 2253f1ae32a1SGerd Hoffmann fprintf(stderr, "Bad state!\n"); 2254f1ae32a1SGerd Hoffmann again = -1; 2255f1ae32a1SGerd Hoffmann assert(0); 2256f1ae32a1SGerd Hoffmann break; 2257f1ae32a1SGerd Hoffmann } 2258f1ae32a1SGerd Hoffmann 2259f1ae32a1SGerd Hoffmann if (again < 0) { 2260f1ae32a1SGerd Hoffmann fprintf(stderr, "processing error - resetting ehci HC\n"); 2261f1ae32a1SGerd Hoffmann ehci_reset(ehci); 2262f1ae32a1SGerd Hoffmann again = 0; 2263f1ae32a1SGerd Hoffmann } 2264f1ae32a1SGerd Hoffmann } 2265f1ae32a1SGerd Hoffmann while (again); 2266f1ae32a1SGerd Hoffmann } 2267f1ae32a1SGerd Hoffmann 2268f1ae32a1SGerd Hoffmann static void ehci_advance_async_state(EHCIState *ehci) 2269f1ae32a1SGerd Hoffmann { 2270f1ae32a1SGerd Hoffmann const int async = 1; 2271f1ae32a1SGerd Hoffmann 2272f1ae32a1SGerd Hoffmann switch(ehci_get_state(ehci, async)) { 2273f1ae32a1SGerd Hoffmann case EST_INACTIVE: 2274ec807d12SGerd Hoffmann if (!ehci_async_enabled(ehci)) { 2275f1ae32a1SGerd Hoffmann break; 2276f1ae32a1SGerd Hoffmann } 2277f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 2278f1ae32a1SGerd Hoffmann // No break, fall through to ACTIVE 2279f1ae32a1SGerd Hoffmann 2280f1ae32a1SGerd Hoffmann case EST_ACTIVE: 2281ec807d12SGerd Hoffmann if (!ehci_async_enabled(ehci)) { 2282f1ae32a1SGerd Hoffmann ehci_queues_rip_all(ehci, async); 2283f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_INACTIVE); 2284f1ae32a1SGerd Hoffmann break; 2285f1ae32a1SGerd Hoffmann } 2286f1ae32a1SGerd Hoffmann 2287f1ae32a1SGerd Hoffmann /* make sure guest has acknowledged the doorbell interrupt */ 2288f1ae32a1SGerd Hoffmann /* TO-DO: is this really needed? */ 2289f1ae32a1SGerd Hoffmann if (ehci->usbsts & USBSTS_IAA) { 2290f1ae32a1SGerd Hoffmann DPRINTF("IAA status bit still set.\n"); 2291f1ae32a1SGerd Hoffmann break; 2292f1ae32a1SGerd Hoffmann } 2293f1ae32a1SGerd Hoffmann 2294f1ae32a1SGerd Hoffmann /* check that address register has been set */ 2295f1ae32a1SGerd Hoffmann if (ehci->asynclistaddr == 0) { 2296f1ae32a1SGerd Hoffmann break; 2297f1ae32a1SGerd Hoffmann } 2298f1ae32a1SGerd Hoffmann 2299f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_WAITLISTHEAD); 2300f1ae32a1SGerd Hoffmann ehci_advance_state(ehci, async); 2301f1ae32a1SGerd Hoffmann 2302f1ae32a1SGerd Hoffmann /* If the doorbell is set, the guest wants to make a change to the 2303f1ae32a1SGerd Hoffmann * schedule. The host controller needs to release cached data. 2304f1ae32a1SGerd Hoffmann * (section 4.8.2) 2305f1ae32a1SGerd Hoffmann */ 2306f1ae32a1SGerd Hoffmann if (ehci->usbcmd & USBCMD_IAAD) { 2307f1ae32a1SGerd Hoffmann /* Remove all unseen qhs from the async qhs queue */ 230866f092d2SHans de Goede ehci_queues_rip_unused(ehci, async, 1); 2309f1ae32a1SGerd Hoffmann DPRINTF("ASYNC: doorbell request acknowledged\n"); 2310f1ae32a1SGerd Hoffmann ehci->usbcmd &= ~USBCMD_IAAD; 23117efc17afSGerd Hoffmann ehci_raise_irq(ehci, USBSTS_IAA); 2312f1ae32a1SGerd Hoffmann } 2313f1ae32a1SGerd Hoffmann break; 2314f1ae32a1SGerd Hoffmann 2315f1ae32a1SGerd Hoffmann default: 2316f1ae32a1SGerd Hoffmann /* this should only be due to a developer mistake */ 2317f1ae32a1SGerd Hoffmann fprintf(stderr, "ehci: Bad asynchronous state %d. " 2318f1ae32a1SGerd Hoffmann "Resetting to active\n", ehci->astate); 2319f1ae32a1SGerd Hoffmann assert(0); 2320f1ae32a1SGerd Hoffmann } 2321f1ae32a1SGerd Hoffmann } 2322f1ae32a1SGerd Hoffmann 2323f1ae32a1SGerd Hoffmann static void ehci_advance_periodic_state(EHCIState *ehci) 2324f1ae32a1SGerd Hoffmann { 2325f1ae32a1SGerd Hoffmann uint32_t entry; 2326f1ae32a1SGerd Hoffmann uint32_t list; 2327f1ae32a1SGerd Hoffmann const int async = 0; 2328f1ae32a1SGerd Hoffmann 2329f1ae32a1SGerd Hoffmann // 4.6 2330f1ae32a1SGerd Hoffmann 2331f1ae32a1SGerd Hoffmann switch(ehci_get_state(ehci, async)) { 2332f1ae32a1SGerd Hoffmann case EST_INACTIVE: 2333ec807d12SGerd Hoffmann if (!(ehci->frindex & 7) && ehci_periodic_enabled(ehci)) { 2334f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 2335f1ae32a1SGerd Hoffmann // No break, fall through to ACTIVE 2336f1ae32a1SGerd Hoffmann } else 2337f1ae32a1SGerd Hoffmann break; 2338f1ae32a1SGerd Hoffmann 2339f1ae32a1SGerd Hoffmann case EST_ACTIVE: 2340ec807d12SGerd Hoffmann if (!(ehci->frindex & 7) && !ehci_periodic_enabled(ehci)) { 2341f1ae32a1SGerd Hoffmann ehci_queues_rip_all(ehci, async); 2342f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_INACTIVE); 2343f1ae32a1SGerd Hoffmann break; 2344f1ae32a1SGerd Hoffmann } 2345f1ae32a1SGerd Hoffmann 2346f1ae32a1SGerd Hoffmann list = ehci->periodiclistbase & 0xfffff000; 2347f1ae32a1SGerd Hoffmann /* check that register has been set */ 2348f1ae32a1SGerd Hoffmann if (list == 0) { 2349f1ae32a1SGerd Hoffmann break; 2350f1ae32a1SGerd Hoffmann } 2351f1ae32a1SGerd Hoffmann list |= ((ehci->frindex & 0x1ff8) >> 1); 2352f1ae32a1SGerd Hoffmann 2353f1ae32a1SGerd Hoffmann pci_dma_read(&ehci->dev, list, &entry, sizeof entry); 2354f1ae32a1SGerd Hoffmann entry = le32_to_cpu(entry); 2355f1ae32a1SGerd Hoffmann 2356f1ae32a1SGerd Hoffmann DPRINTF("PERIODIC state adv fr=%d. [%08X] -> %08X\n", 2357f1ae32a1SGerd Hoffmann ehci->frindex / 8, list, entry); 2358f1ae32a1SGerd Hoffmann ehci_set_fetch_addr(ehci, async,entry); 2359f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHENTRY); 2360f1ae32a1SGerd Hoffmann ehci_advance_state(ehci, async); 236166f092d2SHans de Goede ehci_queues_rip_unused(ehci, async, 0); 2362f1ae32a1SGerd Hoffmann break; 2363f1ae32a1SGerd Hoffmann 2364f1ae32a1SGerd Hoffmann default: 2365f1ae32a1SGerd Hoffmann /* this should only be due to a developer mistake */ 2366f1ae32a1SGerd Hoffmann fprintf(stderr, "ehci: Bad periodic state %d. " 2367f1ae32a1SGerd Hoffmann "Resetting to active\n", ehci->pstate); 2368f1ae32a1SGerd Hoffmann assert(0); 2369f1ae32a1SGerd Hoffmann } 2370f1ae32a1SGerd Hoffmann } 2371f1ae32a1SGerd Hoffmann 23726ceced0bSGerd Hoffmann static void ehci_update_frindex(EHCIState *ehci, int frames) 23736ceced0bSGerd Hoffmann { 23746ceced0bSGerd Hoffmann int i; 23756ceced0bSGerd Hoffmann 23766ceced0bSGerd Hoffmann if (!ehci_enabled(ehci)) { 23776ceced0bSGerd Hoffmann return; 23786ceced0bSGerd Hoffmann } 23796ceced0bSGerd Hoffmann 23806ceced0bSGerd Hoffmann for (i = 0; i < frames; i++) { 23816ceced0bSGerd Hoffmann ehci->frindex += 8; 23826ceced0bSGerd Hoffmann 23836ceced0bSGerd Hoffmann if (ehci->frindex == 0x00002000) { 23847efc17afSGerd Hoffmann ehci_raise_irq(ehci, USBSTS_FLR); 23856ceced0bSGerd Hoffmann } 23866ceced0bSGerd Hoffmann 23876ceced0bSGerd Hoffmann if (ehci->frindex == 0x00004000) { 23887efc17afSGerd Hoffmann ehci_raise_irq(ehci, USBSTS_FLR); 23896ceced0bSGerd Hoffmann ehci->frindex = 0; 23907efc17afSGerd Hoffmann if (ehci->usbsts_frindex > 0x00004000) { 23917efc17afSGerd Hoffmann ehci->usbsts_frindex -= 0x00004000; 23927efc17afSGerd Hoffmann } else { 23937efc17afSGerd Hoffmann ehci->usbsts_frindex = 0; 23947efc17afSGerd Hoffmann } 23956ceced0bSGerd Hoffmann } 23966ceced0bSGerd Hoffmann } 23976ceced0bSGerd Hoffmann } 23986ceced0bSGerd Hoffmann 2399f1ae32a1SGerd Hoffmann static void ehci_frame_timer(void *opaque) 2400f1ae32a1SGerd Hoffmann { 2401f1ae32a1SGerd Hoffmann EHCIState *ehci = opaque; 24027efc17afSGerd Hoffmann int need_timer = 0; 2403f1ae32a1SGerd Hoffmann int64_t expire_time, t_now; 2404f1ae32a1SGerd Hoffmann uint64_t ns_elapsed; 2405f020ed36SGerd Hoffmann int frames, skipped_frames; 2406f1ae32a1SGerd Hoffmann int i; 2407f1ae32a1SGerd Hoffmann 2408f1ae32a1SGerd Hoffmann t_now = qemu_get_clock_ns(vm_clock); 2409f1ae32a1SGerd Hoffmann ns_elapsed = t_now - ehci->last_run_ns; 2410f1ae32a1SGerd Hoffmann frames = ns_elapsed / FRAME_TIMER_NS; 2411f1ae32a1SGerd Hoffmann 24123a215326SGerd Hoffmann if (ehci_periodic_enabled(ehci) || ehci->pstate != EST_INACTIVE) { 24137efc17afSGerd Hoffmann need_timer++; 2414afb7a0b8SGerd Hoffmann ehci->async_stepdown = 0; 24153a215326SGerd Hoffmann 2416f020ed36SGerd Hoffmann if (frames > ehci->maxframes) { 2417f020ed36SGerd Hoffmann skipped_frames = frames - ehci->maxframes; 2418f020ed36SGerd Hoffmann ehci_update_frindex(ehci, skipped_frames); 2419f020ed36SGerd Hoffmann ehci->last_run_ns += FRAME_TIMER_NS * skipped_frames; 2420f020ed36SGerd Hoffmann frames -= skipped_frames; 2421f020ed36SGerd Hoffmann DPRINTF("WARNING - EHCI skipped %d frames\n", skipped_frames); 2422f1ae32a1SGerd Hoffmann } 2423f1ae32a1SGerd Hoffmann 2424f020ed36SGerd Hoffmann for (i = 0; i < frames; i++) { 2425f020ed36SGerd Hoffmann ehci_update_frindex(ehci, 1); 2426f020ed36SGerd Hoffmann ehci_advance_periodic_state(ehci); 2427f1ae32a1SGerd Hoffmann ehci->last_run_ns += FRAME_TIMER_NS; 2428f1ae32a1SGerd Hoffmann } 24293a215326SGerd Hoffmann } else { 24303a215326SGerd Hoffmann if (ehci->async_stepdown < ehci->maxframes / 2) { 24313a215326SGerd Hoffmann ehci->async_stepdown++; 24323a215326SGerd Hoffmann } 24333a215326SGerd Hoffmann ehci_update_frindex(ehci, frames); 24343a215326SGerd Hoffmann ehci->last_run_ns += FRAME_TIMER_NS * frames; 24353a215326SGerd Hoffmann } 2436f1ae32a1SGerd Hoffmann 2437f1ae32a1SGerd Hoffmann /* Async is not inside loop since it executes everything it can once 2438f1ae32a1SGerd Hoffmann * called 2439f1ae32a1SGerd Hoffmann */ 24403a215326SGerd Hoffmann if (ehci_async_enabled(ehci) || ehci->astate != EST_INACTIVE) { 24417efc17afSGerd Hoffmann need_timer++; 2442afb7a0b8SGerd Hoffmann ehci_advance_async_state(ehci); 24433a215326SGerd Hoffmann } 2444f1ae32a1SGerd Hoffmann 24457efc17afSGerd Hoffmann ehci_commit_irq(ehci); 24467efc17afSGerd Hoffmann if (ehci->usbsts_pending) { 24477efc17afSGerd Hoffmann need_timer++; 24487efc17afSGerd Hoffmann ehci->async_stepdown = 0; 2449f1ae32a1SGerd Hoffmann } 2450f0ad01f9SGerd Hoffmann 24517efc17afSGerd Hoffmann if (need_timer) { 2452afb7a0b8SGerd Hoffmann expire_time = t_now + (get_ticks_per_sec() 2453afb7a0b8SGerd Hoffmann * (ehci->async_stepdown+1) / FRAME_TIMER_FREQ); 24547efc17afSGerd Hoffmann qemu_mod_timer(ehci->frame_timer, expire_time); 24557efc17afSGerd Hoffmann } 2456daf25307SGerd Hoffmann } 2457f1ae32a1SGerd Hoffmann 24580fb3e299SGerd Hoffmann static void ehci_async_bh(void *opaque) 24590fb3e299SGerd Hoffmann { 24600fb3e299SGerd Hoffmann EHCIState *ehci = opaque; 24610fb3e299SGerd Hoffmann ehci_advance_async_state(ehci); 24620fb3e299SGerd Hoffmann } 2463f1ae32a1SGerd Hoffmann 2464f1ae32a1SGerd Hoffmann static const MemoryRegionOps ehci_mem_ops = { 2465f1ae32a1SGerd Hoffmann .old_mmio = { 2466f1ae32a1SGerd Hoffmann .read = { ehci_mem_readb, ehci_mem_readw, ehci_mem_readl }, 2467f1ae32a1SGerd Hoffmann .write = { ehci_mem_writeb, ehci_mem_writew, ehci_mem_writel }, 2468f1ae32a1SGerd Hoffmann }, 2469f1ae32a1SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 2470f1ae32a1SGerd Hoffmann }; 2471f1ae32a1SGerd Hoffmann 2472f1ae32a1SGerd Hoffmann static int usb_ehci_initfn(PCIDevice *dev); 2473f1ae32a1SGerd Hoffmann 2474f1ae32a1SGerd Hoffmann static USBPortOps ehci_port_ops = { 2475f1ae32a1SGerd Hoffmann .attach = ehci_attach, 2476f1ae32a1SGerd Hoffmann .detach = ehci_detach, 2477f1ae32a1SGerd Hoffmann .child_detach = ehci_child_detach, 2478f1ae32a1SGerd Hoffmann .wakeup = ehci_wakeup, 2479f1ae32a1SGerd Hoffmann .complete = ehci_async_complete_packet, 2480f1ae32a1SGerd Hoffmann }; 2481f1ae32a1SGerd Hoffmann 2482f1ae32a1SGerd Hoffmann static USBBusOps ehci_bus_ops = { 2483f1ae32a1SGerd Hoffmann .register_companion = ehci_register_companion, 2484f1ae32a1SGerd Hoffmann }; 2485f1ae32a1SGerd Hoffmann 24869a773408SGerd Hoffmann static int usb_ehci_post_load(void *opaque, int version_id) 24879a773408SGerd Hoffmann { 24889a773408SGerd Hoffmann EHCIState *s = opaque; 24899a773408SGerd Hoffmann int i; 24909a773408SGerd Hoffmann 24919a773408SGerd Hoffmann for (i = 0; i < NB_PORTS; i++) { 24929a773408SGerd Hoffmann USBPort *companion = s->companion_ports[i]; 24939a773408SGerd Hoffmann if (companion == NULL) { 24949a773408SGerd Hoffmann continue; 24959a773408SGerd Hoffmann } 24969a773408SGerd Hoffmann if (s->portsc[i] & PORTSC_POWNER) { 24979a773408SGerd Hoffmann companion->dev = s->ports[i].dev; 24989a773408SGerd Hoffmann } else { 24999a773408SGerd Hoffmann companion->dev = NULL; 25009a773408SGerd Hoffmann } 25019a773408SGerd Hoffmann } 25029a773408SGerd Hoffmann 25039a773408SGerd Hoffmann return 0; 25049a773408SGerd Hoffmann } 25059a773408SGerd Hoffmann 2506f1ae32a1SGerd Hoffmann static const VMStateDescription vmstate_ehci = { 2507f1ae32a1SGerd Hoffmann .name = "ehci", 25086d3b6d3dSGerd Hoffmann .version_id = 2, 25096d3b6d3dSGerd Hoffmann .minimum_version_id = 1, 25109a773408SGerd Hoffmann .post_load = usb_ehci_post_load, 25119a773408SGerd Hoffmann .fields = (VMStateField[]) { 25129a773408SGerd Hoffmann VMSTATE_PCI_DEVICE(dev, EHCIState), 25139a773408SGerd Hoffmann /* mmio registers */ 25149a773408SGerd Hoffmann VMSTATE_UINT32(usbcmd, EHCIState), 25159a773408SGerd Hoffmann VMSTATE_UINT32(usbsts, EHCIState), 25166d3b6d3dSGerd Hoffmann VMSTATE_UINT32_V(usbsts_pending, EHCIState, 2), 25176d3b6d3dSGerd Hoffmann VMSTATE_UINT32_V(usbsts_frindex, EHCIState, 2), 25189a773408SGerd Hoffmann VMSTATE_UINT32(usbintr, EHCIState), 25199a773408SGerd Hoffmann VMSTATE_UINT32(frindex, EHCIState), 25209a773408SGerd Hoffmann VMSTATE_UINT32(ctrldssegment, EHCIState), 25219a773408SGerd Hoffmann VMSTATE_UINT32(periodiclistbase, EHCIState), 25229a773408SGerd Hoffmann VMSTATE_UINT32(asynclistaddr, EHCIState), 25239a773408SGerd Hoffmann VMSTATE_UINT32(configflag, EHCIState), 25249a773408SGerd Hoffmann VMSTATE_UINT32(portsc[0], EHCIState), 25259a773408SGerd Hoffmann VMSTATE_UINT32(portsc[1], EHCIState), 25269a773408SGerd Hoffmann VMSTATE_UINT32(portsc[2], EHCIState), 25279a773408SGerd Hoffmann VMSTATE_UINT32(portsc[3], EHCIState), 25289a773408SGerd Hoffmann VMSTATE_UINT32(portsc[4], EHCIState), 25299a773408SGerd Hoffmann VMSTATE_UINT32(portsc[5], EHCIState), 25309a773408SGerd Hoffmann /* frame timer */ 25319a773408SGerd Hoffmann VMSTATE_TIMER(frame_timer, EHCIState), 25329a773408SGerd Hoffmann VMSTATE_UINT64(last_run_ns, EHCIState), 25339a773408SGerd Hoffmann VMSTATE_UINT32(async_stepdown, EHCIState), 25349a773408SGerd Hoffmann /* schedule state */ 25359a773408SGerd Hoffmann VMSTATE_UINT32(astate, EHCIState), 25369a773408SGerd Hoffmann VMSTATE_UINT32(pstate, EHCIState), 25379a773408SGerd Hoffmann VMSTATE_UINT32(a_fetch_addr, EHCIState), 25389a773408SGerd Hoffmann VMSTATE_UINT32(p_fetch_addr, EHCIState), 25399a773408SGerd Hoffmann VMSTATE_END_OF_LIST() 25409a773408SGerd Hoffmann } 2541f1ae32a1SGerd Hoffmann }; 2542f1ae32a1SGerd Hoffmann 2543f1ae32a1SGerd Hoffmann static Property ehci_properties[] = { 2544f1ae32a1SGerd Hoffmann DEFINE_PROP_UINT32("maxframes", EHCIState, maxframes, 128), 2545f1ae32a1SGerd Hoffmann DEFINE_PROP_END_OF_LIST(), 2546f1ae32a1SGerd Hoffmann }; 2547f1ae32a1SGerd Hoffmann 2548f1ae32a1SGerd Hoffmann static void ehci_class_init(ObjectClass *klass, void *data) 2549f1ae32a1SGerd Hoffmann { 2550f1ae32a1SGerd Hoffmann DeviceClass *dc = DEVICE_CLASS(klass); 2551f1ae32a1SGerd Hoffmann PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2552f1ae32a1SGerd Hoffmann 2553f1ae32a1SGerd Hoffmann k->init = usb_ehci_initfn; 2554f1ae32a1SGerd Hoffmann k->vendor_id = PCI_VENDOR_ID_INTEL; 2555f1ae32a1SGerd Hoffmann k->device_id = PCI_DEVICE_ID_INTEL_82801D; /* ich4 */ 2556f1ae32a1SGerd Hoffmann k->revision = 0x10; 2557f1ae32a1SGerd Hoffmann k->class_id = PCI_CLASS_SERIAL_USB; 2558f1ae32a1SGerd Hoffmann dc->vmsd = &vmstate_ehci; 2559f1ae32a1SGerd Hoffmann dc->props = ehci_properties; 2560f1ae32a1SGerd Hoffmann } 2561f1ae32a1SGerd Hoffmann 2562f1ae32a1SGerd Hoffmann static TypeInfo ehci_info = { 2563f1ae32a1SGerd Hoffmann .name = "usb-ehci", 2564f1ae32a1SGerd Hoffmann .parent = TYPE_PCI_DEVICE, 2565f1ae32a1SGerd Hoffmann .instance_size = sizeof(EHCIState), 2566f1ae32a1SGerd Hoffmann .class_init = ehci_class_init, 2567f1ae32a1SGerd Hoffmann }; 2568f1ae32a1SGerd Hoffmann 2569f1ae32a1SGerd Hoffmann static void ich9_ehci_class_init(ObjectClass *klass, void *data) 2570f1ae32a1SGerd Hoffmann { 2571f1ae32a1SGerd Hoffmann DeviceClass *dc = DEVICE_CLASS(klass); 2572f1ae32a1SGerd Hoffmann PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2573f1ae32a1SGerd Hoffmann 2574f1ae32a1SGerd Hoffmann k->init = usb_ehci_initfn; 2575f1ae32a1SGerd Hoffmann k->vendor_id = PCI_VENDOR_ID_INTEL; 2576f1ae32a1SGerd Hoffmann k->device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1; 2577f1ae32a1SGerd Hoffmann k->revision = 0x03; 2578f1ae32a1SGerd Hoffmann k->class_id = PCI_CLASS_SERIAL_USB; 2579f1ae32a1SGerd Hoffmann dc->vmsd = &vmstate_ehci; 2580f1ae32a1SGerd Hoffmann dc->props = ehci_properties; 2581f1ae32a1SGerd Hoffmann } 2582f1ae32a1SGerd Hoffmann 2583f1ae32a1SGerd Hoffmann static TypeInfo ich9_ehci_info = { 2584f1ae32a1SGerd Hoffmann .name = "ich9-usb-ehci1", 2585f1ae32a1SGerd Hoffmann .parent = TYPE_PCI_DEVICE, 2586f1ae32a1SGerd Hoffmann .instance_size = sizeof(EHCIState), 2587f1ae32a1SGerd Hoffmann .class_init = ich9_ehci_class_init, 2588f1ae32a1SGerd Hoffmann }; 2589f1ae32a1SGerd Hoffmann 2590f1ae32a1SGerd Hoffmann static int usb_ehci_initfn(PCIDevice *dev) 2591f1ae32a1SGerd Hoffmann { 2592f1ae32a1SGerd Hoffmann EHCIState *s = DO_UPCAST(EHCIState, dev, dev); 2593f1ae32a1SGerd Hoffmann uint8_t *pci_conf = s->dev.config; 2594f1ae32a1SGerd Hoffmann int i; 2595f1ae32a1SGerd Hoffmann 2596f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20); 2597f1ae32a1SGerd Hoffmann 2598f1ae32a1SGerd Hoffmann /* capabilities pointer */ 2599f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00); 2600f1ae32a1SGerd Hoffmann //pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); 2601f1ae32a1SGerd Hoffmann 2602f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */ 2603f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[PCI_MIN_GNT], 0); 2604f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[PCI_MAX_LAT], 0); 2605f1ae32a1SGerd Hoffmann 2606f1ae32a1SGerd Hoffmann // pci_conf[0x50] = 0x01; // power management caps 2607f1ae32a1SGerd Hoffmann 2608f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); // release number (2.1.4) 2609f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[0x61], 0x20); // frame length adjustment (2.1.5) 2610f1ae32a1SGerd Hoffmann pci_set_word(&pci_conf[0x62], 0x00); // port wake up capability (2.1.6) 2611f1ae32a1SGerd Hoffmann 2612f1ae32a1SGerd Hoffmann pci_conf[0x64] = 0x00; 2613f1ae32a1SGerd Hoffmann pci_conf[0x65] = 0x00; 2614f1ae32a1SGerd Hoffmann pci_conf[0x66] = 0x00; 2615f1ae32a1SGerd Hoffmann pci_conf[0x67] = 0x00; 2616f1ae32a1SGerd Hoffmann pci_conf[0x68] = 0x01; 2617f1ae32a1SGerd Hoffmann pci_conf[0x69] = 0x00; 2618f1ae32a1SGerd Hoffmann pci_conf[0x6a] = 0x00; 2619f1ae32a1SGerd Hoffmann pci_conf[0x6b] = 0x00; // USBLEGSUP 2620f1ae32a1SGerd Hoffmann pci_conf[0x6c] = 0x00; 2621f1ae32a1SGerd Hoffmann pci_conf[0x6d] = 0x00; 2622f1ae32a1SGerd Hoffmann pci_conf[0x6e] = 0x00; 2623f1ae32a1SGerd Hoffmann pci_conf[0x6f] = 0xc0; // USBLEFCTLSTS 2624f1ae32a1SGerd Hoffmann 2625f1ae32a1SGerd Hoffmann // 2.2 host controller interface version 2626f1ae32a1SGerd Hoffmann s->mmio[0x00] = (uint8_t) OPREGBASE; 2627f1ae32a1SGerd Hoffmann s->mmio[0x01] = 0x00; 2628f1ae32a1SGerd Hoffmann s->mmio[0x02] = 0x00; 2629f1ae32a1SGerd Hoffmann s->mmio[0x03] = 0x01; // HC version 2630f1ae32a1SGerd Hoffmann s->mmio[0x04] = NB_PORTS; // Number of downstream ports 2631f1ae32a1SGerd Hoffmann s->mmio[0x05] = 0x00; // No companion ports at present 2632f1ae32a1SGerd Hoffmann s->mmio[0x06] = 0x00; 2633f1ae32a1SGerd Hoffmann s->mmio[0x07] = 0x00; 2634f1ae32a1SGerd Hoffmann s->mmio[0x08] = 0x80; // We can cache whole frame, not 64-bit capable 2635f1ae32a1SGerd Hoffmann s->mmio[0x09] = 0x68; // EECP 2636f1ae32a1SGerd Hoffmann s->mmio[0x0a] = 0x00; 2637f1ae32a1SGerd Hoffmann s->mmio[0x0b] = 0x00; 2638f1ae32a1SGerd Hoffmann 2639f1ae32a1SGerd Hoffmann s->irq = s->dev.irq[3]; 2640f1ae32a1SGerd Hoffmann 2641f1ae32a1SGerd Hoffmann usb_bus_new(&s->bus, &ehci_bus_ops, &s->dev.qdev); 2642f1ae32a1SGerd Hoffmann for(i = 0; i < NB_PORTS; i++) { 2643f1ae32a1SGerd Hoffmann usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops, 2644f1ae32a1SGerd Hoffmann USB_SPEED_MASK_HIGH); 2645f1ae32a1SGerd Hoffmann s->ports[i].dev = 0; 2646f1ae32a1SGerd Hoffmann } 2647f1ae32a1SGerd Hoffmann 2648f1ae32a1SGerd Hoffmann s->frame_timer = qemu_new_timer_ns(vm_clock, ehci_frame_timer, s); 26490fb3e299SGerd Hoffmann s->async_bh = qemu_bh_new(ehci_async_bh, s); 2650f1ae32a1SGerd Hoffmann QTAILQ_INIT(&s->aqueues); 2651f1ae32a1SGerd Hoffmann QTAILQ_INIT(&s->pqueues); 26527341ea07SHans de Goede usb_packet_init(&s->ipacket); 2653f1ae32a1SGerd Hoffmann 2654f1ae32a1SGerd Hoffmann qemu_register_reset(ehci_reset, s); 2655f1ae32a1SGerd Hoffmann 2656f1ae32a1SGerd Hoffmann memory_region_init_io(&s->mem, &ehci_mem_ops, s, "ehci", MMIO_SIZE); 2657f1ae32a1SGerd Hoffmann pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem); 2658f1ae32a1SGerd Hoffmann 2659f1ae32a1SGerd Hoffmann return 0; 2660f1ae32a1SGerd Hoffmann } 2661f1ae32a1SGerd Hoffmann 2662f1ae32a1SGerd Hoffmann static void ehci_register_types(void) 2663f1ae32a1SGerd Hoffmann { 2664f1ae32a1SGerd Hoffmann type_register_static(&ehci_info); 2665f1ae32a1SGerd Hoffmann type_register_static(&ich9_ehci_info); 2666f1ae32a1SGerd Hoffmann } 2667f1ae32a1SGerd Hoffmann 2668f1ae32a1SGerd Hoffmann type_init(ehci_register_types) 2669f1ae32a1SGerd Hoffmann 2670f1ae32a1SGerd Hoffmann /* 2671f1ae32a1SGerd Hoffmann * vim: expandtab ts=4 2672f1ae32a1SGerd Hoffmann */ 2673