1f1ae32a1SGerd Hoffmann /* 2f1ae32a1SGerd Hoffmann * QEMU USB EHCI Emulation 3f1ae32a1SGerd Hoffmann * 4f1ae32a1SGerd Hoffmann * Copyright(c) 2008 Emutex Ltd. (address@hidden) 5f1ae32a1SGerd Hoffmann * 6f1ae32a1SGerd Hoffmann * EHCI project was started by Mark Burkley, with contributions by 7f1ae32a1SGerd Hoffmann * Niels de Vos. David S. Ahern continued working on it. Kevin Wolf, 8f1ae32a1SGerd Hoffmann * Jan Kiszka and Vincent Palatin contributed bugfixes. 9f1ae32a1SGerd Hoffmann * 10f1ae32a1SGerd Hoffmann * 11f1ae32a1SGerd Hoffmann * This library is free software; you can redistribute it and/or 12f1ae32a1SGerd Hoffmann * modify it under the terms of the GNU Lesser General Public 13f1ae32a1SGerd Hoffmann * License as published by the Free Software Foundation; either 14f1ae32a1SGerd Hoffmann * version 2 of the License, or(at your option) any later version. 15f1ae32a1SGerd Hoffmann * 16f1ae32a1SGerd Hoffmann * This library is distributed in the hope that it will be useful, 17f1ae32a1SGerd Hoffmann * but WITHOUT ANY WARRANTY; without even the implied warranty of 18f1ae32a1SGerd Hoffmann * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19f1ae32a1SGerd Hoffmann * Lesser General Public License for more details. 20f1ae32a1SGerd Hoffmann * 21f1ae32a1SGerd Hoffmann * You should have received a copy of the GNU General Public License 22f1ae32a1SGerd Hoffmann * along with this program; if not, see <http://www.gnu.org/licenses/>. 23f1ae32a1SGerd Hoffmann */ 24f1ae32a1SGerd Hoffmann 25f1ae32a1SGerd Hoffmann #include "hw/hw.h" 26f1ae32a1SGerd Hoffmann #include "qemu-timer.h" 27f1ae32a1SGerd Hoffmann #include "hw/usb.h" 28f1ae32a1SGerd Hoffmann #include "hw/pci.h" 29f1ae32a1SGerd Hoffmann #include "monitor.h" 30f1ae32a1SGerd Hoffmann #include "trace.h" 31f1ae32a1SGerd Hoffmann #include "dma.h" 32f1ae32a1SGerd Hoffmann 33f1ae32a1SGerd Hoffmann #define EHCI_DEBUG 0 34f1ae32a1SGerd Hoffmann 35f1ae32a1SGerd Hoffmann #if EHCI_DEBUG 36f1ae32a1SGerd Hoffmann #define DPRINTF printf 37f1ae32a1SGerd Hoffmann #else 38f1ae32a1SGerd Hoffmann #define DPRINTF(...) 39f1ae32a1SGerd Hoffmann #endif 40f1ae32a1SGerd Hoffmann 41f1ae32a1SGerd Hoffmann /* internal processing - reset HC to try and recover */ 42f1ae32a1SGerd Hoffmann #define USB_RET_PROCERR (-99) 43f1ae32a1SGerd Hoffmann 44f1ae32a1SGerd Hoffmann #define MMIO_SIZE 0x1000 45f1ae32a1SGerd Hoffmann 46f1ae32a1SGerd Hoffmann /* Capability Registers Base Address - section 2.2 */ 47f1ae32a1SGerd Hoffmann #define CAPREGBASE 0x0000 48f1ae32a1SGerd Hoffmann #define CAPLENGTH CAPREGBASE + 0x0000 // 1-byte, 0x0001 reserved 49f1ae32a1SGerd Hoffmann #define HCIVERSION CAPREGBASE + 0x0002 // 2-bytes, i/f version # 50f1ae32a1SGerd Hoffmann #define HCSPARAMS CAPREGBASE + 0x0004 // 4-bytes, structural params 51f1ae32a1SGerd Hoffmann #define HCCPARAMS CAPREGBASE + 0x0008 // 4-bytes, capability params 52f1ae32a1SGerd Hoffmann #define EECP HCCPARAMS + 1 53f1ae32a1SGerd Hoffmann #define HCSPPORTROUTE1 CAPREGBASE + 0x000c 54f1ae32a1SGerd Hoffmann #define HCSPPORTROUTE2 CAPREGBASE + 0x0010 55f1ae32a1SGerd Hoffmann 56f1ae32a1SGerd Hoffmann #define OPREGBASE 0x0020 // Operational Registers Base Address 57f1ae32a1SGerd Hoffmann 58f1ae32a1SGerd Hoffmann #define USBCMD OPREGBASE + 0x0000 59f1ae32a1SGerd Hoffmann #define USBCMD_RUNSTOP (1 << 0) // run / Stop 60f1ae32a1SGerd Hoffmann #define USBCMD_HCRESET (1 << 1) // HC Reset 61f1ae32a1SGerd Hoffmann #define USBCMD_FLS (3 << 2) // Frame List Size 62f1ae32a1SGerd Hoffmann #define USBCMD_FLS_SH 2 // Frame List Size Shift 63f1ae32a1SGerd Hoffmann #define USBCMD_PSE (1 << 4) // Periodic Schedule Enable 64f1ae32a1SGerd Hoffmann #define USBCMD_ASE (1 << 5) // Asynch Schedule Enable 65f1ae32a1SGerd Hoffmann #define USBCMD_IAAD (1 << 6) // Int Asynch Advance Doorbell 66f1ae32a1SGerd Hoffmann #define USBCMD_LHCR (1 << 7) // Light Host Controller Reset 67f1ae32a1SGerd Hoffmann #define USBCMD_ASPMC (3 << 8) // Async Sched Park Mode Count 68f1ae32a1SGerd Hoffmann #define USBCMD_ASPME (1 << 11) // Async Sched Park Mode Enable 69f1ae32a1SGerd Hoffmann #define USBCMD_ITC (0x7f << 16) // Int Threshold Control 70f1ae32a1SGerd Hoffmann #define USBCMD_ITC_SH 16 // Int Threshold Control Shift 71f1ae32a1SGerd Hoffmann 72f1ae32a1SGerd Hoffmann #define USBSTS OPREGBASE + 0x0004 73f1ae32a1SGerd Hoffmann #define USBSTS_RO_MASK 0x0000003f 74f1ae32a1SGerd Hoffmann #define USBSTS_INT (1 << 0) // USB Interrupt 75f1ae32a1SGerd Hoffmann #define USBSTS_ERRINT (1 << 1) // Error Interrupt 76f1ae32a1SGerd Hoffmann #define USBSTS_PCD (1 << 2) // Port Change Detect 77f1ae32a1SGerd Hoffmann #define USBSTS_FLR (1 << 3) // Frame List Rollover 78f1ae32a1SGerd Hoffmann #define USBSTS_HSE (1 << 4) // Host System Error 79f1ae32a1SGerd Hoffmann #define USBSTS_IAA (1 << 5) // Interrupt on Async Advance 80f1ae32a1SGerd Hoffmann #define USBSTS_HALT (1 << 12) // HC Halted 81f1ae32a1SGerd Hoffmann #define USBSTS_REC (1 << 13) // Reclamation 82f1ae32a1SGerd Hoffmann #define USBSTS_PSS (1 << 14) // Periodic Schedule Status 83f1ae32a1SGerd Hoffmann #define USBSTS_ASS (1 << 15) // Asynchronous Schedule Status 84f1ae32a1SGerd Hoffmann 85f1ae32a1SGerd Hoffmann /* 86f1ae32a1SGerd Hoffmann * Interrupt enable bits correspond to the interrupt active bits in USBSTS 87f1ae32a1SGerd Hoffmann * so no need to redefine here. 88f1ae32a1SGerd Hoffmann */ 89f1ae32a1SGerd Hoffmann #define USBINTR OPREGBASE + 0x0008 90f1ae32a1SGerd Hoffmann #define USBINTR_MASK 0x0000003f 91f1ae32a1SGerd Hoffmann 92f1ae32a1SGerd Hoffmann #define FRINDEX OPREGBASE + 0x000c 93f1ae32a1SGerd Hoffmann #define CTRLDSSEGMENT OPREGBASE + 0x0010 94f1ae32a1SGerd Hoffmann #define PERIODICLISTBASE OPREGBASE + 0x0014 95f1ae32a1SGerd Hoffmann #define ASYNCLISTADDR OPREGBASE + 0x0018 96f1ae32a1SGerd Hoffmann #define ASYNCLISTADDR_MASK 0xffffffe0 97f1ae32a1SGerd Hoffmann 98f1ae32a1SGerd Hoffmann #define CONFIGFLAG OPREGBASE + 0x0040 99f1ae32a1SGerd Hoffmann 100f1ae32a1SGerd Hoffmann #define PORTSC (OPREGBASE + 0x0044) 101f1ae32a1SGerd Hoffmann #define PORTSC_BEGIN PORTSC 102f1ae32a1SGerd Hoffmann #define PORTSC_END (PORTSC + 4 * NB_PORTS) 103f1ae32a1SGerd Hoffmann /* 104f1ae32a1SGerd Hoffmann * Bits that are reserved or are read-only are masked out of values 105f1ae32a1SGerd Hoffmann * written to us by software 106f1ae32a1SGerd Hoffmann */ 107f1ae32a1SGerd Hoffmann #define PORTSC_RO_MASK 0x007001c0 108f1ae32a1SGerd Hoffmann #define PORTSC_RWC_MASK 0x0000002a 109f1ae32a1SGerd Hoffmann #define PORTSC_WKOC_E (1 << 22) // Wake on Over Current Enable 110f1ae32a1SGerd Hoffmann #define PORTSC_WKDS_E (1 << 21) // Wake on Disconnect Enable 111f1ae32a1SGerd Hoffmann #define PORTSC_WKCN_E (1 << 20) // Wake on Connect Enable 112f1ae32a1SGerd Hoffmann #define PORTSC_PTC (15 << 16) // Port Test Control 113f1ae32a1SGerd Hoffmann #define PORTSC_PTC_SH 16 // Port Test Control shift 114f1ae32a1SGerd Hoffmann #define PORTSC_PIC (3 << 14) // Port Indicator Control 115f1ae32a1SGerd Hoffmann #define PORTSC_PIC_SH 14 // Port Indicator Control Shift 116f1ae32a1SGerd Hoffmann #define PORTSC_POWNER (1 << 13) // Port Owner 117f1ae32a1SGerd Hoffmann #define PORTSC_PPOWER (1 << 12) // Port Power 118f1ae32a1SGerd Hoffmann #define PORTSC_LINESTAT (3 << 10) // Port Line Status 119f1ae32a1SGerd Hoffmann #define PORTSC_LINESTAT_SH 10 // Port Line Status Shift 120f1ae32a1SGerd Hoffmann #define PORTSC_PRESET (1 << 8) // Port Reset 121f1ae32a1SGerd Hoffmann #define PORTSC_SUSPEND (1 << 7) // Port Suspend 122f1ae32a1SGerd Hoffmann #define PORTSC_FPRES (1 << 6) // Force Port Resume 123f1ae32a1SGerd Hoffmann #define PORTSC_OCC (1 << 5) // Over Current Change 124f1ae32a1SGerd Hoffmann #define PORTSC_OCA (1 << 4) // Over Current Active 125f1ae32a1SGerd Hoffmann #define PORTSC_PEDC (1 << 3) // Port Enable/Disable Change 126f1ae32a1SGerd Hoffmann #define PORTSC_PED (1 << 2) // Port Enable/Disable 127f1ae32a1SGerd Hoffmann #define PORTSC_CSC (1 << 1) // Connect Status Change 128f1ae32a1SGerd Hoffmann #define PORTSC_CONNECT (1 << 0) // Current Connect Status 129f1ae32a1SGerd Hoffmann 130f1ae32a1SGerd Hoffmann #define FRAME_TIMER_FREQ 1000 131f1ae32a1SGerd Hoffmann #define FRAME_TIMER_NS (1000000000 / FRAME_TIMER_FREQ) 132f1ae32a1SGerd Hoffmann 133f1ae32a1SGerd Hoffmann #define NB_MAXINTRATE 8 // Max rate at which controller issues ints 134f1ae32a1SGerd Hoffmann #define NB_PORTS 6 // Number of downstream ports 135f1ae32a1SGerd Hoffmann #define BUFF_SIZE 5*4096 // Max bytes to transfer per transaction 136f1ae32a1SGerd Hoffmann #define MAX_QH 100 // Max allowable queue heads in a chain 137f1ae32a1SGerd Hoffmann 138f1ae32a1SGerd Hoffmann /* Internal periodic / asynchronous schedule state machine states 139f1ae32a1SGerd Hoffmann */ 140f1ae32a1SGerd Hoffmann typedef enum { 141f1ae32a1SGerd Hoffmann EST_INACTIVE = 1000, 142f1ae32a1SGerd Hoffmann EST_ACTIVE, 143f1ae32a1SGerd Hoffmann EST_EXECUTING, 144f1ae32a1SGerd Hoffmann EST_SLEEPING, 145f1ae32a1SGerd Hoffmann /* The following states are internal to the state machine function 146f1ae32a1SGerd Hoffmann */ 147f1ae32a1SGerd Hoffmann EST_WAITLISTHEAD, 148f1ae32a1SGerd Hoffmann EST_FETCHENTRY, 149f1ae32a1SGerd Hoffmann EST_FETCHQH, 150f1ae32a1SGerd Hoffmann EST_FETCHITD, 151f1ae32a1SGerd Hoffmann EST_FETCHSITD, 152f1ae32a1SGerd Hoffmann EST_ADVANCEQUEUE, 153f1ae32a1SGerd Hoffmann EST_FETCHQTD, 154f1ae32a1SGerd Hoffmann EST_EXECUTE, 155f1ae32a1SGerd Hoffmann EST_WRITEBACK, 156f1ae32a1SGerd Hoffmann EST_HORIZONTALQH 157f1ae32a1SGerd Hoffmann } EHCI_STATES; 158f1ae32a1SGerd Hoffmann 159f1ae32a1SGerd Hoffmann /* macros for accessing fields within next link pointer entry */ 160f1ae32a1SGerd Hoffmann #define NLPTR_GET(x) ((x) & 0xffffffe0) 161f1ae32a1SGerd Hoffmann #define NLPTR_TYPE_GET(x) (((x) >> 1) & 3) 162f1ae32a1SGerd Hoffmann #define NLPTR_TBIT(x) ((x) & 1) // 1=invalid, 0=valid 163f1ae32a1SGerd Hoffmann 164f1ae32a1SGerd Hoffmann /* link pointer types */ 165f1ae32a1SGerd Hoffmann #define NLPTR_TYPE_ITD 0 // isoc xfer descriptor 166f1ae32a1SGerd Hoffmann #define NLPTR_TYPE_QH 1 // queue head 167f1ae32a1SGerd Hoffmann #define NLPTR_TYPE_STITD 2 // split xaction, isoc xfer descriptor 168f1ae32a1SGerd Hoffmann #define NLPTR_TYPE_FSTN 3 // frame span traversal node 169f1ae32a1SGerd Hoffmann 170f1ae32a1SGerd Hoffmann 171f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 3.3 172f1ae32a1SGerd Hoffmann */ 173f1ae32a1SGerd Hoffmann typedef struct EHCIitd { 174f1ae32a1SGerd Hoffmann uint32_t next; 175f1ae32a1SGerd Hoffmann 176f1ae32a1SGerd Hoffmann uint32_t transact[8]; 177f1ae32a1SGerd Hoffmann #define ITD_XACT_ACTIVE (1 << 31) 178f1ae32a1SGerd Hoffmann #define ITD_XACT_DBERROR (1 << 30) 179f1ae32a1SGerd Hoffmann #define ITD_XACT_BABBLE (1 << 29) 180f1ae32a1SGerd Hoffmann #define ITD_XACT_XACTERR (1 << 28) 181f1ae32a1SGerd Hoffmann #define ITD_XACT_LENGTH_MASK 0x0fff0000 182f1ae32a1SGerd Hoffmann #define ITD_XACT_LENGTH_SH 16 183f1ae32a1SGerd Hoffmann #define ITD_XACT_IOC (1 << 15) 184f1ae32a1SGerd Hoffmann #define ITD_XACT_PGSEL_MASK 0x00007000 185f1ae32a1SGerd Hoffmann #define ITD_XACT_PGSEL_SH 12 186f1ae32a1SGerd Hoffmann #define ITD_XACT_OFFSET_MASK 0x00000fff 187f1ae32a1SGerd Hoffmann 188f1ae32a1SGerd Hoffmann uint32_t bufptr[7]; 189f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_MASK 0xfffff000 190f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_SH 12 191f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_EP_MASK 0x00000f00 192f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_EP_SH 8 193f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_DEVADDR_MASK 0x0000007f 194f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_DEVADDR_SH 0 195f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_DIRECTION (1 << 11) 196f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_MAXPKT_MASK 0x000007ff 197f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_MAXPKT_SH 0 198f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_MULT_MASK 0x00000003 199f1ae32a1SGerd Hoffmann #define ITD_BUFPTR_MULT_SH 0 200f1ae32a1SGerd Hoffmann } EHCIitd; 201f1ae32a1SGerd Hoffmann 202f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 3.4 203f1ae32a1SGerd Hoffmann */ 204f1ae32a1SGerd Hoffmann typedef struct EHCIsitd { 205f1ae32a1SGerd Hoffmann uint32_t next; // Standard next link pointer 206f1ae32a1SGerd Hoffmann uint32_t epchar; 207f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_IO (1 << 31) 208f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_PORTNUM_MASK 0x7f000000 209f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_PORTNUM_SH 24 210f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_HUBADD_MASK 0x007f0000 211f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_HUBADDR_SH 16 212f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_EPNUM_MASK 0x00000f00 213f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_EPNUM_SH 8 214f1ae32a1SGerd Hoffmann #define SITD_EPCHAR_DEVADDR_MASK 0x0000007f 215f1ae32a1SGerd Hoffmann 216f1ae32a1SGerd Hoffmann uint32_t uframe; 217f1ae32a1SGerd Hoffmann #define SITD_UFRAME_CMASK_MASK 0x0000ff00 218f1ae32a1SGerd Hoffmann #define SITD_UFRAME_CMASK_SH 8 219f1ae32a1SGerd Hoffmann #define SITD_UFRAME_SMASK_MASK 0x000000ff 220f1ae32a1SGerd Hoffmann 221f1ae32a1SGerd Hoffmann uint32_t results; 222f1ae32a1SGerd Hoffmann #define SITD_RESULTS_IOC (1 << 31) 223f1ae32a1SGerd Hoffmann #define SITD_RESULTS_PGSEL (1 << 30) 224f1ae32a1SGerd Hoffmann #define SITD_RESULTS_TBYTES_MASK 0x03ff0000 225f1ae32a1SGerd Hoffmann #define SITD_RESULTS_TYBYTES_SH 16 226f1ae32a1SGerd Hoffmann #define SITD_RESULTS_CPROGMASK_MASK 0x0000ff00 227f1ae32a1SGerd Hoffmann #define SITD_RESULTS_CPROGMASK_SH 8 228f1ae32a1SGerd Hoffmann #define SITD_RESULTS_ACTIVE (1 << 7) 229f1ae32a1SGerd Hoffmann #define SITD_RESULTS_ERR (1 << 6) 230f1ae32a1SGerd Hoffmann #define SITD_RESULTS_DBERR (1 << 5) 231f1ae32a1SGerd Hoffmann #define SITD_RESULTS_BABBLE (1 << 4) 232f1ae32a1SGerd Hoffmann #define SITD_RESULTS_XACTERR (1 << 3) 233f1ae32a1SGerd Hoffmann #define SITD_RESULTS_MISSEDUF (1 << 2) 234f1ae32a1SGerd Hoffmann #define SITD_RESULTS_SPLITXSTATE (1 << 1) 235f1ae32a1SGerd Hoffmann 236f1ae32a1SGerd Hoffmann uint32_t bufptr[2]; 237f1ae32a1SGerd Hoffmann #define SITD_BUFPTR_MASK 0xfffff000 238f1ae32a1SGerd Hoffmann #define SITD_BUFPTR_CURROFF_MASK 0x00000fff 239f1ae32a1SGerd Hoffmann #define SITD_BUFPTR_TPOS_MASK 0x00000018 240f1ae32a1SGerd Hoffmann #define SITD_BUFPTR_TPOS_SH 3 241f1ae32a1SGerd Hoffmann #define SITD_BUFPTR_TCNT_MASK 0x00000007 242f1ae32a1SGerd Hoffmann 243f1ae32a1SGerd Hoffmann uint32_t backptr; // Standard next link pointer 244f1ae32a1SGerd Hoffmann } EHCIsitd; 245f1ae32a1SGerd Hoffmann 246f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 3.5 247f1ae32a1SGerd Hoffmann */ 248f1ae32a1SGerd Hoffmann typedef struct EHCIqtd { 249f1ae32a1SGerd Hoffmann uint32_t next; // Standard next link pointer 250f1ae32a1SGerd Hoffmann uint32_t altnext; // Standard next link pointer 251f1ae32a1SGerd Hoffmann uint32_t token; 252f1ae32a1SGerd Hoffmann #define QTD_TOKEN_DTOGGLE (1 << 31) 253f1ae32a1SGerd Hoffmann #define QTD_TOKEN_TBYTES_MASK 0x7fff0000 254f1ae32a1SGerd Hoffmann #define QTD_TOKEN_TBYTES_SH 16 255f1ae32a1SGerd Hoffmann #define QTD_TOKEN_IOC (1 << 15) 256f1ae32a1SGerd Hoffmann #define QTD_TOKEN_CPAGE_MASK 0x00007000 257f1ae32a1SGerd Hoffmann #define QTD_TOKEN_CPAGE_SH 12 258f1ae32a1SGerd Hoffmann #define QTD_TOKEN_CERR_MASK 0x00000c00 259f1ae32a1SGerd Hoffmann #define QTD_TOKEN_CERR_SH 10 260f1ae32a1SGerd Hoffmann #define QTD_TOKEN_PID_MASK 0x00000300 261f1ae32a1SGerd Hoffmann #define QTD_TOKEN_PID_SH 8 262f1ae32a1SGerd Hoffmann #define QTD_TOKEN_ACTIVE (1 << 7) 263f1ae32a1SGerd Hoffmann #define QTD_TOKEN_HALT (1 << 6) 264f1ae32a1SGerd Hoffmann #define QTD_TOKEN_DBERR (1 << 5) 265f1ae32a1SGerd Hoffmann #define QTD_TOKEN_BABBLE (1 << 4) 266f1ae32a1SGerd Hoffmann #define QTD_TOKEN_XACTERR (1 << 3) 267f1ae32a1SGerd Hoffmann #define QTD_TOKEN_MISSEDUF (1 << 2) 268f1ae32a1SGerd Hoffmann #define QTD_TOKEN_SPLITXSTATE (1 << 1) 269f1ae32a1SGerd Hoffmann #define QTD_TOKEN_PING (1 << 0) 270f1ae32a1SGerd Hoffmann 271f1ae32a1SGerd Hoffmann uint32_t bufptr[5]; // Standard buffer pointer 272f1ae32a1SGerd Hoffmann #define QTD_BUFPTR_MASK 0xfffff000 273f1ae32a1SGerd Hoffmann #define QTD_BUFPTR_SH 12 274f1ae32a1SGerd Hoffmann } EHCIqtd; 275f1ae32a1SGerd Hoffmann 276f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 3.6 277f1ae32a1SGerd Hoffmann */ 278f1ae32a1SGerd Hoffmann typedef struct EHCIqh { 279f1ae32a1SGerd Hoffmann uint32_t next; // Standard next link pointer 280f1ae32a1SGerd Hoffmann 281f1ae32a1SGerd Hoffmann /* endpoint characteristics */ 282f1ae32a1SGerd Hoffmann uint32_t epchar; 283f1ae32a1SGerd Hoffmann #define QH_EPCHAR_RL_MASK 0xf0000000 284f1ae32a1SGerd Hoffmann #define QH_EPCHAR_RL_SH 28 285f1ae32a1SGerd Hoffmann #define QH_EPCHAR_C (1 << 27) 286f1ae32a1SGerd Hoffmann #define QH_EPCHAR_MPLEN_MASK 0x07FF0000 287f1ae32a1SGerd Hoffmann #define QH_EPCHAR_MPLEN_SH 16 288f1ae32a1SGerd Hoffmann #define QH_EPCHAR_H (1 << 15) 289f1ae32a1SGerd Hoffmann #define QH_EPCHAR_DTC (1 << 14) 290f1ae32a1SGerd Hoffmann #define QH_EPCHAR_EPS_MASK 0x00003000 291f1ae32a1SGerd Hoffmann #define QH_EPCHAR_EPS_SH 12 292f1ae32a1SGerd Hoffmann #define EHCI_QH_EPS_FULL 0 293f1ae32a1SGerd Hoffmann #define EHCI_QH_EPS_LOW 1 294f1ae32a1SGerd Hoffmann #define EHCI_QH_EPS_HIGH 2 295f1ae32a1SGerd Hoffmann #define EHCI_QH_EPS_RESERVED 3 296f1ae32a1SGerd Hoffmann 297f1ae32a1SGerd Hoffmann #define QH_EPCHAR_EP_MASK 0x00000f00 298f1ae32a1SGerd Hoffmann #define QH_EPCHAR_EP_SH 8 299f1ae32a1SGerd Hoffmann #define QH_EPCHAR_I (1 << 7) 300f1ae32a1SGerd Hoffmann #define QH_EPCHAR_DEVADDR_MASK 0x0000007f 301f1ae32a1SGerd Hoffmann #define QH_EPCHAR_DEVADDR_SH 0 302f1ae32a1SGerd Hoffmann 303f1ae32a1SGerd Hoffmann /* endpoint capabilities */ 304f1ae32a1SGerd Hoffmann uint32_t epcap; 305f1ae32a1SGerd Hoffmann #define QH_EPCAP_MULT_MASK 0xc0000000 306f1ae32a1SGerd Hoffmann #define QH_EPCAP_MULT_SH 30 307f1ae32a1SGerd Hoffmann #define QH_EPCAP_PORTNUM_MASK 0x3f800000 308f1ae32a1SGerd Hoffmann #define QH_EPCAP_PORTNUM_SH 23 309f1ae32a1SGerd Hoffmann #define QH_EPCAP_HUBADDR_MASK 0x007f0000 310f1ae32a1SGerd Hoffmann #define QH_EPCAP_HUBADDR_SH 16 311f1ae32a1SGerd Hoffmann #define QH_EPCAP_CMASK_MASK 0x0000ff00 312f1ae32a1SGerd Hoffmann #define QH_EPCAP_CMASK_SH 8 313f1ae32a1SGerd Hoffmann #define QH_EPCAP_SMASK_MASK 0x000000ff 314f1ae32a1SGerd Hoffmann #define QH_EPCAP_SMASK_SH 0 315f1ae32a1SGerd Hoffmann 316f1ae32a1SGerd Hoffmann uint32_t current_qtd; // Standard next link pointer 317f1ae32a1SGerd Hoffmann uint32_t next_qtd; // Standard next link pointer 318f1ae32a1SGerd Hoffmann uint32_t altnext_qtd; 319f1ae32a1SGerd Hoffmann #define QH_ALTNEXT_NAKCNT_MASK 0x0000001e 320f1ae32a1SGerd Hoffmann #define QH_ALTNEXT_NAKCNT_SH 1 321f1ae32a1SGerd Hoffmann 322f1ae32a1SGerd Hoffmann uint32_t token; // Same as QTD token 323f1ae32a1SGerd Hoffmann uint32_t bufptr[5]; // Standard buffer pointer 324f1ae32a1SGerd Hoffmann #define BUFPTR_CPROGMASK_MASK 0x000000ff 325f1ae32a1SGerd Hoffmann #define BUFPTR_FRAMETAG_MASK 0x0000001f 326f1ae32a1SGerd Hoffmann #define BUFPTR_SBYTES_MASK 0x00000fe0 327f1ae32a1SGerd Hoffmann #define BUFPTR_SBYTES_SH 5 328f1ae32a1SGerd Hoffmann } EHCIqh; 329f1ae32a1SGerd Hoffmann 330f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 3.7 331f1ae32a1SGerd Hoffmann */ 332f1ae32a1SGerd Hoffmann typedef struct EHCIfstn { 333f1ae32a1SGerd Hoffmann uint32_t next; // Standard next link pointer 334f1ae32a1SGerd Hoffmann uint32_t backptr; // Standard next link pointer 335f1ae32a1SGerd Hoffmann } EHCIfstn; 336f1ae32a1SGerd Hoffmann 337eb36a88eSGerd Hoffmann typedef struct EHCIPacket EHCIPacket; 338f1ae32a1SGerd Hoffmann typedef struct EHCIQueue EHCIQueue; 339f1ae32a1SGerd Hoffmann typedef struct EHCIState EHCIState; 340f1ae32a1SGerd Hoffmann 341f1ae32a1SGerd Hoffmann enum async_state { 342f1ae32a1SGerd Hoffmann EHCI_ASYNC_NONE = 0, 343f1ae32a1SGerd Hoffmann EHCI_ASYNC_INFLIGHT, 344f1ae32a1SGerd Hoffmann EHCI_ASYNC_FINISHED, 345f1ae32a1SGerd Hoffmann }; 346f1ae32a1SGerd Hoffmann 347eb36a88eSGerd Hoffmann struct EHCIPacket { 348eb36a88eSGerd Hoffmann EHCIQueue *queue; 349eb36a88eSGerd Hoffmann QTAILQ_ENTRY(EHCIPacket) next; 350eb36a88eSGerd Hoffmann 351eb36a88eSGerd Hoffmann EHCIqtd qtd; /* copy of current QTD (being worked on) */ 352eb36a88eSGerd Hoffmann uint32_t qtdaddr; /* address QTD read from */ 353eb36a88eSGerd Hoffmann 354eb36a88eSGerd Hoffmann USBPacket packet; 355eb36a88eSGerd Hoffmann QEMUSGList sgl; 356eb36a88eSGerd Hoffmann int pid; 357eb36a88eSGerd Hoffmann uint32_t tbytes; 358eb36a88eSGerd Hoffmann enum async_state async; 359eb36a88eSGerd Hoffmann int usb_status; 360eb36a88eSGerd Hoffmann }; 361eb36a88eSGerd Hoffmann 362f1ae32a1SGerd Hoffmann struct EHCIQueue { 363f1ae32a1SGerd Hoffmann EHCIState *ehci; 364f1ae32a1SGerd Hoffmann QTAILQ_ENTRY(EHCIQueue) next; 365f1ae32a1SGerd Hoffmann uint32_t seen; 366f1ae32a1SGerd Hoffmann uint64_t ts; 367f1ae32a1SGerd Hoffmann 368f1ae32a1SGerd Hoffmann /* cached data from guest - needs to be flushed 369f1ae32a1SGerd Hoffmann * when guest removes an entry (doorbell, handshake sequence) 370f1ae32a1SGerd Hoffmann */ 371eb36a88eSGerd Hoffmann EHCIqh qh; /* copy of current QH (being worked on) */ 372eb36a88eSGerd Hoffmann uint32_t qhaddr; /* address QH read from */ 373eb36a88eSGerd Hoffmann uint32_t qtdaddr; /* address QTD read from */ 374eb36a88eSGerd Hoffmann QTAILQ_HEAD(, EHCIPacket) packets; 375f1ae32a1SGerd Hoffmann }; 376f1ae32a1SGerd Hoffmann 377f1ae32a1SGerd Hoffmann typedef QTAILQ_HEAD(EHCIQueueHead, EHCIQueue) EHCIQueueHead; 378f1ae32a1SGerd Hoffmann 379f1ae32a1SGerd Hoffmann struct EHCIState { 380f1ae32a1SGerd Hoffmann PCIDevice dev; 381f1ae32a1SGerd Hoffmann USBBus bus; 382f1ae32a1SGerd Hoffmann qemu_irq irq; 383f1ae32a1SGerd Hoffmann MemoryRegion mem; 384f1ae32a1SGerd Hoffmann int companion_count; 385f1ae32a1SGerd Hoffmann 386f1ae32a1SGerd Hoffmann /* properties */ 387f1ae32a1SGerd Hoffmann uint32_t freq; 388f1ae32a1SGerd Hoffmann uint32_t maxframes; 389f1ae32a1SGerd Hoffmann 390f1ae32a1SGerd Hoffmann /* 391f1ae32a1SGerd Hoffmann * EHCI spec version 1.0 Section 2.3 392f1ae32a1SGerd Hoffmann * Host Controller Operational Registers 393f1ae32a1SGerd Hoffmann */ 394f1ae32a1SGerd Hoffmann union { 395f1ae32a1SGerd Hoffmann uint8_t mmio[MMIO_SIZE]; 396f1ae32a1SGerd Hoffmann struct { 397f1ae32a1SGerd Hoffmann uint8_t cap[OPREGBASE]; 398f1ae32a1SGerd Hoffmann uint32_t usbcmd; 399f1ae32a1SGerd Hoffmann uint32_t usbsts; 400f1ae32a1SGerd Hoffmann uint32_t usbintr; 401f1ae32a1SGerd Hoffmann uint32_t frindex; 402f1ae32a1SGerd Hoffmann uint32_t ctrldssegment; 403f1ae32a1SGerd Hoffmann uint32_t periodiclistbase; 404f1ae32a1SGerd Hoffmann uint32_t asynclistaddr; 405f1ae32a1SGerd Hoffmann uint32_t notused[9]; 406f1ae32a1SGerd Hoffmann uint32_t configflag; 407f1ae32a1SGerd Hoffmann uint32_t portsc[NB_PORTS]; 408f1ae32a1SGerd Hoffmann }; 409f1ae32a1SGerd Hoffmann }; 410f1ae32a1SGerd Hoffmann 411f1ae32a1SGerd Hoffmann /* 412f1ae32a1SGerd Hoffmann * Internal states, shadow registers, etc 413f1ae32a1SGerd Hoffmann */ 414f1ae32a1SGerd Hoffmann QEMUTimer *frame_timer; 415f1ae32a1SGerd Hoffmann int attach_poll_counter; 416f1ae32a1SGerd Hoffmann int astate; // Current state in asynchronous schedule 417f1ae32a1SGerd Hoffmann int pstate; // Current state in periodic schedule 418f1ae32a1SGerd Hoffmann USBPort ports[NB_PORTS]; 419f1ae32a1SGerd Hoffmann USBPort *companion_ports[NB_PORTS]; 420f1ae32a1SGerd Hoffmann uint32_t usbsts_pending; 421f1ae32a1SGerd Hoffmann EHCIQueueHead aqueues; 422f1ae32a1SGerd Hoffmann EHCIQueueHead pqueues; 423f1ae32a1SGerd Hoffmann 424f1ae32a1SGerd Hoffmann uint32_t a_fetch_addr; // which address to look at next 425f1ae32a1SGerd Hoffmann uint32_t p_fetch_addr; // which address to look at next 426f1ae32a1SGerd Hoffmann 427f1ae32a1SGerd Hoffmann USBPacket ipacket; 428f1ae32a1SGerd Hoffmann QEMUSGList isgl; 429f1ae32a1SGerd Hoffmann 430f1ae32a1SGerd Hoffmann uint64_t last_run_ns; 431f1ae32a1SGerd Hoffmann }; 432f1ae32a1SGerd Hoffmann 433f1ae32a1SGerd Hoffmann #define SET_LAST_RUN_CLOCK(s) \ 434f1ae32a1SGerd Hoffmann (s)->last_run_ns = qemu_get_clock_ns(vm_clock); 435f1ae32a1SGerd Hoffmann 436f1ae32a1SGerd Hoffmann /* nifty macros from Arnon's EHCI version */ 437f1ae32a1SGerd Hoffmann #define get_field(data, field) \ 438f1ae32a1SGerd Hoffmann (((data) & field##_MASK) >> field##_SH) 439f1ae32a1SGerd Hoffmann 440f1ae32a1SGerd Hoffmann #define set_field(data, newval, field) do { \ 441f1ae32a1SGerd Hoffmann uint32_t val = *data; \ 442f1ae32a1SGerd Hoffmann val &= ~ field##_MASK; \ 443f1ae32a1SGerd Hoffmann val |= ((newval) << field##_SH) & field##_MASK; \ 444f1ae32a1SGerd Hoffmann *data = val; \ 445f1ae32a1SGerd Hoffmann } while(0) 446f1ae32a1SGerd Hoffmann 447f1ae32a1SGerd Hoffmann static const char *ehci_state_names[] = { 448f1ae32a1SGerd Hoffmann [EST_INACTIVE] = "INACTIVE", 449f1ae32a1SGerd Hoffmann [EST_ACTIVE] = "ACTIVE", 450f1ae32a1SGerd Hoffmann [EST_EXECUTING] = "EXECUTING", 451f1ae32a1SGerd Hoffmann [EST_SLEEPING] = "SLEEPING", 452f1ae32a1SGerd Hoffmann [EST_WAITLISTHEAD] = "WAITLISTHEAD", 453f1ae32a1SGerd Hoffmann [EST_FETCHENTRY] = "FETCH ENTRY", 454f1ae32a1SGerd Hoffmann [EST_FETCHQH] = "FETCH QH", 455f1ae32a1SGerd Hoffmann [EST_FETCHITD] = "FETCH ITD", 456f1ae32a1SGerd Hoffmann [EST_ADVANCEQUEUE] = "ADVANCEQUEUE", 457f1ae32a1SGerd Hoffmann [EST_FETCHQTD] = "FETCH QTD", 458f1ae32a1SGerd Hoffmann [EST_EXECUTE] = "EXECUTE", 459f1ae32a1SGerd Hoffmann [EST_WRITEBACK] = "WRITEBACK", 460f1ae32a1SGerd Hoffmann [EST_HORIZONTALQH] = "HORIZONTALQH", 461f1ae32a1SGerd Hoffmann }; 462f1ae32a1SGerd Hoffmann 463f1ae32a1SGerd Hoffmann static const char *ehci_mmio_names[] = { 464f1ae32a1SGerd Hoffmann [CAPLENGTH] = "CAPLENGTH", 465f1ae32a1SGerd Hoffmann [HCIVERSION] = "HCIVERSION", 466f1ae32a1SGerd Hoffmann [HCSPARAMS] = "HCSPARAMS", 467f1ae32a1SGerd Hoffmann [HCCPARAMS] = "HCCPARAMS", 468f1ae32a1SGerd Hoffmann [USBCMD] = "USBCMD", 469f1ae32a1SGerd Hoffmann [USBSTS] = "USBSTS", 470f1ae32a1SGerd Hoffmann [USBINTR] = "USBINTR", 471f1ae32a1SGerd Hoffmann [FRINDEX] = "FRINDEX", 472f1ae32a1SGerd Hoffmann [PERIODICLISTBASE] = "P-LIST BASE", 473f1ae32a1SGerd Hoffmann [ASYNCLISTADDR] = "A-LIST ADDR", 474f1ae32a1SGerd Hoffmann [PORTSC_BEGIN] = "PORTSC #0", 475f1ae32a1SGerd Hoffmann [PORTSC_BEGIN + 4] = "PORTSC #1", 476f1ae32a1SGerd Hoffmann [PORTSC_BEGIN + 8] = "PORTSC #2", 477f1ae32a1SGerd Hoffmann [PORTSC_BEGIN + 12] = "PORTSC #3", 478f1ae32a1SGerd Hoffmann [PORTSC_BEGIN + 16] = "PORTSC #4", 479f1ae32a1SGerd Hoffmann [PORTSC_BEGIN + 20] = "PORTSC #5", 480f1ae32a1SGerd Hoffmann [CONFIGFLAG] = "CONFIGFLAG", 481f1ae32a1SGerd Hoffmann }; 482f1ae32a1SGerd Hoffmann 483f1ae32a1SGerd Hoffmann static const char *nr2str(const char **n, size_t len, uint32_t nr) 484f1ae32a1SGerd Hoffmann { 485f1ae32a1SGerd Hoffmann if (nr < len && n[nr] != NULL) { 486f1ae32a1SGerd Hoffmann return n[nr]; 487f1ae32a1SGerd Hoffmann } else { 488f1ae32a1SGerd Hoffmann return "unknown"; 489f1ae32a1SGerd Hoffmann } 490f1ae32a1SGerd Hoffmann } 491f1ae32a1SGerd Hoffmann 492f1ae32a1SGerd Hoffmann static const char *state2str(uint32_t state) 493f1ae32a1SGerd Hoffmann { 494f1ae32a1SGerd Hoffmann return nr2str(ehci_state_names, ARRAY_SIZE(ehci_state_names), state); 495f1ae32a1SGerd Hoffmann } 496f1ae32a1SGerd Hoffmann 497f1ae32a1SGerd Hoffmann static const char *addr2str(target_phys_addr_t addr) 498f1ae32a1SGerd Hoffmann { 499f1ae32a1SGerd Hoffmann return nr2str(ehci_mmio_names, ARRAY_SIZE(ehci_mmio_names), addr); 500f1ae32a1SGerd Hoffmann } 501f1ae32a1SGerd Hoffmann 502f1ae32a1SGerd Hoffmann static void ehci_trace_usbsts(uint32_t mask, int state) 503f1ae32a1SGerd Hoffmann { 504f1ae32a1SGerd Hoffmann /* interrupts */ 505f1ae32a1SGerd Hoffmann if (mask & USBSTS_INT) { 506f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("INT", state); 507f1ae32a1SGerd Hoffmann } 508f1ae32a1SGerd Hoffmann if (mask & USBSTS_ERRINT) { 509f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("ERRINT", state); 510f1ae32a1SGerd Hoffmann } 511f1ae32a1SGerd Hoffmann if (mask & USBSTS_PCD) { 512f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("PCD", state); 513f1ae32a1SGerd Hoffmann } 514f1ae32a1SGerd Hoffmann if (mask & USBSTS_FLR) { 515f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("FLR", state); 516f1ae32a1SGerd Hoffmann } 517f1ae32a1SGerd Hoffmann if (mask & USBSTS_HSE) { 518f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("HSE", state); 519f1ae32a1SGerd Hoffmann } 520f1ae32a1SGerd Hoffmann if (mask & USBSTS_IAA) { 521f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("IAA", state); 522f1ae32a1SGerd Hoffmann } 523f1ae32a1SGerd Hoffmann 524f1ae32a1SGerd Hoffmann /* status */ 525f1ae32a1SGerd Hoffmann if (mask & USBSTS_HALT) { 526f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("HALT", state); 527f1ae32a1SGerd Hoffmann } 528f1ae32a1SGerd Hoffmann if (mask & USBSTS_REC) { 529f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("REC", state); 530f1ae32a1SGerd Hoffmann } 531f1ae32a1SGerd Hoffmann if (mask & USBSTS_PSS) { 532f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("PSS", state); 533f1ae32a1SGerd Hoffmann } 534f1ae32a1SGerd Hoffmann if (mask & USBSTS_ASS) { 535f1ae32a1SGerd Hoffmann trace_usb_ehci_usbsts("ASS", state); 536f1ae32a1SGerd Hoffmann } 537f1ae32a1SGerd Hoffmann } 538f1ae32a1SGerd Hoffmann 539f1ae32a1SGerd Hoffmann static inline void ehci_set_usbsts(EHCIState *s, int mask) 540f1ae32a1SGerd Hoffmann { 541f1ae32a1SGerd Hoffmann if ((s->usbsts & mask) == mask) { 542f1ae32a1SGerd Hoffmann return; 543f1ae32a1SGerd Hoffmann } 544f1ae32a1SGerd Hoffmann ehci_trace_usbsts(mask, 1); 545f1ae32a1SGerd Hoffmann s->usbsts |= mask; 546f1ae32a1SGerd Hoffmann } 547f1ae32a1SGerd Hoffmann 548f1ae32a1SGerd Hoffmann static inline void ehci_clear_usbsts(EHCIState *s, int mask) 549f1ae32a1SGerd Hoffmann { 550f1ae32a1SGerd Hoffmann if ((s->usbsts & mask) == 0) { 551f1ae32a1SGerd Hoffmann return; 552f1ae32a1SGerd Hoffmann } 553f1ae32a1SGerd Hoffmann ehci_trace_usbsts(mask, 0); 554f1ae32a1SGerd Hoffmann s->usbsts &= ~mask; 555f1ae32a1SGerd Hoffmann } 556f1ae32a1SGerd Hoffmann 557f1ae32a1SGerd Hoffmann static inline void ehci_set_interrupt(EHCIState *s, int intr) 558f1ae32a1SGerd Hoffmann { 559f1ae32a1SGerd Hoffmann int level = 0; 560f1ae32a1SGerd Hoffmann 561f1ae32a1SGerd Hoffmann // TODO honour interrupt threshold requests 562f1ae32a1SGerd Hoffmann 563f1ae32a1SGerd Hoffmann ehci_set_usbsts(s, intr); 564f1ae32a1SGerd Hoffmann 565f1ae32a1SGerd Hoffmann if ((s->usbsts & USBINTR_MASK) & s->usbintr) { 566f1ae32a1SGerd Hoffmann level = 1; 567f1ae32a1SGerd Hoffmann } 568f1ae32a1SGerd Hoffmann 569f1ae32a1SGerd Hoffmann qemu_set_irq(s->irq, level); 570f1ae32a1SGerd Hoffmann } 571f1ae32a1SGerd Hoffmann 572f1ae32a1SGerd Hoffmann static inline void ehci_record_interrupt(EHCIState *s, int intr) 573f1ae32a1SGerd Hoffmann { 574f1ae32a1SGerd Hoffmann s->usbsts_pending |= intr; 575f1ae32a1SGerd Hoffmann } 576f1ae32a1SGerd Hoffmann 577f1ae32a1SGerd Hoffmann static inline void ehci_commit_interrupt(EHCIState *s) 578f1ae32a1SGerd Hoffmann { 579f1ae32a1SGerd Hoffmann if (!s->usbsts_pending) { 580f1ae32a1SGerd Hoffmann return; 581f1ae32a1SGerd Hoffmann } 582f1ae32a1SGerd Hoffmann ehci_set_interrupt(s, s->usbsts_pending); 583f1ae32a1SGerd Hoffmann s->usbsts_pending = 0; 584f1ae32a1SGerd Hoffmann } 585f1ae32a1SGerd Hoffmann 586f1ae32a1SGerd Hoffmann static void ehci_set_state(EHCIState *s, int async, int state) 587f1ae32a1SGerd Hoffmann { 588f1ae32a1SGerd Hoffmann if (async) { 589f1ae32a1SGerd Hoffmann trace_usb_ehci_state("async", state2str(state)); 590f1ae32a1SGerd Hoffmann s->astate = state; 591f1ae32a1SGerd Hoffmann } else { 592f1ae32a1SGerd Hoffmann trace_usb_ehci_state("periodic", state2str(state)); 593f1ae32a1SGerd Hoffmann s->pstate = state; 594f1ae32a1SGerd Hoffmann } 595f1ae32a1SGerd Hoffmann } 596f1ae32a1SGerd Hoffmann 597f1ae32a1SGerd Hoffmann static int ehci_get_state(EHCIState *s, int async) 598f1ae32a1SGerd Hoffmann { 599f1ae32a1SGerd Hoffmann return async ? s->astate : s->pstate; 600f1ae32a1SGerd Hoffmann } 601f1ae32a1SGerd Hoffmann 602f1ae32a1SGerd Hoffmann static void ehci_set_fetch_addr(EHCIState *s, int async, uint32_t addr) 603f1ae32a1SGerd Hoffmann { 604f1ae32a1SGerd Hoffmann if (async) { 605f1ae32a1SGerd Hoffmann s->a_fetch_addr = addr; 606f1ae32a1SGerd Hoffmann } else { 607f1ae32a1SGerd Hoffmann s->p_fetch_addr = addr; 608f1ae32a1SGerd Hoffmann } 609f1ae32a1SGerd Hoffmann } 610f1ae32a1SGerd Hoffmann 611f1ae32a1SGerd Hoffmann static int ehci_get_fetch_addr(EHCIState *s, int async) 612f1ae32a1SGerd Hoffmann { 613f1ae32a1SGerd Hoffmann return async ? s->a_fetch_addr : s->p_fetch_addr; 614f1ae32a1SGerd Hoffmann } 615f1ae32a1SGerd Hoffmann 616f1ae32a1SGerd Hoffmann static void ehci_trace_qh(EHCIQueue *q, target_phys_addr_t addr, EHCIqh *qh) 617f1ae32a1SGerd Hoffmann { 618f1ae32a1SGerd Hoffmann /* need three here due to argument count limits */ 619f1ae32a1SGerd Hoffmann trace_usb_ehci_qh_ptrs(q, addr, qh->next, 620f1ae32a1SGerd Hoffmann qh->current_qtd, qh->next_qtd, qh->altnext_qtd); 621f1ae32a1SGerd Hoffmann trace_usb_ehci_qh_fields(addr, 622f1ae32a1SGerd Hoffmann get_field(qh->epchar, QH_EPCHAR_RL), 623f1ae32a1SGerd Hoffmann get_field(qh->epchar, QH_EPCHAR_MPLEN), 624f1ae32a1SGerd Hoffmann get_field(qh->epchar, QH_EPCHAR_EPS), 625f1ae32a1SGerd Hoffmann get_field(qh->epchar, QH_EPCHAR_EP), 626f1ae32a1SGerd Hoffmann get_field(qh->epchar, QH_EPCHAR_DEVADDR)); 627f1ae32a1SGerd Hoffmann trace_usb_ehci_qh_bits(addr, 628f1ae32a1SGerd Hoffmann (bool)(qh->epchar & QH_EPCHAR_C), 629f1ae32a1SGerd Hoffmann (bool)(qh->epchar & QH_EPCHAR_H), 630f1ae32a1SGerd Hoffmann (bool)(qh->epchar & QH_EPCHAR_DTC), 631f1ae32a1SGerd Hoffmann (bool)(qh->epchar & QH_EPCHAR_I)); 632f1ae32a1SGerd Hoffmann } 633f1ae32a1SGerd Hoffmann 634f1ae32a1SGerd Hoffmann static void ehci_trace_qtd(EHCIQueue *q, target_phys_addr_t addr, EHCIqtd *qtd) 635f1ae32a1SGerd Hoffmann { 636f1ae32a1SGerd Hoffmann /* need three here due to argument count limits */ 637f1ae32a1SGerd Hoffmann trace_usb_ehci_qtd_ptrs(q, addr, qtd->next, qtd->altnext); 638f1ae32a1SGerd Hoffmann trace_usb_ehci_qtd_fields(addr, 639f1ae32a1SGerd Hoffmann get_field(qtd->token, QTD_TOKEN_TBYTES), 640f1ae32a1SGerd Hoffmann get_field(qtd->token, QTD_TOKEN_CPAGE), 641f1ae32a1SGerd Hoffmann get_field(qtd->token, QTD_TOKEN_CERR), 642f1ae32a1SGerd Hoffmann get_field(qtd->token, QTD_TOKEN_PID)); 643f1ae32a1SGerd Hoffmann trace_usb_ehci_qtd_bits(addr, 644f1ae32a1SGerd Hoffmann (bool)(qtd->token & QTD_TOKEN_IOC), 645f1ae32a1SGerd Hoffmann (bool)(qtd->token & QTD_TOKEN_ACTIVE), 646f1ae32a1SGerd Hoffmann (bool)(qtd->token & QTD_TOKEN_HALT), 647f1ae32a1SGerd Hoffmann (bool)(qtd->token & QTD_TOKEN_BABBLE), 648f1ae32a1SGerd Hoffmann (bool)(qtd->token & QTD_TOKEN_XACTERR)); 649f1ae32a1SGerd Hoffmann } 650f1ae32a1SGerd Hoffmann 651f1ae32a1SGerd Hoffmann static void ehci_trace_itd(EHCIState *s, target_phys_addr_t addr, EHCIitd *itd) 652f1ae32a1SGerd Hoffmann { 653f1ae32a1SGerd Hoffmann trace_usb_ehci_itd(addr, itd->next, 654f1ae32a1SGerd Hoffmann get_field(itd->bufptr[1], ITD_BUFPTR_MAXPKT), 655f1ae32a1SGerd Hoffmann get_field(itd->bufptr[2], ITD_BUFPTR_MULT), 656f1ae32a1SGerd Hoffmann get_field(itd->bufptr[0], ITD_BUFPTR_EP), 657f1ae32a1SGerd Hoffmann get_field(itd->bufptr[0], ITD_BUFPTR_DEVADDR)); 658f1ae32a1SGerd Hoffmann } 659f1ae32a1SGerd Hoffmann 660f1ae32a1SGerd Hoffmann static void ehci_trace_sitd(EHCIState *s, target_phys_addr_t addr, 661f1ae32a1SGerd Hoffmann EHCIsitd *sitd) 662f1ae32a1SGerd Hoffmann { 663f1ae32a1SGerd Hoffmann trace_usb_ehci_sitd(addr, sitd->next, 664f1ae32a1SGerd Hoffmann (bool)(sitd->results & SITD_RESULTS_ACTIVE)); 665f1ae32a1SGerd Hoffmann } 666f1ae32a1SGerd Hoffmann 667eb36a88eSGerd Hoffmann /* packet management */ 668eb36a88eSGerd Hoffmann 669eb36a88eSGerd Hoffmann static EHCIPacket *ehci_alloc_packet(EHCIQueue *q) 670eb36a88eSGerd Hoffmann { 671eb36a88eSGerd Hoffmann EHCIPacket *p; 672eb36a88eSGerd Hoffmann 673eb36a88eSGerd Hoffmann #if 1 674eb36a88eSGerd Hoffmann /* temporary, we don't handle multiple packets per queue (yet) */ 675eb36a88eSGerd Hoffmann assert(QTAILQ_EMPTY(&q->packets)); 676eb36a88eSGerd Hoffmann #endif 677eb36a88eSGerd Hoffmann p = g_new0(EHCIPacket, 1); 678eb36a88eSGerd Hoffmann p->queue = q; 679eb36a88eSGerd Hoffmann usb_packet_init(&p->packet); 680eb36a88eSGerd Hoffmann QTAILQ_INSERT_TAIL(&q->packets, p, next); 681eb36a88eSGerd Hoffmann trace_usb_ehci_packet_action(p->queue, p, "alloc"); 682eb36a88eSGerd Hoffmann return p; 683eb36a88eSGerd Hoffmann } 684eb36a88eSGerd Hoffmann 685eb36a88eSGerd Hoffmann static void ehci_free_packet(EHCIPacket *p) 686eb36a88eSGerd Hoffmann { 687eb36a88eSGerd Hoffmann trace_usb_ehci_packet_action(p->queue, p, "free"); 688eb36a88eSGerd Hoffmann if (p->async == EHCI_ASYNC_INFLIGHT) { 689eb36a88eSGerd Hoffmann usb_cancel_packet(&p->packet); 690eb36a88eSGerd Hoffmann } 691eb36a88eSGerd Hoffmann QTAILQ_REMOVE(&p->queue->packets, p, next); 692eb36a88eSGerd Hoffmann usb_packet_cleanup(&p->packet); 693eb36a88eSGerd Hoffmann g_free(p); 694eb36a88eSGerd Hoffmann } 695eb36a88eSGerd Hoffmann 696f1ae32a1SGerd Hoffmann /* queue management */ 697f1ae32a1SGerd Hoffmann 698f1ae32a1SGerd Hoffmann static EHCIQueue *ehci_alloc_queue(EHCIState *ehci, int async) 699f1ae32a1SGerd Hoffmann { 700f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues; 701f1ae32a1SGerd Hoffmann EHCIQueue *q; 702f1ae32a1SGerd Hoffmann 703f1ae32a1SGerd Hoffmann q = g_malloc0(sizeof(*q)); 704f1ae32a1SGerd Hoffmann q->ehci = ehci; 705eb36a88eSGerd Hoffmann QTAILQ_INIT(&q->packets); 706f1ae32a1SGerd Hoffmann QTAILQ_INSERT_HEAD(head, q, next); 707f1ae32a1SGerd Hoffmann trace_usb_ehci_queue_action(q, "alloc"); 708f1ae32a1SGerd Hoffmann return q; 709f1ae32a1SGerd Hoffmann } 710f1ae32a1SGerd Hoffmann 711f1ae32a1SGerd Hoffmann static void ehci_free_queue(EHCIQueue *q, int async) 712f1ae32a1SGerd Hoffmann { 713f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &q->ehci->aqueues : &q->ehci->pqueues; 714eb36a88eSGerd Hoffmann EHCIPacket *p; 715eb36a88eSGerd Hoffmann 716f1ae32a1SGerd Hoffmann trace_usb_ehci_queue_action(q, "free"); 717eb36a88eSGerd Hoffmann while ((p = QTAILQ_FIRST(&q->packets)) != NULL) { 718eb36a88eSGerd Hoffmann ehci_free_packet(p); 719f1ae32a1SGerd Hoffmann } 720f1ae32a1SGerd Hoffmann QTAILQ_REMOVE(head, q, next); 721f1ae32a1SGerd Hoffmann g_free(q); 722f1ae32a1SGerd Hoffmann } 723f1ae32a1SGerd Hoffmann 724f1ae32a1SGerd Hoffmann static EHCIQueue *ehci_find_queue_by_qh(EHCIState *ehci, uint32_t addr, 725f1ae32a1SGerd Hoffmann int async) 726f1ae32a1SGerd Hoffmann { 727f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues; 728f1ae32a1SGerd Hoffmann EHCIQueue *q; 729f1ae32a1SGerd Hoffmann 730f1ae32a1SGerd Hoffmann QTAILQ_FOREACH(q, head, next) { 731f1ae32a1SGerd Hoffmann if (addr == q->qhaddr) { 732f1ae32a1SGerd Hoffmann return q; 733f1ae32a1SGerd Hoffmann } 734f1ae32a1SGerd Hoffmann } 735f1ae32a1SGerd Hoffmann return NULL; 736f1ae32a1SGerd Hoffmann } 737f1ae32a1SGerd Hoffmann 738f1ae32a1SGerd Hoffmann static void ehci_queues_rip_unused(EHCIState *ehci, int async, int flush) 739f1ae32a1SGerd Hoffmann { 740f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues; 741f1ae32a1SGerd Hoffmann EHCIQueue *q, *tmp; 742f1ae32a1SGerd Hoffmann 743f1ae32a1SGerd Hoffmann QTAILQ_FOREACH_SAFE(q, head, next, tmp) { 744f1ae32a1SGerd Hoffmann if (q->seen) { 745f1ae32a1SGerd Hoffmann q->seen = 0; 746f1ae32a1SGerd Hoffmann q->ts = ehci->last_run_ns; 747f1ae32a1SGerd Hoffmann continue; 748f1ae32a1SGerd Hoffmann } 749f1ae32a1SGerd Hoffmann if (!flush && ehci->last_run_ns < q->ts + 250000000) { 750f1ae32a1SGerd Hoffmann /* allow 0.25 sec idle */ 751f1ae32a1SGerd Hoffmann continue; 752f1ae32a1SGerd Hoffmann } 753f1ae32a1SGerd Hoffmann ehci_free_queue(q, async); 754f1ae32a1SGerd Hoffmann } 755f1ae32a1SGerd Hoffmann } 756f1ae32a1SGerd Hoffmann 757f1ae32a1SGerd Hoffmann static void ehci_queues_rip_device(EHCIState *ehci, USBDevice *dev, int async) 758f1ae32a1SGerd Hoffmann { 759f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues; 760f1ae32a1SGerd Hoffmann EHCIQueue *q, *tmp; 761eb36a88eSGerd Hoffmann int addr; 762f1ae32a1SGerd Hoffmann 763f1ae32a1SGerd Hoffmann QTAILQ_FOREACH_SAFE(q, head, next, tmp) { 764eb36a88eSGerd Hoffmann addr = get_field(q->qh.epchar, QH_EPCHAR_DEVADDR); 765eb36a88eSGerd Hoffmann if (addr != dev->addr) { 766f1ae32a1SGerd Hoffmann continue; 767f1ae32a1SGerd Hoffmann } 768f1ae32a1SGerd Hoffmann ehci_free_queue(q, async); 769f1ae32a1SGerd Hoffmann } 770f1ae32a1SGerd Hoffmann } 771f1ae32a1SGerd Hoffmann 772f1ae32a1SGerd Hoffmann static void ehci_queues_rip_all(EHCIState *ehci, int async) 773f1ae32a1SGerd Hoffmann { 774f1ae32a1SGerd Hoffmann EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues; 775f1ae32a1SGerd Hoffmann EHCIQueue *q, *tmp; 776f1ae32a1SGerd Hoffmann 777f1ae32a1SGerd Hoffmann QTAILQ_FOREACH_SAFE(q, head, next, tmp) { 778f1ae32a1SGerd Hoffmann ehci_free_queue(q, async); 779f1ae32a1SGerd Hoffmann } 780f1ae32a1SGerd Hoffmann } 781f1ae32a1SGerd Hoffmann 782f1ae32a1SGerd Hoffmann /* Attach or detach a device on root hub */ 783f1ae32a1SGerd Hoffmann 784f1ae32a1SGerd Hoffmann static void ehci_attach(USBPort *port) 785f1ae32a1SGerd Hoffmann { 786f1ae32a1SGerd Hoffmann EHCIState *s = port->opaque; 787f1ae32a1SGerd Hoffmann uint32_t *portsc = &s->portsc[port->index]; 788f1ae32a1SGerd Hoffmann 789f1ae32a1SGerd Hoffmann trace_usb_ehci_port_attach(port->index, port->dev->product_desc); 790f1ae32a1SGerd Hoffmann 791f1ae32a1SGerd Hoffmann if (*portsc & PORTSC_POWNER) { 792f1ae32a1SGerd Hoffmann USBPort *companion = s->companion_ports[port->index]; 793f1ae32a1SGerd Hoffmann companion->dev = port->dev; 794f1ae32a1SGerd Hoffmann companion->ops->attach(companion); 795f1ae32a1SGerd Hoffmann return; 796f1ae32a1SGerd Hoffmann } 797f1ae32a1SGerd Hoffmann 798f1ae32a1SGerd Hoffmann *portsc |= PORTSC_CONNECT; 799f1ae32a1SGerd Hoffmann *portsc |= PORTSC_CSC; 800f1ae32a1SGerd Hoffmann 801f1ae32a1SGerd Hoffmann ehci_set_interrupt(s, USBSTS_PCD); 802f1ae32a1SGerd Hoffmann } 803f1ae32a1SGerd Hoffmann 804f1ae32a1SGerd Hoffmann static void ehci_detach(USBPort *port) 805f1ae32a1SGerd Hoffmann { 806f1ae32a1SGerd Hoffmann EHCIState *s = port->opaque; 807f1ae32a1SGerd Hoffmann uint32_t *portsc = &s->portsc[port->index]; 808f1ae32a1SGerd Hoffmann 809f1ae32a1SGerd Hoffmann trace_usb_ehci_port_detach(port->index); 810f1ae32a1SGerd Hoffmann 811f1ae32a1SGerd Hoffmann if (*portsc & PORTSC_POWNER) { 812f1ae32a1SGerd Hoffmann USBPort *companion = s->companion_ports[port->index]; 813f1ae32a1SGerd Hoffmann companion->ops->detach(companion); 814f1ae32a1SGerd Hoffmann companion->dev = NULL; 815f1ae32a1SGerd Hoffmann /* 816f1ae32a1SGerd Hoffmann * EHCI spec 4.2.2: "When a disconnect occurs... On the event, 817f1ae32a1SGerd Hoffmann * the port ownership is returned immediately to the EHCI controller." 818f1ae32a1SGerd Hoffmann */ 819f1ae32a1SGerd Hoffmann *portsc &= ~PORTSC_POWNER; 820f1ae32a1SGerd Hoffmann return; 821f1ae32a1SGerd Hoffmann } 822f1ae32a1SGerd Hoffmann 823f1ae32a1SGerd Hoffmann ehci_queues_rip_device(s, port->dev, 0); 824f1ae32a1SGerd Hoffmann ehci_queues_rip_device(s, port->dev, 1); 825f1ae32a1SGerd Hoffmann 826f1ae32a1SGerd Hoffmann *portsc &= ~(PORTSC_CONNECT|PORTSC_PED); 827f1ae32a1SGerd Hoffmann *portsc |= PORTSC_CSC; 828f1ae32a1SGerd Hoffmann 829f1ae32a1SGerd Hoffmann ehci_set_interrupt(s, USBSTS_PCD); 830f1ae32a1SGerd Hoffmann } 831f1ae32a1SGerd Hoffmann 832f1ae32a1SGerd Hoffmann static void ehci_child_detach(USBPort *port, USBDevice *child) 833f1ae32a1SGerd Hoffmann { 834f1ae32a1SGerd Hoffmann EHCIState *s = port->opaque; 835f1ae32a1SGerd Hoffmann uint32_t portsc = s->portsc[port->index]; 836f1ae32a1SGerd Hoffmann 837f1ae32a1SGerd Hoffmann if (portsc & PORTSC_POWNER) { 838f1ae32a1SGerd Hoffmann USBPort *companion = s->companion_ports[port->index]; 839f1ae32a1SGerd Hoffmann companion->ops->child_detach(companion, child); 840f1ae32a1SGerd Hoffmann return; 841f1ae32a1SGerd Hoffmann } 842f1ae32a1SGerd Hoffmann 843f1ae32a1SGerd Hoffmann ehci_queues_rip_device(s, child, 0); 844f1ae32a1SGerd Hoffmann ehci_queues_rip_device(s, child, 1); 845f1ae32a1SGerd Hoffmann } 846f1ae32a1SGerd Hoffmann 847f1ae32a1SGerd Hoffmann static void ehci_wakeup(USBPort *port) 848f1ae32a1SGerd Hoffmann { 849f1ae32a1SGerd Hoffmann EHCIState *s = port->opaque; 850f1ae32a1SGerd Hoffmann uint32_t portsc = s->portsc[port->index]; 851f1ae32a1SGerd Hoffmann 852f1ae32a1SGerd Hoffmann if (portsc & PORTSC_POWNER) { 853f1ae32a1SGerd Hoffmann USBPort *companion = s->companion_ports[port->index]; 854f1ae32a1SGerd Hoffmann if (companion->ops->wakeup) { 855f1ae32a1SGerd Hoffmann companion->ops->wakeup(companion); 856f1ae32a1SGerd Hoffmann } 857f1ae32a1SGerd Hoffmann } 858f1ae32a1SGerd Hoffmann } 859f1ae32a1SGerd Hoffmann 860f1ae32a1SGerd Hoffmann static int ehci_register_companion(USBBus *bus, USBPort *ports[], 861f1ae32a1SGerd Hoffmann uint32_t portcount, uint32_t firstport) 862f1ae32a1SGerd Hoffmann { 863f1ae32a1SGerd Hoffmann EHCIState *s = container_of(bus, EHCIState, bus); 864f1ae32a1SGerd Hoffmann uint32_t i; 865f1ae32a1SGerd Hoffmann 866f1ae32a1SGerd Hoffmann if (firstport + portcount > NB_PORTS) { 867f1ae32a1SGerd Hoffmann qerror_report(QERR_INVALID_PARAMETER_VALUE, "firstport", 868f1ae32a1SGerd Hoffmann "firstport on masterbus"); 869f1ae32a1SGerd Hoffmann error_printf_unless_qmp( 870f1ae32a1SGerd Hoffmann "firstport value of %u makes companion take ports %u - %u, which " 871f1ae32a1SGerd Hoffmann "is outside of the valid range of 0 - %u\n", firstport, firstport, 872f1ae32a1SGerd Hoffmann firstport + portcount - 1, NB_PORTS - 1); 873f1ae32a1SGerd Hoffmann return -1; 874f1ae32a1SGerd Hoffmann } 875f1ae32a1SGerd Hoffmann 876f1ae32a1SGerd Hoffmann for (i = 0; i < portcount; i++) { 877f1ae32a1SGerd Hoffmann if (s->companion_ports[firstport + i]) { 878f1ae32a1SGerd Hoffmann qerror_report(QERR_INVALID_PARAMETER_VALUE, "masterbus", 879f1ae32a1SGerd Hoffmann "an USB masterbus"); 880f1ae32a1SGerd Hoffmann error_printf_unless_qmp( 881f1ae32a1SGerd Hoffmann "port %u on masterbus %s already has a companion assigned\n", 882f1ae32a1SGerd Hoffmann firstport + i, bus->qbus.name); 883f1ae32a1SGerd Hoffmann return -1; 884f1ae32a1SGerd Hoffmann } 885f1ae32a1SGerd Hoffmann } 886f1ae32a1SGerd Hoffmann 887f1ae32a1SGerd Hoffmann for (i = 0; i < portcount; i++) { 888f1ae32a1SGerd Hoffmann s->companion_ports[firstport + i] = ports[i]; 889f1ae32a1SGerd Hoffmann s->ports[firstport + i].speedmask |= 890f1ae32a1SGerd Hoffmann USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL; 891f1ae32a1SGerd Hoffmann /* Ensure devs attached before the initial reset go to the companion */ 892f1ae32a1SGerd Hoffmann s->portsc[firstport + i] = PORTSC_POWNER; 893f1ae32a1SGerd Hoffmann } 894f1ae32a1SGerd Hoffmann 895f1ae32a1SGerd Hoffmann s->companion_count++; 896f1ae32a1SGerd Hoffmann s->mmio[0x05] = (s->companion_count << 4) | portcount; 897f1ae32a1SGerd Hoffmann 898f1ae32a1SGerd Hoffmann return 0; 899f1ae32a1SGerd Hoffmann } 900f1ae32a1SGerd Hoffmann 901f1ae32a1SGerd Hoffmann static USBDevice *ehci_find_device(EHCIState *ehci, uint8_t addr) 902f1ae32a1SGerd Hoffmann { 903f1ae32a1SGerd Hoffmann USBDevice *dev; 904f1ae32a1SGerd Hoffmann USBPort *port; 905f1ae32a1SGerd Hoffmann int i; 906f1ae32a1SGerd Hoffmann 907f1ae32a1SGerd Hoffmann for (i = 0; i < NB_PORTS; i++) { 908f1ae32a1SGerd Hoffmann port = &ehci->ports[i]; 909f1ae32a1SGerd Hoffmann if (!(ehci->portsc[i] & PORTSC_PED)) { 910f1ae32a1SGerd Hoffmann DPRINTF("Port %d not enabled\n", i); 911f1ae32a1SGerd Hoffmann continue; 912f1ae32a1SGerd Hoffmann } 913f1ae32a1SGerd Hoffmann dev = usb_find_device(port, addr); 914f1ae32a1SGerd Hoffmann if (dev != NULL) { 915f1ae32a1SGerd Hoffmann return dev; 916f1ae32a1SGerd Hoffmann } 917f1ae32a1SGerd Hoffmann } 918f1ae32a1SGerd Hoffmann return NULL; 919f1ae32a1SGerd Hoffmann } 920f1ae32a1SGerd Hoffmann 921f1ae32a1SGerd Hoffmann /* 4.1 host controller initialization */ 922f1ae32a1SGerd Hoffmann static void ehci_reset(void *opaque) 923f1ae32a1SGerd Hoffmann { 924f1ae32a1SGerd Hoffmann EHCIState *s = opaque; 925f1ae32a1SGerd Hoffmann int i; 926f1ae32a1SGerd Hoffmann USBDevice *devs[NB_PORTS]; 927f1ae32a1SGerd Hoffmann 928f1ae32a1SGerd Hoffmann trace_usb_ehci_reset(); 929f1ae32a1SGerd Hoffmann 930f1ae32a1SGerd Hoffmann /* 931f1ae32a1SGerd Hoffmann * Do the detach before touching portsc, so that it correctly gets send to 932f1ae32a1SGerd Hoffmann * us or to our companion based on PORTSC_POWNER before the reset. 933f1ae32a1SGerd Hoffmann */ 934f1ae32a1SGerd Hoffmann for(i = 0; i < NB_PORTS; i++) { 935f1ae32a1SGerd Hoffmann devs[i] = s->ports[i].dev; 936f1ae32a1SGerd Hoffmann if (devs[i] && devs[i]->attached) { 937f1ae32a1SGerd Hoffmann usb_detach(&s->ports[i]); 938f1ae32a1SGerd Hoffmann } 939f1ae32a1SGerd Hoffmann } 940f1ae32a1SGerd Hoffmann 941f1ae32a1SGerd Hoffmann memset(&s->mmio[OPREGBASE], 0x00, MMIO_SIZE - OPREGBASE); 942f1ae32a1SGerd Hoffmann 943f1ae32a1SGerd Hoffmann s->usbcmd = NB_MAXINTRATE << USBCMD_ITC_SH; 944f1ae32a1SGerd Hoffmann s->usbsts = USBSTS_HALT; 945f1ae32a1SGerd Hoffmann 946f1ae32a1SGerd Hoffmann s->astate = EST_INACTIVE; 947f1ae32a1SGerd Hoffmann s->pstate = EST_INACTIVE; 948f1ae32a1SGerd Hoffmann s->attach_poll_counter = 0; 949f1ae32a1SGerd Hoffmann 950f1ae32a1SGerd Hoffmann for(i = 0; i < NB_PORTS; i++) { 951f1ae32a1SGerd Hoffmann if (s->companion_ports[i]) { 952f1ae32a1SGerd Hoffmann s->portsc[i] = PORTSC_POWNER | PORTSC_PPOWER; 953f1ae32a1SGerd Hoffmann } else { 954f1ae32a1SGerd Hoffmann s->portsc[i] = PORTSC_PPOWER; 955f1ae32a1SGerd Hoffmann } 956f1ae32a1SGerd Hoffmann if (devs[i] && devs[i]->attached) { 957f1ae32a1SGerd Hoffmann usb_attach(&s->ports[i]); 958f1ae32a1SGerd Hoffmann usb_device_reset(devs[i]); 959f1ae32a1SGerd Hoffmann } 960f1ae32a1SGerd Hoffmann } 961f1ae32a1SGerd Hoffmann ehci_queues_rip_all(s, 0); 962f1ae32a1SGerd Hoffmann ehci_queues_rip_all(s, 1); 963f1ae32a1SGerd Hoffmann qemu_del_timer(s->frame_timer); 964f1ae32a1SGerd Hoffmann } 965f1ae32a1SGerd Hoffmann 966f1ae32a1SGerd Hoffmann static uint32_t ehci_mem_readb(void *ptr, target_phys_addr_t addr) 967f1ae32a1SGerd Hoffmann { 968f1ae32a1SGerd Hoffmann EHCIState *s = ptr; 969f1ae32a1SGerd Hoffmann uint32_t val; 970f1ae32a1SGerd Hoffmann 971f1ae32a1SGerd Hoffmann val = s->mmio[addr]; 972f1ae32a1SGerd Hoffmann 973f1ae32a1SGerd Hoffmann return val; 974f1ae32a1SGerd Hoffmann } 975f1ae32a1SGerd Hoffmann 976f1ae32a1SGerd Hoffmann static uint32_t ehci_mem_readw(void *ptr, target_phys_addr_t addr) 977f1ae32a1SGerd Hoffmann { 978f1ae32a1SGerd Hoffmann EHCIState *s = ptr; 979f1ae32a1SGerd Hoffmann uint32_t val; 980f1ae32a1SGerd Hoffmann 981f1ae32a1SGerd Hoffmann val = s->mmio[addr] | (s->mmio[addr+1] << 8); 982f1ae32a1SGerd Hoffmann 983f1ae32a1SGerd Hoffmann return val; 984f1ae32a1SGerd Hoffmann } 985f1ae32a1SGerd Hoffmann 986f1ae32a1SGerd Hoffmann static uint32_t ehci_mem_readl(void *ptr, target_phys_addr_t addr) 987f1ae32a1SGerd Hoffmann { 988f1ae32a1SGerd Hoffmann EHCIState *s = ptr; 989f1ae32a1SGerd Hoffmann uint32_t val; 990f1ae32a1SGerd Hoffmann 991f1ae32a1SGerd Hoffmann val = s->mmio[addr] | (s->mmio[addr+1] << 8) | 992f1ae32a1SGerd Hoffmann (s->mmio[addr+2] << 16) | (s->mmio[addr+3] << 24); 993f1ae32a1SGerd Hoffmann 994f1ae32a1SGerd Hoffmann trace_usb_ehci_mmio_readl(addr, addr2str(addr), val); 995f1ae32a1SGerd Hoffmann return val; 996f1ae32a1SGerd Hoffmann } 997f1ae32a1SGerd Hoffmann 998f1ae32a1SGerd Hoffmann static void ehci_mem_writeb(void *ptr, target_phys_addr_t addr, uint32_t val) 999f1ae32a1SGerd Hoffmann { 1000f1ae32a1SGerd Hoffmann fprintf(stderr, "EHCI doesn't handle byte writes to MMIO\n"); 1001f1ae32a1SGerd Hoffmann exit(1); 1002f1ae32a1SGerd Hoffmann } 1003f1ae32a1SGerd Hoffmann 1004f1ae32a1SGerd Hoffmann static void ehci_mem_writew(void *ptr, target_phys_addr_t addr, uint32_t val) 1005f1ae32a1SGerd Hoffmann { 1006f1ae32a1SGerd Hoffmann fprintf(stderr, "EHCI doesn't handle 16-bit writes to MMIO\n"); 1007f1ae32a1SGerd Hoffmann exit(1); 1008f1ae32a1SGerd Hoffmann } 1009f1ae32a1SGerd Hoffmann 1010f1ae32a1SGerd Hoffmann static void handle_port_owner_write(EHCIState *s, int port, uint32_t owner) 1011f1ae32a1SGerd Hoffmann { 1012f1ae32a1SGerd Hoffmann USBDevice *dev = s->ports[port].dev; 1013f1ae32a1SGerd Hoffmann uint32_t *portsc = &s->portsc[port]; 1014f1ae32a1SGerd Hoffmann uint32_t orig; 1015f1ae32a1SGerd Hoffmann 1016f1ae32a1SGerd Hoffmann if (s->companion_ports[port] == NULL) 1017f1ae32a1SGerd Hoffmann return; 1018f1ae32a1SGerd Hoffmann 1019f1ae32a1SGerd Hoffmann owner = owner & PORTSC_POWNER; 1020f1ae32a1SGerd Hoffmann orig = *portsc & PORTSC_POWNER; 1021f1ae32a1SGerd Hoffmann 1022f1ae32a1SGerd Hoffmann if (!(owner ^ orig)) { 1023f1ae32a1SGerd Hoffmann return; 1024f1ae32a1SGerd Hoffmann } 1025f1ae32a1SGerd Hoffmann 1026f1ae32a1SGerd Hoffmann if (dev && dev->attached) { 1027f1ae32a1SGerd Hoffmann usb_detach(&s->ports[port]); 1028f1ae32a1SGerd Hoffmann } 1029f1ae32a1SGerd Hoffmann 1030f1ae32a1SGerd Hoffmann *portsc &= ~PORTSC_POWNER; 1031f1ae32a1SGerd Hoffmann *portsc |= owner; 1032f1ae32a1SGerd Hoffmann 1033f1ae32a1SGerd Hoffmann if (dev && dev->attached) { 1034f1ae32a1SGerd Hoffmann usb_attach(&s->ports[port]); 1035f1ae32a1SGerd Hoffmann } 1036f1ae32a1SGerd Hoffmann } 1037f1ae32a1SGerd Hoffmann 1038f1ae32a1SGerd Hoffmann static void handle_port_status_write(EHCIState *s, int port, uint32_t val) 1039f1ae32a1SGerd Hoffmann { 1040f1ae32a1SGerd Hoffmann uint32_t *portsc = &s->portsc[port]; 1041f1ae32a1SGerd Hoffmann USBDevice *dev = s->ports[port].dev; 1042f1ae32a1SGerd Hoffmann 1043f1ae32a1SGerd Hoffmann /* Clear rwc bits */ 1044f1ae32a1SGerd Hoffmann *portsc &= ~(val & PORTSC_RWC_MASK); 1045f1ae32a1SGerd Hoffmann /* The guest may clear, but not set the PED bit */ 1046f1ae32a1SGerd Hoffmann *portsc &= val | ~PORTSC_PED; 1047f1ae32a1SGerd Hoffmann /* POWNER is masked out by RO_MASK as it is RO when we've no companion */ 1048f1ae32a1SGerd Hoffmann handle_port_owner_write(s, port, val); 1049f1ae32a1SGerd Hoffmann /* And finally apply RO_MASK */ 1050f1ae32a1SGerd Hoffmann val &= PORTSC_RO_MASK; 1051f1ae32a1SGerd Hoffmann 1052f1ae32a1SGerd Hoffmann if ((val & PORTSC_PRESET) && !(*portsc & PORTSC_PRESET)) { 1053f1ae32a1SGerd Hoffmann trace_usb_ehci_port_reset(port, 1); 1054f1ae32a1SGerd Hoffmann } 1055f1ae32a1SGerd Hoffmann 1056f1ae32a1SGerd Hoffmann if (!(val & PORTSC_PRESET) &&(*portsc & PORTSC_PRESET)) { 1057f1ae32a1SGerd Hoffmann trace_usb_ehci_port_reset(port, 0); 1058f1ae32a1SGerd Hoffmann if (dev && dev->attached) { 1059f1ae32a1SGerd Hoffmann usb_port_reset(&s->ports[port]); 1060f1ae32a1SGerd Hoffmann *portsc &= ~PORTSC_CSC; 1061f1ae32a1SGerd Hoffmann } 1062f1ae32a1SGerd Hoffmann 1063f1ae32a1SGerd Hoffmann /* 1064f1ae32a1SGerd Hoffmann * Table 2.16 Set the enable bit(and enable bit change) to indicate 1065f1ae32a1SGerd Hoffmann * to SW that this port has a high speed device attached 1066f1ae32a1SGerd Hoffmann */ 1067f1ae32a1SGerd Hoffmann if (dev && dev->attached && (dev->speedmask & USB_SPEED_MASK_HIGH)) { 1068f1ae32a1SGerd Hoffmann val |= PORTSC_PED; 1069f1ae32a1SGerd Hoffmann } 1070f1ae32a1SGerd Hoffmann } 1071f1ae32a1SGerd Hoffmann 1072f1ae32a1SGerd Hoffmann *portsc &= ~PORTSC_RO_MASK; 1073f1ae32a1SGerd Hoffmann *portsc |= val; 1074f1ae32a1SGerd Hoffmann } 1075f1ae32a1SGerd Hoffmann 1076f1ae32a1SGerd Hoffmann static void ehci_mem_writel(void *ptr, target_phys_addr_t addr, uint32_t val) 1077f1ae32a1SGerd Hoffmann { 1078f1ae32a1SGerd Hoffmann EHCIState *s = ptr; 1079f1ae32a1SGerd Hoffmann uint32_t *mmio = (uint32_t *)(&s->mmio[addr]); 1080f1ae32a1SGerd Hoffmann uint32_t old = *mmio; 1081f1ae32a1SGerd Hoffmann int i; 1082f1ae32a1SGerd Hoffmann 1083f1ae32a1SGerd Hoffmann trace_usb_ehci_mmio_writel(addr, addr2str(addr), val); 1084f1ae32a1SGerd Hoffmann 1085f1ae32a1SGerd Hoffmann /* Only aligned reads are allowed on OHCI */ 1086f1ae32a1SGerd Hoffmann if (addr & 3) { 1087f1ae32a1SGerd Hoffmann fprintf(stderr, "usb-ehci: Mis-aligned write to addr 0x" 1088f1ae32a1SGerd Hoffmann TARGET_FMT_plx "\n", addr); 1089f1ae32a1SGerd Hoffmann return; 1090f1ae32a1SGerd Hoffmann } 1091f1ae32a1SGerd Hoffmann 1092f1ae32a1SGerd Hoffmann if (addr >= PORTSC && addr < PORTSC + 4 * NB_PORTS) { 1093f1ae32a1SGerd Hoffmann handle_port_status_write(s, (addr-PORTSC)/4, val); 1094f1ae32a1SGerd Hoffmann trace_usb_ehci_mmio_change(addr, addr2str(addr), *mmio, old); 1095f1ae32a1SGerd Hoffmann return; 1096f1ae32a1SGerd Hoffmann } 1097f1ae32a1SGerd Hoffmann 1098f1ae32a1SGerd Hoffmann if (addr < OPREGBASE) { 1099f1ae32a1SGerd Hoffmann fprintf(stderr, "usb-ehci: write attempt to read-only register" 1100f1ae32a1SGerd Hoffmann TARGET_FMT_plx "\n", addr); 1101f1ae32a1SGerd Hoffmann return; 1102f1ae32a1SGerd Hoffmann } 1103f1ae32a1SGerd Hoffmann 1104f1ae32a1SGerd Hoffmann 1105f1ae32a1SGerd Hoffmann /* Do any register specific pre-write processing here. */ 1106f1ae32a1SGerd Hoffmann switch(addr) { 1107f1ae32a1SGerd Hoffmann case USBCMD: 1108f1ae32a1SGerd Hoffmann if ((val & USBCMD_RUNSTOP) && !(s->usbcmd & USBCMD_RUNSTOP)) { 1109f1ae32a1SGerd Hoffmann qemu_mod_timer(s->frame_timer, qemu_get_clock_ns(vm_clock)); 1110f1ae32a1SGerd Hoffmann SET_LAST_RUN_CLOCK(s); 1111f1ae32a1SGerd Hoffmann ehci_clear_usbsts(s, USBSTS_HALT); 1112f1ae32a1SGerd Hoffmann } 1113f1ae32a1SGerd Hoffmann 1114f1ae32a1SGerd Hoffmann if (!(val & USBCMD_RUNSTOP) && (s->usbcmd & USBCMD_RUNSTOP)) { 1115f1ae32a1SGerd Hoffmann qemu_del_timer(s->frame_timer); 1116f1ae32a1SGerd Hoffmann ehci_queues_rip_all(s, 0); 1117f1ae32a1SGerd Hoffmann ehci_queues_rip_all(s, 1); 1118f1ae32a1SGerd Hoffmann ehci_set_usbsts(s, USBSTS_HALT); 1119f1ae32a1SGerd Hoffmann } 1120f1ae32a1SGerd Hoffmann 1121f1ae32a1SGerd Hoffmann if (val & USBCMD_HCRESET) { 1122f1ae32a1SGerd Hoffmann ehci_reset(s); 1123f1ae32a1SGerd Hoffmann val = s->usbcmd; 1124f1ae32a1SGerd Hoffmann } 1125f1ae32a1SGerd Hoffmann 1126f1ae32a1SGerd Hoffmann /* not supporting dynamic frame list size at the moment */ 1127f1ae32a1SGerd Hoffmann if ((val & USBCMD_FLS) && !(s->usbcmd & USBCMD_FLS)) { 1128f1ae32a1SGerd Hoffmann fprintf(stderr, "attempt to set frame list size -- value %d\n", 1129f1ae32a1SGerd Hoffmann val & USBCMD_FLS); 1130f1ae32a1SGerd Hoffmann val &= ~USBCMD_FLS; 1131f1ae32a1SGerd Hoffmann } 1132f1ae32a1SGerd Hoffmann break; 1133f1ae32a1SGerd Hoffmann 1134f1ae32a1SGerd Hoffmann case USBSTS: 1135a31f0531SJim Meyering val &= USBSTS_RO_MASK; // bits 6 through 31 are RO 1136a31f0531SJim Meyering ehci_clear_usbsts(s, val); // bits 0 through 5 are R/WC 1137f1ae32a1SGerd Hoffmann val = s->usbsts; 1138f1ae32a1SGerd Hoffmann ehci_set_interrupt(s, 0); 1139f1ae32a1SGerd Hoffmann break; 1140f1ae32a1SGerd Hoffmann 1141f1ae32a1SGerd Hoffmann case USBINTR: 1142f1ae32a1SGerd Hoffmann val &= USBINTR_MASK; 1143f1ae32a1SGerd Hoffmann break; 1144f1ae32a1SGerd Hoffmann 11458a771f77SHans de Goede case FRINDEX: 11468a771f77SHans de Goede val &= 0x00003ff8; /* frindex is 14bits and always a multiple of 8 */ 11478a771f77SHans de Goede break; 11488a771f77SHans de Goede 1149f1ae32a1SGerd Hoffmann case CONFIGFLAG: 1150f1ae32a1SGerd Hoffmann val &= 0x1; 1151f1ae32a1SGerd Hoffmann if (val) { 1152f1ae32a1SGerd Hoffmann for(i = 0; i < NB_PORTS; i++) 1153f1ae32a1SGerd Hoffmann handle_port_owner_write(s, i, 0); 1154f1ae32a1SGerd Hoffmann } 1155f1ae32a1SGerd Hoffmann break; 1156f1ae32a1SGerd Hoffmann 1157f1ae32a1SGerd Hoffmann case PERIODICLISTBASE: 1158f1ae32a1SGerd Hoffmann if ((s->usbcmd & USBCMD_PSE) && (s->usbcmd & USBCMD_RUNSTOP)) { 1159f1ae32a1SGerd Hoffmann fprintf(stderr, 1160f1ae32a1SGerd Hoffmann "ehci: PERIODIC list base register set while periodic schedule\n" 1161f1ae32a1SGerd Hoffmann " is enabled and HC is enabled\n"); 1162f1ae32a1SGerd Hoffmann } 1163f1ae32a1SGerd Hoffmann break; 1164f1ae32a1SGerd Hoffmann 1165f1ae32a1SGerd Hoffmann case ASYNCLISTADDR: 1166f1ae32a1SGerd Hoffmann if ((s->usbcmd & USBCMD_ASE) && (s->usbcmd & USBCMD_RUNSTOP)) { 1167f1ae32a1SGerd Hoffmann fprintf(stderr, 1168f1ae32a1SGerd Hoffmann "ehci: ASYNC list address register set while async schedule\n" 1169f1ae32a1SGerd Hoffmann " is enabled and HC is enabled\n"); 1170f1ae32a1SGerd Hoffmann } 1171f1ae32a1SGerd Hoffmann break; 1172f1ae32a1SGerd Hoffmann } 1173f1ae32a1SGerd Hoffmann 1174f1ae32a1SGerd Hoffmann *mmio = val; 1175f1ae32a1SGerd Hoffmann trace_usb_ehci_mmio_change(addr, addr2str(addr), *mmio, old); 1176f1ae32a1SGerd Hoffmann } 1177f1ae32a1SGerd Hoffmann 1178f1ae32a1SGerd Hoffmann 1179f1ae32a1SGerd Hoffmann // TODO : Put in common header file, duplication from usb-ohci.c 1180f1ae32a1SGerd Hoffmann 1181f1ae32a1SGerd Hoffmann /* Get an array of dwords from main memory */ 1182f1ae32a1SGerd Hoffmann static inline int get_dwords(EHCIState *ehci, uint32_t addr, 1183f1ae32a1SGerd Hoffmann uint32_t *buf, int num) 1184f1ae32a1SGerd Hoffmann { 1185f1ae32a1SGerd Hoffmann int i; 1186f1ae32a1SGerd Hoffmann 1187f1ae32a1SGerd Hoffmann for(i = 0; i < num; i++, buf++, addr += sizeof(*buf)) { 1188f1ae32a1SGerd Hoffmann pci_dma_read(&ehci->dev, addr, buf, sizeof(*buf)); 1189f1ae32a1SGerd Hoffmann *buf = le32_to_cpu(*buf); 1190f1ae32a1SGerd Hoffmann } 1191f1ae32a1SGerd Hoffmann 1192f1ae32a1SGerd Hoffmann return 1; 1193f1ae32a1SGerd Hoffmann } 1194f1ae32a1SGerd Hoffmann 1195f1ae32a1SGerd Hoffmann /* Put an array of dwords in to main memory */ 1196f1ae32a1SGerd Hoffmann static inline int put_dwords(EHCIState *ehci, uint32_t addr, 1197f1ae32a1SGerd Hoffmann uint32_t *buf, int num) 1198f1ae32a1SGerd Hoffmann { 1199f1ae32a1SGerd Hoffmann int i; 1200f1ae32a1SGerd Hoffmann 1201f1ae32a1SGerd Hoffmann for(i = 0; i < num; i++, buf++, addr += sizeof(*buf)) { 1202f1ae32a1SGerd Hoffmann uint32_t tmp = cpu_to_le32(*buf); 1203f1ae32a1SGerd Hoffmann pci_dma_write(&ehci->dev, addr, &tmp, sizeof(tmp)); 1204f1ae32a1SGerd Hoffmann } 1205f1ae32a1SGerd Hoffmann 1206f1ae32a1SGerd Hoffmann return 1; 1207f1ae32a1SGerd Hoffmann } 1208f1ae32a1SGerd Hoffmann 1209f1ae32a1SGerd Hoffmann // 4.10.2 1210f1ae32a1SGerd Hoffmann 1211f1ae32a1SGerd Hoffmann static int ehci_qh_do_overlay(EHCIQueue *q) 1212f1ae32a1SGerd Hoffmann { 1213eb36a88eSGerd Hoffmann EHCIPacket *p = QTAILQ_FIRST(&q->packets); 1214f1ae32a1SGerd Hoffmann int i; 1215f1ae32a1SGerd Hoffmann int dtoggle; 1216f1ae32a1SGerd Hoffmann int ping; 1217f1ae32a1SGerd Hoffmann int eps; 1218f1ae32a1SGerd Hoffmann int reload; 1219f1ae32a1SGerd Hoffmann 1220eb36a88eSGerd Hoffmann assert(p != NULL); 1221eb36a88eSGerd Hoffmann assert(p->qtdaddr == q->qtdaddr); 1222eb36a88eSGerd Hoffmann 1223f1ae32a1SGerd Hoffmann // remember values in fields to preserve in qh after overlay 1224f1ae32a1SGerd Hoffmann 1225f1ae32a1SGerd Hoffmann dtoggle = q->qh.token & QTD_TOKEN_DTOGGLE; 1226f1ae32a1SGerd Hoffmann ping = q->qh.token & QTD_TOKEN_PING; 1227f1ae32a1SGerd Hoffmann 1228eb36a88eSGerd Hoffmann q->qh.current_qtd = p->qtdaddr; 1229eb36a88eSGerd Hoffmann q->qh.next_qtd = p->qtd.next; 1230eb36a88eSGerd Hoffmann q->qh.altnext_qtd = p->qtd.altnext; 1231eb36a88eSGerd Hoffmann q->qh.token = p->qtd.token; 1232f1ae32a1SGerd Hoffmann 1233f1ae32a1SGerd Hoffmann 1234f1ae32a1SGerd Hoffmann eps = get_field(q->qh.epchar, QH_EPCHAR_EPS); 1235f1ae32a1SGerd Hoffmann if (eps == EHCI_QH_EPS_HIGH) { 1236f1ae32a1SGerd Hoffmann q->qh.token &= ~QTD_TOKEN_PING; 1237f1ae32a1SGerd Hoffmann q->qh.token |= ping; 1238f1ae32a1SGerd Hoffmann } 1239f1ae32a1SGerd Hoffmann 1240f1ae32a1SGerd Hoffmann reload = get_field(q->qh.epchar, QH_EPCHAR_RL); 1241f1ae32a1SGerd Hoffmann set_field(&q->qh.altnext_qtd, reload, QH_ALTNEXT_NAKCNT); 1242f1ae32a1SGerd Hoffmann 1243f1ae32a1SGerd Hoffmann for (i = 0; i < 5; i++) { 1244eb36a88eSGerd Hoffmann q->qh.bufptr[i] = p->qtd.bufptr[i]; 1245f1ae32a1SGerd Hoffmann } 1246f1ae32a1SGerd Hoffmann 1247f1ae32a1SGerd Hoffmann if (!(q->qh.epchar & QH_EPCHAR_DTC)) { 1248f1ae32a1SGerd Hoffmann // preserve QH DT bit 1249f1ae32a1SGerd Hoffmann q->qh.token &= ~QTD_TOKEN_DTOGGLE; 1250f1ae32a1SGerd Hoffmann q->qh.token |= dtoggle; 1251f1ae32a1SGerd Hoffmann } 1252f1ae32a1SGerd Hoffmann 1253f1ae32a1SGerd Hoffmann q->qh.bufptr[1] &= ~BUFPTR_CPROGMASK_MASK; 1254f1ae32a1SGerd Hoffmann q->qh.bufptr[2] &= ~BUFPTR_FRAMETAG_MASK; 1255f1ae32a1SGerd Hoffmann 1256f1ae32a1SGerd Hoffmann put_dwords(q->ehci, NLPTR_GET(q->qhaddr), (uint32_t *) &q->qh, 1257f1ae32a1SGerd Hoffmann sizeof(EHCIqh) >> 2); 1258f1ae32a1SGerd Hoffmann 1259f1ae32a1SGerd Hoffmann return 0; 1260f1ae32a1SGerd Hoffmann } 1261f1ae32a1SGerd Hoffmann 1262eb36a88eSGerd Hoffmann static int ehci_init_transfer(EHCIPacket *p) 1263f1ae32a1SGerd Hoffmann { 1264f1ae32a1SGerd Hoffmann uint32_t cpage, offset, bytes, plen; 1265f1ae32a1SGerd Hoffmann dma_addr_t page; 1266f1ae32a1SGerd Hoffmann 1267eb36a88eSGerd Hoffmann cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE); 1268eb36a88eSGerd Hoffmann bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES); 1269eb36a88eSGerd Hoffmann offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK; 1270eb36a88eSGerd Hoffmann pci_dma_sglist_init(&p->sgl, &p->queue->ehci->dev, 5); 1271f1ae32a1SGerd Hoffmann 1272f1ae32a1SGerd Hoffmann while (bytes > 0) { 1273f1ae32a1SGerd Hoffmann if (cpage > 4) { 1274f1ae32a1SGerd Hoffmann fprintf(stderr, "cpage out of range (%d)\n", cpage); 1275f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1276f1ae32a1SGerd Hoffmann } 1277f1ae32a1SGerd Hoffmann 1278eb36a88eSGerd Hoffmann page = p->qtd.bufptr[cpage] & QTD_BUFPTR_MASK; 1279f1ae32a1SGerd Hoffmann page += offset; 1280f1ae32a1SGerd Hoffmann plen = bytes; 1281f1ae32a1SGerd Hoffmann if (plen > 4096 - offset) { 1282f1ae32a1SGerd Hoffmann plen = 4096 - offset; 1283f1ae32a1SGerd Hoffmann offset = 0; 1284f1ae32a1SGerd Hoffmann cpage++; 1285f1ae32a1SGerd Hoffmann } 1286f1ae32a1SGerd Hoffmann 1287eb36a88eSGerd Hoffmann qemu_sglist_add(&p->sgl, page, plen); 1288f1ae32a1SGerd Hoffmann bytes -= plen; 1289f1ae32a1SGerd Hoffmann } 1290f1ae32a1SGerd Hoffmann return 0; 1291f1ae32a1SGerd Hoffmann } 1292f1ae32a1SGerd Hoffmann 1293f1ae32a1SGerd Hoffmann static void ehci_finish_transfer(EHCIQueue *q, int status) 1294f1ae32a1SGerd Hoffmann { 1295f1ae32a1SGerd Hoffmann uint32_t cpage, offset; 1296f1ae32a1SGerd Hoffmann 1297f1ae32a1SGerd Hoffmann if (status > 0) { 1298f1ae32a1SGerd Hoffmann /* update cpage & offset */ 1299f1ae32a1SGerd Hoffmann cpage = get_field(q->qh.token, QTD_TOKEN_CPAGE); 1300f1ae32a1SGerd Hoffmann offset = q->qh.bufptr[0] & ~QTD_BUFPTR_MASK; 1301f1ae32a1SGerd Hoffmann 1302f1ae32a1SGerd Hoffmann offset += status; 1303f1ae32a1SGerd Hoffmann cpage += offset >> QTD_BUFPTR_SH; 1304f1ae32a1SGerd Hoffmann offset &= ~QTD_BUFPTR_MASK; 1305f1ae32a1SGerd Hoffmann 1306f1ae32a1SGerd Hoffmann set_field(&q->qh.token, cpage, QTD_TOKEN_CPAGE); 1307f1ae32a1SGerd Hoffmann q->qh.bufptr[0] &= QTD_BUFPTR_MASK; 1308f1ae32a1SGerd Hoffmann q->qh.bufptr[0] |= offset; 1309f1ae32a1SGerd Hoffmann } 1310f1ae32a1SGerd Hoffmann } 1311f1ae32a1SGerd Hoffmann 1312f1ae32a1SGerd Hoffmann static void ehci_async_complete_packet(USBPort *port, USBPacket *packet) 1313f1ae32a1SGerd Hoffmann { 1314eb36a88eSGerd Hoffmann EHCIPacket *p; 1315f1ae32a1SGerd Hoffmann EHCIState *s = port->opaque; 1316f1ae32a1SGerd Hoffmann uint32_t portsc = s->portsc[port->index]; 1317f1ae32a1SGerd Hoffmann 1318f1ae32a1SGerd Hoffmann if (portsc & PORTSC_POWNER) { 1319f1ae32a1SGerd Hoffmann USBPort *companion = s->companion_ports[port->index]; 1320f1ae32a1SGerd Hoffmann companion->ops->complete(companion, packet); 1321f1ae32a1SGerd Hoffmann return; 1322f1ae32a1SGerd Hoffmann } 1323f1ae32a1SGerd Hoffmann 1324eb36a88eSGerd Hoffmann p = container_of(packet, EHCIPacket, packet); 1325eb36a88eSGerd Hoffmann trace_usb_ehci_packet_action(p->queue, p, "wakeup"); 1326eb36a88eSGerd Hoffmann assert(p->async == EHCI_ASYNC_INFLIGHT); 1327eb36a88eSGerd Hoffmann p->async = EHCI_ASYNC_FINISHED; 1328eb36a88eSGerd Hoffmann p->usb_status = packet->result; 1329f1ae32a1SGerd Hoffmann } 1330f1ae32a1SGerd Hoffmann 1331f1ae32a1SGerd Hoffmann static void ehci_execute_complete(EHCIQueue *q) 1332f1ae32a1SGerd Hoffmann { 1333eb36a88eSGerd Hoffmann EHCIPacket *p = QTAILQ_FIRST(&q->packets); 1334eb36a88eSGerd Hoffmann 1335eb36a88eSGerd Hoffmann assert(p != NULL); 1336eb36a88eSGerd Hoffmann assert(p->qtdaddr == q->qtdaddr); 1337eb36a88eSGerd Hoffmann assert(p->async != EHCI_ASYNC_INFLIGHT); 1338eb36a88eSGerd Hoffmann p->async = EHCI_ASYNC_NONE; 1339f1ae32a1SGerd Hoffmann 1340f1ae32a1SGerd Hoffmann DPRINTF("execute_complete: qhaddr 0x%x, next %x, qtdaddr 0x%x, status %d\n", 1341f1ae32a1SGerd Hoffmann q->qhaddr, q->qh.next, q->qtdaddr, q->usb_status); 1342f1ae32a1SGerd Hoffmann 1343eb36a88eSGerd Hoffmann if (p->usb_status < 0) { 1344eb36a88eSGerd Hoffmann switch (p->usb_status) { 1345f1ae32a1SGerd Hoffmann case USB_RET_IOERROR: 1346f1ae32a1SGerd Hoffmann case USB_RET_NODEV: 1347f1ae32a1SGerd Hoffmann q->qh.token |= (QTD_TOKEN_HALT | QTD_TOKEN_XACTERR); 1348f1ae32a1SGerd Hoffmann set_field(&q->qh.token, 0, QTD_TOKEN_CERR); 1349f1ae32a1SGerd Hoffmann ehci_record_interrupt(q->ehci, USBSTS_ERRINT); 1350f1ae32a1SGerd Hoffmann break; 1351f1ae32a1SGerd Hoffmann case USB_RET_STALL: 1352f1ae32a1SGerd Hoffmann q->qh.token |= QTD_TOKEN_HALT; 1353f1ae32a1SGerd Hoffmann ehci_record_interrupt(q->ehci, USBSTS_ERRINT); 1354f1ae32a1SGerd Hoffmann break; 1355f1ae32a1SGerd Hoffmann case USB_RET_NAK: 1356f1ae32a1SGerd Hoffmann set_field(&q->qh.altnext_qtd, 0, QH_ALTNEXT_NAKCNT); 1357f1ae32a1SGerd Hoffmann return; /* We're not done yet with this transaction */ 1358f1ae32a1SGerd Hoffmann case USB_RET_BABBLE: 1359f1ae32a1SGerd Hoffmann q->qh.token |= (QTD_TOKEN_HALT | QTD_TOKEN_BABBLE); 1360f1ae32a1SGerd Hoffmann ehci_record_interrupt(q->ehci, USBSTS_ERRINT); 1361f1ae32a1SGerd Hoffmann break; 1362f1ae32a1SGerd Hoffmann default: 1363f1ae32a1SGerd Hoffmann /* should not be triggerable */ 1364eb36a88eSGerd Hoffmann fprintf(stderr, "USB invalid response %d\n", p->usb_status); 1365f1ae32a1SGerd Hoffmann assert(0); 1366f1ae32a1SGerd Hoffmann break; 1367f1ae32a1SGerd Hoffmann } 1368eb36a88eSGerd Hoffmann } else if ((p->usb_status > p->tbytes) && (p->pid == USB_TOKEN_IN)) { 1369eb36a88eSGerd Hoffmann p->usb_status = USB_RET_BABBLE; 1370f1ae32a1SGerd Hoffmann q->qh.token |= (QTD_TOKEN_HALT | QTD_TOKEN_BABBLE); 1371f1ae32a1SGerd Hoffmann ehci_record_interrupt(q->ehci, USBSTS_ERRINT); 1372f1ae32a1SGerd Hoffmann } else { 1373f1ae32a1SGerd Hoffmann // TODO check 4.12 for splits 1374f1ae32a1SGerd Hoffmann 1375eb36a88eSGerd Hoffmann if (p->tbytes && p->pid == USB_TOKEN_IN) { 1376eb36a88eSGerd Hoffmann p->tbytes -= p->usb_status; 1377f1ae32a1SGerd Hoffmann } else { 1378eb36a88eSGerd Hoffmann p->tbytes = 0; 1379f1ae32a1SGerd Hoffmann } 1380f1ae32a1SGerd Hoffmann 1381eb36a88eSGerd Hoffmann DPRINTF("updating tbytes to %d\n", p->tbytes); 1382eb36a88eSGerd Hoffmann set_field(&q->qh.token, p->tbytes, QTD_TOKEN_TBYTES); 1383f1ae32a1SGerd Hoffmann } 1384eb36a88eSGerd Hoffmann ehci_finish_transfer(q, p->usb_status); 1385eb36a88eSGerd Hoffmann qemu_sglist_destroy(&p->sgl); 1386eb36a88eSGerd Hoffmann usb_packet_unmap(&p->packet); 1387f1ae32a1SGerd Hoffmann 1388f1ae32a1SGerd Hoffmann q->qh.token ^= QTD_TOKEN_DTOGGLE; 1389f1ae32a1SGerd Hoffmann q->qh.token &= ~QTD_TOKEN_ACTIVE; 1390f1ae32a1SGerd Hoffmann 1391f1ae32a1SGerd Hoffmann if (q->qh.token & QTD_TOKEN_IOC) { 1392f1ae32a1SGerd Hoffmann ehci_record_interrupt(q->ehci, USBSTS_INT); 1393f1ae32a1SGerd Hoffmann } 1394f1ae32a1SGerd Hoffmann } 1395f1ae32a1SGerd Hoffmann 1396f1ae32a1SGerd Hoffmann // 4.10.3 1397f1ae32a1SGerd Hoffmann 1398*4224558fSGerd Hoffmann static int ehci_execute(EHCIPacket *p) 1399f1ae32a1SGerd Hoffmann { 1400f1ae32a1SGerd Hoffmann USBDevice *dev; 1401f1ae32a1SGerd Hoffmann USBEndpoint *ep; 1402f1ae32a1SGerd Hoffmann int ret; 1403f1ae32a1SGerd Hoffmann int endp; 1404f1ae32a1SGerd Hoffmann int devadr; 1405f1ae32a1SGerd Hoffmann 1406*4224558fSGerd Hoffmann if (!(p->qtd.token & QTD_TOKEN_ACTIVE)) { 1407*4224558fSGerd Hoffmann fprintf(stderr, "Attempting to execute inactive qtd\n"); 1408f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1409f1ae32a1SGerd Hoffmann } 1410f1ae32a1SGerd Hoffmann 1411*4224558fSGerd Hoffmann p->tbytes = (p->qtd.token & QTD_TOKEN_TBYTES_MASK) >> QTD_TOKEN_TBYTES_SH; 1412eb36a88eSGerd Hoffmann if (p->tbytes > BUFF_SIZE) { 1413f1ae32a1SGerd Hoffmann fprintf(stderr, "Request for more bytes than allowed\n"); 1414f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1415f1ae32a1SGerd Hoffmann } 1416f1ae32a1SGerd Hoffmann 1417*4224558fSGerd Hoffmann p->pid = (p->qtd.token & QTD_TOKEN_PID_MASK) >> QTD_TOKEN_PID_SH; 1418eb36a88eSGerd Hoffmann switch (p->pid) { 1419eb36a88eSGerd Hoffmann case 0: 1420eb36a88eSGerd Hoffmann p->pid = USB_TOKEN_OUT; 1421eb36a88eSGerd Hoffmann break; 1422eb36a88eSGerd Hoffmann case 1: 1423eb36a88eSGerd Hoffmann p->pid = USB_TOKEN_IN; 1424eb36a88eSGerd Hoffmann break; 1425eb36a88eSGerd Hoffmann case 2: 1426eb36a88eSGerd Hoffmann p->pid = USB_TOKEN_SETUP; 1427eb36a88eSGerd Hoffmann break; 1428eb36a88eSGerd Hoffmann default: 1429eb36a88eSGerd Hoffmann fprintf(stderr, "bad token\n"); 1430eb36a88eSGerd Hoffmann break; 1431f1ae32a1SGerd Hoffmann } 1432f1ae32a1SGerd Hoffmann 1433eb36a88eSGerd Hoffmann if (ehci_init_transfer(p) != 0) { 1434f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1435f1ae32a1SGerd Hoffmann } 1436f1ae32a1SGerd Hoffmann 1437*4224558fSGerd Hoffmann endp = get_field(p->queue->qh.epchar, QH_EPCHAR_EP); 1438*4224558fSGerd Hoffmann devadr = get_field(p->queue->qh.epchar, QH_EPCHAR_DEVADDR); 1439f1ae32a1SGerd Hoffmann 1440f1ae32a1SGerd Hoffmann /* TODO: associating device with ehci port */ 1441*4224558fSGerd Hoffmann dev = ehci_find_device(p->queue->ehci, devadr); 1442eb36a88eSGerd Hoffmann ep = usb_ep_get(dev, p->pid, endp); 1443f1ae32a1SGerd Hoffmann 1444eb36a88eSGerd Hoffmann usb_packet_setup(&p->packet, p->pid, ep); 1445eb36a88eSGerd Hoffmann usb_packet_map(&p->packet, &p->sgl); 1446f1ae32a1SGerd Hoffmann 1447eb36a88eSGerd Hoffmann ret = usb_handle_packet(dev, &p->packet); 1448f1ae32a1SGerd Hoffmann DPRINTF("submit: qh %x next %x qtd %x pid %x len %zd " 1449f1ae32a1SGerd Hoffmann "(total %d) endp %x ret %d\n", 1450f1ae32a1SGerd Hoffmann q->qhaddr, q->qh.next, q->qtdaddr, q->pid, 1451f1ae32a1SGerd Hoffmann q->packet.iov.size, q->tbytes, endp, ret); 1452f1ae32a1SGerd Hoffmann 1453f1ae32a1SGerd Hoffmann if (ret > BUFF_SIZE) { 1454f1ae32a1SGerd Hoffmann fprintf(stderr, "ret from usb_handle_packet > BUFF_SIZE\n"); 1455f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1456f1ae32a1SGerd Hoffmann } 1457f1ae32a1SGerd Hoffmann 1458f1ae32a1SGerd Hoffmann return ret; 1459f1ae32a1SGerd Hoffmann } 1460f1ae32a1SGerd Hoffmann 1461f1ae32a1SGerd Hoffmann /* 4.7.2 1462f1ae32a1SGerd Hoffmann */ 1463f1ae32a1SGerd Hoffmann 1464f1ae32a1SGerd Hoffmann static int ehci_process_itd(EHCIState *ehci, 1465f1ae32a1SGerd Hoffmann EHCIitd *itd) 1466f1ae32a1SGerd Hoffmann { 1467f1ae32a1SGerd Hoffmann USBDevice *dev; 1468f1ae32a1SGerd Hoffmann USBEndpoint *ep; 1469f1ae32a1SGerd Hoffmann int ret; 1470f1ae32a1SGerd Hoffmann uint32_t i, len, pid, dir, devaddr, endp; 1471f1ae32a1SGerd Hoffmann uint32_t pg, off, ptr1, ptr2, max, mult; 1472f1ae32a1SGerd Hoffmann 1473f1ae32a1SGerd Hoffmann dir =(itd->bufptr[1] & ITD_BUFPTR_DIRECTION); 1474f1ae32a1SGerd Hoffmann devaddr = get_field(itd->bufptr[0], ITD_BUFPTR_DEVADDR); 1475f1ae32a1SGerd Hoffmann endp = get_field(itd->bufptr[0], ITD_BUFPTR_EP); 1476f1ae32a1SGerd Hoffmann max = get_field(itd->bufptr[1], ITD_BUFPTR_MAXPKT); 1477f1ae32a1SGerd Hoffmann mult = get_field(itd->bufptr[2], ITD_BUFPTR_MULT); 1478f1ae32a1SGerd Hoffmann 1479f1ae32a1SGerd Hoffmann for(i = 0; i < 8; i++) { 1480f1ae32a1SGerd Hoffmann if (itd->transact[i] & ITD_XACT_ACTIVE) { 1481f1ae32a1SGerd Hoffmann pg = get_field(itd->transact[i], ITD_XACT_PGSEL); 1482f1ae32a1SGerd Hoffmann off = itd->transact[i] & ITD_XACT_OFFSET_MASK; 1483f1ae32a1SGerd Hoffmann ptr1 = (itd->bufptr[pg] & ITD_BUFPTR_MASK); 1484f1ae32a1SGerd Hoffmann ptr2 = (itd->bufptr[pg+1] & ITD_BUFPTR_MASK); 1485f1ae32a1SGerd Hoffmann len = get_field(itd->transact[i], ITD_XACT_LENGTH); 1486f1ae32a1SGerd Hoffmann 1487f1ae32a1SGerd Hoffmann if (len > max * mult) { 1488f1ae32a1SGerd Hoffmann len = max * mult; 1489f1ae32a1SGerd Hoffmann } 1490f1ae32a1SGerd Hoffmann 1491f1ae32a1SGerd Hoffmann if (len > BUFF_SIZE) { 1492f1ae32a1SGerd Hoffmann return USB_RET_PROCERR; 1493f1ae32a1SGerd Hoffmann } 1494f1ae32a1SGerd Hoffmann 1495f1ae32a1SGerd Hoffmann pci_dma_sglist_init(&ehci->isgl, &ehci->dev, 2); 1496f1ae32a1SGerd Hoffmann if (off + len > 4096) { 1497f1ae32a1SGerd Hoffmann /* transfer crosses page border */ 1498f1ae32a1SGerd Hoffmann uint32_t len2 = off + len - 4096; 1499f1ae32a1SGerd Hoffmann uint32_t len1 = len - len2; 1500f1ae32a1SGerd Hoffmann qemu_sglist_add(&ehci->isgl, ptr1 + off, len1); 1501f1ae32a1SGerd Hoffmann qemu_sglist_add(&ehci->isgl, ptr2, len2); 1502f1ae32a1SGerd Hoffmann } else { 1503f1ae32a1SGerd Hoffmann qemu_sglist_add(&ehci->isgl, ptr1 + off, len); 1504f1ae32a1SGerd Hoffmann } 1505f1ae32a1SGerd Hoffmann 1506f1ae32a1SGerd Hoffmann pid = dir ? USB_TOKEN_IN : USB_TOKEN_OUT; 1507f1ae32a1SGerd Hoffmann 1508f1ae32a1SGerd Hoffmann dev = ehci_find_device(ehci, devaddr); 1509f1ae32a1SGerd Hoffmann ep = usb_ep_get(dev, pid, endp); 1510f1ae32a1SGerd Hoffmann if (ep->type == USB_ENDPOINT_XFER_ISOC) { 1511f1ae32a1SGerd Hoffmann usb_packet_setup(&ehci->ipacket, pid, ep); 1512f1ae32a1SGerd Hoffmann usb_packet_map(&ehci->ipacket, &ehci->isgl); 1513f1ae32a1SGerd Hoffmann ret = usb_handle_packet(dev, &ehci->ipacket); 1514f1ae32a1SGerd Hoffmann assert(ret != USB_RET_ASYNC); 1515f1ae32a1SGerd Hoffmann usb_packet_unmap(&ehci->ipacket); 1516f1ae32a1SGerd Hoffmann } else { 1517f1ae32a1SGerd Hoffmann DPRINTF("ISOCH: attempt to addess non-iso endpoint\n"); 1518f1ae32a1SGerd Hoffmann ret = USB_RET_NAK; 1519f1ae32a1SGerd Hoffmann } 1520f1ae32a1SGerd Hoffmann qemu_sglist_destroy(&ehci->isgl); 1521f1ae32a1SGerd Hoffmann 1522f1ae32a1SGerd Hoffmann if (ret < 0) { 1523f1ae32a1SGerd Hoffmann switch (ret) { 1524f1ae32a1SGerd Hoffmann default: 1525f1ae32a1SGerd Hoffmann fprintf(stderr, "Unexpected iso usb result: %d\n", ret); 1526f1ae32a1SGerd Hoffmann /* Fall through */ 1527f1ae32a1SGerd Hoffmann case USB_RET_IOERROR: 1528f1ae32a1SGerd Hoffmann case USB_RET_NODEV: 1529f1ae32a1SGerd Hoffmann /* 3.3.2: XACTERR is only allowed on IN transactions */ 1530f1ae32a1SGerd Hoffmann if (dir) { 1531f1ae32a1SGerd Hoffmann itd->transact[i] |= ITD_XACT_XACTERR; 1532f1ae32a1SGerd Hoffmann ehci_record_interrupt(ehci, USBSTS_ERRINT); 1533f1ae32a1SGerd Hoffmann } 1534f1ae32a1SGerd Hoffmann break; 1535f1ae32a1SGerd Hoffmann case USB_RET_BABBLE: 1536f1ae32a1SGerd Hoffmann itd->transact[i] |= ITD_XACT_BABBLE; 1537f1ae32a1SGerd Hoffmann ehci_record_interrupt(ehci, USBSTS_ERRINT); 1538f1ae32a1SGerd Hoffmann break; 1539f1ae32a1SGerd Hoffmann case USB_RET_NAK: 1540f1ae32a1SGerd Hoffmann /* no data for us, so do a zero-length transfer */ 1541f1ae32a1SGerd Hoffmann ret = 0; 1542f1ae32a1SGerd Hoffmann break; 1543f1ae32a1SGerd Hoffmann } 1544f1ae32a1SGerd Hoffmann } 1545f1ae32a1SGerd Hoffmann if (ret >= 0) { 1546f1ae32a1SGerd Hoffmann if (!dir) { 1547f1ae32a1SGerd Hoffmann /* OUT */ 1548f1ae32a1SGerd Hoffmann set_field(&itd->transact[i], len - ret, ITD_XACT_LENGTH); 1549f1ae32a1SGerd Hoffmann } else { 1550f1ae32a1SGerd Hoffmann /* IN */ 1551f1ae32a1SGerd Hoffmann set_field(&itd->transact[i], ret, ITD_XACT_LENGTH); 1552f1ae32a1SGerd Hoffmann } 1553f1ae32a1SGerd Hoffmann } 1554f1ae32a1SGerd Hoffmann if (itd->transact[i] & ITD_XACT_IOC) { 1555f1ae32a1SGerd Hoffmann ehci_record_interrupt(ehci, USBSTS_INT); 1556f1ae32a1SGerd Hoffmann } 1557f1ae32a1SGerd Hoffmann itd->transact[i] &= ~ITD_XACT_ACTIVE; 1558f1ae32a1SGerd Hoffmann } 1559f1ae32a1SGerd Hoffmann } 1560f1ae32a1SGerd Hoffmann return 0; 1561f1ae32a1SGerd Hoffmann } 1562f1ae32a1SGerd Hoffmann 1563f1ae32a1SGerd Hoffmann /* This state is the entry point for asynchronous schedule 1564f1ae32a1SGerd Hoffmann * processing. Entry here consitutes a EHCI start event state (4.8.5) 1565f1ae32a1SGerd Hoffmann */ 1566f1ae32a1SGerd Hoffmann static int ehci_state_waitlisthead(EHCIState *ehci, int async) 1567f1ae32a1SGerd Hoffmann { 1568f1ae32a1SGerd Hoffmann EHCIqh qh; 1569f1ae32a1SGerd Hoffmann int i = 0; 1570f1ae32a1SGerd Hoffmann int again = 0; 1571f1ae32a1SGerd Hoffmann uint32_t entry = ehci->asynclistaddr; 1572f1ae32a1SGerd Hoffmann 1573f1ae32a1SGerd Hoffmann /* set reclamation flag at start event (4.8.6) */ 1574f1ae32a1SGerd Hoffmann if (async) { 1575f1ae32a1SGerd Hoffmann ehci_set_usbsts(ehci, USBSTS_REC); 1576f1ae32a1SGerd Hoffmann } 1577f1ae32a1SGerd Hoffmann 1578f1ae32a1SGerd Hoffmann ehci_queues_rip_unused(ehci, async, 0); 1579f1ae32a1SGerd Hoffmann 1580f1ae32a1SGerd Hoffmann /* Find the head of the list (4.9.1.1) */ 1581f1ae32a1SGerd Hoffmann for(i = 0; i < MAX_QH; i++) { 1582f1ae32a1SGerd Hoffmann get_dwords(ehci, NLPTR_GET(entry), (uint32_t *) &qh, 1583f1ae32a1SGerd Hoffmann sizeof(EHCIqh) >> 2); 1584f1ae32a1SGerd Hoffmann ehci_trace_qh(NULL, NLPTR_GET(entry), &qh); 1585f1ae32a1SGerd Hoffmann 1586f1ae32a1SGerd Hoffmann if (qh.epchar & QH_EPCHAR_H) { 1587f1ae32a1SGerd Hoffmann if (async) { 1588f1ae32a1SGerd Hoffmann entry |= (NLPTR_TYPE_QH << 1); 1589f1ae32a1SGerd Hoffmann } 1590f1ae32a1SGerd Hoffmann 1591f1ae32a1SGerd Hoffmann ehci_set_fetch_addr(ehci, async, entry); 1592f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHENTRY); 1593f1ae32a1SGerd Hoffmann again = 1; 1594f1ae32a1SGerd Hoffmann goto out; 1595f1ae32a1SGerd Hoffmann } 1596f1ae32a1SGerd Hoffmann 1597f1ae32a1SGerd Hoffmann entry = qh.next; 1598f1ae32a1SGerd Hoffmann if (entry == ehci->asynclistaddr) { 1599f1ae32a1SGerd Hoffmann break; 1600f1ae32a1SGerd Hoffmann } 1601f1ae32a1SGerd Hoffmann } 1602f1ae32a1SGerd Hoffmann 1603f1ae32a1SGerd Hoffmann /* no head found for list. */ 1604f1ae32a1SGerd Hoffmann 1605f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 1606f1ae32a1SGerd Hoffmann 1607f1ae32a1SGerd Hoffmann out: 1608f1ae32a1SGerd Hoffmann return again; 1609f1ae32a1SGerd Hoffmann } 1610f1ae32a1SGerd Hoffmann 1611f1ae32a1SGerd Hoffmann 1612f1ae32a1SGerd Hoffmann /* This state is the entry point for periodic schedule processing as 1613f1ae32a1SGerd Hoffmann * well as being a continuation state for async processing. 1614f1ae32a1SGerd Hoffmann */ 1615f1ae32a1SGerd Hoffmann static int ehci_state_fetchentry(EHCIState *ehci, int async) 1616f1ae32a1SGerd Hoffmann { 1617f1ae32a1SGerd Hoffmann int again = 0; 1618f1ae32a1SGerd Hoffmann uint32_t entry = ehci_get_fetch_addr(ehci, async); 1619f1ae32a1SGerd Hoffmann 1620f1ae32a1SGerd Hoffmann if (NLPTR_TBIT(entry)) { 1621f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 1622f1ae32a1SGerd Hoffmann goto out; 1623f1ae32a1SGerd Hoffmann } 1624f1ae32a1SGerd Hoffmann 1625f1ae32a1SGerd Hoffmann /* section 4.8, only QH in async schedule */ 1626f1ae32a1SGerd Hoffmann if (async && (NLPTR_TYPE_GET(entry) != NLPTR_TYPE_QH)) { 1627f1ae32a1SGerd Hoffmann fprintf(stderr, "non queue head request in async schedule\n"); 1628f1ae32a1SGerd Hoffmann return -1; 1629f1ae32a1SGerd Hoffmann } 1630f1ae32a1SGerd Hoffmann 1631f1ae32a1SGerd Hoffmann switch (NLPTR_TYPE_GET(entry)) { 1632f1ae32a1SGerd Hoffmann case NLPTR_TYPE_QH: 1633f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHQH); 1634f1ae32a1SGerd Hoffmann again = 1; 1635f1ae32a1SGerd Hoffmann break; 1636f1ae32a1SGerd Hoffmann 1637f1ae32a1SGerd Hoffmann case NLPTR_TYPE_ITD: 1638f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHITD); 1639f1ae32a1SGerd Hoffmann again = 1; 1640f1ae32a1SGerd Hoffmann break; 1641f1ae32a1SGerd Hoffmann 1642f1ae32a1SGerd Hoffmann case NLPTR_TYPE_STITD: 1643f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHSITD); 1644f1ae32a1SGerd Hoffmann again = 1; 1645f1ae32a1SGerd Hoffmann break; 1646f1ae32a1SGerd Hoffmann 1647f1ae32a1SGerd Hoffmann default: 1648f1ae32a1SGerd Hoffmann /* TODO: handle FSTN type */ 1649f1ae32a1SGerd Hoffmann fprintf(stderr, "FETCHENTRY: entry at %X is of type %d " 1650f1ae32a1SGerd Hoffmann "which is not supported yet\n", entry, NLPTR_TYPE_GET(entry)); 1651f1ae32a1SGerd Hoffmann return -1; 1652f1ae32a1SGerd Hoffmann } 1653f1ae32a1SGerd Hoffmann 1654f1ae32a1SGerd Hoffmann out: 1655f1ae32a1SGerd Hoffmann return again; 1656f1ae32a1SGerd Hoffmann } 1657f1ae32a1SGerd Hoffmann 1658f1ae32a1SGerd Hoffmann static EHCIQueue *ehci_state_fetchqh(EHCIState *ehci, int async) 1659f1ae32a1SGerd Hoffmann { 1660eb36a88eSGerd Hoffmann EHCIPacket *p; 1661f1ae32a1SGerd Hoffmann uint32_t entry; 1662f1ae32a1SGerd Hoffmann EHCIQueue *q; 1663f1ae32a1SGerd Hoffmann 1664f1ae32a1SGerd Hoffmann entry = ehci_get_fetch_addr(ehci, async); 1665f1ae32a1SGerd Hoffmann q = ehci_find_queue_by_qh(ehci, entry, async); 1666f1ae32a1SGerd Hoffmann if (NULL == q) { 1667f1ae32a1SGerd Hoffmann q = ehci_alloc_queue(ehci, async); 1668f1ae32a1SGerd Hoffmann } 1669eb36a88eSGerd Hoffmann p = QTAILQ_FIRST(&q->packets); 1670f1ae32a1SGerd Hoffmann q->qhaddr = entry; 1671f1ae32a1SGerd Hoffmann q->seen++; 1672f1ae32a1SGerd Hoffmann 1673f1ae32a1SGerd Hoffmann if (q->seen > 1) { 1674f1ae32a1SGerd Hoffmann /* we are going in circles -- stop processing */ 1675f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 1676f1ae32a1SGerd Hoffmann q = NULL; 1677f1ae32a1SGerd Hoffmann goto out; 1678f1ae32a1SGerd Hoffmann } 1679f1ae32a1SGerd Hoffmann 1680f1ae32a1SGerd Hoffmann get_dwords(ehci, NLPTR_GET(q->qhaddr), 1681f1ae32a1SGerd Hoffmann (uint32_t *) &q->qh, sizeof(EHCIqh) >> 2); 1682f1ae32a1SGerd Hoffmann ehci_trace_qh(q, NLPTR_GET(q->qhaddr), &q->qh); 1683f1ae32a1SGerd Hoffmann 1684eb36a88eSGerd Hoffmann if (p && p->async == EHCI_ASYNC_INFLIGHT) { 1685f1ae32a1SGerd Hoffmann /* I/O still in progress -- skip queue */ 1686f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_HORIZONTALQH); 1687f1ae32a1SGerd Hoffmann goto out; 1688f1ae32a1SGerd Hoffmann } 1689eb36a88eSGerd Hoffmann if (p && p->async == EHCI_ASYNC_FINISHED) { 1690f1ae32a1SGerd Hoffmann /* I/O finished -- continue processing queue */ 1691f1ae32a1SGerd Hoffmann trace_usb_ehci_queue_action(q, "resume"); 1692f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_EXECUTING); 1693f1ae32a1SGerd Hoffmann goto out; 1694f1ae32a1SGerd Hoffmann } 1695f1ae32a1SGerd Hoffmann 1696f1ae32a1SGerd Hoffmann if (async && (q->qh.epchar & QH_EPCHAR_H)) { 1697f1ae32a1SGerd Hoffmann 1698f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 4.8.3 & 4.10.1 */ 1699f1ae32a1SGerd Hoffmann if (ehci->usbsts & USBSTS_REC) { 1700f1ae32a1SGerd Hoffmann ehci_clear_usbsts(ehci, USBSTS_REC); 1701f1ae32a1SGerd Hoffmann } else { 1702f1ae32a1SGerd Hoffmann DPRINTF("FETCHQH: QH 0x%08x. H-bit set, reclamation status reset" 1703f1ae32a1SGerd Hoffmann " - done processing\n", q->qhaddr); 1704f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 1705f1ae32a1SGerd Hoffmann q = NULL; 1706f1ae32a1SGerd Hoffmann goto out; 1707f1ae32a1SGerd Hoffmann } 1708f1ae32a1SGerd Hoffmann } 1709f1ae32a1SGerd Hoffmann 1710f1ae32a1SGerd Hoffmann #if EHCI_DEBUG 1711f1ae32a1SGerd Hoffmann if (q->qhaddr != q->qh.next) { 1712f1ae32a1SGerd Hoffmann DPRINTF("FETCHQH: QH 0x%08x (h %x halt %x active %x) next 0x%08x\n", 1713f1ae32a1SGerd Hoffmann q->qhaddr, 1714f1ae32a1SGerd Hoffmann q->qh.epchar & QH_EPCHAR_H, 1715f1ae32a1SGerd Hoffmann q->qh.token & QTD_TOKEN_HALT, 1716f1ae32a1SGerd Hoffmann q->qh.token & QTD_TOKEN_ACTIVE, 1717f1ae32a1SGerd Hoffmann q->qh.next); 1718f1ae32a1SGerd Hoffmann } 1719f1ae32a1SGerd Hoffmann #endif 1720f1ae32a1SGerd Hoffmann 1721f1ae32a1SGerd Hoffmann if (q->qh.token & QTD_TOKEN_HALT) { 1722f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_HORIZONTALQH); 1723f1ae32a1SGerd Hoffmann 1724f1ae32a1SGerd Hoffmann } else if ((q->qh.token & QTD_TOKEN_ACTIVE) && 1725f1ae32a1SGerd Hoffmann (NLPTR_TBIT(q->qh.current_qtd) == 0)) { 1726f1ae32a1SGerd Hoffmann q->qtdaddr = q->qh.current_qtd; 1727f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHQTD); 1728f1ae32a1SGerd Hoffmann 1729f1ae32a1SGerd Hoffmann } else { 1730f1ae32a1SGerd Hoffmann /* EHCI spec version 1.0 Section 4.10.2 */ 1731f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ADVANCEQUEUE); 1732f1ae32a1SGerd Hoffmann } 1733f1ae32a1SGerd Hoffmann 1734f1ae32a1SGerd Hoffmann out: 1735f1ae32a1SGerd Hoffmann return q; 1736f1ae32a1SGerd Hoffmann } 1737f1ae32a1SGerd Hoffmann 1738f1ae32a1SGerd Hoffmann static int ehci_state_fetchitd(EHCIState *ehci, int async) 1739f1ae32a1SGerd Hoffmann { 1740f1ae32a1SGerd Hoffmann uint32_t entry; 1741f1ae32a1SGerd Hoffmann EHCIitd itd; 1742f1ae32a1SGerd Hoffmann 1743f1ae32a1SGerd Hoffmann assert(!async); 1744f1ae32a1SGerd Hoffmann entry = ehci_get_fetch_addr(ehci, async); 1745f1ae32a1SGerd Hoffmann 1746f1ae32a1SGerd Hoffmann get_dwords(ehci, NLPTR_GET(entry), (uint32_t *) &itd, 1747f1ae32a1SGerd Hoffmann sizeof(EHCIitd) >> 2); 1748f1ae32a1SGerd Hoffmann ehci_trace_itd(ehci, entry, &itd); 1749f1ae32a1SGerd Hoffmann 1750f1ae32a1SGerd Hoffmann if (ehci_process_itd(ehci, &itd) != 0) { 1751f1ae32a1SGerd Hoffmann return -1; 1752f1ae32a1SGerd Hoffmann } 1753f1ae32a1SGerd Hoffmann 1754f1ae32a1SGerd Hoffmann put_dwords(ehci, NLPTR_GET(entry), (uint32_t *) &itd, 1755f1ae32a1SGerd Hoffmann sizeof(EHCIitd) >> 2); 1756f1ae32a1SGerd Hoffmann ehci_set_fetch_addr(ehci, async, itd.next); 1757f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHENTRY); 1758f1ae32a1SGerd Hoffmann 1759f1ae32a1SGerd Hoffmann return 1; 1760f1ae32a1SGerd Hoffmann } 1761f1ae32a1SGerd Hoffmann 1762f1ae32a1SGerd Hoffmann static int ehci_state_fetchsitd(EHCIState *ehci, int async) 1763f1ae32a1SGerd Hoffmann { 1764f1ae32a1SGerd Hoffmann uint32_t entry; 1765f1ae32a1SGerd Hoffmann EHCIsitd sitd; 1766f1ae32a1SGerd Hoffmann 1767f1ae32a1SGerd Hoffmann assert(!async); 1768f1ae32a1SGerd Hoffmann entry = ehci_get_fetch_addr(ehci, async); 1769f1ae32a1SGerd Hoffmann 1770f1ae32a1SGerd Hoffmann get_dwords(ehci, NLPTR_GET(entry), (uint32_t *)&sitd, 1771f1ae32a1SGerd Hoffmann sizeof(EHCIsitd) >> 2); 1772f1ae32a1SGerd Hoffmann ehci_trace_sitd(ehci, entry, &sitd); 1773f1ae32a1SGerd Hoffmann 1774f1ae32a1SGerd Hoffmann if (!(sitd.results & SITD_RESULTS_ACTIVE)) { 1775f1ae32a1SGerd Hoffmann /* siTD is not active, nothing to do */; 1776f1ae32a1SGerd Hoffmann } else { 1777f1ae32a1SGerd Hoffmann /* TODO: split transfers are not implemented */ 1778f1ae32a1SGerd Hoffmann fprintf(stderr, "WARNING: Skipping active siTD\n"); 1779f1ae32a1SGerd Hoffmann } 1780f1ae32a1SGerd Hoffmann 1781f1ae32a1SGerd Hoffmann ehci_set_fetch_addr(ehci, async, sitd.next); 1782f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHENTRY); 1783f1ae32a1SGerd Hoffmann return 1; 1784f1ae32a1SGerd Hoffmann } 1785f1ae32a1SGerd Hoffmann 1786f1ae32a1SGerd Hoffmann /* Section 4.10.2 - paragraph 3 */ 1787f1ae32a1SGerd Hoffmann static int ehci_state_advqueue(EHCIQueue *q, int async) 1788f1ae32a1SGerd Hoffmann { 1789f1ae32a1SGerd Hoffmann #if 0 1790f1ae32a1SGerd Hoffmann /* TO-DO: 4.10.2 - paragraph 2 1791f1ae32a1SGerd Hoffmann * if I-bit is set to 1 and QH is not active 1792f1ae32a1SGerd Hoffmann * go to horizontal QH 1793f1ae32a1SGerd Hoffmann */ 1794f1ae32a1SGerd Hoffmann if (I-bit set) { 1795f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_HORIZONTALQH); 1796f1ae32a1SGerd Hoffmann goto out; 1797f1ae32a1SGerd Hoffmann } 1798f1ae32a1SGerd Hoffmann #endif 1799f1ae32a1SGerd Hoffmann 1800f1ae32a1SGerd Hoffmann /* 1801f1ae32a1SGerd Hoffmann * want data and alt-next qTD is valid 1802f1ae32a1SGerd Hoffmann */ 1803f1ae32a1SGerd Hoffmann if (((q->qh.token & QTD_TOKEN_TBYTES_MASK) != 0) && 1804f1ae32a1SGerd Hoffmann (NLPTR_TBIT(q->qh.altnext_qtd) == 0)) { 1805f1ae32a1SGerd Hoffmann q->qtdaddr = q->qh.altnext_qtd; 1806f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_FETCHQTD); 1807f1ae32a1SGerd Hoffmann 1808f1ae32a1SGerd Hoffmann /* 1809f1ae32a1SGerd Hoffmann * next qTD is valid 1810f1ae32a1SGerd Hoffmann */ 1811f1ae32a1SGerd Hoffmann } else if (NLPTR_TBIT(q->qh.next_qtd) == 0) { 1812f1ae32a1SGerd Hoffmann q->qtdaddr = q->qh.next_qtd; 1813f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_FETCHQTD); 1814f1ae32a1SGerd Hoffmann 1815f1ae32a1SGerd Hoffmann /* 1816f1ae32a1SGerd Hoffmann * no valid qTD, try next QH 1817f1ae32a1SGerd Hoffmann */ 1818f1ae32a1SGerd Hoffmann } else { 1819f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_HORIZONTALQH); 1820f1ae32a1SGerd Hoffmann } 1821f1ae32a1SGerd Hoffmann 1822f1ae32a1SGerd Hoffmann return 1; 1823f1ae32a1SGerd Hoffmann } 1824f1ae32a1SGerd Hoffmann 1825f1ae32a1SGerd Hoffmann /* Section 4.10.2 - paragraph 4 */ 1826f1ae32a1SGerd Hoffmann static int ehci_state_fetchqtd(EHCIQueue *q, int async) 1827f1ae32a1SGerd Hoffmann { 1828eb36a88eSGerd Hoffmann EHCIqtd qtd; 1829eb36a88eSGerd Hoffmann EHCIPacket *p; 1830f1ae32a1SGerd Hoffmann int again = 0; 1831f1ae32a1SGerd Hoffmann 1832eb36a88eSGerd Hoffmann get_dwords(q->ehci, NLPTR_GET(q->qtdaddr), (uint32_t *) &qtd, 1833f1ae32a1SGerd Hoffmann sizeof(EHCIqtd) >> 2); 1834eb36a88eSGerd Hoffmann ehci_trace_qtd(q, NLPTR_GET(q->qtdaddr), &qtd); 1835f1ae32a1SGerd Hoffmann 1836eb36a88eSGerd Hoffmann if (qtd.token & QTD_TOKEN_ACTIVE) { 1837eb36a88eSGerd Hoffmann p = ehci_alloc_packet(q); 1838eb36a88eSGerd Hoffmann p->qtdaddr = q->qtdaddr; 1839eb36a88eSGerd Hoffmann p->qtd = qtd; 1840f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_EXECUTE); 1841f1ae32a1SGerd Hoffmann again = 1; 1842f1ae32a1SGerd Hoffmann } else { 1843f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_HORIZONTALQH); 1844f1ae32a1SGerd Hoffmann again = 1; 1845f1ae32a1SGerd Hoffmann } 1846f1ae32a1SGerd Hoffmann 1847f1ae32a1SGerd Hoffmann return again; 1848f1ae32a1SGerd Hoffmann } 1849f1ae32a1SGerd Hoffmann 1850f1ae32a1SGerd Hoffmann static int ehci_state_horizqh(EHCIQueue *q, int async) 1851f1ae32a1SGerd Hoffmann { 1852f1ae32a1SGerd Hoffmann int again = 0; 1853f1ae32a1SGerd Hoffmann 1854f1ae32a1SGerd Hoffmann if (ehci_get_fetch_addr(q->ehci, async) != q->qh.next) { 1855f1ae32a1SGerd Hoffmann ehci_set_fetch_addr(q->ehci, async, q->qh.next); 1856f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_FETCHENTRY); 1857f1ae32a1SGerd Hoffmann again = 1; 1858f1ae32a1SGerd Hoffmann } else { 1859f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_ACTIVE); 1860f1ae32a1SGerd Hoffmann } 1861f1ae32a1SGerd Hoffmann 1862f1ae32a1SGerd Hoffmann return again; 1863f1ae32a1SGerd Hoffmann } 1864f1ae32a1SGerd Hoffmann 1865f1ae32a1SGerd Hoffmann /* 1866f1ae32a1SGerd Hoffmann * Write the qh back to guest physical memory. This step isn't 1867f1ae32a1SGerd Hoffmann * in the EHCI spec but we need to do it since we don't share 1868f1ae32a1SGerd Hoffmann * physical memory with our guest VM. 1869f1ae32a1SGerd Hoffmann * 1870f1ae32a1SGerd Hoffmann * The first three dwords are read-only for the EHCI, so skip them 1871f1ae32a1SGerd Hoffmann * when writing back the qh. 1872f1ae32a1SGerd Hoffmann */ 1873f1ae32a1SGerd Hoffmann static void ehci_flush_qh(EHCIQueue *q) 1874f1ae32a1SGerd Hoffmann { 1875f1ae32a1SGerd Hoffmann uint32_t *qh = (uint32_t *) &q->qh; 1876f1ae32a1SGerd Hoffmann uint32_t dwords = sizeof(EHCIqh) >> 2; 1877f1ae32a1SGerd Hoffmann uint32_t addr = NLPTR_GET(q->qhaddr); 1878f1ae32a1SGerd Hoffmann 1879f1ae32a1SGerd Hoffmann put_dwords(q->ehci, addr + 3 * sizeof(uint32_t), qh + 3, dwords - 3); 1880f1ae32a1SGerd Hoffmann } 1881f1ae32a1SGerd Hoffmann 1882f1ae32a1SGerd Hoffmann static int ehci_state_execute(EHCIQueue *q, int async) 1883f1ae32a1SGerd Hoffmann { 1884eb36a88eSGerd Hoffmann EHCIPacket *p = QTAILQ_FIRST(&q->packets); 1885f1ae32a1SGerd Hoffmann int again = 0; 1886f1ae32a1SGerd Hoffmann 1887eb36a88eSGerd Hoffmann assert(p != NULL); 1888eb36a88eSGerd Hoffmann assert(p->qtdaddr == q->qtdaddr); 1889eb36a88eSGerd Hoffmann 1890f1ae32a1SGerd Hoffmann if (ehci_qh_do_overlay(q) != 0) { 1891f1ae32a1SGerd Hoffmann return -1; 1892f1ae32a1SGerd Hoffmann } 1893f1ae32a1SGerd Hoffmann 1894f1ae32a1SGerd Hoffmann // TODO verify enough time remains in the uframe as in 4.4.1.1 1895f1ae32a1SGerd Hoffmann // TODO write back ptr to async list when done or out of time 1896f1ae32a1SGerd Hoffmann // TODO Windows does not seem to ever set the MULT field 1897f1ae32a1SGerd Hoffmann 1898f1ae32a1SGerd Hoffmann if (!async) { 1899f1ae32a1SGerd Hoffmann int transactCtr = get_field(q->qh.epcap, QH_EPCAP_MULT); 1900f1ae32a1SGerd Hoffmann if (!transactCtr) { 1901f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_HORIZONTALQH); 1902f1ae32a1SGerd Hoffmann again = 1; 1903f1ae32a1SGerd Hoffmann goto out; 1904f1ae32a1SGerd Hoffmann } 1905f1ae32a1SGerd Hoffmann } 1906f1ae32a1SGerd Hoffmann 1907f1ae32a1SGerd Hoffmann if (async) { 1908f1ae32a1SGerd Hoffmann ehci_set_usbsts(q->ehci, USBSTS_REC); 1909f1ae32a1SGerd Hoffmann } 1910f1ae32a1SGerd Hoffmann 1911*4224558fSGerd Hoffmann p->usb_status = ehci_execute(p); 1912eb36a88eSGerd Hoffmann if (p->usb_status == USB_RET_PROCERR) { 1913f1ae32a1SGerd Hoffmann again = -1; 1914f1ae32a1SGerd Hoffmann goto out; 1915f1ae32a1SGerd Hoffmann } 1916eb36a88eSGerd Hoffmann if (p->usb_status == USB_RET_ASYNC) { 1917f1ae32a1SGerd Hoffmann ehci_flush_qh(q); 1918f1ae32a1SGerd Hoffmann trace_usb_ehci_queue_action(q, "suspend"); 1919eb36a88eSGerd Hoffmann p->async = EHCI_ASYNC_INFLIGHT; 1920f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_HORIZONTALQH); 1921f1ae32a1SGerd Hoffmann again = 1; 1922f1ae32a1SGerd Hoffmann goto out; 1923f1ae32a1SGerd Hoffmann } 1924f1ae32a1SGerd Hoffmann 1925f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_EXECUTING); 1926f1ae32a1SGerd Hoffmann again = 1; 1927f1ae32a1SGerd Hoffmann 1928f1ae32a1SGerd Hoffmann out: 1929f1ae32a1SGerd Hoffmann return again; 1930f1ae32a1SGerd Hoffmann } 1931f1ae32a1SGerd Hoffmann 1932f1ae32a1SGerd Hoffmann static int ehci_state_executing(EHCIQueue *q, int async) 1933f1ae32a1SGerd Hoffmann { 1934eb36a88eSGerd Hoffmann EHCIPacket *p = QTAILQ_FIRST(&q->packets); 1935f1ae32a1SGerd Hoffmann int again = 0; 1936f1ae32a1SGerd Hoffmann 1937eb36a88eSGerd Hoffmann assert(p != NULL); 1938eb36a88eSGerd Hoffmann assert(p->qtdaddr == q->qtdaddr); 1939eb36a88eSGerd Hoffmann 1940f1ae32a1SGerd Hoffmann ehci_execute_complete(q); 1941eb36a88eSGerd Hoffmann if (p->usb_status == USB_RET_ASYNC) { 1942f1ae32a1SGerd Hoffmann goto out; 1943f1ae32a1SGerd Hoffmann } 1944eb36a88eSGerd Hoffmann if (p->usb_status == USB_RET_PROCERR) { 1945f1ae32a1SGerd Hoffmann again = -1; 1946f1ae32a1SGerd Hoffmann goto out; 1947f1ae32a1SGerd Hoffmann } 1948f1ae32a1SGerd Hoffmann 1949f1ae32a1SGerd Hoffmann // 4.10.3 1950f1ae32a1SGerd Hoffmann if (!async) { 1951f1ae32a1SGerd Hoffmann int transactCtr = get_field(q->qh.epcap, QH_EPCAP_MULT); 1952f1ae32a1SGerd Hoffmann transactCtr--; 1953f1ae32a1SGerd Hoffmann set_field(&q->qh.epcap, transactCtr, QH_EPCAP_MULT); 1954f1ae32a1SGerd Hoffmann // 4.10.3, bottom of page 82, should exit this state when transaction 1955f1ae32a1SGerd Hoffmann // counter decrements to 0 1956f1ae32a1SGerd Hoffmann } 1957f1ae32a1SGerd Hoffmann 1958f1ae32a1SGerd Hoffmann /* 4.10.5 */ 1959eb36a88eSGerd Hoffmann if (p->usb_status == USB_RET_NAK) { 1960f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_HORIZONTALQH); 1961f1ae32a1SGerd Hoffmann } else { 1962f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_WRITEBACK); 1963f1ae32a1SGerd Hoffmann } 1964f1ae32a1SGerd Hoffmann 1965f1ae32a1SGerd Hoffmann again = 1; 1966f1ae32a1SGerd Hoffmann 1967f1ae32a1SGerd Hoffmann out: 1968f1ae32a1SGerd Hoffmann ehci_flush_qh(q); 1969f1ae32a1SGerd Hoffmann return again; 1970f1ae32a1SGerd Hoffmann } 1971f1ae32a1SGerd Hoffmann 1972f1ae32a1SGerd Hoffmann 1973f1ae32a1SGerd Hoffmann static int ehci_state_writeback(EHCIQueue *q, int async) 1974f1ae32a1SGerd Hoffmann { 1975eb36a88eSGerd Hoffmann EHCIPacket *p = QTAILQ_FIRST(&q->packets); 1976f1ae32a1SGerd Hoffmann int again = 0; 1977f1ae32a1SGerd Hoffmann 1978f1ae32a1SGerd Hoffmann /* Write back the QTD from the QH area */ 1979eb36a88eSGerd Hoffmann assert(p != NULL); 1980eb36a88eSGerd Hoffmann assert(p->qtdaddr == q->qtdaddr); 1981eb36a88eSGerd Hoffmann 1982eb36a88eSGerd Hoffmann ehci_trace_qtd(q, NLPTR_GET(p->qtdaddr), (EHCIqtd *) &q->qh.next_qtd); 1983eb36a88eSGerd Hoffmann put_dwords(q->ehci, NLPTR_GET(p->qtdaddr), (uint32_t *) &q->qh.next_qtd, 1984f1ae32a1SGerd Hoffmann sizeof(EHCIqtd) >> 2); 1985eb36a88eSGerd Hoffmann ehci_free_packet(p); 1986f1ae32a1SGerd Hoffmann 1987f1ae32a1SGerd Hoffmann /* 1988f1ae32a1SGerd Hoffmann * EHCI specs say go horizontal here. 1989f1ae32a1SGerd Hoffmann * 1990f1ae32a1SGerd Hoffmann * We can also advance the queue here for performance reasons. We 1991f1ae32a1SGerd Hoffmann * need to take care to only take that shortcut in case we've 1992f1ae32a1SGerd Hoffmann * processed the qtd just written back without errors, i.e. halt 1993f1ae32a1SGerd Hoffmann * bit is clear. 1994f1ae32a1SGerd Hoffmann */ 1995f1ae32a1SGerd Hoffmann if (q->qh.token & QTD_TOKEN_HALT) { 1996f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_HORIZONTALQH); 1997f1ae32a1SGerd Hoffmann again = 1; 1998f1ae32a1SGerd Hoffmann } else { 1999f1ae32a1SGerd Hoffmann ehci_set_state(q->ehci, async, EST_ADVANCEQUEUE); 2000f1ae32a1SGerd Hoffmann again = 1; 2001f1ae32a1SGerd Hoffmann } 2002f1ae32a1SGerd Hoffmann return again; 2003f1ae32a1SGerd Hoffmann } 2004f1ae32a1SGerd Hoffmann 2005f1ae32a1SGerd Hoffmann /* 2006f1ae32a1SGerd Hoffmann * This is the state machine that is common to both async and periodic 2007f1ae32a1SGerd Hoffmann */ 2008f1ae32a1SGerd Hoffmann 2009f1ae32a1SGerd Hoffmann static void ehci_advance_state(EHCIState *ehci, 2010f1ae32a1SGerd Hoffmann int async) 2011f1ae32a1SGerd Hoffmann { 2012f1ae32a1SGerd Hoffmann EHCIQueue *q = NULL; 2013f1ae32a1SGerd Hoffmann int again; 2014f1ae32a1SGerd Hoffmann 2015f1ae32a1SGerd Hoffmann do { 2016f1ae32a1SGerd Hoffmann switch(ehci_get_state(ehci, async)) { 2017f1ae32a1SGerd Hoffmann case EST_WAITLISTHEAD: 2018f1ae32a1SGerd Hoffmann again = ehci_state_waitlisthead(ehci, async); 2019f1ae32a1SGerd Hoffmann break; 2020f1ae32a1SGerd Hoffmann 2021f1ae32a1SGerd Hoffmann case EST_FETCHENTRY: 2022f1ae32a1SGerd Hoffmann again = ehci_state_fetchentry(ehci, async); 2023f1ae32a1SGerd Hoffmann break; 2024f1ae32a1SGerd Hoffmann 2025f1ae32a1SGerd Hoffmann case EST_FETCHQH: 2026f1ae32a1SGerd Hoffmann q = ehci_state_fetchqh(ehci, async); 2027f1ae32a1SGerd Hoffmann again = q ? 1 : 0; 2028f1ae32a1SGerd Hoffmann break; 2029f1ae32a1SGerd Hoffmann 2030f1ae32a1SGerd Hoffmann case EST_FETCHITD: 2031f1ae32a1SGerd Hoffmann again = ehci_state_fetchitd(ehci, async); 2032f1ae32a1SGerd Hoffmann break; 2033f1ae32a1SGerd Hoffmann 2034f1ae32a1SGerd Hoffmann case EST_FETCHSITD: 2035f1ae32a1SGerd Hoffmann again = ehci_state_fetchsitd(ehci, async); 2036f1ae32a1SGerd Hoffmann break; 2037f1ae32a1SGerd Hoffmann 2038f1ae32a1SGerd Hoffmann case EST_ADVANCEQUEUE: 2039f1ae32a1SGerd Hoffmann again = ehci_state_advqueue(q, async); 2040f1ae32a1SGerd Hoffmann break; 2041f1ae32a1SGerd Hoffmann 2042f1ae32a1SGerd Hoffmann case EST_FETCHQTD: 2043f1ae32a1SGerd Hoffmann again = ehci_state_fetchqtd(q, async); 2044f1ae32a1SGerd Hoffmann break; 2045f1ae32a1SGerd Hoffmann 2046f1ae32a1SGerd Hoffmann case EST_HORIZONTALQH: 2047f1ae32a1SGerd Hoffmann again = ehci_state_horizqh(q, async); 2048f1ae32a1SGerd Hoffmann break; 2049f1ae32a1SGerd Hoffmann 2050f1ae32a1SGerd Hoffmann case EST_EXECUTE: 2051f1ae32a1SGerd Hoffmann again = ehci_state_execute(q, async); 2052f1ae32a1SGerd Hoffmann break; 2053f1ae32a1SGerd Hoffmann 2054f1ae32a1SGerd Hoffmann case EST_EXECUTING: 2055f1ae32a1SGerd Hoffmann assert(q != NULL); 2056f1ae32a1SGerd Hoffmann again = ehci_state_executing(q, async); 2057f1ae32a1SGerd Hoffmann break; 2058f1ae32a1SGerd Hoffmann 2059f1ae32a1SGerd Hoffmann case EST_WRITEBACK: 2060f1ae32a1SGerd Hoffmann assert(q != NULL); 2061f1ae32a1SGerd Hoffmann again = ehci_state_writeback(q, async); 2062f1ae32a1SGerd Hoffmann break; 2063f1ae32a1SGerd Hoffmann 2064f1ae32a1SGerd Hoffmann default: 2065f1ae32a1SGerd Hoffmann fprintf(stderr, "Bad state!\n"); 2066f1ae32a1SGerd Hoffmann again = -1; 2067f1ae32a1SGerd Hoffmann assert(0); 2068f1ae32a1SGerd Hoffmann break; 2069f1ae32a1SGerd Hoffmann } 2070f1ae32a1SGerd Hoffmann 2071f1ae32a1SGerd Hoffmann if (again < 0) { 2072f1ae32a1SGerd Hoffmann fprintf(stderr, "processing error - resetting ehci HC\n"); 2073f1ae32a1SGerd Hoffmann ehci_reset(ehci); 2074f1ae32a1SGerd Hoffmann again = 0; 2075f1ae32a1SGerd Hoffmann } 2076f1ae32a1SGerd Hoffmann } 2077f1ae32a1SGerd Hoffmann while (again); 2078f1ae32a1SGerd Hoffmann 2079f1ae32a1SGerd Hoffmann ehci_commit_interrupt(ehci); 2080f1ae32a1SGerd Hoffmann } 2081f1ae32a1SGerd Hoffmann 2082f1ae32a1SGerd Hoffmann static void ehci_advance_async_state(EHCIState *ehci) 2083f1ae32a1SGerd Hoffmann { 2084f1ae32a1SGerd Hoffmann const int async = 1; 2085f1ae32a1SGerd Hoffmann 2086f1ae32a1SGerd Hoffmann switch(ehci_get_state(ehci, async)) { 2087f1ae32a1SGerd Hoffmann case EST_INACTIVE: 2088f1ae32a1SGerd Hoffmann if (!(ehci->usbcmd & USBCMD_ASE)) { 2089f1ae32a1SGerd Hoffmann break; 2090f1ae32a1SGerd Hoffmann } 2091f1ae32a1SGerd Hoffmann ehci_set_usbsts(ehci, USBSTS_ASS); 2092f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 2093f1ae32a1SGerd Hoffmann // No break, fall through to ACTIVE 2094f1ae32a1SGerd Hoffmann 2095f1ae32a1SGerd Hoffmann case EST_ACTIVE: 2096f1ae32a1SGerd Hoffmann if ( !(ehci->usbcmd & USBCMD_ASE)) { 2097f1ae32a1SGerd Hoffmann ehci_queues_rip_all(ehci, async); 2098f1ae32a1SGerd Hoffmann ehci_clear_usbsts(ehci, USBSTS_ASS); 2099f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_INACTIVE); 2100f1ae32a1SGerd Hoffmann break; 2101f1ae32a1SGerd Hoffmann } 2102f1ae32a1SGerd Hoffmann 2103f1ae32a1SGerd Hoffmann /* make sure guest has acknowledged the doorbell interrupt */ 2104f1ae32a1SGerd Hoffmann /* TO-DO: is this really needed? */ 2105f1ae32a1SGerd Hoffmann if (ehci->usbsts & USBSTS_IAA) { 2106f1ae32a1SGerd Hoffmann DPRINTF("IAA status bit still set.\n"); 2107f1ae32a1SGerd Hoffmann break; 2108f1ae32a1SGerd Hoffmann } 2109f1ae32a1SGerd Hoffmann 2110f1ae32a1SGerd Hoffmann /* check that address register has been set */ 2111f1ae32a1SGerd Hoffmann if (ehci->asynclistaddr == 0) { 2112f1ae32a1SGerd Hoffmann break; 2113f1ae32a1SGerd Hoffmann } 2114f1ae32a1SGerd Hoffmann 2115f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_WAITLISTHEAD); 2116f1ae32a1SGerd Hoffmann ehci_advance_state(ehci, async); 2117f1ae32a1SGerd Hoffmann 2118f1ae32a1SGerd Hoffmann /* If the doorbell is set, the guest wants to make a change to the 2119f1ae32a1SGerd Hoffmann * schedule. The host controller needs to release cached data. 2120f1ae32a1SGerd Hoffmann * (section 4.8.2) 2121f1ae32a1SGerd Hoffmann */ 2122f1ae32a1SGerd Hoffmann if (ehci->usbcmd & USBCMD_IAAD) { 2123f1ae32a1SGerd Hoffmann /* Remove all unseen qhs from the async qhs queue */ 2124f1ae32a1SGerd Hoffmann ehci_queues_rip_unused(ehci, async, 1); 2125f1ae32a1SGerd Hoffmann DPRINTF("ASYNC: doorbell request acknowledged\n"); 2126f1ae32a1SGerd Hoffmann ehci->usbcmd &= ~USBCMD_IAAD; 2127f1ae32a1SGerd Hoffmann ehci_set_interrupt(ehci, USBSTS_IAA); 2128f1ae32a1SGerd Hoffmann } 2129f1ae32a1SGerd Hoffmann break; 2130f1ae32a1SGerd Hoffmann 2131f1ae32a1SGerd Hoffmann default: 2132f1ae32a1SGerd Hoffmann /* this should only be due to a developer mistake */ 2133f1ae32a1SGerd Hoffmann fprintf(stderr, "ehci: Bad asynchronous state %d. " 2134f1ae32a1SGerd Hoffmann "Resetting to active\n", ehci->astate); 2135f1ae32a1SGerd Hoffmann assert(0); 2136f1ae32a1SGerd Hoffmann } 2137f1ae32a1SGerd Hoffmann } 2138f1ae32a1SGerd Hoffmann 2139f1ae32a1SGerd Hoffmann static void ehci_advance_periodic_state(EHCIState *ehci) 2140f1ae32a1SGerd Hoffmann { 2141f1ae32a1SGerd Hoffmann uint32_t entry; 2142f1ae32a1SGerd Hoffmann uint32_t list; 2143f1ae32a1SGerd Hoffmann const int async = 0; 2144f1ae32a1SGerd Hoffmann 2145f1ae32a1SGerd Hoffmann // 4.6 2146f1ae32a1SGerd Hoffmann 2147f1ae32a1SGerd Hoffmann switch(ehci_get_state(ehci, async)) { 2148f1ae32a1SGerd Hoffmann case EST_INACTIVE: 2149f1ae32a1SGerd Hoffmann if ( !(ehci->frindex & 7) && (ehci->usbcmd & USBCMD_PSE)) { 2150f1ae32a1SGerd Hoffmann ehci_set_usbsts(ehci, USBSTS_PSS); 2151f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_ACTIVE); 2152f1ae32a1SGerd Hoffmann // No break, fall through to ACTIVE 2153f1ae32a1SGerd Hoffmann } else 2154f1ae32a1SGerd Hoffmann break; 2155f1ae32a1SGerd Hoffmann 2156f1ae32a1SGerd Hoffmann case EST_ACTIVE: 2157f1ae32a1SGerd Hoffmann if ( !(ehci->frindex & 7) && !(ehci->usbcmd & USBCMD_PSE)) { 2158f1ae32a1SGerd Hoffmann ehci_queues_rip_all(ehci, async); 2159f1ae32a1SGerd Hoffmann ehci_clear_usbsts(ehci, USBSTS_PSS); 2160f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_INACTIVE); 2161f1ae32a1SGerd Hoffmann break; 2162f1ae32a1SGerd Hoffmann } 2163f1ae32a1SGerd Hoffmann 2164f1ae32a1SGerd Hoffmann list = ehci->periodiclistbase & 0xfffff000; 2165f1ae32a1SGerd Hoffmann /* check that register has been set */ 2166f1ae32a1SGerd Hoffmann if (list == 0) { 2167f1ae32a1SGerd Hoffmann break; 2168f1ae32a1SGerd Hoffmann } 2169f1ae32a1SGerd Hoffmann list |= ((ehci->frindex & 0x1ff8) >> 1); 2170f1ae32a1SGerd Hoffmann 2171f1ae32a1SGerd Hoffmann pci_dma_read(&ehci->dev, list, &entry, sizeof entry); 2172f1ae32a1SGerd Hoffmann entry = le32_to_cpu(entry); 2173f1ae32a1SGerd Hoffmann 2174f1ae32a1SGerd Hoffmann DPRINTF("PERIODIC state adv fr=%d. [%08X] -> %08X\n", 2175f1ae32a1SGerd Hoffmann ehci->frindex / 8, list, entry); 2176f1ae32a1SGerd Hoffmann ehci_set_fetch_addr(ehci, async,entry); 2177f1ae32a1SGerd Hoffmann ehci_set_state(ehci, async, EST_FETCHENTRY); 2178f1ae32a1SGerd Hoffmann ehci_advance_state(ehci, async); 2179f1ae32a1SGerd Hoffmann ehci_queues_rip_unused(ehci, async, 0); 2180f1ae32a1SGerd Hoffmann break; 2181f1ae32a1SGerd Hoffmann 2182f1ae32a1SGerd Hoffmann default: 2183f1ae32a1SGerd Hoffmann /* this should only be due to a developer mistake */ 2184f1ae32a1SGerd Hoffmann fprintf(stderr, "ehci: Bad periodic state %d. " 2185f1ae32a1SGerd Hoffmann "Resetting to active\n", ehci->pstate); 2186f1ae32a1SGerd Hoffmann assert(0); 2187f1ae32a1SGerd Hoffmann } 2188f1ae32a1SGerd Hoffmann } 2189f1ae32a1SGerd Hoffmann 2190f1ae32a1SGerd Hoffmann static void ehci_frame_timer(void *opaque) 2191f1ae32a1SGerd Hoffmann { 2192f1ae32a1SGerd Hoffmann EHCIState *ehci = opaque; 2193f1ae32a1SGerd Hoffmann int64_t expire_time, t_now; 2194f1ae32a1SGerd Hoffmann uint64_t ns_elapsed; 2195f1ae32a1SGerd Hoffmann int frames; 2196f1ae32a1SGerd Hoffmann int i; 2197f1ae32a1SGerd Hoffmann int skipped_frames = 0; 2198f1ae32a1SGerd Hoffmann 2199f1ae32a1SGerd Hoffmann t_now = qemu_get_clock_ns(vm_clock); 2200f1ae32a1SGerd Hoffmann expire_time = t_now + (get_ticks_per_sec() / ehci->freq); 2201f1ae32a1SGerd Hoffmann 2202f1ae32a1SGerd Hoffmann ns_elapsed = t_now - ehci->last_run_ns; 2203f1ae32a1SGerd Hoffmann frames = ns_elapsed / FRAME_TIMER_NS; 2204f1ae32a1SGerd Hoffmann 2205f1ae32a1SGerd Hoffmann for (i = 0; i < frames; i++) { 2206f1ae32a1SGerd Hoffmann if ( !(ehci->usbsts & USBSTS_HALT)) { 2207f1ae32a1SGerd Hoffmann ehci->frindex += 8; 2208f1ae32a1SGerd Hoffmann 220958ea88d8SHans de Goede if (ehci->frindex == 0x00002000) { 2210f1ae32a1SGerd Hoffmann ehci_set_interrupt(ehci, USBSTS_FLR); 2211f1ae32a1SGerd Hoffmann } 2212f1ae32a1SGerd Hoffmann 221358ea88d8SHans de Goede if (ehci->frindex == 0x00004000) { 221458ea88d8SHans de Goede ehci_set_interrupt(ehci, USBSTS_FLR); 221558ea88d8SHans de Goede ehci->frindex = 0; 221658ea88d8SHans de Goede } 2217f1ae32a1SGerd Hoffmann } 2218f1ae32a1SGerd Hoffmann 2219f1ae32a1SGerd Hoffmann if (frames - i > ehci->maxframes) { 2220f1ae32a1SGerd Hoffmann skipped_frames++; 2221f1ae32a1SGerd Hoffmann } else { 2222f1ae32a1SGerd Hoffmann ehci_advance_periodic_state(ehci); 2223f1ae32a1SGerd Hoffmann } 2224f1ae32a1SGerd Hoffmann 2225f1ae32a1SGerd Hoffmann ehci->last_run_ns += FRAME_TIMER_NS; 2226f1ae32a1SGerd Hoffmann } 2227f1ae32a1SGerd Hoffmann 2228f1ae32a1SGerd Hoffmann #if 0 2229f1ae32a1SGerd Hoffmann if (skipped_frames) { 2230f1ae32a1SGerd Hoffmann DPRINTF("WARNING - EHCI skipped %d frames\n", skipped_frames); 2231f1ae32a1SGerd Hoffmann } 2232f1ae32a1SGerd Hoffmann #endif 2233f1ae32a1SGerd Hoffmann 2234f1ae32a1SGerd Hoffmann /* Async is not inside loop since it executes everything it can once 2235f1ae32a1SGerd Hoffmann * called 2236f1ae32a1SGerd Hoffmann */ 2237f1ae32a1SGerd Hoffmann ehci_advance_async_state(ehci); 2238f1ae32a1SGerd Hoffmann 2239f1ae32a1SGerd Hoffmann qemu_mod_timer(ehci->frame_timer, expire_time); 2240f1ae32a1SGerd Hoffmann } 2241f1ae32a1SGerd Hoffmann 2242f1ae32a1SGerd Hoffmann 2243f1ae32a1SGerd Hoffmann static const MemoryRegionOps ehci_mem_ops = { 2244f1ae32a1SGerd Hoffmann .old_mmio = { 2245f1ae32a1SGerd Hoffmann .read = { ehci_mem_readb, ehci_mem_readw, ehci_mem_readl }, 2246f1ae32a1SGerd Hoffmann .write = { ehci_mem_writeb, ehci_mem_writew, ehci_mem_writel }, 2247f1ae32a1SGerd Hoffmann }, 2248f1ae32a1SGerd Hoffmann .endianness = DEVICE_LITTLE_ENDIAN, 2249f1ae32a1SGerd Hoffmann }; 2250f1ae32a1SGerd Hoffmann 2251f1ae32a1SGerd Hoffmann static int usb_ehci_initfn(PCIDevice *dev); 2252f1ae32a1SGerd Hoffmann 2253f1ae32a1SGerd Hoffmann static USBPortOps ehci_port_ops = { 2254f1ae32a1SGerd Hoffmann .attach = ehci_attach, 2255f1ae32a1SGerd Hoffmann .detach = ehci_detach, 2256f1ae32a1SGerd Hoffmann .child_detach = ehci_child_detach, 2257f1ae32a1SGerd Hoffmann .wakeup = ehci_wakeup, 2258f1ae32a1SGerd Hoffmann .complete = ehci_async_complete_packet, 2259f1ae32a1SGerd Hoffmann }; 2260f1ae32a1SGerd Hoffmann 2261f1ae32a1SGerd Hoffmann static USBBusOps ehci_bus_ops = { 2262f1ae32a1SGerd Hoffmann .register_companion = ehci_register_companion, 2263f1ae32a1SGerd Hoffmann }; 2264f1ae32a1SGerd Hoffmann 2265f1ae32a1SGerd Hoffmann static const VMStateDescription vmstate_ehci = { 2266f1ae32a1SGerd Hoffmann .name = "ehci", 2267f1ae32a1SGerd Hoffmann .unmigratable = 1, 2268f1ae32a1SGerd Hoffmann }; 2269f1ae32a1SGerd Hoffmann 2270f1ae32a1SGerd Hoffmann static Property ehci_properties[] = { 2271f1ae32a1SGerd Hoffmann DEFINE_PROP_UINT32("freq", EHCIState, freq, FRAME_TIMER_FREQ), 2272f1ae32a1SGerd Hoffmann DEFINE_PROP_UINT32("maxframes", EHCIState, maxframes, 128), 2273f1ae32a1SGerd Hoffmann DEFINE_PROP_END_OF_LIST(), 2274f1ae32a1SGerd Hoffmann }; 2275f1ae32a1SGerd Hoffmann 2276f1ae32a1SGerd Hoffmann static void ehci_class_init(ObjectClass *klass, void *data) 2277f1ae32a1SGerd Hoffmann { 2278f1ae32a1SGerd Hoffmann DeviceClass *dc = DEVICE_CLASS(klass); 2279f1ae32a1SGerd Hoffmann PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2280f1ae32a1SGerd Hoffmann 2281f1ae32a1SGerd Hoffmann k->init = usb_ehci_initfn; 2282f1ae32a1SGerd Hoffmann k->vendor_id = PCI_VENDOR_ID_INTEL; 2283f1ae32a1SGerd Hoffmann k->device_id = PCI_DEVICE_ID_INTEL_82801D; /* ich4 */ 2284f1ae32a1SGerd Hoffmann k->revision = 0x10; 2285f1ae32a1SGerd Hoffmann k->class_id = PCI_CLASS_SERIAL_USB; 2286f1ae32a1SGerd Hoffmann dc->vmsd = &vmstate_ehci; 2287f1ae32a1SGerd Hoffmann dc->props = ehci_properties; 2288f1ae32a1SGerd Hoffmann } 2289f1ae32a1SGerd Hoffmann 2290f1ae32a1SGerd Hoffmann static TypeInfo ehci_info = { 2291f1ae32a1SGerd Hoffmann .name = "usb-ehci", 2292f1ae32a1SGerd Hoffmann .parent = TYPE_PCI_DEVICE, 2293f1ae32a1SGerd Hoffmann .instance_size = sizeof(EHCIState), 2294f1ae32a1SGerd Hoffmann .class_init = ehci_class_init, 2295f1ae32a1SGerd Hoffmann }; 2296f1ae32a1SGerd Hoffmann 2297f1ae32a1SGerd Hoffmann static void ich9_ehci_class_init(ObjectClass *klass, void *data) 2298f1ae32a1SGerd Hoffmann { 2299f1ae32a1SGerd Hoffmann DeviceClass *dc = DEVICE_CLASS(klass); 2300f1ae32a1SGerd Hoffmann PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2301f1ae32a1SGerd Hoffmann 2302f1ae32a1SGerd Hoffmann k->init = usb_ehci_initfn; 2303f1ae32a1SGerd Hoffmann k->vendor_id = PCI_VENDOR_ID_INTEL; 2304f1ae32a1SGerd Hoffmann k->device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1; 2305f1ae32a1SGerd Hoffmann k->revision = 0x03; 2306f1ae32a1SGerd Hoffmann k->class_id = PCI_CLASS_SERIAL_USB; 2307f1ae32a1SGerd Hoffmann dc->vmsd = &vmstate_ehci; 2308f1ae32a1SGerd Hoffmann dc->props = ehci_properties; 2309f1ae32a1SGerd Hoffmann } 2310f1ae32a1SGerd Hoffmann 2311f1ae32a1SGerd Hoffmann static TypeInfo ich9_ehci_info = { 2312f1ae32a1SGerd Hoffmann .name = "ich9-usb-ehci1", 2313f1ae32a1SGerd Hoffmann .parent = TYPE_PCI_DEVICE, 2314f1ae32a1SGerd Hoffmann .instance_size = sizeof(EHCIState), 2315f1ae32a1SGerd Hoffmann .class_init = ich9_ehci_class_init, 2316f1ae32a1SGerd Hoffmann }; 2317f1ae32a1SGerd Hoffmann 2318f1ae32a1SGerd Hoffmann static int usb_ehci_initfn(PCIDevice *dev) 2319f1ae32a1SGerd Hoffmann { 2320f1ae32a1SGerd Hoffmann EHCIState *s = DO_UPCAST(EHCIState, dev, dev); 2321f1ae32a1SGerd Hoffmann uint8_t *pci_conf = s->dev.config; 2322f1ae32a1SGerd Hoffmann int i; 2323f1ae32a1SGerd Hoffmann 2324f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20); 2325f1ae32a1SGerd Hoffmann 2326f1ae32a1SGerd Hoffmann /* capabilities pointer */ 2327f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00); 2328f1ae32a1SGerd Hoffmann //pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); 2329f1ae32a1SGerd Hoffmann 2330f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */ 2331f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[PCI_MIN_GNT], 0); 2332f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[PCI_MAX_LAT], 0); 2333f1ae32a1SGerd Hoffmann 2334f1ae32a1SGerd Hoffmann // pci_conf[0x50] = 0x01; // power management caps 2335f1ae32a1SGerd Hoffmann 2336f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); // release number (2.1.4) 2337f1ae32a1SGerd Hoffmann pci_set_byte(&pci_conf[0x61], 0x20); // frame length adjustment (2.1.5) 2338f1ae32a1SGerd Hoffmann pci_set_word(&pci_conf[0x62], 0x00); // port wake up capability (2.1.6) 2339f1ae32a1SGerd Hoffmann 2340f1ae32a1SGerd Hoffmann pci_conf[0x64] = 0x00; 2341f1ae32a1SGerd Hoffmann pci_conf[0x65] = 0x00; 2342f1ae32a1SGerd Hoffmann pci_conf[0x66] = 0x00; 2343f1ae32a1SGerd Hoffmann pci_conf[0x67] = 0x00; 2344f1ae32a1SGerd Hoffmann pci_conf[0x68] = 0x01; 2345f1ae32a1SGerd Hoffmann pci_conf[0x69] = 0x00; 2346f1ae32a1SGerd Hoffmann pci_conf[0x6a] = 0x00; 2347f1ae32a1SGerd Hoffmann pci_conf[0x6b] = 0x00; // USBLEGSUP 2348f1ae32a1SGerd Hoffmann pci_conf[0x6c] = 0x00; 2349f1ae32a1SGerd Hoffmann pci_conf[0x6d] = 0x00; 2350f1ae32a1SGerd Hoffmann pci_conf[0x6e] = 0x00; 2351f1ae32a1SGerd Hoffmann pci_conf[0x6f] = 0xc0; // USBLEFCTLSTS 2352f1ae32a1SGerd Hoffmann 2353f1ae32a1SGerd Hoffmann // 2.2 host controller interface version 2354f1ae32a1SGerd Hoffmann s->mmio[0x00] = (uint8_t) OPREGBASE; 2355f1ae32a1SGerd Hoffmann s->mmio[0x01] = 0x00; 2356f1ae32a1SGerd Hoffmann s->mmio[0x02] = 0x00; 2357f1ae32a1SGerd Hoffmann s->mmio[0x03] = 0x01; // HC version 2358f1ae32a1SGerd Hoffmann s->mmio[0x04] = NB_PORTS; // Number of downstream ports 2359f1ae32a1SGerd Hoffmann s->mmio[0x05] = 0x00; // No companion ports at present 2360f1ae32a1SGerd Hoffmann s->mmio[0x06] = 0x00; 2361f1ae32a1SGerd Hoffmann s->mmio[0x07] = 0x00; 2362f1ae32a1SGerd Hoffmann s->mmio[0x08] = 0x80; // We can cache whole frame, not 64-bit capable 2363f1ae32a1SGerd Hoffmann s->mmio[0x09] = 0x68; // EECP 2364f1ae32a1SGerd Hoffmann s->mmio[0x0a] = 0x00; 2365f1ae32a1SGerd Hoffmann s->mmio[0x0b] = 0x00; 2366f1ae32a1SGerd Hoffmann 2367f1ae32a1SGerd Hoffmann s->irq = s->dev.irq[3]; 2368f1ae32a1SGerd Hoffmann 2369f1ae32a1SGerd Hoffmann usb_bus_new(&s->bus, &ehci_bus_ops, &s->dev.qdev); 2370f1ae32a1SGerd Hoffmann for(i = 0; i < NB_PORTS; i++) { 2371f1ae32a1SGerd Hoffmann usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops, 2372f1ae32a1SGerd Hoffmann USB_SPEED_MASK_HIGH); 2373f1ae32a1SGerd Hoffmann s->ports[i].dev = 0; 2374f1ae32a1SGerd Hoffmann } 2375f1ae32a1SGerd Hoffmann 2376f1ae32a1SGerd Hoffmann s->frame_timer = qemu_new_timer_ns(vm_clock, ehci_frame_timer, s); 2377f1ae32a1SGerd Hoffmann QTAILQ_INIT(&s->aqueues); 2378f1ae32a1SGerd Hoffmann QTAILQ_INIT(&s->pqueues); 2379f1ae32a1SGerd Hoffmann 2380f1ae32a1SGerd Hoffmann qemu_register_reset(ehci_reset, s); 2381f1ae32a1SGerd Hoffmann 2382f1ae32a1SGerd Hoffmann memory_region_init_io(&s->mem, &ehci_mem_ops, s, "ehci", MMIO_SIZE); 2383f1ae32a1SGerd Hoffmann pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem); 2384f1ae32a1SGerd Hoffmann 2385f1ae32a1SGerd Hoffmann return 0; 2386f1ae32a1SGerd Hoffmann } 2387f1ae32a1SGerd Hoffmann 2388f1ae32a1SGerd Hoffmann static void ehci_register_types(void) 2389f1ae32a1SGerd Hoffmann { 2390f1ae32a1SGerd Hoffmann type_register_static(&ehci_info); 2391f1ae32a1SGerd Hoffmann type_register_static(&ich9_ehci_info); 2392f1ae32a1SGerd Hoffmann } 2393f1ae32a1SGerd Hoffmann 2394f1ae32a1SGerd Hoffmann type_init(ehci_register_types) 2395f1ae32a1SGerd Hoffmann 2396f1ae32a1SGerd Hoffmann /* 2397f1ae32a1SGerd Hoffmann * vim: expandtab ts=4 2398f1ae32a1SGerd Hoffmann */ 2399