1 /* 2 * QEMU USB EHCI Emulation 3 * 4 * This library is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU Lesser General Public 6 * License as published by the Free Software Foundation; either 7 * version 2 of the License, or(at your option) any later version. 8 * 9 * This library is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * Lesser General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "hw/usb/hcd-ehci.h" 19 #include "hw/pci.h" 20 21 typedef struct EHCIPCIState { 22 PCIDevice pcidev; 23 EHCIState ehci; 24 } EHCIPCIState; 25 26 typedef struct EHCIPCIInfo { 27 const char *name; 28 uint16_t vendor_id; 29 uint16_t device_id; 30 uint8_t revision; 31 } EHCIPCIInfo; 32 33 static int usb_ehci_pci_initfn(PCIDevice *dev) 34 { 35 EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev); 36 EHCIState *s = &i->ehci; 37 uint8_t *pci_conf = dev->config; 38 39 pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20); 40 41 /* capabilities pointer */ 42 pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00); 43 /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */ 44 45 pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */ 46 pci_set_byte(&pci_conf[PCI_MIN_GNT], 0); 47 pci_set_byte(&pci_conf[PCI_MAX_LAT], 0); 48 49 /* pci_conf[0x50] = 0x01; *//* power management caps */ 50 51 pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */ 52 pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */ 53 pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */ 54 55 pci_conf[0x64] = 0x00; 56 pci_conf[0x65] = 0x00; 57 pci_conf[0x66] = 0x00; 58 pci_conf[0x67] = 0x00; 59 pci_conf[0x68] = 0x01; 60 pci_conf[0x69] = 0x00; 61 pci_conf[0x6a] = 0x00; 62 pci_conf[0x6b] = 0x00; /* USBLEGSUP */ 63 pci_conf[0x6c] = 0x00; 64 pci_conf[0x6d] = 0x00; 65 pci_conf[0x6e] = 0x00; 66 pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */ 67 68 s->caps[0x09] = 0x68; /* EECP */ 69 70 s->irq = dev->irq[3]; 71 s->dma = pci_dma_context(dev); 72 73 s->capsbase = 0x00; 74 s->opregbase = 0x20; 75 76 usb_ehci_initfn(s, DEVICE(dev)); 77 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem); 78 79 return 0; 80 } 81 82 static Property ehci_pci_properties[] = { 83 DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128), 84 DEFINE_PROP_END_OF_LIST(), 85 }; 86 87 static const VMStateDescription vmstate_ehci_pci = { 88 .name = "ehci", 89 .version_id = 2, 90 .minimum_version_id = 1, 91 .fields = (VMStateField[]) { 92 VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState), 93 VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState), 94 } 95 }; 96 97 static void ehci_class_init(ObjectClass *klass, void *data) 98 { 99 DeviceClass *dc = DEVICE_CLASS(klass); 100 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 101 EHCIPCIInfo *i = data; 102 103 k->init = usb_ehci_pci_initfn; 104 k->vendor_id = i->vendor_id; 105 k->device_id = i->device_id; 106 k->revision = i->revision; 107 k->class_id = PCI_CLASS_SERIAL_USB; 108 dc->vmsd = &vmstate_ehci; 109 dc->props = ehci_pci_properties; 110 } 111 112 static struct EHCIPCIInfo ehci_pci_info[] = { 113 { 114 .name = "usb-ehci", 115 .vendor_id = PCI_VENDOR_ID_INTEL, 116 .device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */ 117 .revision = 0x10, 118 },{ 119 .name = "ich9-usb-ehci1", /* 00:1d.7 */ 120 .vendor_id = PCI_VENDOR_ID_INTEL, 121 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1, 122 .revision = 0x03, 123 },{ 124 .name = "ich9-usb-ehci2", /* 00:1a.7 */ 125 .vendor_id = PCI_VENDOR_ID_INTEL, 126 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2, 127 .revision = 0x03, 128 } 129 }; 130 131 static void ehci_pci_register_types(void) 132 { 133 TypeInfo ehci_type_info = { 134 .parent = TYPE_PCI_DEVICE, 135 .instance_size = sizeof(EHCIPCIState), 136 .class_init = ehci_class_init, 137 }; 138 int i; 139 140 for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) { 141 ehci_type_info.name = ehci_pci_info[i].name; 142 ehci_type_info.class_data = ehci_pci_info + i; 143 type_register(&ehci_type_info); 144 } 145 } 146 147 type_init(ehci_pci_register_types) 148 149 struct ehci_companions { 150 const char *name; 151 int func; 152 int port; 153 }; 154 155 static const struct ehci_companions ich9_1d[] = { 156 { .name = "ich9-usb-uhci1", .func = 0, .port = 0 }, 157 { .name = "ich9-usb-uhci2", .func = 1, .port = 2 }, 158 { .name = "ich9-usb-uhci3", .func = 2, .port = 4 }, 159 }; 160 161 static const struct ehci_companions ich9_1a[] = { 162 { .name = "ich9-usb-uhci4", .func = 0, .port = 0 }, 163 { .name = "ich9-usb-uhci5", .func = 1, .port = 2 }, 164 { .name = "ich9-usb-uhci6", .func = 2, .port = 4 }, 165 }; 166 167 int ehci_create_ich9_with_companions(PCIBus *bus, int slot) 168 { 169 const struct ehci_companions *comp; 170 PCIDevice *ehci, *uhci; 171 BusState *usbbus; 172 const char *name; 173 int i; 174 175 switch (slot) { 176 case 0x1d: 177 name = "ich9-usb-ehci1"; 178 comp = ich9_1d; 179 break; 180 case 0x1a: 181 name = "ich9-usb-ehci2"; 182 comp = ich9_1a; 183 break; 184 default: 185 return -1; 186 } 187 188 ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name); 189 qdev_init_nofail(&ehci->qdev); 190 usbbus = QLIST_FIRST(&ehci->qdev.child_bus); 191 192 for (i = 0; i < 3; i++) { 193 uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func), 194 true, comp[i].name); 195 qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name); 196 qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port); 197 qdev_init_nofail(&uhci->qdev); 198 } 199 return 0; 200 } 201