1 /* 2 * QEMU USB EHCI Emulation 3 * 4 * This library is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU Lesser General Public 6 * License as published by the Free Software Foundation; either 7 * version 2.1 of the License, or (at your option) any later version. 8 * 9 * This library is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * Lesser General Public License for more details. 13 * 14 * You should have received a copy of the GNU Lesser General Public License 15 * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "hw/usb/hcd-ehci.h" 20 #include "migration/vmstate.h" 21 #include "qemu/module.h" 22 #include "qemu/range.h" 23 24 typedef struct EHCIPCIInfo { 25 const char *name; 26 uint16_t vendor_id; 27 uint16_t device_id; 28 uint8_t revision; 29 bool companion; 30 } EHCIPCIInfo; 31 32 static void usb_ehci_pci_realize(PCIDevice *dev, Error **errp) 33 { 34 EHCIPCIState *i = PCI_EHCI(dev); 35 EHCIState *s = &i->ehci; 36 uint8_t *pci_conf = dev->config; 37 38 pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20); 39 40 /* capabilities pointer */ 41 pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00); 42 /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */ 43 44 pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */ 45 pci_set_byte(&pci_conf[PCI_MIN_GNT], 0); 46 pci_set_byte(&pci_conf[PCI_MAX_LAT], 0); 47 48 /* pci_conf[0x50] = 0x01; *//* power management caps */ 49 50 pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */ 51 pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */ 52 pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */ 53 54 pci_conf[0x64] = 0x00; 55 pci_conf[0x65] = 0x00; 56 pci_conf[0x66] = 0x00; 57 pci_conf[0x67] = 0x00; 58 pci_conf[0x68] = 0x01; 59 pci_conf[0x69] = 0x00; 60 pci_conf[0x6a] = 0x00; 61 pci_conf[0x6b] = 0x00; /* USBLEGSUP */ 62 pci_conf[0x6c] = 0x00; 63 pci_conf[0x6d] = 0x00; 64 pci_conf[0x6e] = 0x00; 65 pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */ 66 67 s->irq = pci_allocate_irq(dev); 68 s->as = pci_get_address_space(dev); 69 70 usb_ehci_realize(s, DEVICE(dev), NULL); 71 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem); 72 } 73 74 static void usb_ehci_pci_init(Object *obj) 75 { 76 DeviceClass *dc = OBJECT_GET_CLASS(DeviceClass, obj, TYPE_DEVICE); 77 EHCIPCIState *i = PCI_EHCI(obj); 78 EHCIState *s = &i->ehci; 79 80 s->caps[0x09] = 0x68; /* EECP */ 81 82 s->capsbase = 0x00; 83 s->opregbase = 0x20; 84 s->portscbase = 0x44; 85 s->portnr = NB_PORTS; 86 87 if (!dc->hotpluggable) { 88 s->companion_enable = true; 89 } 90 91 usb_ehci_init(s, DEVICE(obj)); 92 } 93 94 static void usb_ehci_pci_finalize(Object *obj) 95 { 96 EHCIPCIState *i = PCI_EHCI(obj); 97 EHCIState *s = &i->ehci; 98 99 usb_ehci_finalize(s); 100 } 101 102 static void usb_ehci_pci_exit(PCIDevice *dev) 103 { 104 EHCIPCIState *i = PCI_EHCI(dev); 105 EHCIState *s = &i->ehci; 106 107 usb_ehci_unrealize(s, DEVICE(dev), NULL); 108 109 g_free(s->irq); 110 s->irq = NULL; 111 } 112 113 static void usb_ehci_pci_reset(DeviceState *dev) 114 { 115 PCIDevice *pci_dev = PCI_DEVICE(dev); 116 EHCIPCIState *i = PCI_EHCI(pci_dev); 117 EHCIState *s = &i->ehci; 118 119 ehci_reset(s); 120 } 121 122 static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr, 123 uint32_t val, int l) 124 { 125 EHCIPCIState *i = PCI_EHCI(dev); 126 bool busmaster; 127 128 pci_default_write_config(dev, addr, val, l); 129 130 if (!range_covers_byte(addr, l, PCI_COMMAND)) { 131 return; 132 } 133 busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER; 134 i->ehci.as = busmaster ? pci_get_address_space(dev) : &address_space_memory; 135 } 136 137 static Property ehci_pci_properties[] = { 138 DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128), 139 DEFINE_PROP_END_OF_LIST(), 140 }; 141 142 static const VMStateDescription vmstate_ehci_pci = { 143 .name = "ehci", 144 .version_id = 2, 145 .minimum_version_id = 1, 146 .fields = (VMStateField[]) { 147 VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState), 148 VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState), 149 VMSTATE_END_OF_LIST() 150 } 151 }; 152 153 static void ehci_class_init(ObjectClass *klass, void *data) 154 { 155 DeviceClass *dc = DEVICE_CLASS(klass); 156 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 157 158 k->realize = usb_ehci_pci_realize; 159 k->exit = usb_ehci_pci_exit; 160 k->class_id = PCI_CLASS_SERIAL_USB; 161 k->config_write = usb_ehci_pci_write_config; 162 dc->vmsd = &vmstate_ehci_pci; 163 dc->props = ehci_pci_properties; 164 dc->reset = usb_ehci_pci_reset; 165 } 166 167 static const TypeInfo ehci_pci_type_info = { 168 .name = TYPE_PCI_EHCI, 169 .parent = TYPE_PCI_DEVICE, 170 .instance_size = sizeof(EHCIPCIState), 171 .instance_init = usb_ehci_pci_init, 172 .instance_finalize = usb_ehci_pci_finalize, 173 .abstract = true, 174 .class_init = ehci_class_init, 175 .interfaces = (InterfaceInfo[]) { 176 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 177 { }, 178 }, 179 }; 180 181 static void ehci_data_class_init(ObjectClass *klass, void *data) 182 { 183 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 184 DeviceClass *dc = DEVICE_CLASS(klass); 185 EHCIPCIInfo *i = data; 186 187 k->vendor_id = i->vendor_id; 188 k->device_id = i->device_id; 189 k->revision = i->revision; 190 set_bit(DEVICE_CATEGORY_USB, dc->categories); 191 if (i->companion) { 192 dc->hotpluggable = false; 193 } 194 } 195 196 static struct EHCIPCIInfo ehci_pci_info[] = { 197 { 198 .name = "usb-ehci", 199 .vendor_id = PCI_VENDOR_ID_INTEL, 200 .device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */ 201 .revision = 0x10, 202 },{ 203 .name = "ich9-usb-ehci1", /* 00:1d.7 */ 204 .vendor_id = PCI_VENDOR_ID_INTEL, 205 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1, 206 .revision = 0x03, 207 .companion = true, 208 },{ 209 .name = "ich9-usb-ehci2", /* 00:1a.7 */ 210 .vendor_id = PCI_VENDOR_ID_INTEL, 211 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2, 212 .revision = 0x03, 213 .companion = true, 214 } 215 }; 216 217 static void ehci_pci_register_types(void) 218 { 219 TypeInfo ehci_type_info = { 220 .parent = TYPE_PCI_EHCI, 221 .class_init = ehci_data_class_init, 222 }; 223 int i; 224 225 type_register_static(&ehci_pci_type_info); 226 227 for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) { 228 ehci_type_info.name = ehci_pci_info[i].name; 229 ehci_type_info.class_data = ehci_pci_info + i; 230 type_register(&ehci_type_info); 231 } 232 } 233 234 type_init(ehci_pci_register_types) 235