1 /* 2 * QEMU USB EHCI Emulation 3 * 4 * This library is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU Lesser General Public 6 * License as published by the Free Software Foundation; either 7 * version 2 of the License, or(at your option) any later version. 8 * 9 * This library is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * Lesser General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "hw/usb/hcd-ehci.h" 20 #include "qemu/range.h" 21 22 typedef struct EHCIPCIInfo { 23 const char *name; 24 uint16_t vendor_id; 25 uint16_t device_id; 26 uint8_t revision; 27 bool companion; 28 } EHCIPCIInfo; 29 30 static void usb_ehci_pci_realize(PCIDevice *dev, Error **errp) 31 { 32 EHCIPCIState *i = PCI_EHCI(dev); 33 EHCIState *s = &i->ehci; 34 uint8_t *pci_conf = dev->config; 35 36 pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20); 37 38 /* capabilities pointer */ 39 pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00); 40 /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */ 41 42 pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */ 43 pci_set_byte(&pci_conf[PCI_MIN_GNT], 0); 44 pci_set_byte(&pci_conf[PCI_MAX_LAT], 0); 45 46 /* pci_conf[0x50] = 0x01; *//* power management caps */ 47 48 pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */ 49 pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */ 50 pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */ 51 52 pci_conf[0x64] = 0x00; 53 pci_conf[0x65] = 0x00; 54 pci_conf[0x66] = 0x00; 55 pci_conf[0x67] = 0x00; 56 pci_conf[0x68] = 0x01; 57 pci_conf[0x69] = 0x00; 58 pci_conf[0x6a] = 0x00; 59 pci_conf[0x6b] = 0x00; /* USBLEGSUP */ 60 pci_conf[0x6c] = 0x00; 61 pci_conf[0x6d] = 0x00; 62 pci_conf[0x6e] = 0x00; 63 pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */ 64 65 s->irq = pci_allocate_irq(dev); 66 s->as = pci_get_address_space(dev); 67 68 usb_ehci_realize(s, DEVICE(dev), NULL); 69 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem); 70 } 71 72 static void usb_ehci_pci_init(Object *obj) 73 { 74 DeviceClass *dc = OBJECT_GET_CLASS(DeviceClass, obj, TYPE_DEVICE); 75 EHCIPCIState *i = PCI_EHCI(obj); 76 EHCIState *s = &i->ehci; 77 78 s->caps[0x09] = 0x68; /* EECP */ 79 80 s->capsbase = 0x00; 81 s->opregbase = 0x20; 82 s->portscbase = 0x44; 83 s->portnr = NB_PORTS; 84 85 if (!dc->hotpluggable) { 86 s->companion_enable = true; 87 } 88 89 usb_ehci_init(s, DEVICE(obj)); 90 } 91 92 static void usb_ehci_pci_finalize(Object *obj) 93 { 94 EHCIPCIState *i = PCI_EHCI(obj); 95 EHCIState *s = &i->ehci; 96 97 usb_ehci_finalize(s); 98 } 99 100 static void usb_ehci_pci_exit(PCIDevice *dev) 101 { 102 EHCIPCIState *i = PCI_EHCI(dev); 103 EHCIState *s = &i->ehci; 104 105 usb_ehci_unrealize(s, DEVICE(dev), NULL); 106 107 g_free(s->irq); 108 s->irq = NULL; 109 } 110 111 static void usb_ehci_pci_reset(DeviceState *dev) 112 { 113 PCIDevice *pci_dev = PCI_DEVICE(dev); 114 EHCIPCIState *i = PCI_EHCI(pci_dev); 115 EHCIState *s = &i->ehci; 116 117 ehci_reset(s); 118 } 119 120 static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr, 121 uint32_t val, int l) 122 { 123 EHCIPCIState *i = PCI_EHCI(dev); 124 bool busmaster; 125 126 pci_default_write_config(dev, addr, val, l); 127 128 if (!range_covers_byte(addr, l, PCI_COMMAND)) { 129 return; 130 } 131 busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER; 132 i->ehci.as = busmaster ? pci_get_address_space(dev) : &address_space_memory; 133 } 134 135 static Property ehci_pci_properties[] = { 136 DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128), 137 DEFINE_PROP_END_OF_LIST(), 138 }; 139 140 static const VMStateDescription vmstate_ehci_pci = { 141 .name = "ehci", 142 .version_id = 2, 143 .minimum_version_id = 1, 144 .fields = (VMStateField[]) { 145 VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState), 146 VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState), 147 VMSTATE_END_OF_LIST() 148 } 149 }; 150 151 static void ehci_class_init(ObjectClass *klass, void *data) 152 { 153 DeviceClass *dc = DEVICE_CLASS(klass); 154 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 155 156 k->realize = usb_ehci_pci_realize; 157 k->exit = usb_ehci_pci_exit; 158 k->class_id = PCI_CLASS_SERIAL_USB; 159 k->config_write = usb_ehci_pci_write_config; 160 dc->vmsd = &vmstate_ehci_pci; 161 dc->props = ehci_pci_properties; 162 dc->reset = usb_ehci_pci_reset; 163 } 164 165 static const TypeInfo ehci_pci_type_info = { 166 .name = TYPE_PCI_EHCI, 167 .parent = TYPE_PCI_DEVICE, 168 .instance_size = sizeof(EHCIPCIState), 169 .instance_init = usb_ehci_pci_init, 170 .instance_finalize = usb_ehci_pci_finalize, 171 .abstract = true, 172 .class_init = ehci_class_init, 173 }; 174 175 static void ehci_data_class_init(ObjectClass *klass, void *data) 176 { 177 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 178 DeviceClass *dc = DEVICE_CLASS(klass); 179 EHCIPCIInfo *i = data; 180 181 k->vendor_id = i->vendor_id; 182 k->device_id = i->device_id; 183 k->revision = i->revision; 184 set_bit(DEVICE_CATEGORY_USB, dc->categories); 185 if (i->companion) { 186 dc->hotpluggable = false; 187 } 188 } 189 190 static struct EHCIPCIInfo ehci_pci_info[] = { 191 { 192 .name = "usb-ehci", 193 .vendor_id = PCI_VENDOR_ID_INTEL, 194 .device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */ 195 .revision = 0x10, 196 },{ 197 .name = "ich9-usb-ehci1", /* 00:1d.7 */ 198 .vendor_id = PCI_VENDOR_ID_INTEL, 199 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1, 200 .revision = 0x03, 201 .companion = true, 202 },{ 203 .name = "ich9-usb-ehci2", /* 00:1a.7 */ 204 .vendor_id = PCI_VENDOR_ID_INTEL, 205 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2, 206 .revision = 0x03, 207 .companion = true, 208 } 209 }; 210 211 static void ehci_pci_register_types(void) 212 { 213 TypeInfo ehci_type_info = { 214 .parent = TYPE_PCI_EHCI, 215 .class_init = ehci_data_class_init, 216 }; 217 int i; 218 219 type_register_static(&ehci_pci_type_info); 220 221 for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) { 222 ehci_type_info.name = ehci_pci_info[i].name; 223 ehci_type_info.class_data = ehci_pci_info + i; 224 type_register(&ehci_type_info); 225 } 226 } 227 228 type_init(ehci_pci_register_types) 229 230 struct ehci_companions { 231 const char *name; 232 int func; 233 int port; 234 }; 235 236 static const struct ehci_companions ich9_1d[] = { 237 { .name = "ich9-usb-uhci1", .func = 0, .port = 0 }, 238 { .name = "ich9-usb-uhci2", .func = 1, .port = 2 }, 239 { .name = "ich9-usb-uhci3", .func = 2, .port = 4 }, 240 }; 241 242 static const struct ehci_companions ich9_1a[] = { 243 { .name = "ich9-usb-uhci4", .func = 0, .port = 0 }, 244 { .name = "ich9-usb-uhci5", .func = 1, .port = 2 }, 245 { .name = "ich9-usb-uhci6", .func = 2, .port = 4 }, 246 }; 247 248 int ehci_create_ich9_with_companions(PCIBus *bus, int slot) 249 { 250 const struct ehci_companions *comp; 251 PCIDevice *ehci, *uhci; 252 BusState *usbbus; 253 const char *name; 254 int i; 255 256 switch (slot) { 257 case 0x1d: 258 name = "ich9-usb-ehci1"; 259 comp = ich9_1d; 260 break; 261 case 0x1a: 262 name = "ich9-usb-ehci2"; 263 comp = ich9_1a; 264 break; 265 default: 266 return -1; 267 } 268 269 ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name); 270 qdev_init_nofail(&ehci->qdev); 271 usbbus = QLIST_FIRST(&ehci->qdev.child_bus); 272 273 for (i = 0; i < 3; i++) { 274 uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func), 275 true, comp[i].name); 276 qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name); 277 qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port); 278 qdev_init_nofail(&uhci->qdev); 279 } 280 return 0; 281 } 282