xref: /openbmc/qemu/hw/usb/hcd-ehci-pci.c (revision 1f32989d)
1 /*
2  * QEMU USB EHCI Emulation
3  *
4  * This library is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU Lesser General Public
6  * License as published by the Free Software Foundation; either
7  * version 2 of the License, or(at your option) any later version.
8  *
9  * This library is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12  * Lesser General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #include "hw/usb/hcd-ehci.h"
19 #include "hw/pci.h"
20 #include "range.h"
21 
22 typedef struct EHCIPCIState {
23     PCIDevice pcidev;
24     EHCIState ehci;
25 } EHCIPCIState;
26 
27 typedef struct EHCIPCIInfo {
28     const char *name;
29     uint16_t vendor_id;
30     uint16_t device_id;
31     uint8_t  revision;
32 } EHCIPCIInfo;
33 
34 static int usb_ehci_pci_initfn(PCIDevice *dev)
35 {
36     EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev);
37     EHCIState *s = &i->ehci;
38     uint8_t *pci_conf = dev->config;
39 
40     pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
41 
42     /* capabilities pointer */
43     pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
44     /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */
45 
46     pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
47     pci_set_byte(&pci_conf[PCI_MIN_GNT], 0);
48     pci_set_byte(&pci_conf[PCI_MAX_LAT], 0);
49 
50     /* pci_conf[0x50] = 0x01; *//* power management caps */
51 
52     pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */
53     pci_set_byte(&pci_conf[0x61], 0x20);  /* frame length adjustment (2.1.5) */
54     pci_set_word(&pci_conf[0x62], 0x00);  /* port wake up capability (2.1.6) */
55 
56     pci_conf[0x64] = 0x00;
57     pci_conf[0x65] = 0x00;
58     pci_conf[0x66] = 0x00;
59     pci_conf[0x67] = 0x00;
60     pci_conf[0x68] = 0x01;
61     pci_conf[0x69] = 0x00;
62     pci_conf[0x6a] = 0x00;
63     pci_conf[0x6b] = 0x00;  /* USBLEGSUP */
64     pci_conf[0x6c] = 0x00;
65     pci_conf[0x6d] = 0x00;
66     pci_conf[0x6e] = 0x00;
67     pci_conf[0x6f] = 0xc0;  /* USBLEFCTLSTS */
68 
69     s->caps[0x09] = 0x68;        /* EECP */
70 
71     s->irq = dev->irq[3];
72     s->dma = pci_dma_context(dev);
73 
74     s->capsbase = 0x00;
75     s->opregbase = 0x20;
76 
77     usb_ehci_initfn(s, DEVICE(dev));
78     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
79 
80     return 0;
81 }
82 
83 static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
84                                       uint32_t val, int l)
85 {
86     EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev);
87     bool busmaster;
88 
89     pci_default_write_config(dev, addr, val, l);
90 
91     if (!range_covers_byte(addr, l, PCI_COMMAND)) {
92         return;
93     }
94     busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER;
95     i->ehci.dma = busmaster ? pci_dma_context(dev) : NULL;
96 }
97 
98 static Property ehci_pci_properties[] = {
99     DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128),
100     DEFINE_PROP_END_OF_LIST(),
101 };
102 
103 static const VMStateDescription vmstate_ehci_pci = {
104     .name        = "ehci",
105     .version_id  = 2,
106     .minimum_version_id  = 1,
107     .fields      = (VMStateField[]) {
108         VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState),
109         VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState),
110         VMSTATE_END_OF_LIST()
111     }
112 };
113 
114 static void ehci_class_init(ObjectClass *klass, void *data)
115 {
116     DeviceClass *dc = DEVICE_CLASS(klass);
117     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
118     EHCIPCIInfo *i = data;
119 
120     k->init = usb_ehci_pci_initfn;
121     k->vendor_id = i->vendor_id;
122     k->device_id = i->device_id;
123     k->revision = i->revision;
124     k->class_id = PCI_CLASS_SERIAL_USB;
125     k->config_write = usb_ehci_pci_write_config;
126     dc->vmsd = &vmstate_ehci_pci;
127     dc->props = ehci_pci_properties;
128 }
129 
130 static struct EHCIPCIInfo ehci_pci_info[] = {
131     {
132         .name      = "usb-ehci",
133         .vendor_id = PCI_VENDOR_ID_INTEL,
134         .device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */
135         .revision  = 0x10,
136     },{
137         .name      = "ich9-usb-ehci1", /* 00:1d.7 */
138         .vendor_id = PCI_VENDOR_ID_INTEL,
139         .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1,
140         .revision  = 0x03,
141     },{
142         .name      = "ich9-usb-ehci2", /* 00:1a.7 */
143         .vendor_id = PCI_VENDOR_ID_INTEL,
144         .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2,
145         .revision  = 0x03,
146     }
147 };
148 
149 static void ehci_pci_register_types(void)
150 {
151     TypeInfo ehci_type_info = {
152         .parent        = TYPE_PCI_DEVICE,
153         .instance_size = sizeof(EHCIPCIState),
154         .class_init    = ehci_class_init,
155     };
156     int i;
157 
158     for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) {
159         ehci_type_info.name = ehci_pci_info[i].name;
160         ehci_type_info.class_data = ehci_pci_info + i;
161         type_register(&ehci_type_info);
162     }
163 }
164 
165 type_init(ehci_pci_register_types)
166 
167 struct ehci_companions {
168     const char *name;
169     int func;
170     int port;
171 };
172 
173 static const struct ehci_companions ich9_1d[] = {
174     { .name = "ich9-usb-uhci1", .func = 0, .port = 0 },
175     { .name = "ich9-usb-uhci2", .func = 1, .port = 2 },
176     { .name = "ich9-usb-uhci3", .func = 2, .port = 4 },
177 };
178 
179 static const struct ehci_companions ich9_1a[] = {
180     { .name = "ich9-usb-uhci4", .func = 0, .port = 0 },
181     { .name = "ich9-usb-uhci5", .func = 1, .port = 2 },
182     { .name = "ich9-usb-uhci6", .func = 2, .port = 4 },
183 };
184 
185 int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
186 {
187     const struct ehci_companions *comp;
188     PCIDevice *ehci, *uhci;
189     BusState *usbbus;
190     const char *name;
191     int i;
192 
193     switch (slot) {
194     case 0x1d:
195         name = "ich9-usb-ehci1";
196         comp = ich9_1d;
197         break;
198     case 0x1a:
199         name = "ich9-usb-ehci2";
200         comp = ich9_1a;
201         break;
202     default:
203         return -1;
204     }
205 
206     ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name);
207     qdev_init_nofail(&ehci->qdev);
208     usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
209 
210     for (i = 0; i < 3; i++) {
211         uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func),
212                                         true, comp[i].name);
213         qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
214         qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
215         qdev_init_nofail(&uhci->qdev);
216     }
217     return 0;
218 }
219