1 /* 2 * QEMU GRLIB GPTimer Emulator 3 * 4 * Copyright (c) 2010-2011 AdaCore 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "hw/sysbus.h" 26 #include "qemu/timer.h" 27 #include "hw/ptimer.h" 28 #include "qemu/timer.h" 29 #include "qemu/main-loop.h" 30 31 #include "trace.h" 32 33 #define UNIT_REG_SIZE 16 /* Size of memory mapped regs for the unit */ 34 #define GPTIMER_REG_SIZE 16 /* Size of memory mapped regs for a GPTimer */ 35 36 #define GPTIMER_MAX_TIMERS 8 37 38 /* GPTimer Config register fields */ 39 #define GPTIMER_ENABLE (1 << 0) 40 #define GPTIMER_RESTART (1 << 1) 41 #define GPTIMER_LOAD (1 << 2) 42 #define GPTIMER_INT_ENABLE (1 << 3) 43 #define GPTIMER_INT_PENDING (1 << 4) 44 #define GPTIMER_CHAIN (1 << 5) /* Not supported */ 45 #define GPTIMER_DEBUG_HALT (1 << 6) /* Not supported */ 46 47 /* Memory mapped register offsets */ 48 #define SCALER_OFFSET 0x00 49 #define SCALER_RELOAD_OFFSET 0x04 50 #define CONFIG_OFFSET 0x08 51 #define COUNTER_OFFSET 0x00 52 #define COUNTER_RELOAD_OFFSET 0x04 53 #define TIMER_BASE 0x10 54 55 #define TYPE_GRLIB_GPTIMER "grlib,gptimer" 56 #define GRLIB_GPTIMER(obj) \ 57 OBJECT_CHECK(GPTimerUnit, (obj), TYPE_GRLIB_GPTIMER) 58 59 typedef struct GPTimer GPTimer; 60 typedef struct GPTimerUnit GPTimerUnit; 61 62 struct GPTimer { 63 QEMUBH *bh; 64 struct ptimer_state *ptimer; 65 66 qemu_irq irq; 67 int id; 68 GPTimerUnit *unit; 69 70 /* registers */ 71 uint32_t counter; 72 uint32_t reload; 73 uint32_t config; 74 }; 75 76 struct GPTimerUnit { 77 SysBusDevice parent_obj; 78 79 MemoryRegion iomem; 80 81 uint32_t nr_timers; /* Number of timers available */ 82 uint32_t freq_hz; /* System frequency */ 83 uint32_t irq_line; /* Base irq line */ 84 85 GPTimer *timers; 86 87 /* registers */ 88 uint32_t scaler; 89 uint32_t reload; 90 uint32_t config; 91 }; 92 93 static void grlib_gptimer_enable(GPTimer *timer) 94 { 95 assert(timer != NULL); 96 97 98 ptimer_stop(timer->ptimer); 99 100 if (!(timer->config & GPTIMER_ENABLE)) { 101 /* Timer disabled */ 102 trace_grlib_gptimer_disabled(timer->id, timer->config); 103 return; 104 } 105 106 /* ptimer is triggered when the counter reach 0 but GPTimer is triggered at 107 underflow. Set count + 1 to simulate the GPTimer behavior. */ 108 109 trace_grlib_gptimer_enable(timer->id, timer->counter); 110 111 ptimer_set_count(timer->ptimer, (uint64_t)timer->counter + 1); 112 ptimer_run(timer->ptimer, 1); 113 } 114 115 static void grlib_gptimer_restart(GPTimer *timer) 116 { 117 assert(timer != NULL); 118 119 trace_grlib_gptimer_restart(timer->id, timer->reload); 120 121 timer->counter = timer->reload; 122 grlib_gptimer_enable(timer); 123 } 124 125 static void grlib_gptimer_set_scaler(GPTimerUnit *unit, uint32_t scaler) 126 { 127 int i = 0; 128 uint32_t value = 0; 129 130 assert(unit != NULL); 131 132 if (scaler > 0) { 133 value = unit->freq_hz / (scaler + 1); 134 } else { 135 value = unit->freq_hz; 136 } 137 138 trace_grlib_gptimer_set_scaler(scaler, value); 139 140 for (i = 0; i < unit->nr_timers; i++) { 141 ptimer_set_freq(unit->timers[i].ptimer, value); 142 } 143 } 144 145 static void grlib_gptimer_hit(void *opaque) 146 { 147 GPTimer *timer = opaque; 148 assert(timer != NULL); 149 150 trace_grlib_gptimer_hit(timer->id); 151 152 /* Timer expired */ 153 154 if (timer->config & GPTIMER_INT_ENABLE) { 155 /* Set the pending bit (only unset by write in the config register) */ 156 timer->config |= GPTIMER_INT_PENDING; 157 qemu_irq_pulse(timer->irq); 158 } 159 160 if (timer->config & GPTIMER_RESTART) { 161 grlib_gptimer_restart(timer); 162 } 163 } 164 165 static uint64_t grlib_gptimer_read(void *opaque, hwaddr addr, 166 unsigned size) 167 { 168 GPTimerUnit *unit = opaque; 169 hwaddr timer_addr; 170 int id; 171 uint32_t value = 0; 172 173 addr &= 0xff; 174 175 /* Unit registers */ 176 switch (addr) { 177 case SCALER_OFFSET: 178 trace_grlib_gptimer_readl(-1, addr, unit->scaler); 179 return unit->scaler; 180 181 case SCALER_RELOAD_OFFSET: 182 trace_grlib_gptimer_readl(-1, addr, unit->reload); 183 return unit->reload; 184 185 case CONFIG_OFFSET: 186 trace_grlib_gptimer_readl(-1, addr, unit->config); 187 return unit->config; 188 189 default: 190 break; 191 } 192 193 timer_addr = (addr % TIMER_BASE); 194 id = (addr - TIMER_BASE) / TIMER_BASE; 195 196 if (id >= 0 && id < unit->nr_timers) { 197 198 /* GPTimer registers */ 199 switch (timer_addr) { 200 case COUNTER_OFFSET: 201 value = ptimer_get_count(unit->timers[id].ptimer); 202 trace_grlib_gptimer_readl(id, addr, value); 203 return value; 204 205 case COUNTER_RELOAD_OFFSET: 206 value = unit->timers[id].reload; 207 trace_grlib_gptimer_readl(id, addr, value); 208 return value; 209 210 case CONFIG_OFFSET: 211 trace_grlib_gptimer_readl(id, addr, unit->timers[id].config); 212 return unit->timers[id].config; 213 214 default: 215 break; 216 } 217 218 } 219 220 trace_grlib_gptimer_readl(-1, addr, 0); 221 return 0; 222 } 223 224 static void grlib_gptimer_write(void *opaque, hwaddr addr, 225 uint64_t value, unsigned size) 226 { 227 GPTimerUnit *unit = opaque; 228 hwaddr timer_addr; 229 int id; 230 231 addr &= 0xff; 232 233 /* Unit registers */ 234 switch (addr) { 235 case SCALER_OFFSET: 236 value &= 0xFFFF; /* clean up the value */ 237 unit->scaler = value; 238 trace_grlib_gptimer_writel(-1, addr, unit->scaler); 239 return; 240 241 case SCALER_RELOAD_OFFSET: 242 value &= 0xFFFF; /* clean up the value */ 243 unit->reload = value; 244 trace_grlib_gptimer_writel(-1, addr, unit->reload); 245 grlib_gptimer_set_scaler(unit, value); 246 return; 247 248 case CONFIG_OFFSET: 249 /* Read Only (disable timer freeze not supported) */ 250 trace_grlib_gptimer_writel(-1, addr, 0); 251 return; 252 253 default: 254 break; 255 } 256 257 timer_addr = (addr % TIMER_BASE); 258 id = (addr - TIMER_BASE) / TIMER_BASE; 259 260 if (id >= 0 && id < unit->nr_timers) { 261 262 /* GPTimer registers */ 263 switch (timer_addr) { 264 case COUNTER_OFFSET: 265 trace_grlib_gptimer_writel(id, addr, value); 266 unit->timers[id].counter = value; 267 grlib_gptimer_enable(&unit->timers[id]); 268 return; 269 270 case COUNTER_RELOAD_OFFSET: 271 trace_grlib_gptimer_writel(id, addr, value); 272 unit->timers[id].reload = value; 273 return; 274 275 case CONFIG_OFFSET: 276 trace_grlib_gptimer_writel(id, addr, value); 277 278 if (value & GPTIMER_INT_PENDING) { 279 /* clear pending bit */ 280 value &= ~GPTIMER_INT_PENDING; 281 } else { 282 /* keep pending bit */ 283 value |= unit->timers[id].config & GPTIMER_INT_PENDING; 284 } 285 286 unit->timers[id].config = value; 287 288 /* gptimer_restart calls gptimer_enable, so if "enable" and "load" 289 bits are present, we just have to call restart. */ 290 291 if (value & GPTIMER_LOAD) { 292 grlib_gptimer_restart(&unit->timers[id]); 293 } else if (value & GPTIMER_ENABLE) { 294 grlib_gptimer_enable(&unit->timers[id]); 295 } 296 297 /* These fields must always be read as 0 */ 298 value &= ~(GPTIMER_LOAD & GPTIMER_DEBUG_HALT); 299 300 unit->timers[id].config = value; 301 return; 302 303 default: 304 break; 305 } 306 307 } 308 309 trace_grlib_gptimer_writel(-1, addr, value); 310 } 311 312 static const MemoryRegionOps grlib_gptimer_ops = { 313 .read = grlib_gptimer_read, 314 .write = grlib_gptimer_write, 315 .endianness = DEVICE_NATIVE_ENDIAN, 316 .valid = { 317 .min_access_size = 4, 318 .max_access_size = 4, 319 }, 320 }; 321 322 static void grlib_gptimer_reset(DeviceState *d) 323 { 324 GPTimerUnit *unit = GRLIB_GPTIMER(d); 325 int i = 0; 326 327 assert(unit != NULL); 328 329 unit->scaler = 0; 330 unit->reload = 0; 331 332 unit->config = unit->nr_timers; 333 unit->config |= unit->irq_line << 3; 334 unit->config |= 1 << 8; /* separate interrupt */ 335 unit->config |= 1 << 9; /* Disable timer freeze */ 336 337 338 for (i = 0; i < unit->nr_timers; i++) { 339 GPTimer *timer = &unit->timers[i]; 340 341 timer->counter = 0; 342 timer->reload = 0; 343 timer->config = 0; 344 ptimer_stop(timer->ptimer); 345 ptimer_set_count(timer->ptimer, 0); 346 ptimer_set_freq(timer->ptimer, unit->freq_hz); 347 } 348 } 349 350 static int grlib_gptimer_init(SysBusDevice *dev) 351 { 352 GPTimerUnit *unit = GRLIB_GPTIMER(dev); 353 unsigned int i; 354 355 assert(unit->nr_timers > 0); 356 assert(unit->nr_timers <= GPTIMER_MAX_TIMERS); 357 358 unit->timers = g_malloc0(sizeof unit->timers[0] * unit->nr_timers); 359 360 for (i = 0; i < unit->nr_timers; i++) { 361 GPTimer *timer = &unit->timers[i]; 362 363 timer->unit = unit; 364 timer->bh = qemu_bh_new(grlib_gptimer_hit, timer); 365 timer->ptimer = ptimer_init(timer->bh); 366 timer->id = i; 367 368 /* One IRQ line for each timer */ 369 sysbus_init_irq(dev, &timer->irq); 370 371 ptimer_set_freq(timer->ptimer, unit->freq_hz); 372 } 373 374 memory_region_init_io(&unit->iomem, OBJECT(unit), &grlib_gptimer_ops, 375 unit, "gptimer", 376 UNIT_REG_SIZE + GPTIMER_REG_SIZE * unit->nr_timers); 377 378 sysbus_init_mmio(dev, &unit->iomem); 379 return 0; 380 } 381 382 static Property grlib_gptimer_properties[] = { 383 DEFINE_PROP_UINT32("frequency", GPTimerUnit, freq_hz, 40000000), 384 DEFINE_PROP_UINT32("irq-line", GPTimerUnit, irq_line, 8), 385 DEFINE_PROP_UINT32("nr-timers", GPTimerUnit, nr_timers, 2), 386 DEFINE_PROP_END_OF_LIST(), 387 }; 388 389 static void grlib_gptimer_class_init(ObjectClass *klass, void *data) 390 { 391 DeviceClass *dc = DEVICE_CLASS(klass); 392 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); 393 394 k->init = grlib_gptimer_init; 395 dc->reset = grlib_gptimer_reset; 396 dc->props = grlib_gptimer_properties; 397 } 398 399 static const TypeInfo grlib_gptimer_info = { 400 .name = TYPE_GRLIB_GPTIMER, 401 .parent = TYPE_SYS_BUS_DEVICE, 402 .instance_size = sizeof(GPTimerUnit), 403 .class_init = grlib_gptimer_class_init, 404 }; 405 406 static void grlib_gptimer_register_types(void) 407 { 408 type_register_static(&grlib_gptimer_info); 409 } 410 411 type_init(grlib_gptimer_register_types) 412