1 /* 2 * QEMU Sun4v/Niagara System Emulator 3 * 4 * Copyright (c) 2016 Artyom Tarasenko 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/units.h" 27 #include "cpu.h" 28 #include "hw/boards.h" 29 #include "hw/char/serial.h" 30 #include "hw/misc/unimp.h" 31 #include "hw/loader.h" 32 #include "hw/sparc/sparc64.h" 33 #include "hw/rtc/sun4v-rtc.h" 34 #include "sysemu/block-backend.h" 35 #include "qemu/error-report.h" 36 #include "sysemu/qtest.h" 37 #include "sysemu/sysemu.h" 38 #include "qapi/error.h" 39 40 typedef struct NiagaraBoardState { 41 MemoryRegion hv_ram; 42 MemoryRegion nvram; 43 MemoryRegion md_rom; 44 MemoryRegion hv_rom; 45 MemoryRegion vdisk_ram; 46 MemoryRegion prom; 47 } NiagaraBoardState; 48 49 #define NIAGARA_HV_RAM_BASE 0x100000ULL 50 #define NIAGARA_HV_RAM_SIZE 0x3f00000ULL /* 63 MiB */ 51 52 #define NIAGARA_PARTITION_RAM_BASE 0x80000000ULL 53 54 #define NIAGARA_UART_BASE 0x1f10000000ULL 55 56 #define NIAGARA_NVRAM_BASE 0x1f11000000ULL 57 #define NIAGARA_NVRAM_SIZE 0x2000 58 59 #define NIAGARA_MD_ROM_BASE 0x1f12000000ULL 60 #define NIAGARA_MD_ROM_SIZE 0x2000 61 62 #define NIAGARA_HV_ROM_BASE 0x1f12080000ULL 63 #define NIAGARA_HV_ROM_SIZE 0x2000 64 65 #define NIAGARA_IOBBASE 0x9800000000ULL 66 #define NIAGARA_IOBSIZE 0x0100000000ULL 67 68 #define NIAGARA_VDISK_BASE 0x1f40000000ULL 69 #define NIAGARA_RTC_BASE 0xfff0c1fff8ULL 70 71 /* Firmware layout 72 * 73 * |------------------| 74 * | openboot.bin | 75 * |------------------| PROM_ADDR + OBP_OFFSET 76 * | q.bin | 77 * |------------------| PROM_ADDR + Q_OFFSET 78 * | reset.bin | 79 * |------------------| PROM_ADDR 80 */ 81 #define NIAGARA_PROM_BASE 0xfff0000000ULL 82 #define NIAGARA_Q_OFFSET 0x10000ULL 83 #define NIAGARA_OBP_OFFSET 0x80000ULL 84 #define PROM_SIZE_MAX (4 * MiB) 85 86 static void add_rom_or_fail(const char *file, const hwaddr addr) 87 { 88 /* XXX remove qtest_enabled() check once firmware files are 89 * in the qemu tree 90 */ 91 if (!qtest_enabled() && rom_add_file_fixed(file, addr, -1)) { 92 error_report("Unable to load a firmware for -M niagara"); 93 exit(1); 94 } 95 96 } 97 /* Niagara hardware initialisation */ 98 static void niagara_init(MachineState *machine) 99 { 100 NiagaraBoardState *s = g_new(NiagaraBoardState, 1); 101 DriveInfo *dinfo = drive_get_next(IF_PFLASH); 102 MemoryRegion *sysmem = get_system_memory(); 103 104 /* init CPUs */ 105 sparc64_cpu_devinit(machine->cpu_type, NIAGARA_PROM_BASE); 106 /* set up devices */ 107 memory_region_init_ram(&s->hv_ram, NULL, "sun4v-hv.ram", 108 NIAGARA_HV_RAM_SIZE, &error_fatal); 109 memory_region_add_subregion(sysmem, NIAGARA_HV_RAM_BASE, &s->hv_ram); 110 111 memory_region_add_subregion(sysmem, NIAGARA_PARTITION_RAM_BASE, 112 machine->ram); 113 114 memory_region_init_ram(&s->nvram, NULL, "sun4v.nvram", NIAGARA_NVRAM_SIZE, 115 &error_fatal); 116 memory_region_add_subregion(sysmem, NIAGARA_NVRAM_BASE, &s->nvram); 117 memory_region_init_ram(&s->md_rom, NULL, "sun4v-md.rom", 118 NIAGARA_MD_ROM_SIZE, &error_fatal); 119 memory_region_add_subregion(sysmem, NIAGARA_MD_ROM_BASE, &s->md_rom); 120 memory_region_init_ram(&s->hv_rom, NULL, "sun4v-hv.rom", 121 NIAGARA_HV_ROM_SIZE, &error_fatal); 122 memory_region_add_subregion(sysmem, NIAGARA_HV_ROM_BASE, &s->hv_rom); 123 memory_region_init_ram(&s->prom, NULL, "sun4v.prom", PROM_SIZE_MAX, 124 &error_fatal); 125 memory_region_add_subregion(sysmem, NIAGARA_PROM_BASE, &s->prom); 126 127 add_rom_or_fail("nvram1", NIAGARA_NVRAM_BASE); 128 add_rom_or_fail("1up-md.bin", NIAGARA_MD_ROM_BASE); 129 add_rom_or_fail("1up-hv.bin", NIAGARA_HV_ROM_BASE); 130 131 add_rom_or_fail("reset.bin", NIAGARA_PROM_BASE); 132 add_rom_or_fail("q.bin", NIAGARA_PROM_BASE + NIAGARA_Q_OFFSET); 133 add_rom_or_fail("openboot.bin", NIAGARA_PROM_BASE + NIAGARA_OBP_OFFSET); 134 135 /* the virtual ramdisk is kind of initrd, but it resides 136 outside of the partition RAM */ 137 if (dinfo) { 138 BlockBackend *blk = blk_by_legacy_dinfo(dinfo); 139 int size = blk_getlength(blk); 140 if (size > 0) { 141 memory_region_init_ram(&s->vdisk_ram, NULL, "sun4v_vdisk.ram", size, 142 &error_fatal); 143 memory_region_add_subregion(get_system_memory(), 144 NIAGARA_VDISK_BASE, &s->vdisk_ram); 145 dinfo->is_default = 1; 146 rom_add_file_fixed(blk_bs(blk)->filename, NIAGARA_VDISK_BASE, -1); 147 } else { 148 error_report("could not load ram disk '%s'", 149 blk_bs(blk)->filename); 150 exit(1); 151 } 152 } 153 serial_mm_init(sysmem, NIAGARA_UART_BASE, 0, NULL, 154 115200, serial_hd(0), DEVICE_BIG_ENDIAN); 155 create_unimplemented_device("sun4v-iob", NIAGARA_IOBBASE, NIAGARA_IOBSIZE); 156 sun4v_rtc_init(NIAGARA_RTC_BASE); 157 } 158 159 static void niagara_class_init(ObjectClass *oc, void *data) 160 { 161 MachineClass *mc = MACHINE_CLASS(oc); 162 163 mc->desc = "Sun4v platform, Niagara"; 164 mc->init = niagara_init; 165 mc->max_cpus = 1; /* XXX for now */ 166 mc->default_boot_order = "c"; 167 mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Sun-UltraSparc-T1"); 168 mc->default_ram_id = "sun4v-partition.ram"; 169 } 170 171 static const TypeInfo niagara_type = { 172 .name = MACHINE_TYPE_NAME("niagara"), 173 .parent = TYPE_MACHINE, 174 .class_init = niagara_class_init, 175 }; 176 177 static void niagara_register_types(void) 178 { 179 type_register_static(&niagara_type); 180 } 181 182 type_init(niagara_register_types) 183