1 /* 2 * QEMU Leon3 System Emulator 3 * 4 * Copyright (c) 2010-2019 AdaCore 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/units.h" 27 #include "qemu/error-report.h" 28 #include "qapi/error.h" 29 #include "qemu-common.h" 30 #include "qemu/datadir.h" 31 #include "cpu.h" 32 #include "hw/irq.h" 33 #include "qemu/timer.h" 34 #include "hw/ptimer.h" 35 #include "hw/qdev-properties.h" 36 #include "sysemu/sysemu.h" 37 #include "sysemu/qtest.h" 38 #include "sysemu/reset.h" 39 #include "hw/boards.h" 40 #include "hw/loader.h" 41 #include "elf.h" 42 #include "trace.h" 43 #include "exec/address-spaces.h" 44 45 #include "hw/sparc/grlib.h" 46 #include "hw/misc/grlib_ahb_apb_pnp.h" 47 48 /* Default system clock. */ 49 #define CPU_CLK (40 * 1000 * 1000) 50 51 #define LEON3_PROM_FILENAME "u-boot.bin" 52 #define LEON3_PROM_OFFSET (0x00000000) 53 #define LEON3_RAM_OFFSET (0x40000000) 54 55 #define LEON3_UART_OFFSET (0x80000100) 56 #define LEON3_UART_IRQ (3) 57 58 #define LEON3_IRQMP_OFFSET (0x80000200) 59 60 #define LEON3_TIMER_OFFSET (0x80000300) 61 #define LEON3_TIMER_IRQ (6) 62 #define LEON3_TIMER_COUNT (2) 63 64 #define LEON3_APB_PNP_OFFSET (0x800FF000) 65 #define LEON3_AHB_PNP_OFFSET (0xFFFFF000) 66 67 typedef struct ResetData { 68 SPARCCPU *cpu; 69 uint32_t entry; /* save kernel entry in case of reset */ 70 target_ulong sp; /* initial stack pointer */ 71 } ResetData; 72 73 static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) 74 { 75 stl_p(code++, 0x82100000); /* mov %g0, %g1 */ 76 stl_p(code++, 0x84100000); /* mov %g0, %g2 */ 77 stl_p(code++, 0x03000000 + 78 extract32(addr, 10, 22)); 79 /* sethi %hi(addr), %g1 */ 80 stl_p(code++, 0x82106000 + 81 extract32(addr, 0, 10)); 82 /* or %g1, addr, %g1 */ 83 stl_p(code++, 0x05000000 + 84 extract32(val, 10, 22)); 85 /* sethi %hi(val), %g2 */ 86 stl_p(code++, 0x8410a000 + 87 extract32(val, 0, 10)); 88 /* or %g2, val, %g2 */ 89 stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ] */ 90 91 return code; 92 } 93 94 /* 95 * When loading a kernel in RAM the machine is expected to be in a different 96 * state (eg: initialized by the bootloader). This little code reproduces 97 * this behavior. 98 */ 99 static void write_bootloader(CPUSPARCState *env, uint8_t *base, 100 hwaddr kernel_addr) 101 { 102 uint32_t *p = (uint32_t *) base; 103 104 /* Initialize the UARTs */ 105 /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */ 106 p = gen_store_u32(p, 0x80000108, 3); 107 108 /* Initialize the TIMER 0 */ 109 /* *GPTIMER_SCALER_RELOAD = 40 - 1; */ 110 p = gen_store_u32(p, 0x80000304, 39); 111 /* *GPTIMER0_COUNTER_RELOAD = 0xFFFE; */ 112 p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE); 113 /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART; */ 114 p = gen_store_u32(p, 0x80000318, 3); 115 116 /* JUMP to the entry point */ 117 stl_p(p++, 0x82100000); /* mov %g0, %g1 */ 118 stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22)); 119 /* sethi %hi(kernel_addr), %g1 */ 120 stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10)); 121 /* or kernel_addr, %g1 */ 122 stl_p(p++, 0x81c04000); /* jmp %g1 */ 123 stl_p(p++, 0x01000000); /* nop */ 124 } 125 126 static void main_cpu_reset(void *opaque) 127 { 128 ResetData *s = (ResetData *)opaque; 129 CPUState *cpu = CPU(s->cpu); 130 CPUSPARCState *env = &s->cpu->env; 131 132 cpu_reset(cpu); 133 134 cpu->halted = 0; 135 env->pc = s->entry; 136 env->npc = s->entry + 4; 137 env->regbase[6] = s->sp; 138 } 139 140 static void leon3_cache_control_int(CPUSPARCState *env) 141 { 142 uint32_t state = 0; 143 144 if (env->cache_control & CACHE_CTRL_IF) { 145 /* Instruction cache state */ 146 state = env->cache_control & CACHE_STATE_MASK; 147 if (state == CACHE_ENABLED) { 148 state = CACHE_FROZEN; 149 trace_int_helper_icache_freeze(); 150 } 151 152 env->cache_control &= ~CACHE_STATE_MASK; 153 env->cache_control |= state; 154 } 155 156 if (env->cache_control & CACHE_CTRL_DF) { 157 /* Data cache state */ 158 state = (env->cache_control >> 2) & CACHE_STATE_MASK; 159 if (state == CACHE_ENABLED) { 160 state = CACHE_FROZEN; 161 trace_int_helper_dcache_freeze(); 162 } 163 164 env->cache_control &= ~(CACHE_STATE_MASK << 2); 165 env->cache_control |= (state << 2); 166 } 167 } 168 169 static void leon3_irq_ack(void *irq_manager, int intno) 170 { 171 grlib_irqmp_ack((DeviceState *)irq_manager, intno); 172 } 173 174 /* 175 * This device assumes that the incoming 'level' value on the 176 * qemu_irq is the interrupt number, not just a simple 0/1 level. 177 */ 178 static void leon3_set_pil_in(void *opaque, int n, int level) 179 { 180 CPUSPARCState *env = opaque; 181 uint32_t pil_in = level; 182 CPUState *cs; 183 184 assert(env != NULL); 185 186 env->pil_in = pil_in; 187 188 if (env->pil_in && (env->interrupt_index == 0 || 189 (env->interrupt_index & ~15) == TT_EXTINT)) { 190 unsigned int i; 191 192 for (i = 15; i > 0; i--) { 193 if (env->pil_in & (1 << i)) { 194 int old_interrupt = env->interrupt_index; 195 196 env->interrupt_index = TT_EXTINT | i; 197 if (old_interrupt != env->interrupt_index) { 198 cs = env_cpu(env); 199 trace_leon3_set_irq(i); 200 cpu_interrupt(cs, CPU_INTERRUPT_HARD); 201 } 202 break; 203 } 204 } 205 } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) { 206 cs = env_cpu(env); 207 trace_leon3_reset_irq(env->interrupt_index & 15); 208 env->interrupt_index = 0; 209 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); 210 } 211 } 212 213 static void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno) 214 { 215 leon3_irq_ack(irq_manager, intno); 216 leon3_cache_control_int(env); 217 } 218 219 static void leon3_generic_hw_init(MachineState *machine) 220 { 221 ram_addr_t ram_size = machine->ram_size; 222 const char *bios_name = machine->firmware ?: LEON3_PROM_FILENAME; 223 const char *kernel_filename = machine->kernel_filename; 224 SPARCCPU *cpu; 225 CPUSPARCState *env; 226 MemoryRegion *address_space_mem = get_system_memory(); 227 MemoryRegion *prom = g_new(MemoryRegion, 1); 228 int ret; 229 char *filename; 230 int bios_size; 231 int prom_size; 232 ResetData *reset_info; 233 DeviceState *dev, *irqmpdev; 234 int i; 235 AHBPnp *ahb_pnp; 236 APBPnp *apb_pnp; 237 238 /* Init CPU */ 239 cpu = SPARC_CPU(cpu_create(machine->cpu_type)); 240 env = &cpu->env; 241 242 cpu_sparc_set_id(env, 0); 243 244 /* Reset data */ 245 reset_info = g_malloc0(sizeof(ResetData)); 246 reset_info->cpu = cpu; 247 reset_info->sp = LEON3_RAM_OFFSET + ram_size; 248 qemu_register_reset(main_cpu_reset, reset_info); 249 250 ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP)); 251 sysbus_realize_and_unref(SYS_BUS_DEVICE(ahb_pnp), &error_fatal); 252 sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET); 253 grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER, 254 GRLIB_LEON3_DEV, GRLIB_AHB_MASTER, 255 GRLIB_CPU_AREA); 256 257 apb_pnp = GRLIB_APB_PNP(qdev_new(TYPE_GRLIB_APB_PNP)); 258 sysbus_realize_and_unref(SYS_BUS_DEVICE(apb_pnp), &error_fatal); 259 sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET); 260 grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF, 261 GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV, 262 GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA); 263 264 /* Allocate IRQ manager */ 265 irqmpdev = qdev_new(TYPE_GRLIB_IRQMP); 266 qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, 267 env, "pil", 1); 268 qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", 0, 269 qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); 270 sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal); 271 sysbus_mmio_map(SYS_BUS_DEVICE(irqmpdev), 0, LEON3_IRQMP_OFFSET); 272 env->irq_manager = irqmpdev; 273 env->qemu_irq_ack = leon3_irq_manager; 274 grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF, 275 GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV, 276 2, 0, GRLIB_APBIO_AREA); 277 278 /* Allocate RAM */ 279 if (ram_size > 1 * GiB) { 280 error_report("Too much memory for this machine: %" PRId64 "MB," 281 " maximum 1G", 282 ram_size / MiB); 283 exit(1); 284 } 285 286 memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET, 287 machine->ram); 288 289 /* Allocate BIOS */ 290 prom_size = 8 * MiB; 291 memory_region_init_rom(prom, NULL, "Leon3.bios", prom_size, &error_fatal); 292 memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom); 293 294 /* Load boot prom */ 295 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 296 297 if (filename) { 298 bios_size = get_image_size(filename); 299 } else { 300 bios_size = -1; 301 } 302 303 if (bios_size > prom_size) { 304 error_report("could not load prom '%s': file too big", filename); 305 exit(1); 306 } 307 308 if (bios_size > 0) { 309 ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size); 310 if (ret < 0 || ret > prom_size) { 311 error_report("could not load prom '%s'", filename); 312 exit(1); 313 } 314 } else if (kernel_filename == NULL && !qtest_enabled()) { 315 error_report("Can't read bios image '%s'", filename 316 ? filename 317 : LEON3_PROM_FILENAME); 318 exit(1); 319 } 320 g_free(filename); 321 322 /* Can directly load an application. */ 323 if (kernel_filename != NULL) { 324 long kernel_size; 325 uint64_t entry; 326 327 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 328 &entry, NULL, NULL, NULL, 329 1 /* big endian */, EM_SPARC, 0, 0); 330 if (kernel_size < 0) { 331 kernel_size = load_uimage(kernel_filename, NULL, &entry, 332 NULL, NULL, NULL); 333 } 334 if (kernel_size < 0) { 335 error_report("could not load kernel '%s'", kernel_filename); 336 exit(1); 337 } 338 if (bios_size <= 0) { 339 /* 340 * If there is no bios/monitor just start the application but put 341 * the machine in an initialized state through a little 342 * bootloader. 343 */ 344 uint8_t *bootloader_entry; 345 346 bootloader_entry = memory_region_get_ram_ptr(prom); 347 write_bootloader(env, bootloader_entry, entry); 348 env->pc = LEON3_PROM_OFFSET; 349 env->npc = LEON3_PROM_OFFSET + 4; 350 reset_info->entry = LEON3_PROM_OFFSET; 351 } 352 } 353 354 /* Allocate timers */ 355 dev = qdev_new(TYPE_GRLIB_GPTIMER); 356 qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); 357 qdev_prop_set_uint32(dev, "frequency", CPU_CLK); 358 qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); 359 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 360 361 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); 362 for (i = 0; i < LEON3_TIMER_COUNT; i++) { 363 sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, 364 qdev_get_gpio_in(irqmpdev, LEON3_TIMER_IRQ + i)); 365 } 366 367 grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF, 368 GRLIB_VENDOR_GAISLER, GRLIB_GPTIMER_DEV, 369 0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA); 370 371 /* Allocate uart */ 372 dev = qdev_new(TYPE_GRLIB_APB_UART); 373 qdev_prop_set_chr(dev, "chrdev", serial_hd(0)); 374 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 375 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET); 376 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 377 qdev_get_gpio_in(irqmpdev, LEON3_UART_IRQ)); 378 grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF, 379 GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1, 380 LEON3_UART_IRQ, GRLIB_APBIO_AREA); 381 } 382 383 static void leon3_generic_machine_init(MachineClass *mc) 384 { 385 mc->desc = "Leon-3 generic"; 386 mc->init = leon3_generic_hw_init; 387 mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3"); 388 mc->default_ram_id = "leon3.ram"; 389 } 390 391 DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init) 392