1 /* 2 * QEMU Leon3 System Emulator 3 * 4 * Copyright (c) 2010-2019 AdaCore 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 #include "qemu/osdep.h" 25 #include "qemu/units.h" 26 #include "qemu/error-report.h" 27 #include "qapi/error.h" 28 #include "qemu-common.h" 29 #include "cpu.h" 30 #include "hw/hw.h" 31 #include "qemu/timer.h" 32 #include "hw/ptimer.h" 33 #include "sysemu/sysemu.h" 34 #include "sysemu/qtest.h" 35 #include "hw/boards.h" 36 #include "hw/loader.h" 37 #include "elf.h" 38 #include "trace.h" 39 #include "exec/address-spaces.h" 40 41 #include "hw/sparc/grlib.h" 42 43 /* Default system clock. */ 44 #define CPU_CLK (40 * 1000 * 1000) 45 46 #define LEON3_PROM_FILENAME "u-boot.bin" 47 #define LEON3_PROM_OFFSET (0x00000000) 48 #define LEON3_RAM_OFFSET (0x40000000) 49 50 #define MAX_PILS 16 51 52 #define LEON3_UART_OFFSET (0x80000100) 53 #define LEON3_UART_IRQ (3) 54 55 #define LEON3_IRQMP_OFFSET (0x80000200) 56 57 #define LEON3_TIMER_OFFSET (0x80000300) 58 #define LEON3_TIMER_IRQ (6) 59 #define LEON3_TIMER_COUNT (2) 60 61 typedef struct ResetData { 62 SPARCCPU *cpu; 63 uint32_t entry; /* save kernel entry in case of reset */ 64 target_ulong sp; /* initial stack pointer */ 65 } ResetData; 66 67 static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) 68 { 69 stl_p(code++, 0x82100000); /* mov %g0, %g1 */ 70 stl_p(code++, 0x84100000); /* mov %g0, %g2 */ 71 stl_p(code++, 0x03000000 + 72 extract32(addr, 10, 22)); 73 /* sethi %hi(addr), %g1 */ 74 stl_p(code++, 0x82106000 + 75 extract32(addr, 0, 10)); 76 /* or %g1, addr, %g1 */ 77 stl_p(code++, 0x05000000 + 78 extract32(val, 10, 22)); 79 /* sethi %hi(val), %g2 */ 80 stl_p(code++, 0x8410a000 + 81 extract32(val, 0, 10)); 82 /* or %g2, val, %g2 */ 83 stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ] */ 84 85 return code; 86 } 87 88 /* 89 * When loading a kernel in RAM the machine is expected to be in a different 90 * state (eg: initialized by the bootloader). This little code reproduces 91 * this behavior. 92 */ 93 static void write_bootloader(CPUSPARCState *env, uint8_t *base, 94 hwaddr kernel_addr) 95 { 96 uint32_t *p = (uint32_t *) base; 97 98 /* Initialize the UARTs */ 99 /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */ 100 p = gen_store_u32(p, 0x80000108, 3); 101 102 /* Initialize the TIMER 0 */ 103 /* *GPTIMER_SCALER_RELOAD = 40 - 1; */ 104 p = gen_store_u32(p, 0x80000304, 39); 105 /* *GPTIMER0_COUNTER_RELOAD = 0xFFFE; */ 106 p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE); 107 /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART; */ 108 p = gen_store_u32(p, 0x80000318, 3); 109 110 /* JUMP to the entry point */ 111 stl_p(p++, 0x82100000); /* mov %g0, %g1 */ 112 stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22)); 113 /* sethi %hi(kernel_addr), %g1 */ 114 stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10)); 115 /* or kernel_addr, %g1 */ 116 stl_p(p++, 0x81c04000); /* jmp %g1 */ 117 stl_p(p++, 0x01000000); /* nop */ 118 } 119 120 static void main_cpu_reset(void *opaque) 121 { 122 ResetData *s = (ResetData *)opaque; 123 CPUState *cpu = CPU(s->cpu); 124 CPUSPARCState *env = &s->cpu->env; 125 126 cpu_reset(cpu); 127 128 cpu->halted = 0; 129 env->pc = s->entry; 130 env->npc = s->entry + 4; 131 env->regbase[6] = s->sp; 132 } 133 134 void leon3_irq_ack(void *irq_manager, int intno) 135 { 136 grlib_irqmp_ack((DeviceState *)irq_manager, intno); 137 } 138 139 static void leon3_set_pil_in(void *opaque, uint32_t pil_in) 140 { 141 CPUSPARCState *env = (CPUSPARCState *)opaque; 142 CPUState *cs; 143 144 assert(env != NULL); 145 146 env->pil_in = pil_in; 147 148 if (env->pil_in && (env->interrupt_index == 0 || 149 (env->interrupt_index & ~15) == TT_EXTINT)) { 150 unsigned int i; 151 152 for (i = 15; i > 0; i--) { 153 if (env->pil_in & (1 << i)) { 154 int old_interrupt = env->interrupt_index; 155 156 env->interrupt_index = TT_EXTINT | i; 157 if (old_interrupt != env->interrupt_index) { 158 cs = CPU(sparc_env_get_cpu(env)); 159 trace_leon3_set_irq(i); 160 cpu_interrupt(cs, CPU_INTERRUPT_HARD); 161 } 162 break; 163 } 164 } 165 } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) { 166 cs = CPU(sparc_env_get_cpu(env)); 167 trace_leon3_reset_irq(env->interrupt_index & 15); 168 env->interrupt_index = 0; 169 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); 170 } 171 } 172 173 static void leon3_generic_hw_init(MachineState *machine) 174 { 175 ram_addr_t ram_size = machine->ram_size; 176 const char *kernel_filename = machine->kernel_filename; 177 SPARCCPU *cpu; 178 CPUSPARCState *env; 179 MemoryRegion *address_space_mem = get_system_memory(); 180 MemoryRegion *ram = g_new(MemoryRegion, 1); 181 MemoryRegion *prom = g_new(MemoryRegion, 1); 182 int ret; 183 char *filename; 184 qemu_irq *cpu_irqs = NULL; 185 int bios_size; 186 int prom_size; 187 ResetData *reset_info; 188 DeviceState *dev; 189 int i; 190 191 /* Init CPU */ 192 cpu = SPARC_CPU(cpu_create(machine->cpu_type)); 193 env = &cpu->env; 194 195 cpu_sparc_set_id(env, 0); 196 197 /* Reset data */ 198 reset_info = g_malloc0(sizeof(ResetData)); 199 reset_info->cpu = cpu; 200 reset_info->sp = LEON3_RAM_OFFSET + ram_size; 201 qemu_register_reset(main_cpu_reset, reset_info); 202 203 /* Allocate IRQ manager */ 204 dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); 205 qdev_prop_set_ptr(dev, "set_pil_in", leon3_set_pil_in); 206 qdev_prop_set_ptr(dev, "set_pil_in_opaque", env); 207 qdev_init_nofail(dev); 208 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); 209 env->irq_manager = dev; 210 env->qemu_irq_ack = leon3_irq_manager; 211 cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq, dev, MAX_PILS); 212 213 /* Allocate RAM */ 214 if (ram_size > 1 * GiB) { 215 error_report("Too much memory for this machine: %" PRId64 "MB," 216 " maximum 1G", 217 ram_size / MiB); 218 exit(1); 219 } 220 221 memory_region_allocate_system_memory(ram, NULL, "leon3.ram", ram_size); 222 memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET, ram); 223 224 /* Allocate BIOS */ 225 prom_size = 8 * MiB; 226 memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal); 227 memory_region_set_readonly(prom, true); 228 memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom); 229 230 /* Load boot prom */ 231 if (bios_name == NULL) { 232 bios_name = LEON3_PROM_FILENAME; 233 } 234 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 235 236 if (filename) { 237 bios_size = get_image_size(filename); 238 } else { 239 bios_size = -1; 240 } 241 242 if (bios_size > prom_size) { 243 error_report("could not load prom '%s': file too big", filename); 244 exit(1); 245 } 246 247 if (bios_size > 0) { 248 ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size); 249 if (ret < 0 || ret > prom_size) { 250 error_report("could not load prom '%s'", filename); 251 exit(1); 252 } 253 } else if (kernel_filename == NULL && !qtest_enabled()) { 254 error_report("Can't read bios image '%s'", filename 255 ? filename 256 : LEON3_PROM_FILENAME); 257 exit(1); 258 } 259 g_free(filename); 260 261 /* Can directly load an application. */ 262 if (kernel_filename != NULL) { 263 long kernel_size; 264 uint64_t entry; 265 266 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 267 &entry, NULL, NULL, 268 1 /* big endian */, EM_SPARC, 0, 0); 269 if (kernel_size < 0) { 270 kernel_size = load_uimage(kernel_filename, NULL, &entry, 271 NULL, NULL, NULL); 272 } 273 if (kernel_size < 0) { 274 error_report("could not load kernel '%s'", kernel_filename); 275 exit(1); 276 } 277 if (bios_size <= 0) { 278 /* 279 * If there is no bios/monitor just start the application but put 280 * the machine in an initialized state through a little 281 * bootloader. 282 */ 283 uint8_t *bootloader_entry; 284 285 bootloader_entry = memory_region_get_ram_ptr(prom); 286 write_bootloader(env, bootloader_entry, entry); 287 env->pc = LEON3_PROM_OFFSET; 288 env->npc = LEON3_PROM_OFFSET + 4; 289 reset_info->entry = LEON3_PROM_OFFSET; 290 } 291 } 292 293 /* Allocate timers */ 294 dev = qdev_create(NULL, TYPE_GRLIB_GPTIMER); 295 qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); 296 qdev_prop_set_uint32(dev, "frequency", CPU_CLK); 297 qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); 298 qdev_init_nofail(dev); 299 300 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); 301 for (i = 0; i < LEON3_TIMER_COUNT; i++) { 302 sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, 303 cpu_irqs[LEON3_TIMER_IRQ + i]); 304 } 305 306 /* Allocate uart */ 307 if (serial_hd(0)) { 308 dev = qdev_create(NULL, TYPE_GRLIB_APB_UART); 309 qdev_prop_set_chr(dev, "chrdev", serial_hd(0)); 310 qdev_init_nofail(dev); 311 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET); 312 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]); 313 } 314 } 315 316 static void leon3_generic_machine_init(MachineClass *mc) 317 { 318 mc->desc = "Leon-3 generic"; 319 mc->init = leon3_generic_hw_init; 320 mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3"); 321 } 322 323 DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init) 324