xref: /openbmc/qemu/hw/sparc/leon3.c (revision db725815985654007ade0fd53590d613fd657208)
1 /*
2  * QEMU Leon3 System Emulator
3  *
4  * Copyright (c) 2010-2019 AdaCore
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "qemu/error-report.h"
28 #include "qapi/error.h"
29 #include "qemu-common.h"
30 #include "cpu.h"
31 #include "hw/irq.h"
32 #include "qemu/timer.h"
33 #include "hw/ptimer.h"
34 #include "sysemu/sysemu.h"
35 #include "sysemu/qtest.h"
36 #include "sysemu/reset.h"
37 #include "hw/boards.h"
38 #include "hw/loader.h"
39 #include "elf.h"
40 #include "trace.h"
41 #include "exec/address-spaces.h"
42 
43 #include "hw/sparc/grlib.h"
44 #include "hw/misc/grlib_ahb_apb_pnp.h"
45 
46 /* Default system clock.  */
47 #define CPU_CLK (40 * 1000 * 1000)
48 
49 #define LEON3_PROM_FILENAME "u-boot.bin"
50 #define LEON3_PROM_OFFSET    (0x00000000)
51 #define LEON3_RAM_OFFSET     (0x40000000)
52 
53 #define MAX_PILS 16
54 
55 #define LEON3_UART_OFFSET  (0x80000100)
56 #define LEON3_UART_IRQ     (3)
57 
58 #define LEON3_IRQMP_OFFSET (0x80000200)
59 
60 #define LEON3_TIMER_OFFSET (0x80000300)
61 #define LEON3_TIMER_IRQ    (6)
62 #define LEON3_TIMER_COUNT  (2)
63 
64 #define LEON3_APB_PNP_OFFSET (0x800FF000)
65 #define LEON3_AHB_PNP_OFFSET (0xFFFFF000)
66 
67 typedef struct ResetData {
68     SPARCCPU *cpu;
69     uint32_t  entry;            /* save kernel entry in case of reset */
70     target_ulong sp;            /* initial stack pointer */
71 } ResetData;
72 
73 static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val)
74 {
75     stl_p(code++, 0x82100000); /* mov %g0, %g1                */
76     stl_p(code++, 0x84100000); /* mov %g0, %g2                */
77     stl_p(code++, 0x03000000 +
78       extract32(addr, 10, 22));
79                                /* sethi %hi(addr), %g1        */
80     stl_p(code++, 0x82106000 +
81       extract32(addr, 0, 10));
82                                /* or %g1, addr, %g1           */
83     stl_p(code++, 0x05000000 +
84       extract32(val, 10, 22));
85                                /* sethi %hi(val), %g2         */
86     stl_p(code++, 0x8410a000 +
87       extract32(val, 0, 10));
88                                /* or %g2, val, %g2            */
89     stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ]             */
90 
91     return code;
92 }
93 
94 /*
95  * When loading a kernel in RAM the machine is expected to be in a different
96  * state (eg: initialized by the bootloader). This little code reproduces
97  * this behavior.
98  */
99 static void write_bootloader(CPUSPARCState *env, uint8_t *base,
100                              hwaddr kernel_addr)
101 {
102     uint32_t *p = (uint32_t *) base;
103 
104     /* Initialize the UARTs                                        */
105     /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */
106     p = gen_store_u32(p, 0x80000108, 3);
107 
108     /* Initialize the TIMER 0                                      */
109     /* *GPTIMER_SCALER_RELOAD = 40 - 1;                            */
110     p = gen_store_u32(p, 0x80000304, 39);
111     /* *GPTIMER0_COUNTER_RELOAD = 0xFFFE;                          */
112     p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE);
113     /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART;        */
114     p = gen_store_u32(p, 0x80000318, 3);
115 
116     /* JUMP to the entry point                                     */
117     stl_p(p++, 0x82100000); /* mov %g0, %g1 */
118     stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22));
119                             /* sethi %hi(kernel_addr), %g1 */
120     stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10));
121                             /* or kernel_addr, %g1 */
122     stl_p(p++, 0x81c04000); /* jmp  %g1 */
123     stl_p(p++, 0x01000000); /* nop */
124 }
125 
126 static void main_cpu_reset(void *opaque)
127 {
128     ResetData *s   = (ResetData *)opaque;
129     CPUState *cpu = CPU(s->cpu);
130     CPUSPARCState  *env = &s->cpu->env;
131 
132     cpu_reset(cpu);
133 
134     cpu->halted = 0;
135     env->pc     = s->entry;
136     env->npc    = s->entry + 4;
137     env->regbase[6] = s->sp;
138 }
139 
140 void leon3_irq_ack(void *irq_manager, int intno)
141 {
142     grlib_irqmp_ack((DeviceState *)irq_manager, intno);
143 }
144 
145 static void leon3_set_pil_in(void *opaque, uint32_t pil_in)
146 {
147     CPUSPARCState *env = (CPUSPARCState *)opaque;
148     CPUState *cs;
149 
150     assert(env != NULL);
151 
152     env->pil_in = pil_in;
153 
154     if (env->pil_in && (env->interrupt_index == 0 ||
155                         (env->interrupt_index & ~15) == TT_EXTINT)) {
156         unsigned int i;
157 
158         for (i = 15; i > 0; i--) {
159             if (env->pil_in & (1 << i)) {
160                 int old_interrupt = env->interrupt_index;
161 
162                 env->interrupt_index = TT_EXTINT | i;
163                 if (old_interrupt != env->interrupt_index) {
164                     cs = env_cpu(env);
165                     trace_leon3_set_irq(i);
166                     cpu_interrupt(cs, CPU_INTERRUPT_HARD);
167                 }
168                 break;
169             }
170         }
171     } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) {
172         cs = env_cpu(env);
173         trace_leon3_reset_irq(env->interrupt_index & 15);
174         env->interrupt_index = 0;
175         cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
176     }
177 }
178 
179 static void leon3_generic_hw_init(MachineState *machine)
180 {
181     ram_addr_t ram_size = machine->ram_size;
182     const char *kernel_filename = machine->kernel_filename;
183     SPARCCPU *cpu;
184     CPUSPARCState   *env;
185     MemoryRegion *address_space_mem = get_system_memory();
186     MemoryRegion *ram = g_new(MemoryRegion, 1);
187     MemoryRegion *prom = g_new(MemoryRegion, 1);
188     int         ret;
189     char       *filename;
190     qemu_irq   *cpu_irqs = NULL;
191     int         bios_size;
192     int         prom_size;
193     ResetData  *reset_info;
194     DeviceState *dev;
195     int i;
196     AHBPnp *ahb_pnp;
197     APBPnp *apb_pnp;
198 
199     /* Init CPU */
200     cpu = SPARC_CPU(cpu_create(machine->cpu_type));
201     env = &cpu->env;
202 
203     cpu_sparc_set_id(env, 0);
204 
205     /* Reset data */
206     reset_info        = g_malloc0(sizeof(ResetData));
207     reset_info->cpu   = cpu;
208     reset_info->sp    = LEON3_RAM_OFFSET + ram_size;
209     qemu_register_reset(main_cpu_reset, reset_info);
210 
211     ahb_pnp = GRLIB_AHB_PNP(object_new(TYPE_GRLIB_AHB_PNP));
212     object_property_set_bool(OBJECT(ahb_pnp), true, "realized", &error_fatal);
213     sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET);
214     grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER,
215                             GRLIB_LEON3_DEV, GRLIB_AHB_MASTER,
216                             GRLIB_CPU_AREA);
217 
218     apb_pnp = GRLIB_APB_PNP(object_new(TYPE_GRLIB_APB_PNP));
219     object_property_set_bool(OBJECT(apb_pnp), true, "realized", &error_fatal);
220     sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET);
221     grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF,
222                             GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV,
223                             GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA);
224 
225     /* Allocate IRQ manager */
226     dev = qdev_create(NULL, TYPE_GRLIB_IRQMP);
227     qdev_prop_set_ptr(dev, "set_pil_in", leon3_set_pil_in);
228     qdev_prop_set_ptr(dev, "set_pil_in_opaque", env);
229     qdev_init_nofail(dev);
230     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET);
231     env->irq_manager = dev;
232     env->qemu_irq_ack = leon3_irq_manager;
233     cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq, dev, MAX_PILS);
234     grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF,
235                             GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV,
236                             2, 0, GRLIB_APBIO_AREA);
237 
238     /* Allocate RAM */
239     if (ram_size > 1 * GiB) {
240         error_report("Too much memory for this machine: %" PRId64 "MB,"
241                      " maximum 1G",
242                      ram_size / MiB);
243         exit(1);
244     }
245 
246     memory_region_allocate_system_memory(ram, NULL, "leon3.ram", ram_size);
247     memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET, ram);
248 
249     /* Allocate BIOS */
250     prom_size = 8 * MiB;
251     memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal);
252     memory_region_set_readonly(prom, true);
253     memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom);
254 
255     /* Load boot prom */
256     if (bios_name == NULL) {
257         bios_name = LEON3_PROM_FILENAME;
258     }
259     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
260 
261     if (filename) {
262         bios_size = get_image_size(filename);
263     } else {
264         bios_size = -1;
265     }
266 
267     if (bios_size > prom_size) {
268         error_report("could not load prom '%s': file too big", filename);
269         exit(1);
270     }
271 
272     if (bios_size > 0) {
273         ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size);
274         if (ret < 0 || ret > prom_size) {
275             error_report("could not load prom '%s'", filename);
276             exit(1);
277         }
278     } else if (kernel_filename == NULL && !qtest_enabled()) {
279         error_report("Can't read bios image '%s'", filename
280                                                    ? filename
281                                                    : LEON3_PROM_FILENAME);
282         exit(1);
283     }
284     g_free(filename);
285 
286     /* Can directly load an application. */
287     if (kernel_filename != NULL) {
288         long     kernel_size;
289         uint64_t entry;
290 
291         kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
292                                &entry, NULL, NULL,
293                                1 /* big endian */, EM_SPARC, 0, 0);
294         if (kernel_size < 0) {
295             kernel_size = load_uimage(kernel_filename, NULL, &entry,
296                                       NULL, NULL, NULL);
297         }
298         if (kernel_size < 0) {
299             error_report("could not load kernel '%s'", kernel_filename);
300             exit(1);
301         }
302         if (bios_size <= 0) {
303             /*
304              * If there is no bios/monitor just start the application but put
305              * the machine in an initialized state through a little
306              * bootloader.
307              */
308             uint8_t *bootloader_entry;
309 
310             bootloader_entry = memory_region_get_ram_ptr(prom);
311             write_bootloader(env, bootloader_entry, entry);
312             env->pc = LEON3_PROM_OFFSET;
313             env->npc = LEON3_PROM_OFFSET + 4;
314             reset_info->entry = LEON3_PROM_OFFSET;
315         }
316     }
317 
318     /* Allocate timers */
319     dev = qdev_create(NULL, TYPE_GRLIB_GPTIMER);
320     qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT);
321     qdev_prop_set_uint32(dev, "frequency", CPU_CLK);
322     qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ);
323     qdev_init_nofail(dev);
324 
325     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET);
326     for (i = 0; i < LEON3_TIMER_COUNT; i++) {
327         sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
328                            cpu_irqs[LEON3_TIMER_IRQ + i]);
329     }
330 
331     grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF,
332                             GRLIB_VENDOR_GAISLER, GRLIB_GPTIMER_DEV,
333                             0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA);
334 
335     /* Allocate uart */
336     if (serial_hd(0)) {
337         dev = qdev_create(NULL, TYPE_GRLIB_APB_UART);
338         qdev_prop_set_chr(dev, "chrdev", serial_hd(0));
339         qdev_init_nofail(dev);
340         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET);
341         sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]);
342         grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF,
343                                 GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1,
344                                 LEON3_UART_IRQ, GRLIB_APBIO_AREA);
345     }
346 }
347 
348 static void leon3_generic_machine_init(MachineClass *mc)
349 {
350     mc->desc = "Leon-3 generic";
351     mc->init = leon3_generic_hw_init;
352     mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3");
353 }
354 
355 DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)
356