1 /* 2 * QEMU Leon3 System Emulator 3 * 4 * Copyright (c) 2010-2019 AdaCore 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/units.h" 27 #include "qemu/error-report.h" 28 #include "qapi/error.h" 29 #include "qemu-common.h" 30 #include "qemu/datadir.h" 31 #include "cpu.h" 32 #include "hw/irq.h" 33 #include "qemu/timer.h" 34 #include "hw/ptimer.h" 35 #include "hw/qdev-properties.h" 36 #include "sysemu/sysemu.h" 37 #include "sysemu/qtest.h" 38 #include "sysemu/reset.h" 39 #include "hw/boards.h" 40 #include "hw/loader.h" 41 #include "elf.h" 42 #include "trace.h" 43 #include "exec/address-spaces.h" 44 45 #include "hw/sparc/grlib.h" 46 #include "hw/misc/grlib_ahb_apb_pnp.h" 47 48 /* Default system clock. */ 49 #define CPU_CLK (40 * 1000 * 1000) 50 51 #define LEON3_PROM_FILENAME "u-boot.bin" 52 #define LEON3_PROM_OFFSET (0x00000000) 53 #define LEON3_RAM_OFFSET (0x40000000) 54 55 #define MAX_PILS 16 56 57 #define LEON3_UART_OFFSET (0x80000100) 58 #define LEON3_UART_IRQ (3) 59 60 #define LEON3_IRQMP_OFFSET (0x80000200) 61 62 #define LEON3_TIMER_OFFSET (0x80000300) 63 #define LEON3_TIMER_IRQ (6) 64 #define LEON3_TIMER_COUNT (2) 65 66 #define LEON3_APB_PNP_OFFSET (0x800FF000) 67 #define LEON3_AHB_PNP_OFFSET (0xFFFFF000) 68 69 typedef struct ResetData { 70 SPARCCPU *cpu; 71 uint32_t entry; /* save kernel entry in case of reset */ 72 target_ulong sp; /* initial stack pointer */ 73 } ResetData; 74 75 static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) 76 { 77 stl_p(code++, 0x82100000); /* mov %g0, %g1 */ 78 stl_p(code++, 0x84100000); /* mov %g0, %g2 */ 79 stl_p(code++, 0x03000000 + 80 extract32(addr, 10, 22)); 81 /* sethi %hi(addr), %g1 */ 82 stl_p(code++, 0x82106000 + 83 extract32(addr, 0, 10)); 84 /* or %g1, addr, %g1 */ 85 stl_p(code++, 0x05000000 + 86 extract32(val, 10, 22)); 87 /* sethi %hi(val), %g2 */ 88 stl_p(code++, 0x8410a000 + 89 extract32(val, 0, 10)); 90 /* or %g2, val, %g2 */ 91 stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ] */ 92 93 return code; 94 } 95 96 /* 97 * When loading a kernel in RAM the machine is expected to be in a different 98 * state (eg: initialized by the bootloader). This little code reproduces 99 * this behavior. 100 */ 101 static void write_bootloader(CPUSPARCState *env, uint8_t *base, 102 hwaddr kernel_addr) 103 { 104 uint32_t *p = (uint32_t *) base; 105 106 /* Initialize the UARTs */ 107 /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */ 108 p = gen_store_u32(p, 0x80000108, 3); 109 110 /* Initialize the TIMER 0 */ 111 /* *GPTIMER_SCALER_RELOAD = 40 - 1; */ 112 p = gen_store_u32(p, 0x80000304, 39); 113 /* *GPTIMER0_COUNTER_RELOAD = 0xFFFE; */ 114 p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE); 115 /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART; */ 116 p = gen_store_u32(p, 0x80000318, 3); 117 118 /* JUMP to the entry point */ 119 stl_p(p++, 0x82100000); /* mov %g0, %g1 */ 120 stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22)); 121 /* sethi %hi(kernel_addr), %g1 */ 122 stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10)); 123 /* or kernel_addr, %g1 */ 124 stl_p(p++, 0x81c04000); /* jmp %g1 */ 125 stl_p(p++, 0x01000000); /* nop */ 126 } 127 128 static void main_cpu_reset(void *opaque) 129 { 130 ResetData *s = (ResetData *)opaque; 131 CPUState *cpu = CPU(s->cpu); 132 CPUSPARCState *env = &s->cpu->env; 133 134 cpu_reset(cpu); 135 136 cpu->halted = 0; 137 env->pc = s->entry; 138 env->npc = s->entry + 4; 139 env->regbase[6] = s->sp; 140 } 141 142 void leon3_irq_ack(void *irq_manager, int intno) 143 { 144 grlib_irqmp_ack((DeviceState *)irq_manager, intno); 145 } 146 147 /* 148 * This device assumes that the incoming 'level' value on the 149 * qemu_irq is the interrupt number, not just a simple 0/1 level. 150 */ 151 static void leon3_set_pil_in(void *opaque, int n, int level) 152 { 153 CPUSPARCState *env = opaque; 154 uint32_t pil_in = level; 155 CPUState *cs; 156 157 assert(env != NULL); 158 159 env->pil_in = pil_in; 160 161 if (env->pil_in && (env->interrupt_index == 0 || 162 (env->interrupt_index & ~15) == TT_EXTINT)) { 163 unsigned int i; 164 165 for (i = 15; i > 0; i--) { 166 if (env->pil_in & (1 << i)) { 167 int old_interrupt = env->interrupt_index; 168 169 env->interrupt_index = TT_EXTINT | i; 170 if (old_interrupt != env->interrupt_index) { 171 cs = env_cpu(env); 172 trace_leon3_set_irq(i); 173 cpu_interrupt(cs, CPU_INTERRUPT_HARD); 174 } 175 break; 176 } 177 } 178 } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) { 179 cs = env_cpu(env); 180 trace_leon3_reset_irq(env->interrupt_index & 15); 181 env->interrupt_index = 0; 182 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); 183 } 184 } 185 186 static void leon3_generic_hw_init(MachineState *machine) 187 { 188 ram_addr_t ram_size = machine->ram_size; 189 const char *bios_name = machine->firmware ?: LEON3_PROM_FILENAME; 190 const char *kernel_filename = machine->kernel_filename; 191 SPARCCPU *cpu; 192 CPUSPARCState *env; 193 MemoryRegion *address_space_mem = get_system_memory(); 194 MemoryRegion *prom = g_new(MemoryRegion, 1); 195 int ret; 196 char *filename; 197 qemu_irq *cpu_irqs = NULL; 198 int bios_size; 199 int prom_size; 200 ResetData *reset_info; 201 DeviceState *dev; 202 int i; 203 AHBPnp *ahb_pnp; 204 APBPnp *apb_pnp; 205 206 /* Init CPU */ 207 cpu = SPARC_CPU(cpu_create(machine->cpu_type)); 208 env = &cpu->env; 209 210 cpu_sparc_set_id(env, 0); 211 212 /* Reset data */ 213 reset_info = g_malloc0(sizeof(ResetData)); 214 reset_info->cpu = cpu; 215 reset_info->sp = LEON3_RAM_OFFSET + ram_size; 216 qemu_register_reset(main_cpu_reset, reset_info); 217 218 ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP)); 219 sysbus_realize_and_unref(SYS_BUS_DEVICE(ahb_pnp), &error_fatal); 220 sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET); 221 grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER, 222 GRLIB_LEON3_DEV, GRLIB_AHB_MASTER, 223 GRLIB_CPU_AREA); 224 225 apb_pnp = GRLIB_APB_PNP(qdev_new(TYPE_GRLIB_APB_PNP)); 226 sysbus_realize_and_unref(SYS_BUS_DEVICE(apb_pnp), &error_fatal); 227 sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET); 228 grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF, 229 GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV, 230 GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA); 231 232 /* Allocate IRQ manager */ 233 dev = qdev_new(TYPE_GRLIB_IRQMP); 234 qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, 235 env, "pil", 1); 236 qdev_connect_gpio_out_named(dev, "grlib-irq", 0, 237 qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); 238 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 239 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); 240 env->irq_manager = dev; 241 env->qemu_irq_ack = leon3_irq_manager; 242 cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq, dev, MAX_PILS); 243 grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF, 244 GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV, 245 2, 0, GRLIB_APBIO_AREA); 246 247 /* Allocate RAM */ 248 if (ram_size > 1 * GiB) { 249 error_report("Too much memory for this machine: %" PRId64 "MB," 250 " maximum 1G", 251 ram_size / MiB); 252 exit(1); 253 } 254 255 memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET, 256 machine->ram); 257 258 /* Allocate BIOS */ 259 prom_size = 8 * MiB; 260 memory_region_init_rom(prom, NULL, "Leon3.bios", prom_size, &error_fatal); 261 memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom); 262 263 /* Load boot prom */ 264 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 265 266 if (filename) { 267 bios_size = get_image_size(filename); 268 } else { 269 bios_size = -1; 270 } 271 272 if (bios_size > prom_size) { 273 error_report("could not load prom '%s': file too big", filename); 274 exit(1); 275 } 276 277 if (bios_size > 0) { 278 ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size); 279 if (ret < 0 || ret > prom_size) { 280 error_report("could not load prom '%s'", filename); 281 exit(1); 282 } 283 } else if (kernel_filename == NULL && !qtest_enabled()) { 284 error_report("Can't read bios image '%s'", filename 285 ? filename 286 : LEON3_PROM_FILENAME); 287 exit(1); 288 } 289 g_free(filename); 290 291 /* Can directly load an application. */ 292 if (kernel_filename != NULL) { 293 long kernel_size; 294 uint64_t entry; 295 296 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 297 &entry, NULL, NULL, NULL, 298 1 /* big endian */, EM_SPARC, 0, 0); 299 if (kernel_size < 0) { 300 kernel_size = load_uimage(kernel_filename, NULL, &entry, 301 NULL, NULL, NULL); 302 } 303 if (kernel_size < 0) { 304 error_report("could not load kernel '%s'", kernel_filename); 305 exit(1); 306 } 307 if (bios_size <= 0) { 308 /* 309 * If there is no bios/monitor just start the application but put 310 * the machine in an initialized state through a little 311 * bootloader. 312 */ 313 uint8_t *bootloader_entry; 314 315 bootloader_entry = memory_region_get_ram_ptr(prom); 316 write_bootloader(env, bootloader_entry, entry); 317 env->pc = LEON3_PROM_OFFSET; 318 env->npc = LEON3_PROM_OFFSET + 4; 319 reset_info->entry = LEON3_PROM_OFFSET; 320 } 321 } 322 323 /* Allocate timers */ 324 dev = qdev_new(TYPE_GRLIB_GPTIMER); 325 qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); 326 qdev_prop_set_uint32(dev, "frequency", CPU_CLK); 327 qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); 328 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 329 330 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); 331 for (i = 0; i < LEON3_TIMER_COUNT; i++) { 332 sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, 333 cpu_irqs[LEON3_TIMER_IRQ + i]); 334 } 335 336 grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF, 337 GRLIB_VENDOR_GAISLER, GRLIB_GPTIMER_DEV, 338 0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA); 339 340 /* Allocate uart */ 341 dev = qdev_new(TYPE_GRLIB_APB_UART); 342 qdev_prop_set_chr(dev, "chrdev", serial_hd(0)); 343 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 344 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET); 345 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]); 346 grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF, 347 GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1, 348 LEON3_UART_IRQ, GRLIB_APBIO_AREA); 349 } 350 351 static void leon3_generic_machine_init(MachineClass *mc) 352 { 353 mc->desc = "Leon-3 generic"; 354 mc->init = leon3_generic_hw_init; 355 mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3"); 356 mc->default_ram_id = "leon3.ram"; 357 } 358 359 DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init) 360