1 /* 2 * QEMU Leon3 System Emulator 3 * 4 * Copyright (c) 2010-2019 AdaCore 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/units.h" 27 #include "qemu/error-report.h" 28 #include "qapi/error.h" 29 #include "qemu-common.h" 30 #include "cpu.h" 31 #include "hw/irq.h" 32 #include "qemu/timer.h" 33 #include "hw/ptimer.h" 34 #include "hw/qdev-properties.h" 35 #include "sysemu/sysemu.h" 36 #include "sysemu/qtest.h" 37 #include "sysemu/reset.h" 38 #include "hw/boards.h" 39 #include "hw/loader.h" 40 #include "elf.h" 41 #include "trace.h" 42 #include "exec/address-spaces.h" 43 44 #include "hw/sparc/grlib.h" 45 #include "hw/misc/grlib_ahb_apb_pnp.h" 46 47 /* Default system clock. */ 48 #define CPU_CLK (40 * 1000 * 1000) 49 50 #define LEON3_PROM_FILENAME "u-boot.bin" 51 #define LEON3_PROM_OFFSET (0x00000000) 52 #define LEON3_RAM_OFFSET (0x40000000) 53 54 #define MAX_PILS 16 55 56 #define LEON3_UART_OFFSET (0x80000100) 57 #define LEON3_UART_IRQ (3) 58 59 #define LEON3_IRQMP_OFFSET (0x80000200) 60 61 #define LEON3_TIMER_OFFSET (0x80000300) 62 #define LEON3_TIMER_IRQ (6) 63 #define LEON3_TIMER_COUNT (2) 64 65 #define LEON3_APB_PNP_OFFSET (0x800FF000) 66 #define LEON3_AHB_PNP_OFFSET (0xFFFFF000) 67 68 typedef struct ResetData { 69 SPARCCPU *cpu; 70 uint32_t entry; /* save kernel entry in case of reset */ 71 target_ulong sp; /* initial stack pointer */ 72 } ResetData; 73 74 static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) 75 { 76 stl_p(code++, 0x82100000); /* mov %g0, %g1 */ 77 stl_p(code++, 0x84100000); /* mov %g0, %g2 */ 78 stl_p(code++, 0x03000000 + 79 extract32(addr, 10, 22)); 80 /* sethi %hi(addr), %g1 */ 81 stl_p(code++, 0x82106000 + 82 extract32(addr, 0, 10)); 83 /* or %g1, addr, %g1 */ 84 stl_p(code++, 0x05000000 + 85 extract32(val, 10, 22)); 86 /* sethi %hi(val), %g2 */ 87 stl_p(code++, 0x8410a000 + 88 extract32(val, 0, 10)); 89 /* or %g2, val, %g2 */ 90 stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ] */ 91 92 return code; 93 } 94 95 /* 96 * When loading a kernel in RAM the machine is expected to be in a different 97 * state (eg: initialized by the bootloader). This little code reproduces 98 * this behavior. 99 */ 100 static void write_bootloader(CPUSPARCState *env, uint8_t *base, 101 hwaddr kernel_addr) 102 { 103 uint32_t *p = (uint32_t *) base; 104 105 /* Initialize the UARTs */ 106 /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */ 107 p = gen_store_u32(p, 0x80000108, 3); 108 109 /* Initialize the TIMER 0 */ 110 /* *GPTIMER_SCALER_RELOAD = 40 - 1; */ 111 p = gen_store_u32(p, 0x80000304, 39); 112 /* *GPTIMER0_COUNTER_RELOAD = 0xFFFE; */ 113 p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE); 114 /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART; */ 115 p = gen_store_u32(p, 0x80000318, 3); 116 117 /* JUMP to the entry point */ 118 stl_p(p++, 0x82100000); /* mov %g0, %g1 */ 119 stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22)); 120 /* sethi %hi(kernel_addr), %g1 */ 121 stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10)); 122 /* or kernel_addr, %g1 */ 123 stl_p(p++, 0x81c04000); /* jmp %g1 */ 124 stl_p(p++, 0x01000000); /* nop */ 125 } 126 127 static void main_cpu_reset(void *opaque) 128 { 129 ResetData *s = (ResetData *)opaque; 130 CPUState *cpu = CPU(s->cpu); 131 CPUSPARCState *env = &s->cpu->env; 132 133 cpu_reset(cpu); 134 135 cpu->halted = 0; 136 env->pc = s->entry; 137 env->npc = s->entry + 4; 138 env->regbase[6] = s->sp; 139 } 140 141 void leon3_irq_ack(void *irq_manager, int intno) 142 { 143 grlib_irqmp_ack((DeviceState *)irq_manager, intno); 144 } 145 146 static void leon3_set_pil_in(void *opaque, uint32_t pil_in) 147 { 148 CPUSPARCState *env = (CPUSPARCState *)opaque; 149 CPUState *cs; 150 151 assert(env != NULL); 152 153 env->pil_in = pil_in; 154 155 if (env->pil_in && (env->interrupt_index == 0 || 156 (env->interrupt_index & ~15) == TT_EXTINT)) { 157 unsigned int i; 158 159 for (i = 15; i > 0; i--) { 160 if (env->pil_in & (1 << i)) { 161 int old_interrupt = env->interrupt_index; 162 163 env->interrupt_index = TT_EXTINT | i; 164 if (old_interrupt != env->interrupt_index) { 165 cs = env_cpu(env); 166 trace_leon3_set_irq(i); 167 cpu_interrupt(cs, CPU_INTERRUPT_HARD); 168 } 169 break; 170 } 171 } 172 } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) { 173 cs = env_cpu(env); 174 trace_leon3_reset_irq(env->interrupt_index & 15); 175 env->interrupt_index = 0; 176 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); 177 } 178 } 179 180 static void leon3_generic_hw_init(MachineState *machine) 181 { 182 ram_addr_t ram_size = machine->ram_size; 183 const char *kernel_filename = machine->kernel_filename; 184 SPARCCPU *cpu; 185 CPUSPARCState *env; 186 MemoryRegion *address_space_mem = get_system_memory(); 187 MemoryRegion *ram = g_new(MemoryRegion, 1); 188 MemoryRegion *prom = g_new(MemoryRegion, 1); 189 int ret; 190 char *filename; 191 qemu_irq *cpu_irqs = NULL; 192 int bios_size; 193 int prom_size; 194 ResetData *reset_info; 195 DeviceState *dev; 196 int i; 197 AHBPnp *ahb_pnp; 198 APBPnp *apb_pnp; 199 200 /* Init CPU */ 201 cpu = SPARC_CPU(cpu_create(machine->cpu_type)); 202 env = &cpu->env; 203 204 cpu_sparc_set_id(env, 0); 205 206 /* Reset data */ 207 reset_info = g_malloc0(sizeof(ResetData)); 208 reset_info->cpu = cpu; 209 reset_info->sp = LEON3_RAM_OFFSET + ram_size; 210 qemu_register_reset(main_cpu_reset, reset_info); 211 212 ahb_pnp = GRLIB_AHB_PNP(object_new(TYPE_GRLIB_AHB_PNP)); 213 object_property_set_bool(OBJECT(ahb_pnp), true, "realized", &error_fatal); 214 sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET); 215 grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER, 216 GRLIB_LEON3_DEV, GRLIB_AHB_MASTER, 217 GRLIB_CPU_AREA); 218 219 apb_pnp = GRLIB_APB_PNP(object_new(TYPE_GRLIB_APB_PNP)); 220 object_property_set_bool(OBJECT(apb_pnp), true, "realized", &error_fatal); 221 sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET); 222 grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF, 223 GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV, 224 GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA); 225 226 /* Allocate IRQ manager */ 227 dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); 228 qdev_prop_set_ptr(dev, "set_pil_in", leon3_set_pil_in); 229 qdev_prop_set_ptr(dev, "set_pil_in_opaque", env); 230 qdev_init_nofail(dev); 231 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); 232 env->irq_manager = dev; 233 env->qemu_irq_ack = leon3_irq_manager; 234 cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq, dev, MAX_PILS); 235 grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF, 236 GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV, 237 2, 0, GRLIB_APBIO_AREA); 238 239 /* Allocate RAM */ 240 if (ram_size > 1 * GiB) { 241 error_report("Too much memory for this machine: %" PRId64 "MB," 242 " maximum 1G", 243 ram_size / MiB); 244 exit(1); 245 } 246 247 memory_region_allocate_system_memory(ram, NULL, "leon3.ram", ram_size); 248 memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET, ram); 249 250 /* Allocate BIOS */ 251 prom_size = 8 * MiB; 252 memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal); 253 memory_region_set_readonly(prom, true); 254 memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom); 255 256 /* Load boot prom */ 257 if (bios_name == NULL) { 258 bios_name = LEON3_PROM_FILENAME; 259 } 260 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 261 262 if (filename) { 263 bios_size = get_image_size(filename); 264 } else { 265 bios_size = -1; 266 } 267 268 if (bios_size > prom_size) { 269 error_report("could not load prom '%s': file too big", filename); 270 exit(1); 271 } 272 273 if (bios_size > 0) { 274 ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size); 275 if (ret < 0 || ret > prom_size) { 276 error_report("could not load prom '%s'", filename); 277 exit(1); 278 } 279 } else if (kernel_filename == NULL && !qtest_enabled()) { 280 error_report("Can't read bios image '%s'", filename 281 ? filename 282 : LEON3_PROM_FILENAME); 283 exit(1); 284 } 285 g_free(filename); 286 287 /* Can directly load an application. */ 288 if (kernel_filename != NULL) { 289 long kernel_size; 290 uint64_t entry; 291 292 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 293 &entry, NULL, NULL, 294 1 /* big endian */, EM_SPARC, 0, 0); 295 if (kernel_size < 0) { 296 kernel_size = load_uimage(kernel_filename, NULL, &entry, 297 NULL, NULL, NULL); 298 } 299 if (kernel_size < 0) { 300 error_report("could not load kernel '%s'", kernel_filename); 301 exit(1); 302 } 303 if (bios_size <= 0) { 304 /* 305 * If there is no bios/monitor just start the application but put 306 * the machine in an initialized state through a little 307 * bootloader. 308 */ 309 uint8_t *bootloader_entry; 310 311 bootloader_entry = memory_region_get_ram_ptr(prom); 312 write_bootloader(env, bootloader_entry, entry); 313 env->pc = LEON3_PROM_OFFSET; 314 env->npc = LEON3_PROM_OFFSET + 4; 315 reset_info->entry = LEON3_PROM_OFFSET; 316 } 317 } 318 319 /* Allocate timers */ 320 dev = qdev_create(NULL, TYPE_GRLIB_GPTIMER); 321 qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); 322 qdev_prop_set_uint32(dev, "frequency", CPU_CLK); 323 qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); 324 qdev_init_nofail(dev); 325 326 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); 327 for (i = 0; i < LEON3_TIMER_COUNT; i++) { 328 sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, 329 cpu_irqs[LEON3_TIMER_IRQ + i]); 330 } 331 332 grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF, 333 GRLIB_VENDOR_GAISLER, GRLIB_GPTIMER_DEV, 334 0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA); 335 336 /* Allocate uart */ 337 if (serial_hd(0)) { 338 dev = qdev_create(NULL, TYPE_GRLIB_APB_UART); 339 qdev_prop_set_chr(dev, "chrdev", serial_hd(0)); 340 qdev_init_nofail(dev); 341 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET); 342 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]); 343 grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF, 344 GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1, 345 LEON3_UART_IRQ, GRLIB_APBIO_AREA); 346 } 347 } 348 349 static void leon3_generic_machine_init(MachineClass *mc) 350 { 351 mc->desc = "Leon-3 generic"; 352 mc->init = leon3_generic_hw_init; 353 mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3"); 354 } 355 356 DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init) 357