xref: /openbmc/qemu/hw/sparc/leon3.c (revision 2c316f9af4752369ac86be85cd8846d6365e4e68)
1 /*
2  * QEMU Leon3 System Emulator
3  *
4  * Copyright (c) 2010-2019 AdaCore
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "qemu/error-report.h"
28 #include "qapi/error.h"
29 #include "qemu-common.h"
30 #include "qemu/datadir.h"
31 #include "cpu.h"
32 #include "hw/irq.h"
33 #include "qemu/timer.h"
34 #include "hw/ptimer.h"
35 #include "hw/qdev-properties.h"
36 #include "sysemu/sysemu.h"
37 #include "sysemu/qtest.h"
38 #include "sysemu/reset.h"
39 #include "hw/boards.h"
40 #include "hw/loader.h"
41 #include "elf.h"
42 #include "trace.h"
43 
44 #include "hw/sparc/grlib.h"
45 #include "hw/misc/grlib_ahb_apb_pnp.h"
46 
47 /* Default system clock.  */
48 #define CPU_CLK (40 * 1000 * 1000)
49 
50 #define LEON3_PROM_FILENAME "u-boot.bin"
51 #define LEON3_PROM_OFFSET    (0x00000000)
52 #define LEON3_RAM_OFFSET     (0x40000000)
53 
54 #define LEON3_UART_OFFSET  (0x80000100)
55 #define LEON3_UART_IRQ     (3)
56 
57 #define LEON3_IRQMP_OFFSET (0x80000200)
58 
59 #define LEON3_TIMER_OFFSET (0x80000300)
60 #define LEON3_TIMER_IRQ    (6)
61 #define LEON3_TIMER_COUNT  (2)
62 
63 #define LEON3_APB_PNP_OFFSET (0x800FF000)
64 #define LEON3_AHB_PNP_OFFSET (0xFFFFF000)
65 
66 typedef struct ResetData {
67     SPARCCPU *cpu;
68     uint32_t  entry;            /* save kernel entry in case of reset */
69     target_ulong sp;            /* initial stack pointer */
70 } ResetData;
71 
72 static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val)
73 {
74     stl_p(code++, 0x82100000); /* mov %g0, %g1                */
75     stl_p(code++, 0x84100000); /* mov %g0, %g2                */
76     stl_p(code++, 0x03000000 +
77       extract32(addr, 10, 22));
78                                /* sethi %hi(addr), %g1        */
79     stl_p(code++, 0x82106000 +
80       extract32(addr, 0, 10));
81                                /* or %g1, addr, %g1           */
82     stl_p(code++, 0x05000000 +
83       extract32(val, 10, 22));
84                                /* sethi %hi(val), %g2         */
85     stl_p(code++, 0x8410a000 +
86       extract32(val, 0, 10));
87                                /* or %g2, val, %g2            */
88     stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ]             */
89 
90     return code;
91 }
92 
93 /*
94  * When loading a kernel in RAM the machine is expected to be in a different
95  * state (eg: initialized by the bootloader). This little code reproduces
96  * this behavior.
97  */
98 static void write_bootloader(CPUSPARCState *env, uint8_t *base,
99                              hwaddr kernel_addr)
100 {
101     uint32_t *p = (uint32_t *) base;
102 
103     /* Initialize the UARTs                                        */
104     /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */
105     p = gen_store_u32(p, 0x80000108, 3);
106 
107     /* Initialize the TIMER 0                                      */
108     /* *GPTIMER_SCALER_RELOAD = 40 - 1;                            */
109     p = gen_store_u32(p, 0x80000304, 39);
110     /* *GPTIMER0_COUNTER_RELOAD = 0xFFFE;                          */
111     p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE);
112     /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART;        */
113     p = gen_store_u32(p, 0x80000318, 3);
114 
115     /* JUMP to the entry point                                     */
116     stl_p(p++, 0x82100000); /* mov %g0, %g1 */
117     stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22));
118                             /* sethi %hi(kernel_addr), %g1 */
119     stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10));
120                             /* or kernel_addr, %g1 */
121     stl_p(p++, 0x81c04000); /* jmp  %g1 */
122     stl_p(p++, 0x01000000); /* nop */
123 }
124 
125 static void main_cpu_reset(void *opaque)
126 {
127     ResetData *s   = (ResetData *)opaque;
128     CPUState *cpu = CPU(s->cpu);
129     CPUSPARCState  *env = &s->cpu->env;
130 
131     cpu_reset(cpu);
132 
133     cpu->halted = 0;
134     env->pc     = s->entry;
135     env->npc    = s->entry + 4;
136     env->regbase[6] = s->sp;
137 }
138 
139 void leon3_irq_ack(void *irq_manager, int intno)
140 {
141     grlib_irqmp_ack((DeviceState *)irq_manager, intno);
142 }
143 
144 /*
145  * This device assumes that the incoming 'level' value on the
146  * qemu_irq is the interrupt number, not just a simple 0/1 level.
147  */
148 static void leon3_set_pil_in(void *opaque, int n, int level)
149 {
150     CPUSPARCState *env = opaque;
151     uint32_t pil_in = level;
152     CPUState *cs;
153 
154     assert(env != NULL);
155 
156     env->pil_in = pil_in;
157 
158     if (env->pil_in && (env->interrupt_index == 0 ||
159                         (env->interrupt_index & ~15) == TT_EXTINT)) {
160         unsigned int i;
161 
162         for (i = 15; i > 0; i--) {
163             if (env->pil_in & (1 << i)) {
164                 int old_interrupt = env->interrupt_index;
165 
166                 env->interrupt_index = TT_EXTINT | i;
167                 if (old_interrupt != env->interrupt_index) {
168                     cs = env_cpu(env);
169                     trace_leon3_set_irq(i);
170                     cpu_interrupt(cs, CPU_INTERRUPT_HARD);
171                 }
172                 break;
173             }
174         }
175     } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) {
176         cs = env_cpu(env);
177         trace_leon3_reset_irq(env->interrupt_index & 15);
178         env->interrupt_index = 0;
179         cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
180     }
181 }
182 
183 static void leon3_generic_hw_init(MachineState *machine)
184 {
185     ram_addr_t ram_size = machine->ram_size;
186     const char *bios_name = machine->firmware ?: LEON3_PROM_FILENAME;
187     const char *kernel_filename = machine->kernel_filename;
188     SPARCCPU *cpu;
189     CPUSPARCState   *env;
190     MemoryRegion *address_space_mem = get_system_memory();
191     MemoryRegion *prom = g_new(MemoryRegion, 1);
192     int         ret;
193     char       *filename;
194     int         bios_size;
195     int         prom_size;
196     ResetData  *reset_info;
197     DeviceState *dev, *irqmpdev;
198     int i;
199     AHBPnp *ahb_pnp;
200     APBPnp *apb_pnp;
201 
202     /* Init CPU */
203     cpu = SPARC_CPU(cpu_create(machine->cpu_type));
204     env = &cpu->env;
205 
206     cpu_sparc_set_id(env, 0);
207 
208     /* Reset data */
209     reset_info        = g_malloc0(sizeof(ResetData));
210     reset_info->cpu   = cpu;
211     reset_info->sp    = LEON3_RAM_OFFSET + ram_size;
212     qemu_register_reset(main_cpu_reset, reset_info);
213 
214     ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP));
215     sysbus_realize_and_unref(SYS_BUS_DEVICE(ahb_pnp), &error_fatal);
216     sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET);
217     grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER,
218                             GRLIB_LEON3_DEV, GRLIB_AHB_MASTER,
219                             GRLIB_CPU_AREA);
220 
221     apb_pnp = GRLIB_APB_PNP(qdev_new(TYPE_GRLIB_APB_PNP));
222     sysbus_realize_and_unref(SYS_BUS_DEVICE(apb_pnp), &error_fatal);
223     sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET);
224     grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF,
225                             GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV,
226                             GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA);
227 
228     /* Allocate IRQ manager */
229     irqmpdev = qdev_new(TYPE_GRLIB_IRQMP);
230     qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in,
231                                         env, "pil", 1);
232     qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", 0,
233                                 qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0));
234     sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal);
235     sysbus_mmio_map(SYS_BUS_DEVICE(irqmpdev), 0, LEON3_IRQMP_OFFSET);
236     env->irq_manager = irqmpdev;
237     env->qemu_irq_ack = leon3_irq_manager;
238     grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF,
239                             GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV,
240                             2, 0, GRLIB_APBIO_AREA);
241 
242     /* Allocate RAM */
243     if (ram_size > 1 * GiB) {
244         error_report("Too much memory for this machine: %" PRId64 "MB,"
245                      " maximum 1G",
246                      ram_size / MiB);
247         exit(1);
248     }
249 
250     memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET,
251                                 machine->ram);
252 
253     /* Allocate BIOS */
254     prom_size = 8 * MiB;
255     memory_region_init_rom(prom, NULL, "Leon3.bios", prom_size, &error_fatal);
256     memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom);
257 
258     /* Load boot prom */
259     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
260 
261     if (filename) {
262         bios_size = get_image_size(filename);
263     } else {
264         bios_size = -1;
265     }
266 
267     if (bios_size > prom_size) {
268         error_report("could not load prom '%s': file too big", filename);
269         exit(1);
270     }
271 
272     if (bios_size > 0) {
273         ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size);
274         if (ret < 0 || ret > prom_size) {
275             error_report("could not load prom '%s'", filename);
276             exit(1);
277         }
278     } else if (kernel_filename == NULL && !qtest_enabled()) {
279         error_report("Can't read bios image '%s'", filename
280                                                    ? filename
281                                                    : LEON3_PROM_FILENAME);
282         exit(1);
283     }
284     g_free(filename);
285 
286     /* Can directly load an application. */
287     if (kernel_filename != NULL) {
288         long     kernel_size;
289         uint64_t entry;
290 
291         kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
292                                &entry, NULL, NULL, NULL,
293                                1 /* big endian */, EM_SPARC, 0, 0);
294         if (kernel_size < 0) {
295             kernel_size = load_uimage(kernel_filename, NULL, &entry,
296                                       NULL, NULL, NULL);
297         }
298         if (kernel_size < 0) {
299             error_report("could not load kernel '%s'", kernel_filename);
300             exit(1);
301         }
302         if (bios_size <= 0) {
303             /*
304              * If there is no bios/monitor just start the application but put
305              * the machine in an initialized state through a little
306              * bootloader.
307              */
308             uint8_t *bootloader_entry;
309 
310             bootloader_entry = memory_region_get_ram_ptr(prom);
311             write_bootloader(env, bootloader_entry, entry);
312             env->pc = LEON3_PROM_OFFSET;
313             env->npc = LEON3_PROM_OFFSET + 4;
314             reset_info->entry = LEON3_PROM_OFFSET;
315         }
316     }
317 
318     /* Allocate timers */
319     dev = qdev_new(TYPE_GRLIB_GPTIMER);
320     qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT);
321     qdev_prop_set_uint32(dev, "frequency", CPU_CLK);
322     qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ);
323     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
324 
325     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET);
326     for (i = 0; i < LEON3_TIMER_COUNT; i++) {
327         sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
328                            qdev_get_gpio_in(irqmpdev, LEON3_TIMER_IRQ + i));
329     }
330 
331     grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF,
332                             GRLIB_VENDOR_GAISLER, GRLIB_GPTIMER_DEV,
333                             0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA);
334 
335     /* Allocate uart */
336     dev = qdev_new(TYPE_GRLIB_APB_UART);
337     qdev_prop_set_chr(dev, "chrdev", serial_hd(0));
338     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
339     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET);
340     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
341                        qdev_get_gpio_in(irqmpdev, LEON3_UART_IRQ));
342     grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF,
343                             GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1,
344                             LEON3_UART_IRQ, GRLIB_APBIO_AREA);
345 }
346 
347 static void leon3_generic_machine_init(MachineClass *mc)
348 {
349     mc->desc = "Leon-3 generic";
350     mc->init = leon3_generic_hw_init;
351     mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3");
352     mc->default_ram_id = "leon3.ram";
353 }
354 
355 DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)
356