1 /* 2 * QEMU Leon3 System Emulator 3 * 4 * Copyright (c) 2010-2019 AdaCore 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/units.h" 27 #include "qemu/error-report.h" 28 #include "qapi/error.h" 29 #include "qemu-common.h" 30 #include "cpu.h" 31 #include "hw/irq.h" 32 #include "qemu/timer.h" 33 #include "hw/ptimer.h" 34 #include "hw/qdev-properties.h" 35 #include "sysemu/sysemu.h" 36 #include "sysemu/qtest.h" 37 #include "sysemu/reset.h" 38 #include "hw/boards.h" 39 #include "hw/loader.h" 40 #include "elf.h" 41 #include "trace.h" 42 #include "exec/address-spaces.h" 43 44 #include "hw/sparc/grlib.h" 45 #include "hw/misc/grlib_ahb_apb_pnp.h" 46 47 /* Default system clock. */ 48 #define CPU_CLK (40 * 1000 * 1000) 49 50 #define LEON3_PROM_FILENAME "u-boot.bin" 51 #define LEON3_PROM_OFFSET (0x00000000) 52 #define LEON3_RAM_OFFSET (0x40000000) 53 54 #define MAX_PILS 16 55 56 #define LEON3_UART_OFFSET (0x80000100) 57 #define LEON3_UART_IRQ (3) 58 59 #define LEON3_IRQMP_OFFSET (0x80000200) 60 61 #define LEON3_TIMER_OFFSET (0x80000300) 62 #define LEON3_TIMER_IRQ (6) 63 #define LEON3_TIMER_COUNT (2) 64 65 #define LEON3_APB_PNP_OFFSET (0x800FF000) 66 #define LEON3_AHB_PNP_OFFSET (0xFFFFF000) 67 68 typedef struct ResetData { 69 SPARCCPU *cpu; 70 uint32_t entry; /* save kernel entry in case of reset */ 71 target_ulong sp; /* initial stack pointer */ 72 } ResetData; 73 74 static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) 75 { 76 stl_p(code++, 0x82100000); /* mov %g0, %g1 */ 77 stl_p(code++, 0x84100000); /* mov %g0, %g2 */ 78 stl_p(code++, 0x03000000 + 79 extract32(addr, 10, 22)); 80 /* sethi %hi(addr), %g1 */ 81 stl_p(code++, 0x82106000 + 82 extract32(addr, 0, 10)); 83 /* or %g1, addr, %g1 */ 84 stl_p(code++, 0x05000000 + 85 extract32(val, 10, 22)); 86 /* sethi %hi(val), %g2 */ 87 stl_p(code++, 0x8410a000 + 88 extract32(val, 0, 10)); 89 /* or %g2, val, %g2 */ 90 stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ] */ 91 92 return code; 93 } 94 95 /* 96 * When loading a kernel in RAM the machine is expected to be in a different 97 * state (eg: initialized by the bootloader). This little code reproduces 98 * this behavior. 99 */ 100 static void write_bootloader(CPUSPARCState *env, uint8_t *base, 101 hwaddr kernel_addr) 102 { 103 uint32_t *p = (uint32_t *) base; 104 105 /* Initialize the UARTs */ 106 /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */ 107 p = gen_store_u32(p, 0x80000108, 3); 108 109 /* Initialize the TIMER 0 */ 110 /* *GPTIMER_SCALER_RELOAD = 40 - 1; */ 111 p = gen_store_u32(p, 0x80000304, 39); 112 /* *GPTIMER0_COUNTER_RELOAD = 0xFFFE; */ 113 p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE); 114 /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART; */ 115 p = gen_store_u32(p, 0x80000318, 3); 116 117 /* JUMP to the entry point */ 118 stl_p(p++, 0x82100000); /* mov %g0, %g1 */ 119 stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22)); 120 /* sethi %hi(kernel_addr), %g1 */ 121 stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10)); 122 /* or kernel_addr, %g1 */ 123 stl_p(p++, 0x81c04000); /* jmp %g1 */ 124 stl_p(p++, 0x01000000); /* nop */ 125 } 126 127 static void main_cpu_reset(void *opaque) 128 { 129 ResetData *s = (ResetData *)opaque; 130 CPUState *cpu = CPU(s->cpu); 131 CPUSPARCState *env = &s->cpu->env; 132 133 cpu_reset(cpu); 134 135 cpu->halted = 0; 136 env->pc = s->entry; 137 env->npc = s->entry + 4; 138 env->regbase[6] = s->sp; 139 } 140 141 void leon3_irq_ack(void *irq_manager, int intno) 142 { 143 grlib_irqmp_ack((DeviceState *)irq_manager, intno); 144 } 145 146 /* 147 * This device assumes that the incoming 'level' value on the 148 * qemu_irq is the interrupt number, not just a simple 0/1 level. 149 */ 150 static void leon3_set_pil_in(void *opaque, int n, int level) 151 { 152 CPUSPARCState *env = opaque; 153 uint32_t pil_in = level; 154 CPUState *cs; 155 156 assert(env != NULL); 157 158 env->pil_in = pil_in; 159 160 if (env->pil_in && (env->interrupt_index == 0 || 161 (env->interrupt_index & ~15) == TT_EXTINT)) { 162 unsigned int i; 163 164 for (i = 15; i > 0; i--) { 165 if (env->pil_in & (1 << i)) { 166 int old_interrupt = env->interrupt_index; 167 168 env->interrupt_index = TT_EXTINT | i; 169 if (old_interrupt != env->interrupt_index) { 170 cs = env_cpu(env); 171 trace_leon3_set_irq(i); 172 cpu_interrupt(cs, CPU_INTERRUPT_HARD); 173 } 174 break; 175 } 176 } 177 } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) { 178 cs = env_cpu(env); 179 trace_leon3_reset_irq(env->interrupt_index & 15); 180 env->interrupt_index = 0; 181 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); 182 } 183 } 184 185 static void leon3_generic_hw_init(MachineState *machine) 186 { 187 ram_addr_t ram_size = machine->ram_size; 188 const char *kernel_filename = machine->kernel_filename; 189 SPARCCPU *cpu; 190 CPUSPARCState *env; 191 MemoryRegion *address_space_mem = get_system_memory(); 192 MemoryRegion *ram = g_new(MemoryRegion, 1); 193 MemoryRegion *prom = g_new(MemoryRegion, 1); 194 int ret; 195 char *filename; 196 qemu_irq *cpu_irqs = NULL; 197 int bios_size; 198 int prom_size; 199 ResetData *reset_info; 200 DeviceState *dev; 201 int i; 202 AHBPnp *ahb_pnp; 203 APBPnp *apb_pnp; 204 205 /* Init CPU */ 206 cpu = SPARC_CPU(cpu_create(machine->cpu_type)); 207 env = &cpu->env; 208 209 cpu_sparc_set_id(env, 0); 210 211 /* Reset data */ 212 reset_info = g_malloc0(sizeof(ResetData)); 213 reset_info->cpu = cpu; 214 reset_info->sp = LEON3_RAM_OFFSET + ram_size; 215 qemu_register_reset(main_cpu_reset, reset_info); 216 217 ahb_pnp = GRLIB_AHB_PNP(object_new(TYPE_GRLIB_AHB_PNP)); 218 object_property_set_bool(OBJECT(ahb_pnp), true, "realized", &error_fatal); 219 sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET); 220 grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER, 221 GRLIB_LEON3_DEV, GRLIB_AHB_MASTER, 222 GRLIB_CPU_AREA); 223 224 apb_pnp = GRLIB_APB_PNP(object_new(TYPE_GRLIB_APB_PNP)); 225 object_property_set_bool(OBJECT(apb_pnp), true, "realized", &error_fatal); 226 sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET); 227 grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF, 228 GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV, 229 GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA); 230 231 /* Allocate IRQ manager */ 232 dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); 233 qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, 234 env, "pil", 1); 235 qdev_connect_gpio_out_named(dev, "grlib-irq", 0, 236 qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); 237 qdev_init_nofail(dev); 238 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); 239 env->irq_manager = dev; 240 env->qemu_irq_ack = leon3_irq_manager; 241 cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq, dev, MAX_PILS); 242 grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF, 243 GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV, 244 2, 0, GRLIB_APBIO_AREA); 245 246 /* Allocate RAM */ 247 if (ram_size > 1 * GiB) { 248 error_report("Too much memory for this machine: %" PRId64 "MB," 249 " maximum 1G", 250 ram_size / MiB); 251 exit(1); 252 } 253 254 memory_region_allocate_system_memory(ram, NULL, "leon3.ram", ram_size); 255 memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET, ram); 256 257 /* Allocate BIOS */ 258 prom_size = 8 * MiB; 259 memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal); 260 memory_region_set_readonly(prom, true); 261 memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom); 262 263 /* Load boot prom */ 264 if (bios_name == NULL) { 265 bios_name = LEON3_PROM_FILENAME; 266 } 267 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 268 269 if (filename) { 270 bios_size = get_image_size(filename); 271 } else { 272 bios_size = -1; 273 } 274 275 if (bios_size > prom_size) { 276 error_report("could not load prom '%s': file too big", filename); 277 exit(1); 278 } 279 280 if (bios_size > 0) { 281 ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size); 282 if (ret < 0 || ret > prom_size) { 283 error_report("could not load prom '%s'", filename); 284 exit(1); 285 } 286 } else if (kernel_filename == NULL && !qtest_enabled()) { 287 error_report("Can't read bios image '%s'", filename 288 ? filename 289 : LEON3_PROM_FILENAME); 290 exit(1); 291 } 292 g_free(filename); 293 294 /* Can directly load an application. */ 295 if (kernel_filename != NULL) { 296 long kernel_size; 297 uint64_t entry; 298 299 kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, 300 &entry, NULL, NULL, 301 1 /* big endian */, EM_SPARC, 0, 0); 302 if (kernel_size < 0) { 303 kernel_size = load_uimage(kernel_filename, NULL, &entry, 304 NULL, NULL, NULL); 305 } 306 if (kernel_size < 0) { 307 error_report("could not load kernel '%s'", kernel_filename); 308 exit(1); 309 } 310 if (bios_size <= 0) { 311 /* 312 * If there is no bios/monitor just start the application but put 313 * the machine in an initialized state through a little 314 * bootloader. 315 */ 316 uint8_t *bootloader_entry; 317 318 bootloader_entry = memory_region_get_ram_ptr(prom); 319 write_bootloader(env, bootloader_entry, entry); 320 env->pc = LEON3_PROM_OFFSET; 321 env->npc = LEON3_PROM_OFFSET + 4; 322 reset_info->entry = LEON3_PROM_OFFSET; 323 } 324 } 325 326 /* Allocate timers */ 327 dev = qdev_create(NULL, TYPE_GRLIB_GPTIMER); 328 qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); 329 qdev_prop_set_uint32(dev, "frequency", CPU_CLK); 330 qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); 331 qdev_init_nofail(dev); 332 333 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); 334 for (i = 0; i < LEON3_TIMER_COUNT; i++) { 335 sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, 336 cpu_irqs[LEON3_TIMER_IRQ + i]); 337 } 338 339 grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF, 340 GRLIB_VENDOR_GAISLER, GRLIB_GPTIMER_DEV, 341 0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA); 342 343 /* Allocate uart */ 344 if (serial_hd(0)) { 345 dev = qdev_create(NULL, TYPE_GRLIB_APB_UART); 346 qdev_prop_set_chr(dev, "chrdev", serial_hd(0)); 347 qdev_init_nofail(dev); 348 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET); 349 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]); 350 grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF, 351 GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1, 352 LEON3_UART_IRQ, GRLIB_APBIO_AREA); 353 } 354 } 355 356 static void leon3_generic_machine_init(MachineClass *mc) 357 { 358 mc->desc = "Leon-3 generic"; 359 mc->init = leon3_generic_hw_init; 360 mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3"); 361 } 362 363 DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init) 364