1 /* 2 * SMBIOS Support 3 * 4 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P. 5 * Copyright (C) 2013 Red Hat, Inc. 6 * 7 * Authors: 8 * Alex Williamson <alex.williamson@hp.com> 9 * Markus Armbruster <armbru@redhat.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/units.h" 20 #include "qapi/error.h" 21 #include "qemu/config-file.h" 22 #include "qemu/error-report.h" 23 #include "qemu/module.h" 24 #include "qemu/option.h" 25 #include "sysemu/sysemu.h" 26 #include "qemu/uuid.h" 27 #include "hw/firmware/smbios.h" 28 #include "hw/loader.h" 29 #include "hw/boards.h" 30 #include "hw/pci/pci_bus.h" 31 #include "hw/pci/pci_device.h" 32 #include "smbios_build.h" 33 34 /* legacy structures and constants for <= 2.0 machines */ 35 struct smbios_header { 36 uint16_t length; 37 uint8_t type; 38 } QEMU_PACKED; 39 40 struct smbios_field { 41 struct smbios_header header; 42 uint8_t type; 43 uint16_t offset; 44 uint8_t data[]; 45 } QEMU_PACKED; 46 47 struct smbios_table { 48 struct smbios_header header; 49 uint8_t data[]; 50 } QEMU_PACKED; 51 52 #define SMBIOS_FIELD_ENTRY 0 53 #define SMBIOS_TABLE_ENTRY 1 54 55 static uint8_t *smbios_entries; 56 static size_t smbios_entries_len; 57 static bool smbios_legacy = true; 58 static bool smbios_uuid_encoded = true; 59 /* end: legacy structures & constants for <= 2.0 machines */ 60 61 62 uint8_t *smbios_tables; 63 size_t smbios_tables_len; 64 unsigned smbios_table_max; 65 unsigned smbios_table_cnt; 66 static SmbiosEntryPointType smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 67 68 static SmbiosEntryPoint ep; 69 70 static int smbios_type4_count = 0; 71 static bool smbios_immutable; 72 static bool smbios_have_defaults; 73 static uint32_t smbios_cpuid_version, smbios_cpuid_features, smbios_smp_sockets; 74 75 static DECLARE_BITMAP(have_binfile_bitmap, SMBIOS_MAX_TYPE+1); 76 static DECLARE_BITMAP(have_fields_bitmap, SMBIOS_MAX_TYPE+1); 77 78 static struct { 79 const char *vendor, *version, *date; 80 bool have_major_minor, uefi; 81 uint8_t major, minor; 82 } type0; 83 84 static struct { 85 const char *manufacturer, *product, *version, *serial, *sku, *family; 86 /* uuid is in qemu_uuid */ 87 } type1; 88 89 static struct { 90 const char *manufacturer, *product, *version, *serial, *asset, *location; 91 } type2; 92 93 static struct { 94 const char *manufacturer, *version, *serial, *asset, *sku; 95 } type3; 96 97 /* 98 * SVVP requires max_speed and current_speed to be set and not being 99 * 0 which counts as unknown (SMBIOS 3.1.0/Table 21). Set the 100 * default value to 2000MHz as we did before. 101 */ 102 #define DEFAULT_CPU_SPEED 2000 103 104 static struct { 105 uint16_t processor_family; 106 const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part; 107 uint64_t max_speed; 108 uint64_t current_speed; 109 uint64_t processor_id; 110 } type4 = { 111 .max_speed = DEFAULT_CPU_SPEED, 112 .current_speed = DEFAULT_CPU_SPEED, 113 .processor_id = 0, 114 .processor_family = 0x01, /* Other */ 115 }; 116 117 struct type8_instance { 118 const char *internal_reference, *external_reference; 119 uint8_t connector_type, port_type; 120 QTAILQ_ENTRY(type8_instance) next; 121 }; 122 static QTAILQ_HEAD(, type8_instance) type8 = QTAILQ_HEAD_INITIALIZER(type8); 123 124 static struct { 125 size_t nvalues; 126 char **values; 127 } type11; 128 129 static struct { 130 const char *loc_pfx, *bank, *manufacturer, *serial, *asset, *part; 131 uint16_t speed; 132 } type17; 133 134 static QEnumLookup type41_kind_lookup = { 135 .array = (const char *const[]) { 136 "other", 137 "unknown", 138 "video", 139 "scsi", 140 "ethernet", 141 "tokenring", 142 "sound", 143 "pata", 144 "sata", 145 "sas", 146 }, 147 .size = 10 148 }; 149 struct type41_instance { 150 const char *designation, *pcidev; 151 uint8_t instance, kind; 152 QTAILQ_ENTRY(type41_instance) next; 153 }; 154 static QTAILQ_HEAD(, type41_instance) type41 = QTAILQ_HEAD_INITIALIZER(type41); 155 156 static QemuOptsList qemu_smbios_opts = { 157 .name = "smbios", 158 .head = QTAILQ_HEAD_INITIALIZER(qemu_smbios_opts.head), 159 .desc = { 160 /* 161 * no elements => accept any params 162 * validation will happen later 163 */ 164 { /* end of list */ } 165 } 166 }; 167 168 static const QemuOptDesc qemu_smbios_file_opts[] = { 169 { 170 .name = "file", 171 .type = QEMU_OPT_STRING, 172 .help = "binary file containing an SMBIOS element", 173 }, 174 { /* end of list */ } 175 }; 176 177 static const QemuOptDesc qemu_smbios_type0_opts[] = { 178 { 179 .name = "type", 180 .type = QEMU_OPT_NUMBER, 181 .help = "SMBIOS element type", 182 },{ 183 .name = "vendor", 184 .type = QEMU_OPT_STRING, 185 .help = "vendor name", 186 },{ 187 .name = "version", 188 .type = QEMU_OPT_STRING, 189 .help = "version number", 190 },{ 191 .name = "date", 192 .type = QEMU_OPT_STRING, 193 .help = "release date", 194 },{ 195 .name = "release", 196 .type = QEMU_OPT_STRING, 197 .help = "revision number", 198 },{ 199 .name = "uefi", 200 .type = QEMU_OPT_BOOL, 201 .help = "uefi support", 202 }, 203 { /* end of list */ } 204 }; 205 206 static const QemuOptDesc qemu_smbios_type1_opts[] = { 207 { 208 .name = "type", 209 .type = QEMU_OPT_NUMBER, 210 .help = "SMBIOS element type", 211 },{ 212 .name = "manufacturer", 213 .type = QEMU_OPT_STRING, 214 .help = "manufacturer name", 215 },{ 216 .name = "product", 217 .type = QEMU_OPT_STRING, 218 .help = "product name", 219 },{ 220 .name = "version", 221 .type = QEMU_OPT_STRING, 222 .help = "version number", 223 },{ 224 .name = "serial", 225 .type = QEMU_OPT_STRING, 226 .help = "serial number", 227 },{ 228 .name = "uuid", 229 .type = QEMU_OPT_STRING, 230 .help = "UUID", 231 },{ 232 .name = "sku", 233 .type = QEMU_OPT_STRING, 234 .help = "SKU number", 235 },{ 236 .name = "family", 237 .type = QEMU_OPT_STRING, 238 .help = "family name", 239 }, 240 { /* end of list */ } 241 }; 242 243 static const QemuOptDesc qemu_smbios_type2_opts[] = { 244 { 245 .name = "type", 246 .type = QEMU_OPT_NUMBER, 247 .help = "SMBIOS element type", 248 },{ 249 .name = "manufacturer", 250 .type = QEMU_OPT_STRING, 251 .help = "manufacturer name", 252 },{ 253 .name = "product", 254 .type = QEMU_OPT_STRING, 255 .help = "product name", 256 },{ 257 .name = "version", 258 .type = QEMU_OPT_STRING, 259 .help = "version number", 260 },{ 261 .name = "serial", 262 .type = QEMU_OPT_STRING, 263 .help = "serial number", 264 },{ 265 .name = "asset", 266 .type = QEMU_OPT_STRING, 267 .help = "asset tag number", 268 },{ 269 .name = "location", 270 .type = QEMU_OPT_STRING, 271 .help = "location in chassis", 272 }, 273 { /* end of list */ } 274 }; 275 276 static const QemuOptDesc qemu_smbios_type3_opts[] = { 277 { 278 .name = "type", 279 .type = QEMU_OPT_NUMBER, 280 .help = "SMBIOS element type", 281 },{ 282 .name = "manufacturer", 283 .type = QEMU_OPT_STRING, 284 .help = "manufacturer name", 285 },{ 286 .name = "version", 287 .type = QEMU_OPT_STRING, 288 .help = "version number", 289 },{ 290 .name = "serial", 291 .type = QEMU_OPT_STRING, 292 .help = "serial number", 293 },{ 294 .name = "asset", 295 .type = QEMU_OPT_STRING, 296 .help = "asset tag number", 297 },{ 298 .name = "sku", 299 .type = QEMU_OPT_STRING, 300 .help = "SKU number", 301 }, 302 { /* end of list */ } 303 }; 304 305 static const QemuOptDesc qemu_smbios_type4_opts[] = { 306 { 307 .name = "type", 308 .type = QEMU_OPT_NUMBER, 309 .help = "SMBIOS element type", 310 },{ 311 .name = "sock_pfx", 312 .type = QEMU_OPT_STRING, 313 .help = "socket designation string prefix", 314 },{ 315 .name = "manufacturer", 316 .type = QEMU_OPT_STRING, 317 .help = "manufacturer name", 318 },{ 319 .name = "version", 320 .type = QEMU_OPT_STRING, 321 .help = "version number", 322 },{ 323 .name = "max-speed", 324 .type = QEMU_OPT_NUMBER, 325 .help = "max speed in MHz", 326 },{ 327 .name = "current-speed", 328 .type = QEMU_OPT_NUMBER, 329 .help = "speed at system boot in MHz", 330 },{ 331 .name = "serial", 332 .type = QEMU_OPT_STRING, 333 .help = "serial number", 334 },{ 335 .name = "asset", 336 .type = QEMU_OPT_STRING, 337 .help = "asset tag number", 338 },{ 339 .name = "part", 340 .type = QEMU_OPT_STRING, 341 .help = "part number", 342 }, { 343 .name = "processor-family", 344 .type = QEMU_OPT_NUMBER, 345 .help = "processor family", 346 }, { 347 .name = "processor-id", 348 .type = QEMU_OPT_NUMBER, 349 .help = "processor id", 350 }, 351 { /* end of list */ } 352 }; 353 354 static const QemuOptDesc qemu_smbios_type8_opts[] = { 355 { 356 .name = "type", 357 .type = QEMU_OPT_NUMBER, 358 .help = "SMBIOS element type", 359 }, 360 { 361 .name = "internal_reference", 362 .type = QEMU_OPT_STRING, 363 .help = "internal reference designator", 364 }, 365 { 366 .name = "external_reference", 367 .type = QEMU_OPT_STRING, 368 .help = "external reference designator", 369 }, 370 { 371 .name = "connector_type", 372 .type = QEMU_OPT_NUMBER, 373 .help = "connector type", 374 }, 375 { 376 .name = "port_type", 377 .type = QEMU_OPT_NUMBER, 378 .help = "port type", 379 }, 380 { /* end of list */ } 381 }; 382 383 static const QemuOptDesc qemu_smbios_type11_opts[] = { 384 { 385 .name = "type", 386 .type = QEMU_OPT_NUMBER, 387 .help = "SMBIOS element type", 388 }, 389 { 390 .name = "value", 391 .type = QEMU_OPT_STRING, 392 .help = "OEM string data", 393 }, 394 { 395 .name = "path", 396 .type = QEMU_OPT_STRING, 397 .help = "OEM string data from file", 398 }, 399 { /* end of list */ } 400 }; 401 402 static const QemuOptDesc qemu_smbios_type17_opts[] = { 403 { 404 .name = "type", 405 .type = QEMU_OPT_NUMBER, 406 .help = "SMBIOS element type", 407 },{ 408 .name = "loc_pfx", 409 .type = QEMU_OPT_STRING, 410 .help = "device locator string prefix", 411 },{ 412 .name = "bank", 413 .type = QEMU_OPT_STRING, 414 .help = "bank locator string", 415 },{ 416 .name = "manufacturer", 417 .type = QEMU_OPT_STRING, 418 .help = "manufacturer name", 419 },{ 420 .name = "serial", 421 .type = QEMU_OPT_STRING, 422 .help = "serial number", 423 },{ 424 .name = "asset", 425 .type = QEMU_OPT_STRING, 426 .help = "asset tag number", 427 },{ 428 .name = "part", 429 .type = QEMU_OPT_STRING, 430 .help = "part number", 431 },{ 432 .name = "speed", 433 .type = QEMU_OPT_NUMBER, 434 .help = "maximum capable speed", 435 }, 436 { /* end of list */ } 437 }; 438 439 static const QemuOptDesc qemu_smbios_type41_opts[] = { 440 { 441 .name = "type", 442 .type = QEMU_OPT_NUMBER, 443 .help = "SMBIOS element type", 444 },{ 445 .name = "designation", 446 .type = QEMU_OPT_STRING, 447 .help = "reference designation string", 448 },{ 449 .name = "kind", 450 .type = QEMU_OPT_STRING, 451 .help = "device type", 452 .def_value_str = "other", 453 },{ 454 .name = "instance", 455 .type = QEMU_OPT_NUMBER, 456 .help = "device type instance", 457 },{ 458 .name = "pcidev", 459 .type = QEMU_OPT_STRING, 460 .help = "PCI device", 461 }, 462 { /* end of list */ } 463 }; 464 465 static void smbios_register_config(void) 466 { 467 qemu_add_opts(&qemu_smbios_opts); 468 } 469 470 opts_init(smbios_register_config); 471 472 /* 473 * The SMBIOS 2.1 "structure table length" field in the 474 * entry point uses a 16-bit integer, so we're limited 475 * in total table size 476 */ 477 #define SMBIOS_21_MAX_TABLES_LEN 0xffff 478 479 static void smbios_validate_table(MachineState *ms) 480 { 481 uint32_t expect_t4_count = smbios_legacy ? 482 ms->smp.cpus : smbios_smp_sockets; 483 484 if (smbios_type4_count && smbios_type4_count != expect_t4_count) { 485 error_report("Expected %d SMBIOS Type 4 tables, got %d instead", 486 expect_t4_count, smbios_type4_count); 487 exit(1); 488 } 489 490 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_32 && 491 smbios_tables_len > SMBIOS_21_MAX_TABLES_LEN) { 492 error_report("SMBIOS 2.1 table length %zu exceeds %d", 493 smbios_tables_len, SMBIOS_21_MAX_TABLES_LEN); 494 exit(1); 495 } 496 } 497 498 499 /* legacy setup functions for <= 2.0 machines */ 500 static void smbios_add_field(int type, int offset, const void *data, size_t len) 501 { 502 struct smbios_field *field; 503 504 if (!smbios_entries) { 505 smbios_entries_len = sizeof(uint16_t); 506 smbios_entries = g_malloc0(smbios_entries_len); 507 } 508 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 509 sizeof(*field) + len); 510 field = (struct smbios_field *)(smbios_entries + smbios_entries_len); 511 field->header.type = SMBIOS_FIELD_ENTRY; 512 field->header.length = cpu_to_le16(sizeof(*field) + len); 513 514 field->type = type; 515 field->offset = cpu_to_le16(offset); 516 memcpy(field->data, data, len); 517 518 smbios_entries_len += sizeof(*field) + len; 519 (*(uint16_t *)smbios_entries) = 520 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 521 } 522 523 static void smbios_maybe_add_str(int type, int offset, const char *data) 524 { 525 if (data) { 526 smbios_add_field(type, offset, data, strlen(data) + 1); 527 } 528 } 529 530 static void smbios_build_type_0_fields(void) 531 { 532 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, vendor_str), 533 type0.vendor); 534 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, bios_version_str), 535 type0.version); 536 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, 537 bios_release_date_str), 538 type0.date); 539 if (type0.have_major_minor) { 540 smbios_add_field(0, offsetof(struct smbios_type_0, 541 system_bios_major_release), 542 &type0.major, 1); 543 smbios_add_field(0, offsetof(struct smbios_type_0, 544 system_bios_minor_release), 545 &type0.minor, 1); 546 } 547 } 548 549 static void smbios_build_type_1_fields(void) 550 { 551 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, manufacturer_str), 552 type1.manufacturer); 553 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, product_name_str), 554 type1.product); 555 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, version_str), 556 type1.version); 557 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, serial_number_str), 558 type1.serial); 559 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, sku_number_str), 560 type1.sku); 561 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, family_str), 562 type1.family); 563 if (qemu_uuid_set) { 564 /* We don't encode the UUID in the "wire format" here because this 565 * function is for legacy mode and needs to keep the guest ABI, and 566 * because we don't know what's the SMBIOS version advertised by the 567 * BIOS. 568 */ 569 smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 570 &qemu_uuid, 16); 571 } 572 } 573 574 uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length) 575 { 576 if (!smbios_legacy) { 577 *length = 0; 578 return NULL; 579 } 580 581 if (!smbios_immutable) { 582 smbios_build_type_0_fields(); 583 smbios_build_type_1_fields(); 584 smbios_validate_table(ms); 585 smbios_immutable = true; 586 } 587 *length = smbios_entries_len; 588 return smbios_entries; 589 } 590 /* end: legacy setup functions for <= 2.0 machines */ 591 592 593 bool smbios_skip_table(uint8_t type, bool required_table) 594 { 595 if (test_bit(type, have_binfile_bitmap)) { 596 return true; /* user provided their own binary blob(s) */ 597 } 598 if (test_bit(type, have_fields_bitmap)) { 599 return false; /* user provided fields via command line */ 600 } 601 if (smbios_have_defaults && required_table) { 602 return false; /* we're building tables, and this one's required */ 603 } 604 return true; 605 } 606 607 #define T0_BASE 0x000 608 #define T1_BASE 0x100 609 #define T2_BASE 0x200 610 #define T3_BASE 0x300 611 #define T4_BASE 0x400 612 #define T11_BASE 0xe00 613 614 #define T16_BASE 0x1000 615 #define T17_BASE 0x1100 616 #define T19_BASE 0x1300 617 #define T32_BASE 0x2000 618 #define T41_BASE 0x2900 619 #define T127_BASE 0x7F00 620 621 static void smbios_build_type_0_table(void) 622 { 623 SMBIOS_BUILD_TABLE_PRE(0, T0_BASE, false); /* optional, leave up to BIOS */ 624 625 SMBIOS_TABLE_SET_STR(0, vendor_str, type0.vendor); 626 SMBIOS_TABLE_SET_STR(0, bios_version_str, type0.version); 627 628 t->bios_starting_address_segment = cpu_to_le16(0xE800); /* from SeaBIOS */ 629 630 SMBIOS_TABLE_SET_STR(0, bios_release_date_str, type0.date); 631 632 t->bios_rom_size = 0; /* hardcoded in SeaBIOS with FIXME comment */ 633 634 t->bios_characteristics = cpu_to_le64(0x08); /* Not supported */ 635 t->bios_characteristics_extension_bytes[0] = 0; 636 t->bios_characteristics_extension_bytes[1] = 0x14; /* TCD/SVVP | VM */ 637 if (type0.uefi) { 638 t->bios_characteristics_extension_bytes[1] |= 0x08; /* |= UEFI */ 639 } 640 641 if (type0.have_major_minor) { 642 t->system_bios_major_release = type0.major; 643 t->system_bios_minor_release = type0.minor; 644 } else { 645 t->system_bios_major_release = 0; 646 t->system_bios_minor_release = 0; 647 } 648 649 /* hardcoded in SeaBIOS */ 650 t->embedded_controller_major_release = 0xFF; 651 t->embedded_controller_minor_release = 0xFF; 652 653 SMBIOS_BUILD_TABLE_POST; 654 } 655 656 /* Encode UUID from the big endian encoding described on RFC4122 to the wire 657 * format specified by SMBIOS version 2.6. 658 */ 659 static void smbios_encode_uuid(struct smbios_uuid *uuid, QemuUUID *in) 660 { 661 memcpy(uuid, in, 16); 662 if (smbios_uuid_encoded) { 663 uuid->time_low = bswap32(uuid->time_low); 664 uuid->time_mid = bswap16(uuid->time_mid); 665 uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version); 666 } 667 } 668 669 static void smbios_build_type_1_table(void) 670 { 671 SMBIOS_BUILD_TABLE_PRE(1, T1_BASE, true); /* required */ 672 673 SMBIOS_TABLE_SET_STR(1, manufacturer_str, type1.manufacturer); 674 SMBIOS_TABLE_SET_STR(1, product_name_str, type1.product); 675 SMBIOS_TABLE_SET_STR(1, version_str, type1.version); 676 SMBIOS_TABLE_SET_STR(1, serial_number_str, type1.serial); 677 if (qemu_uuid_set) { 678 smbios_encode_uuid(&t->uuid, &qemu_uuid); 679 } else { 680 memset(&t->uuid, 0, 16); 681 } 682 t->wake_up_type = 0x06; /* power switch */ 683 SMBIOS_TABLE_SET_STR(1, sku_number_str, type1.sku); 684 SMBIOS_TABLE_SET_STR(1, family_str, type1.family); 685 686 SMBIOS_BUILD_TABLE_POST; 687 } 688 689 static void smbios_build_type_2_table(void) 690 { 691 SMBIOS_BUILD_TABLE_PRE(2, T2_BASE, false); /* optional */ 692 693 SMBIOS_TABLE_SET_STR(2, manufacturer_str, type2.manufacturer); 694 SMBIOS_TABLE_SET_STR(2, product_str, type2.product); 695 SMBIOS_TABLE_SET_STR(2, version_str, type2.version); 696 SMBIOS_TABLE_SET_STR(2, serial_number_str, type2.serial); 697 SMBIOS_TABLE_SET_STR(2, asset_tag_number_str, type2.asset); 698 t->feature_flags = 0x01; /* Motherboard */ 699 SMBIOS_TABLE_SET_STR(2, location_str, type2.location); 700 t->chassis_handle = cpu_to_le16(0x300); /* Type 3 (System enclosure) */ 701 t->board_type = 0x0A; /* Motherboard */ 702 t->contained_element_count = 0; 703 704 SMBIOS_BUILD_TABLE_POST; 705 } 706 707 static void smbios_build_type_3_table(void) 708 { 709 SMBIOS_BUILD_TABLE_PRE(3, T3_BASE, true); /* required */ 710 711 SMBIOS_TABLE_SET_STR(3, manufacturer_str, type3.manufacturer); 712 t->type = 0x01; /* Other */ 713 SMBIOS_TABLE_SET_STR(3, version_str, type3.version); 714 SMBIOS_TABLE_SET_STR(3, serial_number_str, type3.serial); 715 SMBIOS_TABLE_SET_STR(3, asset_tag_number_str, type3.asset); 716 t->boot_up_state = 0x03; /* Safe */ 717 t->power_supply_state = 0x03; /* Safe */ 718 t->thermal_state = 0x03; /* Safe */ 719 t->security_status = 0x02; /* Unknown */ 720 t->oem_defined = cpu_to_le32(0); 721 t->height = 0; 722 t->number_of_power_cords = 0; 723 t->contained_element_count = 0; 724 t->contained_element_record_length = 0; 725 SMBIOS_TABLE_SET_STR(3, sku_number_str, type3.sku); 726 727 SMBIOS_BUILD_TABLE_POST; 728 } 729 730 static void smbios_build_type_4_table(MachineState *ms, unsigned instance) 731 { 732 char sock_str[128]; 733 size_t tbl_len = SMBIOS_TYPE_4_LEN_V28; 734 unsigned threads_per_socket; 735 unsigned cores_per_socket; 736 737 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_64) { 738 tbl_len = SMBIOS_TYPE_4_LEN_V30; 739 } 740 741 SMBIOS_BUILD_TABLE_PRE_SIZE(4, T4_BASE + instance, 742 true, tbl_len); /* required */ 743 744 snprintf(sock_str, sizeof(sock_str), "%s%2x", type4.sock_pfx, instance); 745 SMBIOS_TABLE_SET_STR(4, socket_designation_str, sock_str); 746 t->processor_type = 0x03; /* CPU */ 747 t->processor_family = 0xfe; /* use Processor Family 2 field */ 748 SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer); 749 if (type4.processor_id == 0) { 750 t->processor_id[0] = cpu_to_le32(smbios_cpuid_version); 751 t->processor_id[1] = cpu_to_le32(smbios_cpuid_features); 752 } else { 753 t->processor_id[0] = cpu_to_le32((uint32_t)type4.processor_id); 754 t->processor_id[1] = cpu_to_le32(type4.processor_id >> 32); 755 } 756 SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version); 757 t->voltage = 0; 758 t->external_clock = cpu_to_le16(0); /* Unknown */ 759 t->max_speed = cpu_to_le16(type4.max_speed); 760 t->current_speed = cpu_to_le16(type4.current_speed); 761 t->status = 0x41; /* Socket populated, CPU enabled */ 762 t->processor_upgrade = 0x01; /* Other */ 763 t->l1_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 764 t->l2_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 765 t->l3_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 766 SMBIOS_TABLE_SET_STR(4, serial_number_str, type4.serial); 767 SMBIOS_TABLE_SET_STR(4, asset_tag_number_str, type4.asset); 768 SMBIOS_TABLE_SET_STR(4, part_number_str, type4.part); 769 770 threads_per_socket = machine_topo_get_threads_per_socket(ms); 771 cores_per_socket = machine_topo_get_cores_per_socket(ms); 772 773 t->core_count = (cores_per_socket > 255) ? 0xFF : cores_per_socket; 774 t->core_enabled = t->core_count; 775 776 t->thread_count = (threads_per_socket > 255) ? 0xFF : threads_per_socket; 777 778 t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */ 779 t->processor_family2 = cpu_to_le16(type4.processor_family); 780 781 if (tbl_len == SMBIOS_TYPE_4_LEN_V30) { 782 t->core_count2 = t->core_enabled2 = cpu_to_le16(cores_per_socket); 783 t->thread_count2 = cpu_to_le16(threads_per_socket); 784 } 785 786 SMBIOS_BUILD_TABLE_POST; 787 smbios_type4_count++; 788 } 789 790 static void smbios_build_type_8_table(void) 791 { 792 unsigned instance = 0; 793 struct type8_instance *t8; 794 795 QTAILQ_FOREACH(t8, &type8, next) { 796 SMBIOS_BUILD_TABLE_PRE(8, T0_BASE + instance, true); 797 798 SMBIOS_TABLE_SET_STR(8, internal_reference_str, t8->internal_reference); 799 SMBIOS_TABLE_SET_STR(8, external_reference_str, t8->external_reference); 800 /* most vendors seem to set this to None */ 801 t->internal_connector_type = 0x0; 802 t->external_connector_type = t8->connector_type; 803 t->port_type = t8->port_type; 804 805 SMBIOS_BUILD_TABLE_POST; 806 instance++; 807 } 808 } 809 810 static void smbios_build_type_11_table(void) 811 { 812 char count_str[128]; 813 size_t i; 814 815 if (type11.nvalues == 0) { 816 return; 817 } 818 819 SMBIOS_BUILD_TABLE_PRE(11, T11_BASE, true); /* required */ 820 821 snprintf(count_str, sizeof(count_str), "%zu", type11.nvalues); 822 t->count = type11.nvalues; 823 824 for (i = 0; i < type11.nvalues; i++) { 825 SMBIOS_TABLE_SET_STR_LIST(11, type11.values[i]); 826 g_free(type11.values[i]); 827 type11.values[i] = NULL; 828 } 829 830 SMBIOS_BUILD_TABLE_POST; 831 } 832 833 #define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */ 834 835 static void smbios_build_type_16_table(unsigned dimm_cnt) 836 { 837 uint64_t size_kb; 838 839 SMBIOS_BUILD_TABLE_PRE(16, T16_BASE, true); /* required */ 840 841 t->location = 0x01; /* Other */ 842 t->use = 0x03; /* System memory */ 843 t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */ 844 size_kb = QEMU_ALIGN_UP(current_machine->ram_size, KiB) / KiB; 845 if (size_kb < MAX_T16_STD_SZ) { 846 t->maximum_capacity = cpu_to_le32(size_kb); 847 t->extended_maximum_capacity = cpu_to_le64(0); 848 } else { 849 t->maximum_capacity = cpu_to_le32(MAX_T16_STD_SZ); 850 t->extended_maximum_capacity = cpu_to_le64(current_machine->ram_size); 851 } 852 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 853 t->number_of_memory_devices = cpu_to_le16(dimm_cnt); 854 855 SMBIOS_BUILD_TABLE_POST; 856 } 857 858 #define MAX_T17_STD_SZ 0x7FFF /* (32G - 1M), in Megabytes */ 859 #define MAX_T17_EXT_SZ 0x80000000 /* 2P, in Megabytes */ 860 861 static void smbios_build_type_17_table(unsigned instance, uint64_t size) 862 { 863 char loc_str[128]; 864 uint64_t size_mb; 865 866 SMBIOS_BUILD_TABLE_PRE(17, T17_BASE + instance, true); /* required */ 867 868 t->physical_memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 869 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 870 t->total_width = cpu_to_le16(0xFFFF); /* Unknown */ 871 t->data_width = cpu_to_le16(0xFFFF); /* Unknown */ 872 size_mb = QEMU_ALIGN_UP(size, MiB) / MiB; 873 if (size_mb < MAX_T17_STD_SZ) { 874 t->size = cpu_to_le16(size_mb); 875 t->extended_size = cpu_to_le32(0); 876 } else { 877 assert(size_mb < MAX_T17_EXT_SZ); 878 t->size = cpu_to_le16(MAX_T17_STD_SZ); 879 t->extended_size = cpu_to_le32(size_mb); 880 } 881 t->form_factor = 0x09; /* DIMM */ 882 t->device_set = 0; /* Not in a set */ 883 snprintf(loc_str, sizeof(loc_str), "%s %d", type17.loc_pfx, instance); 884 SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str); 885 SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank); 886 t->memory_type = 0x07; /* RAM */ 887 t->type_detail = cpu_to_le16(0x02); /* Other */ 888 t->speed = cpu_to_le16(type17.speed); 889 SMBIOS_TABLE_SET_STR(17, manufacturer_str, type17.manufacturer); 890 SMBIOS_TABLE_SET_STR(17, serial_number_str, type17.serial); 891 SMBIOS_TABLE_SET_STR(17, asset_tag_number_str, type17.asset); 892 SMBIOS_TABLE_SET_STR(17, part_number_str, type17.part); 893 t->attributes = 0; /* Unknown */ 894 t->configured_clock_speed = t->speed; /* reuse value for max speed */ 895 t->minimum_voltage = cpu_to_le16(0); /* Unknown */ 896 t->maximum_voltage = cpu_to_le16(0); /* Unknown */ 897 t->configured_voltage = cpu_to_le16(0); /* Unknown */ 898 899 SMBIOS_BUILD_TABLE_POST; 900 } 901 902 static void smbios_build_type_19_table(unsigned instance, unsigned offset, 903 uint64_t start, uint64_t size) 904 { 905 uint64_t end, start_kb, end_kb; 906 907 SMBIOS_BUILD_TABLE_PRE(19, T19_BASE + offset + instance, 908 true); /* required */ 909 910 end = start + size - 1; 911 assert(end > start); 912 start_kb = start / KiB; 913 end_kb = end / KiB; 914 if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) { 915 t->starting_address = cpu_to_le32(start_kb); 916 t->ending_address = cpu_to_le32(end_kb); 917 t->extended_starting_address = 918 t->extended_ending_address = cpu_to_le64(0); 919 } else { 920 t->starting_address = t->ending_address = cpu_to_le32(UINT32_MAX); 921 t->extended_starting_address = cpu_to_le64(start); 922 t->extended_ending_address = cpu_to_le64(end); 923 } 924 t->memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 925 t->partition_width = 1; /* One device per row */ 926 927 SMBIOS_BUILD_TABLE_POST; 928 } 929 930 static void smbios_build_type_32_table(void) 931 { 932 SMBIOS_BUILD_TABLE_PRE(32, T32_BASE, true); /* required */ 933 934 memset(t->reserved, 0, 6); 935 t->boot_status = 0; /* No errors detected */ 936 937 SMBIOS_BUILD_TABLE_POST; 938 } 939 940 static void smbios_build_type_41_table(Error **errp) 941 { 942 unsigned instance = 0; 943 struct type41_instance *t41; 944 945 QTAILQ_FOREACH(t41, &type41, next) { 946 SMBIOS_BUILD_TABLE_PRE(41, T41_BASE + instance, true); 947 948 SMBIOS_TABLE_SET_STR(41, reference_designation_str, t41->designation); 949 t->device_type = t41->kind; 950 t->device_type_instance = t41->instance; 951 t->segment_group_number = cpu_to_le16(0); 952 t->bus_number = 0; 953 t->device_number = 0; 954 955 if (t41->pcidev) { 956 PCIDevice *pdev = NULL; 957 int rc = pci_qdev_find_device(t41->pcidev, &pdev); 958 if (rc != 0) { 959 error_setg(errp, 960 "No PCI device %s for SMBIOS type 41 entry %s", 961 t41->pcidev, t41->designation); 962 return; 963 } 964 /* 965 * We only handle the case were the device is attached to 966 * the PCI root bus. The general case is more complex as 967 * bridges are enumerated later and the table would need 968 * to be updated at this moment. 969 */ 970 if (!pci_bus_is_root(pci_get_bus(pdev))) { 971 error_setg(errp, 972 "Cannot create type 41 entry for PCI device %s: " 973 "not attached to the root bus", 974 t41->pcidev); 975 return; 976 } 977 t->segment_group_number = cpu_to_le16(0); 978 t->bus_number = pci_dev_bus_num(pdev); 979 t->device_number = pdev->devfn; 980 } 981 982 SMBIOS_BUILD_TABLE_POST; 983 instance++; 984 } 985 } 986 987 static void smbios_build_type_127_table(void) 988 { 989 SMBIOS_BUILD_TABLE_PRE(127, T127_BASE, true); /* required */ 990 SMBIOS_BUILD_TABLE_POST; 991 } 992 993 void smbios_set_cpuid(uint32_t version, uint32_t features) 994 { 995 smbios_cpuid_version = version; 996 smbios_cpuid_features = features; 997 } 998 999 #define SMBIOS_SET_DEFAULT(field, value) \ 1000 if (!field) { \ 1001 field = value; \ 1002 } 1003 1004 void smbios_set_default_processor_family(uint16_t processor_family) 1005 { 1006 if (type4.processor_family <= 0x01) { 1007 type4.processor_family = processor_family; 1008 } 1009 } 1010 1011 void smbios_set_defaults(const char *manufacturer, const char *product, 1012 const char *version, bool legacy_mode, 1013 bool uuid_encoded, SmbiosEntryPointType ep_type) 1014 { 1015 smbios_have_defaults = true; 1016 smbios_legacy = legacy_mode; 1017 smbios_uuid_encoded = uuid_encoded; 1018 smbios_ep_type = ep_type; 1019 1020 /* drop unwanted version of command-line file blob(s) */ 1021 if (smbios_legacy) { 1022 g_free(smbios_tables); 1023 /* in legacy mode, also complain if fields were given for types > 1 */ 1024 if (find_next_bit(have_fields_bitmap, 1025 SMBIOS_MAX_TYPE+1, 2) < SMBIOS_MAX_TYPE+1) { 1026 error_report("can't process fields for smbios " 1027 "types > 1 on machine versions < 2.1!"); 1028 exit(1); 1029 } 1030 } else { 1031 g_free(smbios_entries); 1032 } 1033 1034 SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer); 1035 SMBIOS_SET_DEFAULT(type1.product, product); 1036 SMBIOS_SET_DEFAULT(type1.version, version); 1037 SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer); 1038 SMBIOS_SET_DEFAULT(type2.product, product); 1039 SMBIOS_SET_DEFAULT(type2.version, version); 1040 SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer); 1041 SMBIOS_SET_DEFAULT(type3.version, version); 1042 SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU"); 1043 SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer); 1044 SMBIOS_SET_DEFAULT(type4.version, version); 1045 SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM"); 1046 SMBIOS_SET_DEFAULT(type17.manufacturer, manufacturer); 1047 } 1048 1049 static void smbios_entry_point_setup(void) 1050 { 1051 switch (smbios_ep_type) { 1052 case SMBIOS_ENTRY_POINT_TYPE_32: 1053 memcpy(ep.ep21.anchor_string, "_SM_", 4); 1054 memcpy(ep.ep21.intermediate_anchor_string, "_DMI_", 5); 1055 ep.ep21.length = sizeof(struct smbios_21_entry_point); 1056 ep.ep21.entry_point_revision = 0; /* formatted_area reserved */ 1057 memset(ep.ep21.formatted_area, 0, 5); 1058 1059 /* compliant with smbios spec v2.8 */ 1060 ep.ep21.smbios_major_version = 2; 1061 ep.ep21.smbios_minor_version = 8; 1062 ep.ep21.smbios_bcd_revision = 0x28; 1063 1064 /* set during table construction, but BIOS may override: */ 1065 ep.ep21.structure_table_length = cpu_to_le16(smbios_tables_len); 1066 ep.ep21.max_structure_size = cpu_to_le16(smbios_table_max); 1067 ep.ep21.number_of_structures = cpu_to_le16(smbios_table_cnt); 1068 1069 /* BIOS must recalculate */ 1070 ep.ep21.checksum = 0; 1071 ep.ep21.intermediate_checksum = 0; 1072 ep.ep21.structure_table_address = cpu_to_le32(0); 1073 1074 break; 1075 case SMBIOS_ENTRY_POINT_TYPE_64: 1076 memcpy(ep.ep30.anchor_string, "_SM3_", 5); 1077 ep.ep30.length = sizeof(struct smbios_30_entry_point); 1078 ep.ep30.entry_point_revision = 1; 1079 ep.ep30.reserved = 0; 1080 1081 /* compliant with smbios spec 3.0 */ 1082 ep.ep30.smbios_major_version = 3; 1083 ep.ep30.smbios_minor_version = 0; 1084 ep.ep30.smbios_doc_rev = 0; 1085 1086 /* set during table construct, but BIOS might override */ 1087 ep.ep30.structure_table_max_size = cpu_to_le32(smbios_tables_len); 1088 1089 /* BIOS must recalculate */ 1090 ep.ep30.checksum = 0; 1091 ep.ep30.structure_table_address = cpu_to_le64(0); 1092 1093 break; 1094 default: 1095 abort(); 1096 break; 1097 } 1098 } 1099 1100 void smbios_get_tables(MachineState *ms, 1101 const struct smbios_phys_mem_area *mem_array, 1102 const unsigned int mem_array_size, 1103 uint8_t **tables, size_t *tables_len, 1104 uint8_t **anchor, size_t *anchor_len, 1105 Error **errp) 1106 { 1107 unsigned i, dimm_cnt, offset; 1108 1109 if (smbios_legacy) { 1110 *tables = *anchor = NULL; 1111 *tables_len = *anchor_len = 0; 1112 return; 1113 } 1114 1115 if (!smbios_immutable) { 1116 smbios_build_type_0_table(); 1117 smbios_build_type_1_table(); 1118 smbios_build_type_2_table(); 1119 smbios_build_type_3_table(); 1120 1121 smbios_smp_sockets = ms->smp.sockets; 1122 assert(smbios_smp_sockets >= 1); 1123 1124 for (i = 0; i < smbios_smp_sockets; i++) { 1125 smbios_build_type_4_table(ms, i); 1126 } 1127 1128 smbios_build_type_8_table(); 1129 smbios_build_type_11_table(); 1130 1131 #define MAX_DIMM_SZ (16 * GiB) 1132 #define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \ 1133 : ((current_machine->ram_size - 1) % MAX_DIMM_SZ) + 1) 1134 1135 dimm_cnt = QEMU_ALIGN_UP(current_machine->ram_size, MAX_DIMM_SZ) / MAX_DIMM_SZ; 1136 1137 /* 1138 * The offset determines if we need to keep additional space between 1139 * table 17 and table 19 header handle numbers so that they do 1140 * not overlap. For example, for a VM with larger than 8 TB guest 1141 * memory and DIMM like chunks of 16 GiB, the default space between 1142 * the two tables (T19_BASE - T17_BASE = 512) is not enough. 1143 */ 1144 offset = (dimm_cnt > (T19_BASE - T17_BASE)) ? \ 1145 dimm_cnt - (T19_BASE - T17_BASE) : 0; 1146 1147 smbios_build_type_16_table(dimm_cnt); 1148 1149 for (i = 0; i < dimm_cnt; i++) { 1150 smbios_build_type_17_table(i, GET_DIMM_SZ); 1151 } 1152 1153 for (i = 0; i < mem_array_size; i++) { 1154 smbios_build_type_19_table(i, offset, mem_array[i].address, 1155 mem_array[i].length); 1156 } 1157 1158 /* 1159 * make sure 16 bit handle numbers in the headers of tables 19 1160 * and 32 do not overlap. 1161 */ 1162 assert((mem_array_size + offset) < (T32_BASE - T19_BASE)); 1163 1164 smbios_build_type_32_table(); 1165 smbios_build_type_38_table(); 1166 smbios_build_type_41_table(errp); 1167 smbios_build_type_127_table(); 1168 1169 smbios_validate_table(ms); 1170 smbios_entry_point_setup(); 1171 smbios_immutable = true; 1172 } 1173 1174 /* return tables blob and entry point (anchor), and their sizes */ 1175 *tables = smbios_tables; 1176 *tables_len = smbios_tables_len; 1177 *anchor = (uint8_t *)&ep; 1178 1179 /* calculate length based on anchor string */ 1180 if (!strncmp((char *)&ep, "_SM_", 4)) { 1181 *anchor_len = sizeof(struct smbios_21_entry_point); 1182 } else if (!strncmp((char *)&ep, "_SM3_", 5)) { 1183 *anchor_len = sizeof(struct smbios_30_entry_point); 1184 } else { 1185 abort(); 1186 } 1187 } 1188 1189 static void save_opt(const char **dest, QemuOpts *opts, const char *name) 1190 { 1191 const char *val = qemu_opt_get(opts, name); 1192 1193 if (val) { 1194 *dest = val; 1195 } 1196 } 1197 1198 1199 struct opt_list { 1200 size_t *ndest; 1201 char ***dest; 1202 }; 1203 1204 static int save_opt_one(void *opaque, 1205 const char *name, const char *value, 1206 Error **errp) 1207 { 1208 struct opt_list *opt = opaque; 1209 1210 if (g_str_equal(name, "path")) { 1211 g_autoptr(GByteArray) data = g_byte_array_new(); 1212 g_autofree char *buf = g_new(char, 4096); 1213 ssize_t ret; 1214 int fd = qemu_open(value, O_RDONLY, errp); 1215 if (fd < 0) { 1216 return -1; 1217 } 1218 1219 while (1) { 1220 ret = read(fd, buf, 4096); 1221 if (ret == 0) { 1222 break; 1223 } 1224 if (ret < 0) { 1225 error_setg(errp, "Unable to read from %s: %s", 1226 value, strerror(errno)); 1227 qemu_close(fd); 1228 return -1; 1229 } 1230 if (memchr(buf, '\0', ret)) { 1231 error_setg(errp, "NUL in OEM strings value in %s", value); 1232 qemu_close(fd); 1233 return -1; 1234 } 1235 g_byte_array_append(data, (guint8 *)buf, ret); 1236 } 1237 1238 qemu_close(fd); 1239 1240 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1241 (*opt->dest)[*opt->ndest] = (char *)g_byte_array_free(data, FALSE); 1242 (*opt->ndest)++; 1243 data = NULL; 1244 } else if (g_str_equal(name, "value")) { 1245 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1246 (*opt->dest)[*opt->ndest] = g_strdup(value); 1247 (*opt->ndest)++; 1248 } else if (!g_str_equal(name, "type")) { 1249 error_setg(errp, "Unexpected option %s", name); 1250 return -1; 1251 } 1252 1253 return 0; 1254 } 1255 1256 static bool save_opt_list(size_t *ndest, char ***dest, QemuOpts *opts, 1257 Error **errp) 1258 { 1259 struct opt_list opt = { 1260 ndest, dest, 1261 }; 1262 if (!qemu_opt_foreach(opts, save_opt_one, &opt, errp)) { 1263 return false; 1264 } 1265 return true; 1266 } 1267 1268 void smbios_entry_add(QemuOpts *opts, Error **errp) 1269 { 1270 const char *val; 1271 1272 assert(!smbios_immutable); 1273 1274 val = qemu_opt_get(opts, "file"); 1275 if (val) { 1276 struct smbios_structure_header *header; 1277 int size; 1278 struct smbios_table *table; /* legacy mode only */ 1279 1280 if (!qemu_opts_validate(opts, qemu_smbios_file_opts, errp)) { 1281 return; 1282 } 1283 1284 size = get_image_size(val); 1285 if (size == -1 || size < sizeof(struct smbios_structure_header)) { 1286 error_setg(errp, "Cannot read SMBIOS file %s", val); 1287 return; 1288 } 1289 1290 /* 1291 * NOTE: standard double '\0' terminator expected, per smbios spec. 1292 * (except in legacy mode, where the second '\0' is implicit and 1293 * will be inserted by the BIOS). 1294 */ 1295 smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size); 1296 header = (struct smbios_structure_header *)(smbios_tables + 1297 smbios_tables_len); 1298 1299 if (load_image_size(val, (uint8_t *)header, size) != size) { 1300 error_setg(errp, "Failed to load SMBIOS file %s", val); 1301 return; 1302 } 1303 1304 if (header->type <= SMBIOS_MAX_TYPE) { 1305 if (test_bit(header->type, have_fields_bitmap)) { 1306 error_setg(errp, 1307 "can't load type %d struct, fields already specified!", 1308 header->type); 1309 return; 1310 } 1311 set_bit(header->type, have_binfile_bitmap); 1312 } 1313 1314 if (header->type == 4) { 1315 smbios_type4_count++; 1316 } 1317 1318 smbios_tables_len += size; 1319 if (size > smbios_table_max) { 1320 smbios_table_max = size; 1321 } 1322 smbios_table_cnt++; 1323 1324 /* add a copy of the newly loaded blob to legacy smbios_entries */ 1325 /* NOTE: This code runs before smbios_set_defaults(), so we don't 1326 * yet know which mode (legacy vs. aggregate-table) will be 1327 * required. We therefore add the binary blob to both legacy 1328 * (smbios_entries) and aggregate (smbios_tables) tables, and 1329 * delete the one we don't need from smbios_set_defaults(), 1330 * once we know which machine version has been requested. 1331 */ 1332 if (!smbios_entries) { 1333 smbios_entries_len = sizeof(uint16_t); 1334 smbios_entries = g_malloc0(smbios_entries_len); 1335 } 1336 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 1337 size + sizeof(*table)); 1338 table = (struct smbios_table *)(smbios_entries + smbios_entries_len); 1339 table->header.type = SMBIOS_TABLE_ENTRY; 1340 table->header.length = cpu_to_le16(sizeof(*table) + size); 1341 memcpy(table->data, header, size); 1342 smbios_entries_len += sizeof(*table) + size; 1343 (*(uint16_t *)smbios_entries) = 1344 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 1345 /* end: add a copy of the newly loaded blob to legacy smbios_entries */ 1346 1347 return; 1348 } 1349 1350 val = qemu_opt_get(opts, "type"); 1351 if (val) { 1352 unsigned long type = strtoul(val, NULL, 0); 1353 1354 if (type > SMBIOS_MAX_TYPE) { 1355 error_setg(errp, "out of range!"); 1356 return; 1357 } 1358 1359 if (test_bit(type, have_binfile_bitmap)) { 1360 error_setg(errp, "can't add fields, binary file already loaded!"); 1361 return; 1362 } 1363 set_bit(type, have_fields_bitmap); 1364 1365 switch (type) { 1366 case 0: 1367 if (!qemu_opts_validate(opts, qemu_smbios_type0_opts, errp)) { 1368 return; 1369 } 1370 save_opt(&type0.vendor, opts, "vendor"); 1371 save_opt(&type0.version, opts, "version"); 1372 save_opt(&type0.date, opts, "date"); 1373 type0.uefi = qemu_opt_get_bool(opts, "uefi", false); 1374 1375 val = qemu_opt_get(opts, "release"); 1376 if (val) { 1377 if (sscanf(val, "%hhu.%hhu", &type0.major, &type0.minor) != 2) { 1378 error_setg(errp, "Invalid release"); 1379 return; 1380 } 1381 type0.have_major_minor = true; 1382 } 1383 return; 1384 case 1: 1385 if (!qemu_opts_validate(opts, qemu_smbios_type1_opts, errp)) { 1386 return; 1387 } 1388 save_opt(&type1.manufacturer, opts, "manufacturer"); 1389 save_opt(&type1.product, opts, "product"); 1390 save_opt(&type1.version, opts, "version"); 1391 save_opt(&type1.serial, opts, "serial"); 1392 save_opt(&type1.sku, opts, "sku"); 1393 save_opt(&type1.family, opts, "family"); 1394 1395 val = qemu_opt_get(opts, "uuid"); 1396 if (val) { 1397 if (qemu_uuid_parse(val, &qemu_uuid) != 0) { 1398 error_setg(errp, "Invalid UUID"); 1399 return; 1400 } 1401 qemu_uuid_set = true; 1402 } 1403 return; 1404 case 2: 1405 if (!qemu_opts_validate(opts, qemu_smbios_type2_opts, errp)) { 1406 return; 1407 } 1408 save_opt(&type2.manufacturer, opts, "manufacturer"); 1409 save_opt(&type2.product, opts, "product"); 1410 save_opt(&type2.version, opts, "version"); 1411 save_opt(&type2.serial, opts, "serial"); 1412 save_opt(&type2.asset, opts, "asset"); 1413 save_opt(&type2.location, opts, "location"); 1414 return; 1415 case 3: 1416 if (!qemu_opts_validate(opts, qemu_smbios_type3_opts, errp)) { 1417 return; 1418 } 1419 save_opt(&type3.manufacturer, opts, "manufacturer"); 1420 save_opt(&type3.version, opts, "version"); 1421 save_opt(&type3.serial, opts, "serial"); 1422 save_opt(&type3.asset, opts, "asset"); 1423 save_opt(&type3.sku, opts, "sku"); 1424 return; 1425 case 4: 1426 if (!qemu_opts_validate(opts, qemu_smbios_type4_opts, errp)) { 1427 return; 1428 } 1429 save_opt(&type4.sock_pfx, opts, "sock_pfx"); 1430 type4.processor_family = qemu_opt_get_number(opts, 1431 "processor-family", 1432 0x01 /* Other */); 1433 save_opt(&type4.manufacturer, opts, "manufacturer"); 1434 save_opt(&type4.version, opts, "version"); 1435 save_opt(&type4.serial, opts, "serial"); 1436 save_opt(&type4.asset, opts, "asset"); 1437 save_opt(&type4.part, opts, "part"); 1438 /* If the value is 0, it will take the value from the CPU model. */ 1439 type4.processor_id = qemu_opt_get_number(opts, "processor-id", 0); 1440 type4.max_speed = qemu_opt_get_number(opts, "max-speed", 1441 DEFAULT_CPU_SPEED); 1442 type4.current_speed = qemu_opt_get_number(opts, "current-speed", 1443 DEFAULT_CPU_SPEED); 1444 if (type4.max_speed > UINT16_MAX || 1445 type4.current_speed > UINT16_MAX) { 1446 error_setg(errp, "SMBIOS CPU speed is too large (> %d)", 1447 UINT16_MAX); 1448 } 1449 return; 1450 case 8: 1451 if (!qemu_opts_validate(opts, qemu_smbios_type8_opts, errp)) { 1452 return; 1453 } 1454 struct type8_instance *t8_i; 1455 t8_i = g_new0(struct type8_instance, 1); 1456 save_opt(&t8_i->internal_reference, opts, "internal_reference"); 1457 save_opt(&t8_i->external_reference, opts, "external_reference"); 1458 t8_i->connector_type = qemu_opt_get_number(opts, 1459 "connector_type", 0); 1460 t8_i->port_type = qemu_opt_get_number(opts, "port_type", 0); 1461 QTAILQ_INSERT_TAIL(&type8, t8_i, next); 1462 return; 1463 case 11: 1464 if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) { 1465 return; 1466 } 1467 if (!save_opt_list(&type11.nvalues, &type11.values, opts, errp)) { 1468 return; 1469 } 1470 return; 1471 case 17: 1472 if (!qemu_opts_validate(opts, qemu_smbios_type17_opts, errp)) { 1473 return; 1474 } 1475 save_opt(&type17.loc_pfx, opts, "loc_pfx"); 1476 save_opt(&type17.bank, opts, "bank"); 1477 save_opt(&type17.manufacturer, opts, "manufacturer"); 1478 save_opt(&type17.serial, opts, "serial"); 1479 save_opt(&type17.asset, opts, "asset"); 1480 save_opt(&type17.part, opts, "part"); 1481 type17.speed = qemu_opt_get_number(opts, "speed", 0); 1482 return; 1483 case 41: { 1484 struct type41_instance *t41_i; 1485 Error *local_err = NULL; 1486 1487 if (!qemu_opts_validate(opts, qemu_smbios_type41_opts, errp)) { 1488 return; 1489 } 1490 t41_i = g_new0(struct type41_instance, 1); 1491 save_opt(&t41_i->designation, opts, "designation"); 1492 t41_i->kind = qapi_enum_parse(&type41_kind_lookup, 1493 qemu_opt_get(opts, "kind"), 1494 0, &local_err) + 1; 1495 t41_i->kind |= 0x80; /* enabled */ 1496 if (local_err != NULL) { 1497 error_propagate(errp, local_err); 1498 g_free(t41_i); 1499 return; 1500 } 1501 t41_i->instance = qemu_opt_get_number(opts, "instance", 1); 1502 save_opt(&t41_i->pcidev, opts, "pcidev"); 1503 1504 QTAILQ_INSERT_TAIL(&type41, t41_i, next); 1505 return; 1506 } 1507 default: 1508 error_setg(errp, 1509 "Don't know how to build fields for SMBIOS type %ld", 1510 type); 1511 return; 1512 } 1513 } 1514 1515 error_setg(errp, "Must specify type= or file="); 1516 } 1517