1 /* 2 * SMBIOS Support 3 * 4 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P. 5 * Copyright (C) 2013 Red Hat, Inc. 6 * 7 * Authors: 8 * Alex Williamson <alex.williamson@hp.com> 9 * Markus Armbruster <armbru@redhat.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/units.h" 20 #include "qapi/error.h" 21 #include "qemu/config-file.h" 22 #include "qemu/error-report.h" 23 #include "qemu/module.h" 24 #include "qemu/option.h" 25 #include "sysemu/sysemu.h" 26 #include "qemu/uuid.h" 27 #include "hw/firmware/smbios.h" 28 #include "hw/loader.h" 29 #include "hw/boards.h" 30 #include "hw/pci/pci_bus.h" 31 #include "hw/pci/pci_device.h" 32 #include "smbios_build.h" 33 34 /* legacy structures and constants for <= 2.0 machines */ 35 struct smbios_header { 36 uint16_t length; 37 uint8_t type; 38 } QEMU_PACKED; 39 40 struct smbios_field { 41 struct smbios_header header; 42 uint8_t type; 43 uint16_t offset; 44 uint8_t data[]; 45 } QEMU_PACKED; 46 47 struct smbios_table { 48 struct smbios_header header; 49 uint8_t data[]; 50 } QEMU_PACKED; 51 52 #define SMBIOS_FIELD_ENTRY 0 53 #define SMBIOS_TABLE_ENTRY 1 54 55 static uint8_t *smbios_entries; 56 static size_t smbios_entries_len; 57 static bool smbios_legacy = true; 58 static bool smbios_uuid_encoded = true; 59 /* end: legacy structures & constants for <= 2.0 machines */ 60 61 62 uint8_t *smbios_tables; 63 size_t smbios_tables_len; 64 unsigned smbios_table_max; 65 unsigned smbios_table_cnt; 66 static SmbiosEntryPointType smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 67 68 static SmbiosEntryPoint ep; 69 70 static int smbios_type4_count = 0; 71 static bool smbios_immutable; 72 static bool smbios_have_defaults; 73 static uint32_t smbios_cpuid_version, smbios_cpuid_features, smbios_smp_sockets; 74 75 static DECLARE_BITMAP(have_binfile_bitmap, SMBIOS_MAX_TYPE+1); 76 static DECLARE_BITMAP(have_fields_bitmap, SMBIOS_MAX_TYPE+1); 77 78 static struct { 79 const char *vendor, *version, *date; 80 bool have_major_minor, uefi; 81 uint8_t major, minor; 82 } type0; 83 84 static struct { 85 const char *manufacturer, *product, *version, *serial, *sku, *family; 86 /* uuid is in qemu_uuid */ 87 } type1; 88 89 static struct { 90 const char *manufacturer, *product, *version, *serial, *asset, *location; 91 } type2; 92 93 static struct { 94 const char *manufacturer, *version, *serial, *asset, *sku; 95 } type3; 96 97 /* 98 * SVVP requires max_speed and current_speed to be set and not being 99 * 0 which counts as unknown (SMBIOS 3.1.0/Table 21). Set the 100 * default value to 2000MHz as we did before. 101 */ 102 #define DEFAULT_CPU_SPEED 2000 103 104 static struct { 105 uint16_t processor_family; 106 const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part; 107 uint64_t max_speed; 108 uint64_t current_speed; 109 uint64_t processor_id; 110 } type4 = { 111 .max_speed = DEFAULT_CPU_SPEED, 112 .current_speed = DEFAULT_CPU_SPEED, 113 .processor_id = 0, 114 .processor_family = 0x01, /* Other */ 115 }; 116 117 struct type8_instance { 118 const char *internal_reference, *external_reference; 119 uint8_t connector_type, port_type; 120 QTAILQ_ENTRY(type8_instance) next; 121 }; 122 static QTAILQ_HEAD(, type8_instance) type8 = QTAILQ_HEAD_INITIALIZER(type8); 123 124 static struct { 125 size_t nvalues; 126 char **values; 127 } type11; 128 129 static struct { 130 const char *loc_pfx, *bank, *manufacturer, *serial, *asset, *part; 131 uint16_t speed; 132 } type17; 133 134 static QEnumLookup type41_kind_lookup = { 135 .array = (const char *const[]) { 136 "other", 137 "unknown", 138 "video", 139 "scsi", 140 "ethernet", 141 "tokenring", 142 "sound", 143 "pata", 144 "sata", 145 "sas", 146 }, 147 .size = 10 148 }; 149 struct type41_instance { 150 const char *designation, *pcidev; 151 uint8_t instance, kind; 152 QTAILQ_ENTRY(type41_instance) next; 153 }; 154 static QTAILQ_HEAD(, type41_instance) type41 = QTAILQ_HEAD_INITIALIZER(type41); 155 156 static QemuOptsList qemu_smbios_opts = { 157 .name = "smbios", 158 .head = QTAILQ_HEAD_INITIALIZER(qemu_smbios_opts.head), 159 .desc = { 160 /* 161 * no elements => accept any params 162 * validation will happen later 163 */ 164 { /* end of list */ } 165 } 166 }; 167 168 static const QemuOptDesc qemu_smbios_file_opts[] = { 169 { 170 .name = "file", 171 .type = QEMU_OPT_STRING, 172 .help = "binary file containing an SMBIOS element", 173 }, 174 { /* end of list */ } 175 }; 176 177 static const QemuOptDesc qemu_smbios_type0_opts[] = { 178 { 179 .name = "type", 180 .type = QEMU_OPT_NUMBER, 181 .help = "SMBIOS element type", 182 },{ 183 .name = "vendor", 184 .type = QEMU_OPT_STRING, 185 .help = "vendor name", 186 },{ 187 .name = "version", 188 .type = QEMU_OPT_STRING, 189 .help = "version number", 190 },{ 191 .name = "date", 192 .type = QEMU_OPT_STRING, 193 .help = "release date", 194 },{ 195 .name = "release", 196 .type = QEMU_OPT_STRING, 197 .help = "revision number", 198 },{ 199 .name = "uefi", 200 .type = QEMU_OPT_BOOL, 201 .help = "uefi support", 202 }, 203 { /* end of list */ } 204 }; 205 206 static const QemuOptDesc qemu_smbios_type1_opts[] = { 207 { 208 .name = "type", 209 .type = QEMU_OPT_NUMBER, 210 .help = "SMBIOS element type", 211 },{ 212 .name = "manufacturer", 213 .type = QEMU_OPT_STRING, 214 .help = "manufacturer name", 215 },{ 216 .name = "product", 217 .type = QEMU_OPT_STRING, 218 .help = "product name", 219 },{ 220 .name = "version", 221 .type = QEMU_OPT_STRING, 222 .help = "version number", 223 },{ 224 .name = "serial", 225 .type = QEMU_OPT_STRING, 226 .help = "serial number", 227 },{ 228 .name = "uuid", 229 .type = QEMU_OPT_STRING, 230 .help = "UUID", 231 },{ 232 .name = "sku", 233 .type = QEMU_OPT_STRING, 234 .help = "SKU number", 235 },{ 236 .name = "family", 237 .type = QEMU_OPT_STRING, 238 .help = "family name", 239 }, 240 { /* end of list */ } 241 }; 242 243 static const QemuOptDesc qemu_smbios_type2_opts[] = { 244 { 245 .name = "type", 246 .type = QEMU_OPT_NUMBER, 247 .help = "SMBIOS element type", 248 },{ 249 .name = "manufacturer", 250 .type = QEMU_OPT_STRING, 251 .help = "manufacturer name", 252 },{ 253 .name = "product", 254 .type = QEMU_OPT_STRING, 255 .help = "product name", 256 },{ 257 .name = "version", 258 .type = QEMU_OPT_STRING, 259 .help = "version number", 260 },{ 261 .name = "serial", 262 .type = QEMU_OPT_STRING, 263 .help = "serial number", 264 },{ 265 .name = "asset", 266 .type = QEMU_OPT_STRING, 267 .help = "asset tag number", 268 },{ 269 .name = "location", 270 .type = QEMU_OPT_STRING, 271 .help = "location in chassis", 272 }, 273 { /* end of list */ } 274 }; 275 276 static const QemuOptDesc qemu_smbios_type3_opts[] = { 277 { 278 .name = "type", 279 .type = QEMU_OPT_NUMBER, 280 .help = "SMBIOS element type", 281 },{ 282 .name = "manufacturer", 283 .type = QEMU_OPT_STRING, 284 .help = "manufacturer name", 285 },{ 286 .name = "version", 287 .type = QEMU_OPT_STRING, 288 .help = "version number", 289 },{ 290 .name = "serial", 291 .type = QEMU_OPT_STRING, 292 .help = "serial number", 293 },{ 294 .name = "asset", 295 .type = QEMU_OPT_STRING, 296 .help = "asset tag number", 297 },{ 298 .name = "sku", 299 .type = QEMU_OPT_STRING, 300 .help = "SKU number", 301 }, 302 { /* end of list */ } 303 }; 304 305 static const QemuOptDesc qemu_smbios_type4_opts[] = { 306 { 307 .name = "type", 308 .type = QEMU_OPT_NUMBER, 309 .help = "SMBIOS element type", 310 },{ 311 .name = "sock_pfx", 312 .type = QEMU_OPT_STRING, 313 .help = "socket designation string prefix", 314 },{ 315 .name = "manufacturer", 316 .type = QEMU_OPT_STRING, 317 .help = "manufacturer name", 318 },{ 319 .name = "version", 320 .type = QEMU_OPT_STRING, 321 .help = "version number", 322 },{ 323 .name = "max-speed", 324 .type = QEMU_OPT_NUMBER, 325 .help = "max speed in MHz", 326 },{ 327 .name = "current-speed", 328 .type = QEMU_OPT_NUMBER, 329 .help = "speed at system boot in MHz", 330 },{ 331 .name = "serial", 332 .type = QEMU_OPT_STRING, 333 .help = "serial number", 334 },{ 335 .name = "asset", 336 .type = QEMU_OPT_STRING, 337 .help = "asset tag number", 338 },{ 339 .name = "part", 340 .type = QEMU_OPT_STRING, 341 .help = "part number", 342 }, { 343 .name = "processor-family", 344 .type = QEMU_OPT_NUMBER, 345 .help = "processor family", 346 }, { 347 .name = "processor-id", 348 .type = QEMU_OPT_NUMBER, 349 .help = "processor id", 350 }, 351 { /* end of list */ } 352 }; 353 354 static const QemuOptDesc qemu_smbios_type8_opts[] = { 355 { 356 .name = "internal_reference", 357 .type = QEMU_OPT_STRING, 358 .help = "internal reference designator", 359 }, 360 { 361 .name = "external_reference", 362 .type = QEMU_OPT_STRING, 363 .help = "external reference designator", 364 }, 365 { 366 .name = "connector_type", 367 .type = QEMU_OPT_NUMBER, 368 .help = "connector type", 369 }, 370 { 371 .name = "port_type", 372 .type = QEMU_OPT_NUMBER, 373 .help = "port type", 374 }, 375 }; 376 377 static const QemuOptDesc qemu_smbios_type11_opts[] = { 378 { 379 .name = "value", 380 .type = QEMU_OPT_STRING, 381 .help = "OEM string data", 382 }, 383 { 384 .name = "path", 385 .type = QEMU_OPT_STRING, 386 .help = "OEM string data from file", 387 }, 388 }; 389 390 static const QemuOptDesc qemu_smbios_type17_opts[] = { 391 { 392 .name = "type", 393 .type = QEMU_OPT_NUMBER, 394 .help = "SMBIOS element type", 395 },{ 396 .name = "loc_pfx", 397 .type = QEMU_OPT_STRING, 398 .help = "device locator string prefix", 399 },{ 400 .name = "bank", 401 .type = QEMU_OPT_STRING, 402 .help = "bank locator string", 403 },{ 404 .name = "manufacturer", 405 .type = QEMU_OPT_STRING, 406 .help = "manufacturer name", 407 },{ 408 .name = "serial", 409 .type = QEMU_OPT_STRING, 410 .help = "serial number", 411 },{ 412 .name = "asset", 413 .type = QEMU_OPT_STRING, 414 .help = "asset tag number", 415 },{ 416 .name = "part", 417 .type = QEMU_OPT_STRING, 418 .help = "part number", 419 },{ 420 .name = "speed", 421 .type = QEMU_OPT_NUMBER, 422 .help = "maximum capable speed", 423 }, 424 { /* end of list */ } 425 }; 426 427 static const QemuOptDesc qemu_smbios_type41_opts[] = { 428 { 429 .name = "type", 430 .type = QEMU_OPT_NUMBER, 431 .help = "SMBIOS element type", 432 },{ 433 .name = "designation", 434 .type = QEMU_OPT_STRING, 435 .help = "reference designation string", 436 },{ 437 .name = "kind", 438 .type = QEMU_OPT_STRING, 439 .help = "device type", 440 .def_value_str = "other", 441 },{ 442 .name = "instance", 443 .type = QEMU_OPT_NUMBER, 444 .help = "device type instance", 445 },{ 446 .name = "pcidev", 447 .type = QEMU_OPT_STRING, 448 .help = "PCI device", 449 }, 450 { /* end of list */ } 451 }; 452 453 static void smbios_register_config(void) 454 { 455 qemu_add_opts(&qemu_smbios_opts); 456 } 457 458 opts_init(smbios_register_config); 459 460 /* 461 * The SMBIOS 2.1 "structure table length" field in the 462 * entry point uses a 16-bit integer, so we're limited 463 * in total table size 464 */ 465 #define SMBIOS_21_MAX_TABLES_LEN 0xffff 466 467 static void smbios_validate_table(MachineState *ms) 468 { 469 uint32_t expect_t4_count = smbios_legacy ? 470 ms->smp.cpus : smbios_smp_sockets; 471 472 if (smbios_type4_count && smbios_type4_count != expect_t4_count) { 473 error_report("Expected %d SMBIOS Type 4 tables, got %d instead", 474 expect_t4_count, smbios_type4_count); 475 exit(1); 476 } 477 478 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_32 && 479 smbios_tables_len > SMBIOS_21_MAX_TABLES_LEN) { 480 error_report("SMBIOS 2.1 table length %zu exceeds %d", 481 smbios_tables_len, SMBIOS_21_MAX_TABLES_LEN); 482 exit(1); 483 } 484 } 485 486 487 /* legacy setup functions for <= 2.0 machines */ 488 static void smbios_add_field(int type, int offset, const void *data, size_t len) 489 { 490 struct smbios_field *field; 491 492 if (!smbios_entries) { 493 smbios_entries_len = sizeof(uint16_t); 494 smbios_entries = g_malloc0(smbios_entries_len); 495 } 496 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 497 sizeof(*field) + len); 498 field = (struct smbios_field *)(smbios_entries + smbios_entries_len); 499 field->header.type = SMBIOS_FIELD_ENTRY; 500 field->header.length = cpu_to_le16(sizeof(*field) + len); 501 502 field->type = type; 503 field->offset = cpu_to_le16(offset); 504 memcpy(field->data, data, len); 505 506 smbios_entries_len += sizeof(*field) + len; 507 (*(uint16_t *)smbios_entries) = 508 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 509 } 510 511 static void smbios_maybe_add_str(int type, int offset, const char *data) 512 { 513 if (data) { 514 smbios_add_field(type, offset, data, strlen(data) + 1); 515 } 516 } 517 518 static void smbios_build_type_0_fields(void) 519 { 520 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, vendor_str), 521 type0.vendor); 522 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, bios_version_str), 523 type0.version); 524 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, 525 bios_release_date_str), 526 type0.date); 527 if (type0.have_major_minor) { 528 smbios_add_field(0, offsetof(struct smbios_type_0, 529 system_bios_major_release), 530 &type0.major, 1); 531 smbios_add_field(0, offsetof(struct smbios_type_0, 532 system_bios_minor_release), 533 &type0.minor, 1); 534 } 535 } 536 537 static void smbios_build_type_1_fields(void) 538 { 539 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, manufacturer_str), 540 type1.manufacturer); 541 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, product_name_str), 542 type1.product); 543 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, version_str), 544 type1.version); 545 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, serial_number_str), 546 type1.serial); 547 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, sku_number_str), 548 type1.sku); 549 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, family_str), 550 type1.family); 551 if (qemu_uuid_set) { 552 /* We don't encode the UUID in the "wire format" here because this 553 * function is for legacy mode and needs to keep the guest ABI, and 554 * because we don't know what's the SMBIOS version advertised by the 555 * BIOS. 556 */ 557 smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 558 &qemu_uuid, 16); 559 } 560 } 561 562 uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length) 563 { 564 if (!smbios_legacy) { 565 *length = 0; 566 return NULL; 567 } 568 569 if (!smbios_immutable) { 570 smbios_build_type_0_fields(); 571 smbios_build_type_1_fields(); 572 smbios_validate_table(ms); 573 smbios_immutable = true; 574 } 575 *length = smbios_entries_len; 576 return smbios_entries; 577 } 578 /* end: legacy setup functions for <= 2.0 machines */ 579 580 581 bool smbios_skip_table(uint8_t type, bool required_table) 582 { 583 if (test_bit(type, have_binfile_bitmap)) { 584 return true; /* user provided their own binary blob(s) */ 585 } 586 if (test_bit(type, have_fields_bitmap)) { 587 return false; /* user provided fields via command line */ 588 } 589 if (smbios_have_defaults && required_table) { 590 return false; /* we're building tables, and this one's required */ 591 } 592 return true; 593 } 594 595 #define T0_BASE 0x000 596 #define T1_BASE 0x100 597 #define T2_BASE 0x200 598 #define T3_BASE 0x300 599 #define T4_BASE 0x400 600 #define T11_BASE 0xe00 601 602 #define T16_BASE 0x1000 603 #define T17_BASE 0x1100 604 #define T19_BASE 0x1300 605 #define T32_BASE 0x2000 606 #define T41_BASE 0x2900 607 #define T127_BASE 0x7F00 608 609 static void smbios_build_type_0_table(void) 610 { 611 SMBIOS_BUILD_TABLE_PRE(0, T0_BASE, false); /* optional, leave up to BIOS */ 612 613 SMBIOS_TABLE_SET_STR(0, vendor_str, type0.vendor); 614 SMBIOS_TABLE_SET_STR(0, bios_version_str, type0.version); 615 616 t->bios_starting_address_segment = cpu_to_le16(0xE800); /* from SeaBIOS */ 617 618 SMBIOS_TABLE_SET_STR(0, bios_release_date_str, type0.date); 619 620 t->bios_rom_size = 0; /* hardcoded in SeaBIOS with FIXME comment */ 621 622 t->bios_characteristics = cpu_to_le64(0x08); /* Not supported */ 623 t->bios_characteristics_extension_bytes[0] = 0; 624 t->bios_characteristics_extension_bytes[1] = 0x14; /* TCD/SVVP | VM */ 625 if (type0.uefi) { 626 t->bios_characteristics_extension_bytes[1] |= 0x08; /* |= UEFI */ 627 } 628 629 if (type0.have_major_minor) { 630 t->system_bios_major_release = type0.major; 631 t->system_bios_minor_release = type0.minor; 632 } else { 633 t->system_bios_major_release = 0; 634 t->system_bios_minor_release = 0; 635 } 636 637 /* hardcoded in SeaBIOS */ 638 t->embedded_controller_major_release = 0xFF; 639 t->embedded_controller_minor_release = 0xFF; 640 641 SMBIOS_BUILD_TABLE_POST; 642 } 643 644 /* Encode UUID from the big endian encoding described on RFC4122 to the wire 645 * format specified by SMBIOS version 2.6. 646 */ 647 static void smbios_encode_uuid(struct smbios_uuid *uuid, QemuUUID *in) 648 { 649 memcpy(uuid, in, 16); 650 if (smbios_uuid_encoded) { 651 uuid->time_low = bswap32(uuid->time_low); 652 uuid->time_mid = bswap16(uuid->time_mid); 653 uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version); 654 } 655 } 656 657 static void smbios_build_type_1_table(void) 658 { 659 SMBIOS_BUILD_TABLE_PRE(1, T1_BASE, true); /* required */ 660 661 SMBIOS_TABLE_SET_STR(1, manufacturer_str, type1.manufacturer); 662 SMBIOS_TABLE_SET_STR(1, product_name_str, type1.product); 663 SMBIOS_TABLE_SET_STR(1, version_str, type1.version); 664 SMBIOS_TABLE_SET_STR(1, serial_number_str, type1.serial); 665 if (qemu_uuid_set) { 666 smbios_encode_uuid(&t->uuid, &qemu_uuid); 667 } else { 668 memset(&t->uuid, 0, 16); 669 } 670 t->wake_up_type = 0x06; /* power switch */ 671 SMBIOS_TABLE_SET_STR(1, sku_number_str, type1.sku); 672 SMBIOS_TABLE_SET_STR(1, family_str, type1.family); 673 674 SMBIOS_BUILD_TABLE_POST; 675 } 676 677 static void smbios_build_type_2_table(void) 678 { 679 SMBIOS_BUILD_TABLE_PRE(2, T2_BASE, false); /* optional */ 680 681 SMBIOS_TABLE_SET_STR(2, manufacturer_str, type2.manufacturer); 682 SMBIOS_TABLE_SET_STR(2, product_str, type2.product); 683 SMBIOS_TABLE_SET_STR(2, version_str, type2.version); 684 SMBIOS_TABLE_SET_STR(2, serial_number_str, type2.serial); 685 SMBIOS_TABLE_SET_STR(2, asset_tag_number_str, type2.asset); 686 t->feature_flags = 0x01; /* Motherboard */ 687 SMBIOS_TABLE_SET_STR(2, location_str, type2.location); 688 t->chassis_handle = cpu_to_le16(0x300); /* Type 3 (System enclosure) */ 689 t->board_type = 0x0A; /* Motherboard */ 690 t->contained_element_count = 0; 691 692 SMBIOS_BUILD_TABLE_POST; 693 } 694 695 static void smbios_build_type_3_table(void) 696 { 697 SMBIOS_BUILD_TABLE_PRE(3, T3_BASE, true); /* required */ 698 699 SMBIOS_TABLE_SET_STR(3, manufacturer_str, type3.manufacturer); 700 t->type = 0x01; /* Other */ 701 SMBIOS_TABLE_SET_STR(3, version_str, type3.version); 702 SMBIOS_TABLE_SET_STR(3, serial_number_str, type3.serial); 703 SMBIOS_TABLE_SET_STR(3, asset_tag_number_str, type3.asset); 704 t->boot_up_state = 0x03; /* Safe */ 705 t->power_supply_state = 0x03; /* Safe */ 706 t->thermal_state = 0x03; /* Safe */ 707 t->security_status = 0x02; /* Unknown */ 708 t->oem_defined = cpu_to_le32(0); 709 t->height = 0; 710 t->number_of_power_cords = 0; 711 t->contained_element_count = 0; 712 t->contained_element_record_length = 0; 713 SMBIOS_TABLE_SET_STR(3, sku_number_str, type3.sku); 714 715 SMBIOS_BUILD_TABLE_POST; 716 } 717 718 static void smbios_build_type_4_table(MachineState *ms, unsigned instance) 719 { 720 char sock_str[128]; 721 size_t tbl_len = SMBIOS_TYPE_4_LEN_V28; 722 unsigned threads_per_socket; 723 unsigned cores_per_socket; 724 725 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_64) { 726 tbl_len = SMBIOS_TYPE_4_LEN_V30; 727 } 728 729 SMBIOS_BUILD_TABLE_PRE_SIZE(4, T4_BASE + instance, 730 true, tbl_len); /* required */ 731 732 snprintf(sock_str, sizeof(sock_str), "%s%2x", type4.sock_pfx, instance); 733 SMBIOS_TABLE_SET_STR(4, socket_designation_str, sock_str); 734 t->processor_type = 0x03; /* CPU */ 735 t->processor_family = 0xfe; /* use Processor Family 2 field */ 736 SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer); 737 if (type4.processor_id == 0) { 738 t->processor_id[0] = cpu_to_le32(smbios_cpuid_version); 739 t->processor_id[1] = cpu_to_le32(smbios_cpuid_features); 740 } else { 741 t->processor_id[0] = cpu_to_le32((uint32_t)type4.processor_id); 742 t->processor_id[1] = cpu_to_le32(type4.processor_id >> 32); 743 } 744 SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version); 745 t->voltage = 0; 746 t->external_clock = cpu_to_le16(0); /* Unknown */ 747 t->max_speed = cpu_to_le16(type4.max_speed); 748 t->current_speed = cpu_to_le16(type4.current_speed); 749 t->status = 0x41; /* Socket populated, CPU enabled */ 750 t->processor_upgrade = 0x01; /* Other */ 751 t->l1_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 752 t->l2_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 753 t->l3_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 754 SMBIOS_TABLE_SET_STR(4, serial_number_str, type4.serial); 755 SMBIOS_TABLE_SET_STR(4, asset_tag_number_str, type4.asset); 756 SMBIOS_TABLE_SET_STR(4, part_number_str, type4.part); 757 758 threads_per_socket = machine_topo_get_threads_per_socket(ms); 759 cores_per_socket = machine_topo_get_cores_per_socket(ms); 760 761 t->core_count = (cores_per_socket > 255) ? 0xFF : cores_per_socket; 762 t->core_enabled = t->core_count; 763 764 t->thread_count = (threads_per_socket > 255) ? 0xFF : threads_per_socket; 765 766 t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */ 767 t->processor_family2 = cpu_to_le16(type4.processor_family); 768 769 if (tbl_len == SMBIOS_TYPE_4_LEN_V30) { 770 t->core_count2 = t->core_enabled2 = cpu_to_le16(cores_per_socket); 771 t->thread_count2 = cpu_to_le16(threads_per_socket); 772 } 773 774 SMBIOS_BUILD_TABLE_POST; 775 smbios_type4_count++; 776 } 777 778 static void smbios_build_type_8_table(void) 779 { 780 unsigned instance = 0; 781 struct type8_instance *t8; 782 783 QTAILQ_FOREACH(t8, &type8, next) { 784 SMBIOS_BUILD_TABLE_PRE(8, T0_BASE + instance, true); 785 786 SMBIOS_TABLE_SET_STR(8, internal_reference_str, t8->internal_reference); 787 SMBIOS_TABLE_SET_STR(8, external_reference_str, t8->external_reference); 788 /* most vendors seem to set this to None */ 789 t->internal_connector_type = 0x0; 790 t->external_connector_type = t8->connector_type; 791 t->port_type = t8->port_type; 792 793 SMBIOS_BUILD_TABLE_POST; 794 instance++; 795 } 796 } 797 798 static void smbios_build_type_11_table(void) 799 { 800 char count_str[128]; 801 size_t i; 802 803 if (type11.nvalues == 0) { 804 return; 805 } 806 807 SMBIOS_BUILD_TABLE_PRE(11, T11_BASE, true); /* required */ 808 809 snprintf(count_str, sizeof(count_str), "%zu", type11.nvalues); 810 t->count = type11.nvalues; 811 812 for (i = 0; i < type11.nvalues; i++) { 813 SMBIOS_TABLE_SET_STR_LIST(11, type11.values[i]); 814 g_free(type11.values[i]); 815 type11.values[i] = NULL; 816 } 817 818 SMBIOS_BUILD_TABLE_POST; 819 } 820 821 #define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */ 822 823 static void smbios_build_type_16_table(unsigned dimm_cnt) 824 { 825 uint64_t size_kb; 826 827 SMBIOS_BUILD_TABLE_PRE(16, T16_BASE, true); /* required */ 828 829 t->location = 0x01; /* Other */ 830 t->use = 0x03; /* System memory */ 831 t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */ 832 size_kb = QEMU_ALIGN_UP(current_machine->ram_size, KiB) / KiB; 833 if (size_kb < MAX_T16_STD_SZ) { 834 t->maximum_capacity = cpu_to_le32(size_kb); 835 t->extended_maximum_capacity = cpu_to_le64(0); 836 } else { 837 t->maximum_capacity = cpu_to_le32(MAX_T16_STD_SZ); 838 t->extended_maximum_capacity = cpu_to_le64(current_machine->ram_size); 839 } 840 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 841 t->number_of_memory_devices = cpu_to_le16(dimm_cnt); 842 843 SMBIOS_BUILD_TABLE_POST; 844 } 845 846 #define MAX_T17_STD_SZ 0x7FFF /* (32G - 1M), in Megabytes */ 847 #define MAX_T17_EXT_SZ 0x80000000 /* 2P, in Megabytes */ 848 849 static void smbios_build_type_17_table(unsigned instance, uint64_t size) 850 { 851 char loc_str[128]; 852 uint64_t size_mb; 853 854 SMBIOS_BUILD_TABLE_PRE(17, T17_BASE + instance, true); /* required */ 855 856 t->physical_memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 857 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 858 t->total_width = cpu_to_le16(0xFFFF); /* Unknown */ 859 t->data_width = cpu_to_le16(0xFFFF); /* Unknown */ 860 size_mb = QEMU_ALIGN_UP(size, MiB) / MiB; 861 if (size_mb < MAX_T17_STD_SZ) { 862 t->size = cpu_to_le16(size_mb); 863 t->extended_size = cpu_to_le32(0); 864 } else { 865 assert(size_mb < MAX_T17_EXT_SZ); 866 t->size = cpu_to_le16(MAX_T17_STD_SZ); 867 t->extended_size = cpu_to_le32(size_mb); 868 } 869 t->form_factor = 0x09; /* DIMM */ 870 t->device_set = 0; /* Not in a set */ 871 snprintf(loc_str, sizeof(loc_str), "%s %d", type17.loc_pfx, instance); 872 SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str); 873 SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank); 874 t->memory_type = 0x07; /* RAM */ 875 t->type_detail = cpu_to_le16(0x02); /* Other */ 876 t->speed = cpu_to_le16(type17.speed); 877 SMBIOS_TABLE_SET_STR(17, manufacturer_str, type17.manufacturer); 878 SMBIOS_TABLE_SET_STR(17, serial_number_str, type17.serial); 879 SMBIOS_TABLE_SET_STR(17, asset_tag_number_str, type17.asset); 880 SMBIOS_TABLE_SET_STR(17, part_number_str, type17.part); 881 t->attributes = 0; /* Unknown */ 882 t->configured_clock_speed = t->speed; /* reuse value for max speed */ 883 t->minimum_voltage = cpu_to_le16(0); /* Unknown */ 884 t->maximum_voltage = cpu_to_le16(0); /* Unknown */ 885 t->configured_voltage = cpu_to_le16(0); /* Unknown */ 886 887 SMBIOS_BUILD_TABLE_POST; 888 } 889 890 static void smbios_build_type_19_table(unsigned instance, unsigned offset, 891 uint64_t start, uint64_t size) 892 { 893 uint64_t end, start_kb, end_kb; 894 895 SMBIOS_BUILD_TABLE_PRE(19, T19_BASE + offset + instance, 896 true); /* required */ 897 898 end = start + size - 1; 899 assert(end > start); 900 start_kb = start / KiB; 901 end_kb = end / KiB; 902 if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) { 903 t->starting_address = cpu_to_le32(start_kb); 904 t->ending_address = cpu_to_le32(end_kb); 905 t->extended_starting_address = 906 t->extended_ending_address = cpu_to_le64(0); 907 } else { 908 t->starting_address = t->ending_address = cpu_to_le32(UINT32_MAX); 909 t->extended_starting_address = cpu_to_le64(start); 910 t->extended_ending_address = cpu_to_le64(end); 911 } 912 t->memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 913 t->partition_width = 1; /* One device per row */ 914 915 SMBIOS_BUILD_TABLE_POST; 916 } 917 918 static void smbios_build_type_32_table(void) 919 { 920 SMBIOS_BUILD_TABLE_PRE(32, T32_BASE, true); /* required */ 921 922 memset(t->reserved, 0, 6); 923 t->boot_status = 0; /* No errors detected */ 924 925 SMBIOS_BUILD_TABLE_POST; 926 } 927 928 static void smbios_build_type_41_table(Error **errp) 929 { 930 unsigned instance = 0; 931 struct type41_instance *t41; 932 933 QTAILQ_FOREACH(t41, &type41, next) { 934 SMBIOS_BUILD_TABLE_PRE(41, T41_BASE + instance, true); 935 936 SMBIOS_TABLE_SET_STR(41, reference_designation_str, t41->designation); 937 t->device_type = t41->kind; 938 t->device_type_instance = t41->instance; 939 t->segment_group_number = cpu_to_le16(0); 940 t->bus_number = 0; 941 t->device_number = 0; 942 943 if (t41->pcidev) { 944 PCIDevice *pdev = NULL; 945 int rc = pci_qdev_find_device(t41->pcidev, &pdev); 946 if (rc != 0) { 947 error_setg(errp, 948 "No PCI device %s for SMBIOS type 41 entry %s", 949 t41->pcidev, t41->designation); 950 return; 951 } 952 /* 953 * We only handle the case were the device is attached to 954 * the PCI root bus. The general case is more complex as 955 * bridges are enumerated later and the table would need 956 * to be updated at this moment. 957 */ 958 if (!pci_bus_is_root(pci_get_bus(pdev))) { 959 error_setg(errp, 960 "Cannot create type 41 entry for PCI device %s: " 961 "not attached to the root bus", 962 t41->pcidev); 963 return; 964 } 965 t->segment_group_number = cpu_to_le16(0); 966 t->bus_number = pci_dev_bus_num(pdev); 967 t->device_number = pdev->devfn; 968 } 969 970 SMBIOS_BUILD_TABLE_POST; 971 instance++; 972 } 973 } 974 975 static void smbios_build_type_127_table(void) 976 { 977 SMBIOS_BUILD_TABLE_PRE(127, T127_BASE, true); /* required */ 978 SMBIOS_BUILD_TABLE_POST; 979 } 980 981 void smbios_set_cpuid(uint32_t version, uint32_t features) 982 { 983 smbios_cpuid_version = version; 984 smbios_cpuid_features = features; 985 } 986 987 #define SMBIOS_SET_DEFAULT(field, value) \ 988 if (!field) { \ 989 field = value; \ 990 } 991 992 void smbios_set_defaults(const char *manufacturer, const char *product, 993 const char *version, bool legacy_mode, 994 bool uuid_encoded, SmbiosEntryPointType ep_type) 995 { 996 smbios_have_defaults = true; 997 smbios_legacy = legacy_mode; 998 smbios_uuid_encoded = uuid_encoded; 999 smbios_ep_type = ep_type; 1000 1001 /* drop unwanted version of command-line file blob(s) */ 1002 if (smbios_legacy) { 1003 g_free(smbios_tables); 1004 /* in legacy mode, also complain if fields were given for types > 1 */ 1005 if (find_next_bit(have_fields_bitmap, 1006 SMBIOS_MAX_TYPE+1, 2) < SMBIOS_MAX_TYPE+1) { 1007 error_report("can't process fields for smbios " 1008 "types > 1 on machine versions < 2.1!"); 1009 exit(1); 1010 } 1011 } else { 1012 g_free(smbios_entries); 1013 } 1014 1015 SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer); 1016 SMBIOS_SET_DEFAULT(type1.product, product); 1017 SMBIOS_SET_DEFAULT(type1.version, version); 1018 SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer); 1019 SMBIOS_SET_DEFAULT(type2.product, product); 1020 SMBIOS_SET_DEFAULT(type2.version, version); 1021 SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer); 1022 SMBIOS_SET_DEFAULT(type3.version, version); 1023 SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU"); 1024 SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer); 1025 SMBIOS_SET_DEFAULT(type4.version, version); 1026 SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM"); 1027 SMBIOS_SET_DEFAULT(type17.manufacturer, manufacturer); 1028 } 1029 1030 static void smbios_entry_point_setup(void) 1031 { 1032 switch (smbios_ep_type) { 1033 case SMBIOS_ENTRY_POINT_TYPE_32: 1034 memcpy(ep.ep21.anchor_string, "_SM_", 4); 1035 memcpy(ep.ep21.intermediate_anchor_string, "_DMI_", 5); 1036 ep.ep21.length = sizeof(struct smbios_21_entry_point); 1037 ep.ep21.entry_point_revision = 0; /* formatted_area reserved */ 1038 memset(ep.ep21.formatted_area, 0, 5); 1039 1040 /* compliant with smbios spec v2.8 */ 1041 ep.ep21.smbios_major_version = 2; 1042 ep.ep21.smbios_minor_version = 8; 1043 ep.ep21.smbios_bcd_revision = 0x28; 1044 1045 /* set during table construction, but BIOS may override: */ 1046 ep.ep21.structure_table_length = cpu_to_le16(smbios_tables_len); 1047 ep.ep21.max_structure_size = cpu_to_le16(smbios_table_max); 1048 ep.ep21.number_of_structures = cpu_to_le16(smbios_table_cnt); 1049 1050 /* BIOS must recalculate */ 1051 ep.ep21.checksum = 0; 1052 ep.ep21.intermediate_checksum = 0; 1053 ep.ep21.structure_table_address = cpu_to_le32(0); 1054 1055 break; 1056 case SMBIOS_ENTRY_POINT_TYPE_64: 1057 memcpy(ep.ep30.anchor_string, "_SM3_", 5); 1058 ep.ep30.length = sizeof(struct smbios_30_entry_point); 1059 ep.ep30.entry_point_revision = 1; 1060 ep.ep30.reserved = 0; 1061 1062 /* compliant with smbios spec 3.0 */ 1063 ep.ep30.smbios_major_version = 3; 1064 ep.ep30.smbios_minor_version = 0; 1065 ep.ep30.smbios_doc_rev = 0; 1066 1067 /* set during table construct, but BIOS might override */ 1068 ep.ep30.structure_table_max_size = cpu_to_le32(smbios_tables_len); 1069 1070 /* BIOS must recalculate */ 1071 ep.ep30.checksum = 0; 1072 ep.ep30.structure_table_address = cpu_to_le64(0); 1073 1074 break; 1075 default: 1076 abort(); 1077 break; 1078 } 1079 } 1080 1081 void smbios_get_tables(MachineState *ms, 1082 const struct smbios_phys_mem_area *mem_array, 1083 const unsigned int mem_array_size, 1084 uint8_t **tables, size_t *tables_len, 1085 uint8_t **anchor, size_t *anchor_len, 1086 Error **errp) 1087 { 1088 unsigned i, dimm_cnt, offset; 1089 1090 if (smbios_legacy) { 1091 *tables = *anchor = NULL; 1092 *tables_len = *anchor_len = 0; 1093 return; 1094 } 1095 1096 if (!smbios_immutable) { 1097 smbios_build_type_0_table(); 1098 smbios_build_type_1_table(); 1099 smbios_build_type_2_table(); 1100 smbios_build_type_3_table(); 1101 1102 smbios_smp_sockets = ms->smp.sockets; 1103 assert(smbios_smp_sockets >= 1); 1104 1105 for (i = 0; i < smbios_smp_sockets; i++) { 1106 smbios_build_type_4_table(ms, i); 1107 } 1108 1109 smbios_build_type_8_table(); 1110 smbios_build_type_11_table(); 1111 1112 #define MAX_DIMM_SZ (16 * GiB) 1113 #define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \ 1114 : ((current_machine->ram_size - 1) % MAX_DIMM_SZ) + 1) 1115 1116 dimm_cnt = QEMU_ALIGN_UP(current_machine->ram_size, MAX_DIMM_SZ) / MAX_DIMM_SZ; 1117 1118 /* 1119 * The offset determines if we need to keep additional space between 1120 * table 17 and table 19 header handle numbers so that they do 1121 * not overlap. For example, for a VM with larger than 8 TB guest 1122 * memory and DIMM like chunks of 16 GiB, the default space between 1123 * the two tables (T19_BASE - T17_BASE = 512) is not enough. 1124 */ 1125 offset = (dimm_cnt > (T19_BASE - T17_BASE)) ? \ 1126 dimm_cnt - (T19_BASE - T17_BASE) : 0; 1127 1128 smbios_build_type_16_table(dimm_cnt); 1129 1130 for (i = 0; i < dimm_cnt; i++) { 1131 smbios_build_type_17_table(i, GET_DIMM_SZ); 1132 } 1133 1134 for (i = 0; i < mem_array_size; i++) { 1135 smbios_build_type_19_table(i, offset, mem_array[i].address, 1136 mem_array[i].length); 1137 } 1138 1139 /* 1140 * make sure 16 bit handle numbers in the headers of tables 19 1141 * and 32 do not overlap. 1142 */ 1143 assert((mem_array_size + offset) < (T32_BASE - T19_BASE)); 1144 1145 smbios_build_type_32_table(); 1146 smbios_build_type_38_table(); 1147 smbios_build_type_41_table(errp); 1148 smbios_build_type_127_table(); 1149 1150 smbios_validate_table(ms); 1151 smbios_entry_point_setup(); 1152 smbios_immutable = true; 1153 } 1154 1155 /* return tables blob and entry point (anchor), and their sizes */ 1156 *tables = smbios_tables; 1157 *tables_len = smbios_tables_len; 1158 *anchor = (uint8_t *)&ep; 1159 1160 /* calculate length based on anchor string */ 1161 if (!strncmp((char *)&ep, "_SM_", 4)) { 1162 *anchor_len = sizeof(struct smbios_21_entry_point); 1163 } else if (!strncmp((char *)&ep, "_SM3_", 5)) { 1164 *anchor_len = sizeof(struct smbios_30_entry_point); 1165 } else { 1166 abort(); 1167 } 1168 } 1169 1170 static void save_opt(const char **dest, QemuOpts *opts, const char *name) 1171 { 1172 const char *val = qemu_opt_get(opts, name); 1173 1174 if (val) { 1175 *dest = val; 1176 } 1177 } 1178 1179 1180 struct opt_list { 1181 size_t *ndest; 1182 char ***dest; 1183 }; 1184 1185 static int save_opt_one(void *opaque, 1186 const char *name, const char *value, 1187 Error **errp) 1188 { 1189 struct opt_list *opt = opaque; 1190 1191 if (g_str_equal(name, "path")) { 1192 g_autoptr(GByteArray) data = g_byte_array_new(); 1193 g_autofree char *buf = g_new(char, 4096); 1194 ssize_t ret; 1195 int fd = qemu_open(value, O_RDONLY, errp); 1196 if (fd < 0) { 1197 return -1; 1198 } 1199 1200 while (1) { 1201 ret = read(fd, buf, 4096); 1202 if (ret == 0) { 1203 break; 1204 } 1205 if (ret < 0) { 1206 error_setg(errp, "Unable to read from %s: %s", 1207 value, strerror(errno)); 1208 qemu_close(fd); 1209 return -1; 1210 } 1211 if (memchr(buf, '\0', ret)) { 1212 error_setg(errp, "NUL in OEM strings value in %s", value); 1213 qemu_close(fd); 1214 return -1; 1215 } 1216 g_byte_array_append(data, (guint8 *)buf, ret); 1217 } 1218 1219 qemu_close(fd); 1220 1221 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1222 (*opt->dest)[*opt->ndest] = (char *)g_byte_array_free(data, FALSE); 1223 (*opt->ndest)++; 1224 data = NULL; 1225 } else if (g_str_equal(name, "value")) { 1226 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1227 (*opt->dest)[*opt->ndest] = g_strdup(value); 1228 (*opt->ndest)++; 1229 } else if (!g_str_equal(name, "type")) { 1230 error_setg(errp, "Unexpected option %s", name); 1231 return -1; 1232 } 1233 1234 return 0; 1235 } 1236 1237 static bool save_opt_list(size_t *ndest, char ***dest, QemuOpts *opts, 1238 Error **errp) 1239 { 1240 struct opt_list opt = { 1241 ndest, dest, 1242 }; 1243 if (!qemu_opt_foreach(opts, save_opt_one, &opt, errp)) { 1244 return false; 1245 } 1246 return true; 1247 } 1248 1249 void smbios_entry_add(QemuOpts *opts, Error **errp) 1250 { 1251 const char *val; 1252 1253 assert(!smbios_immutable); 1254 1255 val = qemu_opt_get(opts, "file"); 1256 if (val) { 1257 struct smbios_structure_header *header; 1258 int size; 1259 struct smbios_table *table; /* legacy mode only */ 1260 1261 if (!qemu_opts_validate(opts, qemu_smbios_file_opts, errp)) { 1262 return; 1263 } 1264 1265 size = get_image_size(val); 1266 if (size == -1 || size < sizeof(struct smbios_structure_header)) { 1267 error_setg(errp, "Cannot read SMBIOS file %s", val); 1268 return; 1269 } 1270 1271 /* 1272 * NOTE: standard double '\0' terminator expected, per smbios spec. 1273 * (except in legacy mode, where the second '\0' is implicit and 1274 * will be inserted by the BIOS). 1275 */ 1276 smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size); 1277 header = (struct smbios_structure_header *)(smbios_tables + 1278 smbios_tables_len); 1279 1280 if (load_image_size(val, (uint8_t *)header, size) != size) { 1281 error_setg(errp, "Failed to load SMBIOS file %s", val); 1282 return; 1283 } 1284 1285 if (header->type <= SMBIOS_MAX_TYPE) { 1286 if (test_bit(header->type, have_fields_bitmap)) { 1287 error_setg(errp, 1288 "can't load type %d struct, fields already specified!", 1289 header->type); 1290 return; 1291 } 1292 set_bit(header->type, have_binfile_bitmap); 1293 } 1294 1295 if (header->type == 4) { 1296 smbios_type4_count++; 1297 } 1298 1299 smbios_tables_len += size; 1300 if (size > smbios_table_max) { 1301 smbios_table_max = size; 1302 } 1303 smbios_table_cnt++; 1304 1305 /* add a copy of the newly loaded blob to legacy smbios_entries */ 1306 /* NOTE: This code runs before smbios_set_defaults(), so we don't 1307 * yet know which mode (legacy vs. aggregate-table) will be 1308 * required. We therefore add the binary blob to both legacy 1309 * (smbios_entries) and aggregate (smbios_tables) tables, and 1310 * delete the one we don't need from smbios_set_defaults(), 1311 * once we know which machine version has been requested. 1312 */ 1313 if (!smbios_entries) { 1314 smbios_entries_len = sizeof(uint16_t); 1315 smbios_entries = g_malloc0(smbios_entries_len); 1316 } 1317 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 1318 size + sizeof(*table)); 1319 table = (struct smbios_table *)(smbios_entries + smbios_entries_len); 1320 table->header.type = SMBIOS_TABLE_ENTRY; 1321 table->header.length = cpu_to_le16(sizeof(*table) + size); 1322 memcpy(table->data, header, size); 1323 smbios_entries_len += sizeof(*table) + size; 1324 (*(uint16_t *)smbios_entries) = 1325 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 1326 /* end: add a copy of the newly loaded blob to legacy smbios_entries */ 1327 1328 return; 1329 } 1330 1331 val = qemu_opt_get(opts, "type"); 1332 if (val) { 1333 unsigned long type = strtoul(val, NULL, 0); 1334 1335 if (type > SMBIOS_MAX_TYPE) { 1336 error_setg(errp, "out of range!"); 1337 return; 1338 } 1339 1340 if (test_bit(type, have_binfile_bitmap)) { 1341 error_setg(errp, "can't add fields, binary file already loaded!"); 1342 return; 1343 } 1344 set_bit(type, have_fields_bitmap); 1345 1346 switch (type) { 1347 case 0: 1348 if (!qemu_opts_validate(opts, qemu_smbios_type0_opts, errp)) { 1349 return; 1350 } 1351 save_opt(&type0.vendor, opts, "vendor"); 1352 save_opt(&type0.version, opts, "version"); 1353 save_opt(&type0.date, opts, "date"); 1354 type0.uefi = qemu_opt_get_bool(opts, "uefi", false); 1355 1356 val = qemu_opt_get(opts, "release"); 1357 if (val) { 1358 if (sscanf(val, "%hhu.%hhu", &type0.major, &type0.minor) != 2) { 1359 error_setg(errp, "Invalid release"); 1360 return; 1361 } 1362 type0.have_major_minor = true; 1363 } 1364 return; 1365 case 1: 1366 if (!qemu_opts_validate(opts, qemu_smbios_type1_opts, errp)) { 1367 return; 1368 } 1369 save_opt(&type1.manufacturer, opts, "manufacturer"); 1370 save_opt(&type1.product, opts, "product"); 1371 save_opt(&type1.version, opts, "version"); 1372 save_opt(&type1.serial, opts, "serial"); 1373 save_opt(&type1.sku, opts, "sku"); 1374 save_opt(&type1.family, opts, "family"); 1375 1376 val = qemu_opt_get(opts, "uuid"); 1377 if (val) { 1378 if (qemu_uuid_parse(val, &qemu_uuid) != 0) { 1379 error_setg(errp, "Invalid UUID"); 1380 return; 1381 } 1382 qemu_uuid_set = true; 1383 } 1384 return; 1385 case 2: 1386 if (!qemu_opts_validate(opts, qemu_smbios_type2_opts, errp)) { 1387 return; 1388 } 1389 save_opt(&type2.manufacturer, opts, "manufacturer"); 1390 save_opt(&type2.product, opts, "product"); 1391 save_opt(&type2.version, opts, "version"); 1392 save_opt(&type2.serial, opts, "serial"); 1393 save_opt(&type2.asset, opts, "asset"); 1394 save_opt(&type2.location, opts, "location"); 1395 return; 1396 case 3: 1397 if (!qemu_opts_validate(opts, qemu_smbios_type3_opts, errp)) { 1398 return; 1399 } 1400 save_opt(&type3.manufacturer, opts, "manufacturer"); 1401 save_opt(&type3.version, opts, "version"); 1402 save_opt(&type3.serial, opts, "serial"); 1403 save_opt(&type3.asset, opts, "asset"); 1404 save_opt(&type3.sku, opts, "sku"); 1405 return; 1406 case 4: 1407 if (!qemu_opts_validate(opts, qemu_smbios_type4_opts, errp)) { 1408 return; 1409 } 1410 save_opt(&type4.sock_pfx, opts, "sock_pfx"); 1411 type4.processor_family = qemu_opt_get_number(opts, 1412 "processor-family", 1413 0x01 /* Other */); 1414 save_opt(&type4.manufacturer, opts, "manufacturer"); 1415 save_opt(&type4.version, opts, "version"); 1416 save_opt(&type4.serial, opts, "serial"); 1417 save_opt(&type4.asset, opts, "asset"); 1418 save_opt(&type4.part, opts, "part"); 1419 /* If the value is 0, it will take the value from the CPU model. */ 1420 type4.processor_id = qemu_opt_get_number(opts, "processor-id", 0); 1421 type4.max_speed = qemu_opt_get_number(opts, "max-speed", 1422 DEFAULT_CPU_SPEED); 1423 type4.current_speed = qemu_opt_get_number(opts, "current-speed", 1424 DEFAULT_CPU_SPEED); 1425 if (type4.max_speed > UINT16_MAX || 1426 type4.current_speed > UINT16_MAX) { 1427 error_setg(errp, "SMBIOS CPU speed is too large (> %d)", 1428 UINT16_MAX); 1429 } 1430 return; 1431 case 8: 1432 if (!qemu_opts_validate(opts, qemu_smbios_type8_opts, errp)) { 1433 return; 1434 } 1435 struct type8_instance *t8_i; 1436 t8_i = g_new0(struct type8_instance, 1); 1437 save_opt(&t8_i->internal_reference, opts, "internal_reference"); 1438 save_opt(&t8_i->external_reference, opts, "external_reference"); 1439 t8_i->connector_type = qemu_opt_get_number(opts, 1440 "connector_type", 0); 1441 t8_i->port_type = qemu_opt_get_number(opts, "port_type", 0); 1442 QTAILQ_INSERT_TAIL(&type8, t8_i, next); 1443 return; 1444 case 11: 1445 if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) { 1446 return; 1447 } 1448 if (!save_opt_list(&type11.nvalues, &type11.values, opts, errp)) { 1449 return; 1450 } 1451 return; 1452 case 17: 1453 if (!qemu_opts_validate(opts, qemu_smbios_type17_opts, errp)) { 1454 return; 1455 } 1456 save_opt(&type17.loc_pfx, opts, "loc_pfx"); 1457 save_opt(&type17.bank, opts, "bank"); 1458 save_opt(&type17.manufacturer, opts, "manufacturer"); 1459 save_opt(&type17.serial, opts, "serial"); 1460 save_opt(&type17.asset, opts, "asset"); 1461 save_opt(&type17.part, opts, "part"); 1462 type17.speed = qemu_opt_get_number(opts, "speed", 0); 1463 return; 1464 case 41: { 1465 struct type41_instance *t41_i; 1466 Error *local_err = NULL; 1467 1468 if (!qemu_opts_validate(opts, qemu_smbios_type41_opts, errp)) { 1469 return; 1470 } 1471 t41_i = g_new0(struct type41_instance, 1); 1472 save_opt(&t41_i->designation, opts, "designation"); 1473 t41_i->kind = qapi_enum_parse(&type41_kind_lookup, 1474 qemu_opt_get(opts, "kind"), 1475 0, &local_err) + 1; 1476 t41_i->kind |= 0x80; /* enabled */ 1477 if (local_err != NULL) { 1478 error_propagate(errp, local_err); 1479 g_free(t41_i); 1480 return; 1481 } 1482 t41_i->instance = qemu_opt_get_number(opts, "instance", 1); 1483 save_opt(&t41_i->pcidev, opts, "pcidev"); 1484 1485 QTAILQ_INSERT_TAIL(&type41, t41_i, next); 1486 return; 1487 } 1488 default: 1489 error_setg(errp, 1490 "Don't know how to build fields for SMBIOS type %ld", 1491 type); 1492 return; 1493 } 1494 } 1495 1496 error_setg(errp, "Must specify type= or file="); 1497 } 1498