1 /* 2 * SMBIOS Support 3 * 4 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P. 5 * Copyright (C) 2013 Red Hat, Inc. 6 * 7 * Authors: 8 * Alex Williamson <alex.williamson@hp.com> 9 * Markus Armbruster <armbru@redhat.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 #include "qemu/units.h" 20 #include "qapi/error.h" 21 #include "qemu/config-file.h" 22 #include "qemu/error-report.h" 23 #include "qemu/module.h" 24 #include "qemu/option.h" 25 #include "sysemu/sysemu.h" 26 #include "qemu/uuid.h" 27 #include "hw/firmware/smbios.h" 28 #include "hw/loader.h" 29 #include "hw/boards.h" 30 #include "hw/pci/pci_bus.h" 31 #include "hw/pci/pci_device.h" 32 #include "smbios_build.h" 33 34 /* legacy structures and constants for <= 2.0 machines */ 35 struct smbios_header { 36 uint16_t length; 37 uint8_t type; 38 } QEMU_PACKED; 39 40 struct smbios_field { 41 struct smbios_header header; 42 uint8_t type; 43 uint16_t offset; 44 uint8_t data[]; 45 } QEMU_PACKED; 46 47 struct smbios_table { 48 struct smbios_header header; 49 uint8_t data[]; 50 } QEMU_PACKED; 51 52 #define SMBIOS_FIELD_ENTRY 0 53 #define SMBIOS_TABLE_ENTRY 1 54 55 static uint8_t *smbios_entries; 56 static size_t smbios_entries_len; 57 static bool smbios_legacy = true; 58 static bool smbios_uuid_encoded = true; 59 /* end: legacy structures & constants for <= 2.0 machines */ 60 61 62 uint8_t *smbios_tables; 63 size_t smbios_tables_len; 64 unsigned smbios_table_max; 65 unsigned smbios_table_cnt; 66 static SmbiosEntryPointType smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; 67 68 static SmbiosEntryPoint ep; 69 70 static int smbios_type4_count = 0; 71 static bool smbios_immutable; 72 static bool smbios_have_defaults; 73 static uint32_t smbios_cpuid_version, smbios_cpuid_features, smbios_smp_sockets; 74 75 static DECLARE_BITMAP(have_binfile_bitmap, SMBIOS_MAX_TYPE+1); 76 static DECLARE_BITMAP(have_fields_bitmap, SMBIOS_MAX_TYPE+1); 77 78 static struct { 79 const char *vendor, *version, *date; 80 bool have_major_minor, uefi; 81 uint8_t major, minor; 82 } type0; 83 84 static struct { 85 const char *manufacturer, *product, *version, *serial, *sku, *family; 86 /* uuid is in qemu_uuid */ 87 } type1; 88 89 static struct { 90 const char *manufacturer, *product, *version, *serial, *asset, *location; 91 } type2; 92 93 static struct { 94 const char *manufacturer, *version, *serial, *asset, *sku; 95 } type3; 96 97 /* 98 * SVVP requires max_speed and current_speed to be set and not being 99 * 0 which counts as unknown (SMBIOS 3.1.0/Table 21). Set the 100 * default value to 2000MHz as we did before. 101 */ 102 #define DEFAULT_CPU_SPEED 2000 103 104 static struct { 105 const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part; 106 uint64_t max_speed; 107 uint64_t current_speed; 108 uint64_t processor_id; 109 } type4 = { 110 .max_speed = DEFAULT_CPU_SPEED, 111 .current_speed = DEFAULT_CPU_SPEED, 112 .processor_id = 0, 113 }; 114 115 struct type8_instance { 116 const char *internal_reference, *external_reference; 117 uint8_t connector_type, port_type; 118 QTAILQ_ENTRY(type8_instance) next; 119 }; 120 static QTAILQ_HEAD(, type8_instance) type8 = QTAILQ_HEAD_INITIALIZER(type8); 121 122 static struct { 123 size_t nvalues; 124 char **values; 125 } type11; 126 127 static struct { 128 const char *loc_pfx, *bank, *manufacturer, *serial, *asset, *part; 129 uint16_t speed; 130 } type17; 131 132 static QEnumLookup type41_kind_lookup = { 133 .array = (const char *const[]) { 134 "other", 135 "unknown", 136 "video", 137 "scsi", 138 "ethernet", 139 "tokenring", 140 "sound", 141 "pata", 142 "sata", 143 "sas", 144 }, 145 .size = 10 146 }; 147 struct type41_instance { 148 const char *designation, *pcidev; 149 uint8_t instance, kind; 150 QTAILQ_ENTRY(type41_instance) next; 151 }; 152 static QTAILQ_HEAD(, type41_instance) type41 = QTAILQ_HEAD_INITIALIZER(type41); 153 154 static QemuOptsList qemu_smbios_opts = { 155 .name = "smbios", 156 .head = QTAILQ_HEAD_INITIALIZER(qemu_smbios_opts.head), 157 .desc = { 158 /* 159 * no elements => accept any params 160 * validation will happen later 161 */ 162 { /* end of list */ } 163 } 164 }; 165 166 static const QemuOptDesc qemu_smbios_file_opts[] = { 167 { 168 .name = "file", 169 .type = QEMU_OPT_STRING, 170 .help = "binary file containing an SMBIOS element", 171 }, 172 { /* end of list */ } 173 }; 174 175 static const QemuOptDesc qemu_smbios_type0_opts[] = { 176 { 177 .name = "type", 178 .type = QEMU_OPT_NUMBER, 179 .help = "SMBIOS element type", 180 },{ 181 .name = "vendor", 182 .type = QEMU_OPT_STRING, 183 .help = "vendor name", 184 },{ 185 .name = "version", 186 .type = QEMU_OPT_STRING, 187 .help = "version number", 188 },{ 189 .name = "date", 190 .type = QEMU_OPT_STRING, 191 .help = "release date", 192 },{ 193 .name = "release", 194 .type = QEMU_OPT_STRING, 195 .help = "revision number", 196 },{ 197 .name = "uefi", 198 .type = QEMU_OPT_BOOL, 199 .help = "uefi support", 200 }, 201 { /* end of list */ } 202 }; 203 204 static const QemuOptDesc qemu_smbios_type1_opts[] = { 205 { 206 .name = "type", 207 .type = QEMU_OPT_NUMBER, 208 .help = "SMBIOS element type", 209 },{ 210 .name = "manufacturer", 211 .type = QEMU_OPT_STRING, 212 .help = "manufacturer name", 213 },{ 214 .name = "product", 215 .type = QEMU_OPT_STRING, 216 .help = "product name", 217 },{ 218 .name = "version", 219 .type = QEMU_OPT_STRING, 220 .help = "version number", 221 },{ 222 .name = "serial", 223 .type = QEMU_OPT_STRING, 224 .help = "serial number", 225 },{ 226 .name = "uuid", 227 .type = QEMU_OPT_STRING, 228 .help = "UUID", 229 },{ 230 .name = "sku", 231 .type = QEMU_OPT_STRING, 232 .help = "SKU number", 233 },{ 234 .name = "family", 235 .type = QEMU_OPT_STRING, 236 .help = "family name", 237 }, 238 { /* end of list */ } 239 }; 240 241 static const QemuOptDesc qemu_smbios_type2_opts[] = { 242 { 243 .name = "type", 244 .type = QEMU_OPT_NUMBER, 245 .help = "SMBIOS element type", 246 },{ 247 .name = "manufacturer", 248 .type = QEMU_OPT_STRING, 249 .help = "manufacturer name", 250 },{ 251 .name = "product", 252 .type = QEMU_OPT_STRING, 253 .help = "product name", 254 },{ 255 .name = "version", 256 .type = QEMU_OPT_STRING, 257 .help = "version number", 258 },{ 259 .name = "serial", 260 .type = QEMU_OPT_STRING, 261 .help = "serial number", 262 },{ 263 .name = "asset", 264 .type = QEMU_OPT_STRING, 265 .help = "asset tag number", 266 },{ 267 .name = "location", 268 .type = QEMU_OPT_STRING, 269 .help = "location in chassis", 270 }, 271 { /* end of list */ } 272 }; 273 274 static const QemuOptDesc qemu_smbios_type3_opts[] = { 275 { 276 .name = "type", 277 .type = QEMU_OPT_NUMBER, 278 .help = "SMBIOS element type", 279 },{ 280 .name = "manufacturer", 281 .type = QEMU_OPT_STRING, 282 .help = "manufacturer name", 283 },{ 284 .name = "version", 285 .type = QEMU_OPT_STRING, 286 .help = "version number", 287 },{ 288 .name = "serial", 289 .type = QEMU_OPT_STRING, 290 .help = "serial number", 291 },{ 292 .name = "asset", 293 .type = QEMU_OPT_STRING, 294 .help = "asset tag number", 295 },{ 296 .name = "sku", 297 .type = QEMU_OPT_STRING, 298 .help = "SKU number", 299 }, 300 { /* end of list */ } 301 }; 302 303 static const QemuOptDesc qemu_smbios_type4_opts[] = { 304 { 305 .name = "type", 306 .type = QEMU_OPT_NUMBER, 307 .help = "SMBIOS element type", 308 },{ 309 .name = "sock_pfx", 310 .type = QEMU_OPT_STRING, 311 .help = "socket designation string prefix", 312 },{ 313 .name = "manufacturer", 314 .type = QEMU_OPT_STRING, 315 .help = "manufacturer name", 316 },{ 317 .name = "version", 318 .type = QEMU_OPT_STRING, 319 .help = "version number", 320 },{ 321 .name = "max-speed", 322 .type = QEMU_OPT_NUMBER, 323 .help = "max speed in MHz", 324 },{ 325 .name = "current-speed", 326 .type = QEMU_OPT_NUMBER, 327 .help = "speed at system boot in MHz", 328 },{ 329 .name = "serial", 330 .type = QEMU_OPT_STRING, 331 .help = "serial number", 332 },{ 333 .name = "asset", 334 .type = QEMU_OPT_STRING, 335 .help = "asset tag number", 336 },{ 337 .name = "part", 338 .type = QEMU_OPT_STRING, 339 .help = "part number", 340 }, { 341 .name = "processor-id", 342 .type = QEMU_OPT_NUMBER, 343 .help = "processor id", 344 }, 345 { /* end of list */ } 346 }; 347 348 static const QemuOptDesc qemu_smbios_type8_opts[] = { 349 { 350 .name = "type", 351 .type = QEMU_OPT_NUMBER, 352 .help = "SMBIOS element type", 353 }, 354 { 355 .name = "internal_reference", 356 .type = QEMU_OPT_STRING, 357 .help = "internal reference designator", 358 }, 359 { 360 .name = "external_reference", 361 .type = QEMU_OPT_STRING, 362 .help = "external reference designator", 363 }, 364 { 365 .name = "connector_type", 366 .type = QEMU_OPT_NUMBER, 367 .help = "connector type", 368 }, 369 { 370 .name = "port_type", 371 .type = QEMU_OPT_NUMBER, 372 .help = "port type", 373 }, 374 { /* end of list */ } 375 }; 376 377 static const QemuOptDesc qemu_smbios_type11_opts[] = { 378 { 379 .name = "type", 380 .type = QEMU_OPT_NUMBER, 381 .help = "SMBIOS element type", 382 }, 383 { 384 .name = "value", 385 .type = QEMU_OPT_STRING, 386 .help = "OEM string data", 387 }, 388 { 389 .name = "path", 390 .type = QEMU_OPT_STRING, 391 .help = "OEM string data from file", 392 }, 393 { /* end of list */ } 394 }; 395 396 static const QemuOptDesc qemu_smbios_type17_opts[] = { 397 { 398 .name = "type", 399 .type = QEMU_OPT_NUMBER, 400 .help = "SMBIOS element type", 401 },{ 402 .name = "loc_pfx", 403 .type = QEMU_OPT_STRING, 404 .help = "device locator string prefix", 405 },{ 406 .name = "bank", 407 .type = QEMU_OPT_STRING, 408 .help = "bank locator string", 409 },{ 410 .name = "manufacturer", 411 .type = QEMU_OPT_STRING, 412 .help = "manufacturer name", 413 },{ 414 .name = "serial", 415 .type = QEMU_OPT_STRING, 416 .help = "serial number", 417 },{ 418 .name = "asset", 419 .type = QEMU_OPT_STRING, 420 .help = "asset tag number", 421 },{ 422 .name = "part", 423 .type = QEMU_OPT_STRING, 424 .help = "part number", 425 },{ 426 .name = "speed", 427 .type = QEMU_OPT_NUMBER, 428 .help = "maximum capable speed", 429 }, 430 { /* end of list */ } 431 }; 432 433 static const QemuOptDesc qemu_smbios_type41_opts[] = { 434 { 435 .name = "type", 436 .type = QEMU_OPT_NUMBER, 437 .help = "SMBIOS element type", 438 },{ 439 .name = "designation", 440 .type = QEMU_OPT_STRING, 441 .help = "reference designation string", 442 },{ 443 .name = "kind", 444 .type = QEMU_OPT_STRING, 445 .help = "device type", 446 .def_value_str = "other", 447 },{ 448 .name = "instance", 449 .type = QEMU_OPT_NUMBER, 450 .help = "device type instance", 451 },{ 452 .name = "pcidev", 453 .type = QEMU_OPT_STRING, 454 .help = "PCI device", 455 }, 456 { /* end of list */ } 457 }; 458 459 static void smbios_register_config(void) 460 { 461 qemu_add_opts(&qemu_smbios_opts); 462 } 463 464 opts_init(smbios_register_config); 465 466 /* 467 * The SMBIOS 2.1 "structure table length" field in the 468 * entry point uses a 16-bit integer, so we're limited 469 * in total table size 470 */ 471 #define SMBIOS_21_MAX_TABLES_LEN 0xffff 472 473 static void smbios_validate_table(MachineState *ms) 474 { 475 uint32_t expect_t4_count = smbios_legacy ? 476 ms->smp.cpus : smbios_smp_sockets; 477 478 if (smbios_type4_count && smbios_type4_count != expect_t4_count) { 479 error_report("Expected %d SMBIOS Type 4 tables, got %d instead", 480 expect_t4_count, smbios_type4_count); 481 exit(1); 482 } 483 484 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_32 && 485 smbios_tables_len > SMBIOS_21_MAX_TABLES_LEN) { 486 error_report("SMBIOS 2.1 table length %zu exceeds %d", 487 smbios_tables_len, SMBIOS_21_MAX_TABLES_LEN); 488 exit(1); 489 } 490 } 491 492 493 /* legacy setup functions for <= 2.0 machines */ 494 static void smbios_add_field(int type, int offset, const void *data, size_t len) 495 { 496 struct smbios_field *field; 497 498 if (!smbios_entries) { 499 smbios_entries_len = sizeof(uint16_t); 500 smbios_entries = g_malloc0(smbios_entries_len); 501 } 502 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 503 sizeof(*field) + len); 504 field = (struct smbios_field *)(smbios_entries + smbios_entries_len); 505 field->header.type = SMBIOS_FIELD_ENTRY; 506 field->header.length = cpu_to_le16(sizeof(*field) + len); 507 508 field->type = type; 509 field->offset = cpu_to_le16(offset); 510 memcpy(field->data, data, len); 511 512 smbios_entries_len += sizeof(*field) + len; 513 (*(uint16_t *)smbios_entries) = 514 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 515 } 516 517 static void smbios_maybe_add_str(int type, int offset, const char *data) 518 { 519 if (data) { 520 smbios_add_field(type, offset, data, strlen(data) + 1); 521 } 522 } 523 524 static void smbios_build_type_0_fields(void) 525 { 526 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, vendor_str), 527 type0.vendor); 528 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, bios_version_str), 529 type0.version); 530 smbios_maybe_add_str(0, offsetof(struct smbios_type_0, 531 bios_release_date_str), 532 type0.date); 533 if (type0.have_major_minor) { 534 smbios_add_field(0, offsetof(struct smbios_type_0, 535 system_bios_major_release), 536 &type0.major, 1); 537 smbios_add_field(0, offsetof(struct smbios_type_0, 538 system_bios_minor_release), 539 &type0.minor, 1); 540 } 541 } 542 543 static void smbios_build_type_1_fields(void) 544 { 545 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, manufacturer_str), 546 type1.manufacturer); 547 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, product_name_str), 548 type1.product); 549 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, version_str), 550 type1.version); 551 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, serial_number_str), 552 type1.serial); 553 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, sku_number_str), 554 type1.sku); 555 smbios_maybe_add_str(1, offsetof(struct smbios_type_1, family_str), 556 type1.family); 557 if (qemu_uuid_set) { 558 /* We don't encode the UUID in the "wire format" here because this 559 * function is for legacy mode and needs to keep the guest ABI, and 560 * because we don't know what's the SMBIOS version advertised by the 561 * BIOS. 562 */ 563 smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 564 &qemu_uuid, 16); 565 } 566 } 567 568 uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length) 569 { 570 if (!smbios_legacy) { 571 *length = 0; 572 return NULL; 573 } 574 575 if (!smbios_immutable) { 576 smbios_build_type_0_fields(); 577 smbios_build_type_1_fields(); 578 smbios_validate_table(ms); 579 smbios_immutable = true; 580 } 581 *length = smbios_entries_len; 582 return smbios_entries; 583 } 584 /* end: legacy setup functions for <= 2.0 machines */ 585 586 587 bool smbios_skip_table(uint8_t type, bool required_table) 588 { 589 if (test_bit(type, have_binfile_bitmap)) { 590 return true; /* user provided their own binary blob(s) */ 591 } 592 if (test_bit(type, have_fields_bitmap)) { 593 return false; /* user provided fields via command line */ 594 } 595 if (smbios_have_defaults && required_table) { 596 return false; /* we're building tables, and this one's required */ 597 } 598 return true; 599 } 600 601 #define T0_BASE 0x000 602 #define T1_BASE 0x100 603 #define T2_BASE 0x200 604 #define T3_BASE 0x300 605 #define T4_BASE 0x400 606 #define T11_BASE 0xe00 607 608 #define T16_BASE 0x1000 609 #define T17_BASE 0x1100 610 #define T19_BASE 0x1300 611 #define T32_BASE 0x2000 612 #define T41_BASE 0x2900 613 #define T127_BASE 0x7F00 614 615 static void smbios_build_type_0_table(void) 616 { 617 SMBIOS_BUILD_TABLE_PRE(0, T0_BASE, false); /* optional, leave up to BIOS */ 618 619 SMBIOS_TABLE_SET_STR(0, vendor_str, type0.vendor); 620 SMBIOS_TABLE_SET_STR(0, bios_version_str, type0.version); 621 622 t->bios_starting_address_segment = cpu_to_le16(0xE800); /* from SeaBIOS */ 623 624 SMBIOS_TABLE_SET_STR(0, bios_release_date_str, type0.date); 625 626 t->bios_rom_size = 0; /* hardcoded in SeaBIOS with FIXME comment */ 627 628 t->bios_characteristics = cpu_to_le64(0x08); /* Not supported */ 629 t->bios_characteristics_extension_bytes[0] = 0; 630 t->bios_characteristics_extension_bytes[1] = 0x14; /* TCD/SVVP | VM */ 631 if (type0.uefi) { 632 t->bios_characteristics_extension_bytes[1] |= 0x08; /* |= UEFI */ 633 } 634 635 if (type0.have_major_minor) { 636 t->system_bios_major_release = type0.major; 637 t->system_bios_minor_release = type0.minor; 638 } else { 639 t->system_bios_major_release = 0; 640 t->system_bios_minor_release = 0; 641 } 642 643 /* hardcoded in SeaBIOS */ 644 t->embedded_controller_major_release = 0xFF; 645 t->embedded_controller_minor_release = 0xFF; 646 647 SMBIOS_BUILD_TABLE_POST; 648 } 649 650 /* Encode UUID from the big endian encoding described on RFC4122 to the wire 651 * format specified by SMBIOS version 2.6. 652 */ 653 static void smbios_encode_uuid(struct smbios_uuid *uuid, QemuUUID *in) 654 { 655 memcpy(uuid, in, 16); 656 if (smbios_uuid_encoded) { 657 uuid->time_low = bswap32(uuid->time_low); 658 uuid->time_mid = bswap16(uuid->time_mid); 659 uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version); 660 } 661 } 662 663 static void smbios_build_type_1_table(void) 664 { 665 SMBIOS_BUILD_TABLE_PRE(1, T1_BASE, true); /* required */ 666 667 SMBIOS_TABLE_SET_STR(1, manufacturer_str, type1.manufacturer); 668 SMBIOS_TABLE_SET_STR(1, product_name_str, type1.product); 669 SMBIOS_TABLE_SET_STR(1, version_str, type1.version); 670 SMBIOS_TABLE_SET_STR(1, serial_number_str, type1.serial); 671 if (qemu_uuid_set) { 672 smbios_encode_uuid(&t->uuid, &qemu_uuid); 673 } else { 674 memset(&t->uuid, 0, 16); 675 } 676 t->wake_up_type = 0x06; /* power switch */ 677 SMBIOS_TABLE_SET_STR(1, sku_number_str, type1.sku); 678 SMBIOS_TABLE_SET_STR(1, family_str, type1.family); 679 680 SMBIOS_BUILD_TABLE_POST; 681 } 682 683 static void smbios_build_type_2_table(void) 684 { 685 SMBIOS_BUILD_TABLE_PRE(2, T2_BASE, false); /* optional */ 686 687 SMBIOS_TABLE_SET_STR(2, manufacturer_str, type2.manufacturer); 688 SMBIOS_TABLE_SET_STR(2, product_str, type2.product); 689 SMBIOS_TABLE_SET_STR(2, version_str, type2.version); 690 SMBIOS_TABLE_SET_STR(2, serial_number_str, type2.serial); 691 SMBIOS_TABLE_SET_STR(2, asset_tag_number_str, type2.asset); 692 t->feature_flags = 0x01; /* Motherboard */ 693 SMBIOS_TABLE_SET_STR(2, location_str, type2.location); 694 t->chassis_handle = cpu_to_le16(0x300); /* Type 3 (System enclosure) */ 695 t->board_type = 0x0A; /* Motherboard */ 696 t->contained_element_count = 0; 697 698 SMBIOS_BUILD_TABLE_POST; 699 } 700 701 static void smbios_build_type_3_table(void) 702 { 703 SMBIOS_BUILD_TABLE_PRE(3, T3_BASE, true); /* required */ 704 705 SMBIOS_TABLE_SET_STR(3, manufacturer_str, type3.manufacturer); 706 t->type = 0x01; /* Other */ 707 SMBIOS_TABLE_SET_STR(3, version_str, type3.version); 708 SMBIOS_TABLE_SET_STR(3, serial_number_str, type3.serial); 709 SMBIOS_TABLE_SET_STR(3, asset_tag_number_str, type3.asset); 710 t->boot_up_state = 0x03; /* Safe */ 711 t->power_supply_state = 0x03; /* Safe */ 712 t->thermal_state = 0x03; /* Safe */ 713 t->security_status = 0x02; /* Unknown */ 714 t->oem_defined = cpu_to_le32(0); 715 t->height = 0; 716 t->number_of_power_cords = 0; 717 t->contained_element_count = 0; 718 t->contained_element_record_length = 0; 719 SMBIOS_TABLE_SET_STR(3, sku_number_str, type3.sku); 720 721 SMBIOS_BUILD_TABLE_POST; 722 } 723 724 static void smbios_build_type_4_table(MachineState *ms, unsigned instance) 725 { 726 char sock_str[128]; 727 size_t tbl_len = SMBIOS_TYPE_4_LEN_V28; 728 unsigned threads_per_socket; 729 unsigned cores_per_socket; 730 731 if (smbios_ep_type == SMBIOS_ENTRY_POINT_TYPE_64) { 732 tbl_len = SMBIOS_TYPE_4_LEN_V30; 733 } 734 735 SMBIOS_BUILD_TABLE_PRE_SIZE(4, T4_BASE + instance, 736 true, tbl_len); /* required */ 737 738 snprintf(sock_str, sizeof(sock_str), "%s%2x", type4.sock_pfx, instance); 739 SMBIOS_TABLE_SET_STR(4, socket_designation_str, sock_str); 740 t->processor_type = 0x03; /* CPU */ 741 t->processor_family = 0x01; /* Other */ 742 SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer); 743 if (type4.processor_id == 0) { 744 t->processor_id[0] = cpu_to_le32(smbios_cpuid_version); 745 t->processor_id[1] = cpu_to_le32(smbios_cpuid_features); 746 } else { 747 t->processor_id[0] = cpu_to_le32((uint32_t)type4.processor_id); 748 t->processor_id[1] = cpu_to_le32(type4.processor_id >> 32); 749 } 750 SMBIOS_TABLE_SET_STR(4, processor_version_str, type4.version); 751 t->voltage = 0; 752 t->external_clock = cpu_to_le16(0); /* Unknown */ 753 t->max_speed = cpu_to_le16(type4.max_speed); 754 t->current_speed = cpu_to_le16(type4.current_speed); 755 t->status = 0x41; /* Socket populated, CPU enabled */ 756 t->processor_upgrade = 0x01; /* Other */ 757 t->l1_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 758 t->l2_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 759 t->l3_cache_handle = cpu_to_le16(0xFFFF); /* N/A */ 760 SMBIOS_TABLE_SET_STR(4, serial_number_str, type4.serial); 761 SMBIOS_TABLE_SET_STR(4, asset_tag_number_str, type4.asset); 762 SMBIOS_TABLE_SET_STR(4, part_number_str, type4.part); 763 764 threads_per_socket = machine_topo_get_threads_per_socket(ms); 765 cores_per_socket = machine_topo_get_cores_per_socket(ms); 766 767 t->core_count = (cores_per_socket > 255) ? 0xFF : cores_per_socket; 768 t->core_enabled = t->core_count; 769 770 t->thread_count = (threads_per_socket > 255) ? 0xFF : threads_per_socket; 771 772 t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */ 773 t->processor_family2 = cpu_to_le16(0x01); /* Other */ 774 775 if (tbl_len == SMBIOS_TYPE_4_LEN_V30) { 776 t->core_count2 = t->core_enabled2 = cpu_to_le16(cores_per_socket); 777 t->thread_count2 = cpu_to_le16(threads_per_socket); 778 } 779 780 SMBIOS_BUILD_TABLE_POST; 781 smbios_type4_count++; 782 } 783 784 static void smbios_build_type_8_table(void) 785 { 786 unsigned instance = 0; 787 struct type8_instance *t8; 788 789 QTAILQ_FOREACH(t8, &type8, next) { 790 SMBIOS_BUILD_TABLE_PRE(8, T0_BASE + instance, true); 791 792 SMBIOS_TABLE_SET_STR(8, internal_reference_str, t8->internal_reference); 793 SMBIOS_TABLE_SET_STR(8, external_reference_str, t8->external_reference); 794 /* most vendors seem to set this to None */ 795 t->internal_connector_type = 0x0; 796 t->external_connector_type = t8->connector_type; 797 t->port_type = t8->port_type; 798 799 SMBIOS_BUILD_TABLE_POST; 800 instance++; 801 } 802 } 803 804 static void smbios_build_type_11_table(void) 805 { 806 char count_str[128]; 807 size_t i; 808 809 if (type11.nvalues == 0) { 810 return; 811 } 812 813 SMBIOS_BUILD_TABLE_PRE(11, T11_BASE, true); /* required */ 814 815 snprintf(count_str, sizeof(count_str), "%zu", type11.nvalues); 816 t->count = type11.nvalues; 817 818 for (i = 0; i < type11.nvalues; i++) { 819 SMBIOS_TABLE_SET_STR_LIST(11, type11.values[i]); 820 g_free(type11.values[i]); 821 type11.values[i] = NULL; 822 } 823 824 SMBIOS_BUILD_TABLE_POST; 825 } 826 827 #define MAX_T16_STD_SZ 0x80000000 /* 2T in Kilobytes */ 828 829 static void smbios_build_type_16_table(unsigned dimm_cnt) 830 { 831 uint64_t size_kb; 832 833 SMBIOS_BUILD_TABLE_PRE(16, T16_BASE, true); /* required */ 834 835 t->location = 0x01; /* Other */ 836 t->use = 0x03; /* System memory */ 837 t->error_correction = 0x06; /* Multi-bit ECC (for Microsoft, per SeaBIOS) */ 838 size_kb = QEMU_ALIGN_UP(current_machine->ram_size, KiB) / KiB; 839 if (size_kb < MAX_T16_STD_SZ) { 840 t->maximum_capacity = cpu_to_le32(size_kb); 841 t->extended_maximum_capacity = cpu_to_le64(0); 842 } else { 843 t->maximum_capacity = cpu_to_le32(MAX_T16_STD_SZ); 844 t->extended_maximum_capacity = cpu_to_le64(current_machine->ram_size); 845 } 846 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 847 t->number_of_memory_devices = cpu_to_le16(dimm_cnt); 848 849 SMBIOS_BUILD_TABLE_POST; 850 } 851 852 #define MAX_T17_STD_SZ 0x7FFF /* (32G - 1M), in Megabytes */ 853 #define MAX_T17_EXT_SZ 0x80000000 /* 2P, in Megabytes */ 854 855 static void smbios_build_type_17_table(unsigned instance, uint64_t size) 856 { 857 char loc_str[128]; 858 uint64_t size_mb; 859 860 SMBIOS_BUILD_TABLE_PRE(17, T17_BASE + instance, true); /* required */ 861 862 t->physical_memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 863 t->memory_error_information_handle = cpu_to_le16(0xFFFE); /* Not provided */ 864 t->total_width = cpu_to_le16(0xFFFF); /* Unknown */ 865 t->data_width = cpu_to_le16(0xFFFF); /* Unknown */ 866 size_mb = QEMU_ALIGN_UP(size, MiB) / MiB; 867 if (size_mb < MAX_T17_STD_SZ) { 868 t->size = cpu_to_le16(size_mb); 869 t->extended_size = cpu_to_le32(0); 870 } else { 871 assert(size_mb < MAX_T17_EXT_SZ); 872 t->size = cpu_to_le16(MAX_T17_STD_SZ); 873 t->extended_size = cpu_to_le32(size_mb); 874 } 875 t->form_factor = 0x09; /* DIMM */ 876 t->device_set = 0; /* Not in a set */ 877 snprintf(loc_str, sizeof(loc_str), "%s %d", type17.loc_pfx, instance); 878 SMBIOS_TABLE_SET_STR(17, device_locator_str, loc_str); 879 SMBIOS_TABLE_SET_STR(17, bank_locator_str, type17.bank); 880 t->memory_type = 0x07; /* RAM */ 881 t->type_detail = cpu_to_le16(0x02); /* Other */ 882 t->speed = cpu_to_le16(type17.speed); 883 SMBIOS_TABLE_SET_STR(17, manufacturer_str, type17.manufacturer); 884 SMBIOS_TABLE_SET_STR(17, serial_number_str, type17.serial); 885 SMBIOS_TABLE_SET_STR(17, asset_tag_number_str, type17.asset); 886 SMBIOS_TABLE_SET_STR(17, part_number_str, type17.part); 887 t->attributes = 0; /* Unknown */ 888 t->configured_clock_speed = t->speed; /* reuse value for max speed */ 889 t->minimum_voltage = cpu_to_le16(0); /* Unknown */ 890 t->maximum_voltage = cpu_to_le16(0); /* Unknown */ 891 t->configured_voltage = cpu_to_le16(0); /* Unknown */ 892 893 SMBIOS_BUILD_TABLE_POST; 894 } 895 896 static void smbios_build_type_19_table(unsigned instance, unsigned offset, 897 uint64_t start, uint64_t size) 898 { 899 uint64_t end, start_kb, end_kb; 900 901 SMBIOS_BUILD_TABLE_PRE(19, T19_BASE + offset + instance, 902 true); /* required */ 903 904 end = start + size - 1; 905 assert(end > start); 906 start_kb = start / KiB; 907 end_kb = end / KiB; 908 if (start_kb < UINT32_MAX && end_kb < UINT32_MAX) { 909 t->starting_address = cpu_to_le32(start_kb); 910 t->ending_address = cpu_to_le32(end_kb); 911 t->extended_starting_address = 912 t->extended_ending_address = cpu_to_le64(0); 913 } else { 914 t->starting_address = t->ending_address = cpu_to_le32(UINT32_MAX); 915 t->extended_starting_address = cpu_to_le64(start); 916 t->extended_ending_address = cpu_to_le64(end); 917 } 918 t->memory_array_handle = cpu_to_le16(0x1000); /* Type 16 above */ 919 t->partition_width = 1; /* One device per row */ 920 921 SMBIOS_BUILD_TABLE_POST; 922 } 923 924 static void smbios_build_type_32_table(void) 925 { 926 SMBIOS_BUILD_TABLE_PRE(32, T32_BASE, true); /* required */ 927 928 memset(t->reserved, 0, 6); 929 t->boot_status = 0; /* No errors detected */ 930 931 SMBIOS_BUILD_TABLE_POST; 932 } 933 934 static void smbios_build_type_41_table(Error **errp) 935 { 936 unsigned instance = 0; 937 struct type41_instance *t41; 938 939 QTAILQ_FOREACH(t41, &type41, next) { 940 SMBIOS_BUILD_TABLE_PRE(41, T41_BASE + instance, true); 941 942 SMBIOS_TABLE_SET_STR(41, reference_designation_str, t41->designation); 943 t->device_type = t41->kind; 944 t->device_type_instance = t41->instance; 945 t->segment_group_number = cpu_to_le16(0); 946 t->bus_number = 0; 947 t->device_number = 0; 948 949 if (t41->pcidev) { 950 PCIDevice *pdev = NULL; 951 int rc = pci_qdev_find_device(t41->pcidev, &pdev); 952 if (rc != 0) { 953 error_setg(errp, 954 "No PCI device %s for SMBIOS type 41 entry %s", 955 t41->pcidev, t41->designation); 956 return; 957 } 958 /* 959 * We only handle the case were the device is attached to 960 * the PCI root bus. The general case is more complex as 961 * bridges are enumerated later and the table would need 962 * to be updated at this moment. 963 */ 964 if (!pci_bus_is_root(pci_get_bus(pdev))) { 965 error_setg(errp, 966 "Cannot create type 41 entry for PCI device %s: " 967 "not attached to the root bus", 968 t41->pcidev); 969 return; 970 } 971 t->segment_group_number = cpu_to_le16(0); 972 t->bus_number = pci_dev_bus_num(pdev); 973 t->device_number = pdev->devfn; 974 } 975 976 SMBIOS_BUILD_TABLE_POST; 977 instance++; 978 } 979 } 980 981 static void smbios_build_type_127_table(void) 982 { 983 SMBIOS_BUILD_TABLE_PRE(127, T127_BASE, true); /* required */ 984 SMBIOS_BUILD_TABLE_POST; 985 } 986 987 void smbios_set_cpuid(uint32_t version, uint32_t features) 988 { 989 smbios_cpuid_version = version; 990 smbios_cpuid_features = features; 991 } 992 993 #define SMBIOS_SET_DEFAULT(field, value) \ 994 if (!field) { \ 995 field = value; \ 996 } 997 998 void smbios_set_defaults(const char *manufacturer, const char *product, 999 const char *version, bool legacy_mode, 1000 bool uuid_encoded, SmbiosEntryPointType ep_type) 1001 { 1002 smbios_have_defaults = true; 1003 smbios_legacy = legacy_mode; 1004 smbios_uuid_encoded = uuid_encoded; 1005 smbios_ep_type = ep_type; 1006 1007 /* drop unwanted version of command-line file blob(s) */ 1008 if (smbios_legacy) { 1009 g_free(smbios_tables); 1010 /* in legacy mode, also complain if fields were given for types > 1 */ 1011 if (find_next_bit(have_fields_bitmap, 1012 SMBIOS_MAX_TYPE+1, 2) < SMBIOS_MAX_TYPE+1) { 1013 error_report("can't process fields for smbios " 1014 "types > 1 on machine versions < 2.1!"); 1015 exit(1); 1016 } 1017 } else { 1018 g_free(smbios_entries); 1019 } 1020 1021 SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer); 1022 SMBIOS_SET_DEFAULT(type1.product, product); 1023 SMBIOS_SET_DEFAULT(type1.version, version); 1024 SMBIOS_SET_DEFAULT(type2.manufacturer, manufacturer); 1025 SMBIOS_SET_DEFAULT(type2.product, product); 1026 SMBIOS_SET_DEFAULT(type2.version, version); 1027 SMBIOS_SET_DEFAULT(type3.manufacturer, manufacturer); 1028 SMBIOS_SET_DEFAULT(type3.version, version); 1029 SMBIOS_SET_DEFAULT(type4.sock_pfx, "CPU"); 1030 SMBIOS_SET_DEFAULT(type4.manufacturer, manufacturer); 1031 SMBIOS_SET_DEFAULT(type4.version, version); 1032 SMBIOS_SET_DEFAULT(type17.loc_pfx, "DIMM"); 1033 SMBIOS_SET_DEFAULT(type17.manufacturer, manufacturer); 1034 } 1035 1036 static void smbios_entry_point_setup(void) 1037 { 1038 switch (smbios_ep_type) { 1039 case SMBIOS_ENTRY_POINT_TYPE_32: 1040 memcpy(ep.ep21.anchor_string, "_SM_", 4); 1041 memcpy(ep.ep21.intermediate_anchor_string, "_DMI_", 5); 1042 ep.ep21.length = sizeof(struct smbios_21_entry_point); 1043 ep.ep21.entry_point_revision = 0; /* formatted_area reserved */ 1044 memset(ep.ep21.formatted_area, 0, 5); 1045 1046 /* compliant with smbios spec v2.8 */ 1047 ep.ep21.smbios_major_version = 2; 1048 ep.ep21.smbios_minor_version = 8; 1049 ep.ep21.smbios_bcd_revision = 0x28; 1050 1051 /* set during table construction, but BIOS may override: */ 1052 ep.ep21.structure_table_length = cpu_to_le16(smbios_tables_len); 1053 ep.ep21.max_structure_size = cpu_to_le16(smbios_table_max); 1054 ep.ep21.number_of_structures = cpu_to_le16(smbios_table_cnt); 1055 1056 /* BIOS must recalculate */ 1057 ep.ep21.checksum = 0; 1058 ep.ep21.intermediate_checksum = 0; 1059 ep.ep21.structure_table_address = cpu_to_le32(0); 1060 1061 break; 1062 case SMBIOS_ENTRY_POINT_TYPE_64: 1063 memcpy(ep.ep30.anchor_string, "_SM3_", 5); 1064 ep.ep30.length = sizeof(struct smbios_30_entry_point); 1065 ep.ep30.entry_point_revision = 1; 1066 ep.ep30.reserved = 0; 1067 1068 /* compliant with smbios spec 3.0 */ 1069 ep.ep30.smbios_major_version = 3; 1070 ep.ep30.smbios_minor_version = 0; 1071 ep.ep30.smbios_doc_rev = 0; 1072 1073 /* set during table construct, but BIOS might override */ 1074 ep.ep30.structure_table_max_size = cpu_to_le32(smbios_tables_len); 1075 1076 /* BIOS must recalculate */ 1077 ep.ep30.checksum = 0; 1078 ep.ep30.structure_table_address = cpu_to_le64(0); 1079 1080 break; 1081 default: 1082 abort(); 1083 break; 1084 } 1085 } 1086 1087 void smbios_get_tables(MachineState *ms, 1088 const struct smbios_phys_mem_area *mem_array, 1089 const unsigned int mem_array_size, 1090 uint8_t **tables, size_t *tables_len, 1091 uint8_t **anchor, size_t *anchor_len, 1092 Error **errp) 1093 { 1094 unsigned i, dimm_cnt, offset; 1095 1096 if (smbios_legacy) { 1097 *tables = *anchor = NULL; 1098 *tables_len = *anchor_len = 0; 1099 return; 1100 } 1101 1102 if (!smbios_immutable) { 1103 smbios_build_type_0_table(); 1104 smbios_build_type_1_table(); 1105 smbios_build_type_2_table(); 1106 smbios_build_type_3_table(); 1107 1108 smbios_smp_sockets = ms->smp.sockets; 1109 assert(smbios_smp_sockets >= 1); 1110 1111 for (i = 0; i < smbios_smp_sockets; i++) { 1112 smbios_build_type_4_table(ms, i); 1113 } 1114 1115 smbios_build_type_8_table(); 1116 smbios_build_type_11_table(); 1117 1118 #define MAX_DIMM_SZ (16 * GiB) 1119 #define GET_DIMM_SZ ((i < dimm_cnt - 1) ? MAX_DIMM_SZ \ 1120 : ((current_machine->ram_size - 1) % MAX_DIMM_SZ) + 1) 1121 1122 dimm_cnt = QEMU_ALIGN_UP(current_machine->ram_size, MAX_DIMM_SZ) / MAX_DIMM_SZ; 1123 1124 /* 1125 * The offset determines if we need to keep additional space between 1126 * table 17 and table 19 header handle numbers so that they do 1127 * not overlap. For example, for a VM with larger than 8 TB guest 1128 * memory and DIMM like chunks of 16 GiB, the default space between 1129 * the two tables (T19_BASE - T17_BASE = 512) is not enough. 1130 */ 1131 offset = (dimm_cnt > (T19_BASE - T17_BASE)) ? \ 1132 dimm_cnt - (T19_BASE - T17_BASE) : 0; 1133 1134 smbios_build_type_16_table(dimm_cnt); 1135 1136 for (i = 0; i < dimm_cnt; i++) { 1137 smbios_build_type_17_table(i, GET_DIMM_SZ); 1138 } 1139 1140 for (i = 0; i < mem_array_size; i++) { 1141 smbios_build_type_19_table(i, offset, mem_array[i].address, 1142 mem_array[i].length); 1143 } 1144 1145 /* 1146 * make sure 16 bit handle numbers in the headers of tables 19 1147 * and 32 do not overlap. 1148 */ 1149 assert((mem_array_size + offset) < (T32_BASE - T19_BASE)); 1150 1151 smbios_build_type_32_table(); 1152 smbios_build_type_38_table(); 1153 smbios_build_type_41_table(errp); 1154 smbios_build_type_127_table(); 1155 1156 smbios_validate_table(ms); 1157 smbios_entry_point_setup(); 1158 smbios_immutable = true; 1159 } 1160 1161 /* return tables blob and entry point (anchor), and their sizes */ 1162 *tables = smbios_tables; 1163 *tables_len = smbios_tables_len; 1164 *anchor = (uint8_t *)&ep; 1165 1166 /* calculate length based on anchor string */ 1167 if (!strncmp((char *)&ep, "_SM_", 4)) { 1168 *anchor_len = sizeof(struct smbios_21_entry_point); 1169 } else if (!strncmp((char *)&ep, "_SM3_", 5)) { 1170 *anchor_len = sizeof(struct smbios_30_entry_point); 1171 } else { 1172 abort(); 1173 } 1174 } 1175 1176 static void save_opt(const char **dest, QemuOpts *opts, const char *name) 1177 { 1178 const char *val = qemu_opt_get(opts, name); 1179 1180 if (val) { 1181 *dest = val; 1182 } 1183 } 1184 1185 1186 struct opt_list { 1187 size_t *ndest; 1188 char ***dest; 1189 }; 1190 1191 static int save_opt_one(void *opaque, 1192 const char *name, const char *value, 1193 Error **errp) 1194 { 1195 struct opt_list *opt = opaque; 1196 1197 if (g_str_equal(name, "path")) { 1198 g_autoptr(GByteArray) data = g_byte_array_new(); 1199 g_autofree char *buf = g_new(char, 4096); 1200 ssize_t ret; 1201 int fd = qemu_open(value, O_RDONLY, errp); 1202 if (fd < 0) { 1203 return -1; 1204 } 1205 1206 while (1) { 1207 ret = read(fd, buf, 4096); 1208 if (ret == 0) { 1209 break; 1210 } 1211 if (ret < 0) { 1212 error_setg(errp, "Unable to read from %s: %s", 1213 value, strerror(errno)); 1214 qemu_close(fd); 1215 return -1; 1216 } 1217 if (memchr(buf, '\0', ret)) { 1218 error_setg(errp, "NUL in OEM strings value in %s", value); 1219 qemu_close(fd); 1220 return -1; 1221 } 1222 g_byte_array_append(data, (guint8 *)buf, ret); 1223 } 1224 1225 qemu_close(fd); 1226 1227 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1228 (*opt->dest)[*opt->ndest] = (char *)g_byte_array_free(data, FALSE); 1229 (*opt->ndest)++; 1230 data = NULL; 1231 } else if (g_str_equal(name, "value")) { 1232 *opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1); 1233 (*opt->dest)[*opt->ndest] = g_strdup(value); 1234 (*opt->ndest)++; 1235 } else if (!g_str_equal(name, "type")) { 1236 error_setg(errp, "Unexpected option %s", name); 1237 return -1; 1238 } 1239 1240 return 0; 1241 } 1242 1243 static bool save_opt_list(size_t *ndest, char ***dest, QemuOpts *opts, 1244 Error **errp) 1245 { 1246 struct opt_list opt = { 1247 ndest, dest, 1248 }; 1249 if (!qemu_opt_foreach(opts, save_opt_one, &opt, errp)) { 1250 return false; 1251 } 1252 return true; 1253 } 1254 1255 void smbios_entry_add(QemuOpts *opts, Error **errp) 1256 { 1257 const char *val; 1258 1259 assert(!smbios_immutable); 1260 1261 val = qemu_opt_get(opts, "file"); 1262 if (val) { 1263 struct smbios_structure_header *header; 1264 int size; 1265 struct smbios_table *table; /* legacy mode only */ 1266 1267 if (!qemu_opts_validate(opts, qemu_smbios_file_opts, errp)) { 1268 return; 1269 } 1270 1271 size = get_image_size(val); 1272 if (size == -1 || size < sizeof(struct smbios_structure_header)) { 1273 error_setg(errp, "Cannot read SMBIOS file %s", val); 1274 return; 1275 } 1276 1277 /* 1278 * NOTE: standard double '\0' terminator expected, per smbios spec. 1279 * (except in legacy mode, where the second '\0' is implicit and 1280 * will be inserted by the BIOS). 1281 */ 1282 smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size); 1283 header = (struct smbios_structure_header *)(smbios_tables + 1284 smbios_tables_len); 1285 1286 if (load_image_size(val, (uint8_t *)header, size) != size) { 1287 error_setg(errp, "Failed to load SMBIOS file %s", val); 1288 return; 1289 } 1290 1291 if (header->type <= SMBIOS_MAX_TYPE) { 1292 if (test_bit(header->type, have_fields_bitmap)) { 1293 error_setg(errp, 1294 "can't load type %d struct, fields already specified!", 1295 header->type); 1296 return; 1297 } 1298 set_bit(header->type, have_binfile_bitmap); 1299 } 1300 1301 if (header->type == 4) { 1302 smbios_type4_count++; 1303 } 1304 1305 smbios_tables_len += size; 1306 if (size > smbios_table_max) { 1307 smbios_table_max = size; 1308 } 1309 smbios_table_cnt++; 1310 1311 /* add a copy of the newly loaded blob to legacy smbios_entries */ 1312 /* NOTE: This code runs before smbios_set_defaults(), so we don't 1313 * yet know which mode (legacy vs. aggregate-table) will be 1314 * required. We therefore add the binary blob to both legacy 1315 * (smbios_entries) and aggregate (smbios_tables) tables, and 1316 * delete the one we don't need from smbios_set_defaults(), 1317 * once we know which machine version has been requested. 1318 */ 1319 if (!smbios_entries) { 1320 smbios_entries_len = sizeof(uint16_t); 1321 smbios_entries = g_malloc0(smbios_entries_len); 1322 } 1323 smbios_entries = g_realloc(smbios_entries, smbios_entries_len + 1324 size + sizeof(*table)); 1325 table = (struct smbios_table *)(smbios_entries + smbios_entries_len); 1326 table->header.type = SMBIOS_TABLE_ENTRY; 1327 table->header.length = cpu_to_le16(sizeof(*table) + size); 1328 memcpy(table->data, header, size); 1329 smbios_entries_len += sizeof(*table) + size; 1330 (*(uint16_t *)smbios_entries) = 1331 cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1); 1332 /* end: add a copy of the newly loaded blob to legacy smbios_entries */ 1333 1334 return; 1335 } 1336 1337 val = qemu_opt_get(opts, "type"); 1338 if (val) { 1339 unsigned long type = strtoul(val, NULL, 0); 1340 1341 if (type > SMBIOS_MAX_TYPE) { 1342 error_setg(errp, "out of range!"); 1343 return; 1344 } 1345 1346 if (test_bit(type, have_binfile_bitmap)) { 1347 error_setg(errp, "can't add fields, binary file already loaded!"); 1348 return; 1349 } 1350 set_bit(type, have_fields_bitmap); 1351 1352 switch (type) { 1353 case 0: 1354 if (!qemu_opts_validate(opts, qemu_smbios_type0_opts, errp)) { 1355 return; 1356 } 1357 save_opt(&type0.vendor, opts, "vendor"); 1358 save_opt(&type0.version, opts, "version"); 1359 save_opt(&type0.date, opts, "date"); 1360 type0.uefi = qemu_opt_get_bool(opts, "uefi", false); 1361 1362 val = qemu_opt_get(opts, "release"); 1363 if (val) { 1364 if (sscanf(val, "%hhu.%hhu", &type0.major, &type0.minor) != 2) { 1365 error_setg(errp, "Invalid release"); 1366 return; 1367 } 1368 type0.have_major_minor = true; 1369 } 1370 return; 1371 case 1: 1372 if (!qemu_opts_validate(opts, qemu_smbios_type1_opts, errp)) { 1373 return; 1374 } 1375 save_opt(&type1.manufacturer, opts, "manufacturer"); 1376 save_opt(&type1.product, opts, "product"); 1377 save_opt(&type1.version, opts, "version"); 1378 save_opt(&type1.serial, opts, "serial"); 1379 save_opt(&type1.sku, opts, "sku"); 1380 save_opt(&type1.family, opts, "family"); 1381 1382 val = qemu_opt_get(opts, "uuid"); 1383 if (val) { 1384 if (qemu_uuid_parse(val, &qemu_uuid) != 0) { 1385 error_setg(errp, "Invalid UUID"); 1386 return; 1387 } 1388 qemu_uuid_set = true; 1389 } 1390 return; 1391 case 2: 1392 if (!qemu_opts_validate(opts, qemu_smbios_type2_opts, errp)) { 1393 return; 1394 } 1395 save_opt(&type2.manufacturer, opts, "manufacturer"); 1396 save_opt(&type2.product, opts, "product"); 1397 save_opt(&type2.version, opts, "version"); 1398 save_opt(&type2.serial, opts, "serial"); 1399 save_opt(&type2.asset, opts, "asset"); 1400 save_opt(&type2.location, opts, "location"); 1401 return; 1402 case 3: 1403 if (!qemu_opts_validate(opts, qemu_smbios_type3_opts, errp)) { 1404 return; 1405 } 1406 save_opt(&type3.manufacturer, opts, "manufacturer"); 1407 save_opt(&type3.version, opts, "version"); 1408 save_opt(&type3.serial, opts, "serial"); 1409 save_opt(&type3.asset, opts, "asset"); 1410 save_opt(&type3.sku, opts, "sku"); 1411 return; 1412 case 4: 1413 if (!qemu_opts_validate(opts, qemu_smbios_type4_opts, errp)) { 1414 return; 1415 } 1416 save_opt(&type4.sock_pfx, opts, "sock_pfx"); 1417 save_opt(&type4.manufacturer, opts, "manufacturer"); 1418 save_opt(&type4.version, opts, "version"); 1419 save_opt(&type4.serial, opts, "serial"); 1420 save_opt(&type4.asset, opts, "asset"); 1421 save_opt(&type4.part, opts, "part"); 1422 /* If the value is 0, it will take the value from the CPU model. */ 1423 type4.processor_id = qemu_opt_get_number(opts, "processor-id", 0); 1424 type4.max_speed = qemu_opt_get_number(opts, "max-speed", 1425 DEFAULT_CPU_SPEED); 1426 type4.current_speed = qemu_opt_get_number(opts, "current-speed", 1427 DEFAULT_CPU_SPEED); 1428 if (type4.max_speed > UINT16_MAX || 1429 type4.current_speed > UINT16_MAX) { 1430 error_setg(errp, "SMBIOS CPU speed is too large (> %d)", 1431 UINT16_MAX); 1432 } 1433 return; 1434 case 8: 1435 if (!qemu_opts_validate(opts, qemu_smbios_type8_opts, errp)) { 1436 return; 1437 } 1438 struct type8_instance *t8_i; 1439 t8_i = g_new0(struct type8_instance, 1); 1440 save_opt(&t8_i->internal_reference, opts, "internal_reference"); 1441 save_opt(&t8_i->external_reference, opts, "external_reference"); 1442 t8_i->connector_type = qemu_opt_get_number(opts, 1443 "connector_type", 0); 1444 t8_i->port_type = qemu_opt_get_number(opts, "port_type", 0); 1445 QTAILQ_INSERT_TAIL(&type8, t8_i, next); 1446 return; 1447 case 11: 1448 if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) { 1449 return; 1450 } 1451 if (!save_opt_list(&type11.nvalues, &type11.values, opts, errp)) { 1452 return; 1453 } 1454 return; 1455 case 17: 1456 if (!qemu_opts_validate(opts, qemu_smbios_type17_opts, errp)) { 1457 return; 1458 } 1459 save_opt(&type17.loc_pfx, opts, "loc_pfx"); 1460 save_opt(&type17.bank, opts, "bank"); 1461 save_opt(&type17.manufacturer, opts, "manufacturer"); 1462 save_opt(&type17.serial, opts, "serial"); 1463 save_opt(&type17.asset, opts, "asset"); 1464 save_opt(&type17.part, opts, "part"); 1465 type17.speed = qemu_opt_get_number(opts, "speed", 0); 1466 return; 1467 case 41: { 1468 struct type41_instance *t41_i; 1469 Error *local_err = NULL; 1470 1471 if (!qemu_opts_validate(opts, qemu_smbios_type41_opts, errp)) { 1472 return; 1473 } 1474 t41_i = g_new0(struct type41_instance, 1); 1475 save_opt(&t41_i->designation, opts, "designation"); 1476 t41_i->kind = qapi_enum_parse(&type41_kind_lookup, 1477 qemu_opt_get(opts, "kind"), 1478 0, &local_err) + 1; 1479 t41_i->kind |= 0x80; /* enabled */ 1480 if (local_err != NULL) { 1481 error_propagate(errp, local_err); 1482 g_free(t41_i); 1483 return; 1484 } 1485 t41_i->instance = qemu_opt_get_number(opts, "instance", 1); 1486 save_opt(&t41_i->pcidev, opts, "pcidev"); 1487 1488 QTAILQ_INSERT_TAIL(&type41, t41_i, next); 1489 return; 1490 } 1491 default: 1492 error_setg(errp, 1493 "Don't know how to build fields for SMBIOS type %ld", 1494 type); 1495 return; 1496 } 1497 } 1498 1499 error_setg(errp, "Must specify type= or file="); 1500 } 1501