xref: /openbmc/qemu/hw/sh4/shix.c (revision dccfcd0e)
1 /*
2  * SHIX 2.0 board description
3  *
4  * Copyright (c) 2005 Samuel Tardieu
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 /*
25    Shix 2.0 board by Alexis Polti, described at
26    http://perso.enst.fr/~polti/realisations/shix20/
27 
28    More information in target-sh4/README.sh4
29 */
30 #include "hw/hw.h"
31 #include "hw/sh4/sh.h"
32 #include "sysemu/sysemu.h"
33 #include "hw/boards.h"
34 #include "hw/loader.h"
35 #include "exec/address-spaces.h"
36 
37 #define BIOS_FILENAME "shix_bios.bin"
38 #define BIOS_ADDRESS 0xA0000000
39 
40 static void shix_init(QEMUMachineInitArgs *args)
41 {
42     const char *cpu_model = args->cpu_model;
43     int ret;
44     SuperHCPU *cpu;
45     struct SH7750State *s;
46     MemoryRegion *sysmem = get_system_memory();
47     MemoryRegion *rom = g_new(MemoryRegion, 1);
48     MemoryRegion *sdram = g_new(MemoryRegion, 2);
49 
50     if (!cpu_model)
51         cpu_model = "any";
52 
53     printf("Initializing CPU\n");
54     cpu = cpu_sh4_init(cpu_model);
55     if (cpu == NULL) {
56         fprintf(stderr, "Unable to find CPU definition\n");
57         exit(1);
58     }
59 
60     /* Allocate memory space */
61     printf("Allocating ROM\n");
62     memory_region_init_ram(rom, "shix.rom", 0x4000);
63     vmstate_register_ram_global(rom);
64     memory_region_set_readonly(rom, true);
65     memory_region_add_subregion(sysmem, 0x00000000, rom);
66     printf("Allocating SDRAM 1\n");
67     memory_region_init_ram(&sdram[0], "shix.sdram1", 0x01000000);
68     vmstate_register_ram_global(&sdram[0]);
69     memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
70     printf("Allocating SDRAM 2\n");
71     memory_region_init_ram(&sdram[1], "shix.sdram2", 0x01000000);
72     vmstate_register_ram_global(&sdram[1]);
73     memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
74 
75     /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
76     if (bios_name == NULL)
77         bios_name = BIOS_FILENAME;
78     printf("%s: load BIOS '%s'\n", __func__, bios_name);
79     ret = load_image_targphys(bios_name, 0, 0x4000);
80     if (ret < 0) {		/* Check bios size */
81 	fprintf(stderr, "ret=%d\n", ret);
82 	fprintf(stderr, "qemu: could not load SHIX bios '%s'\n",
83 		bios_name);
84 	exit(1);
85     }
86 
87     /* Register peripherals */
88     s = sh7750_init(cpu, sysmem);
89     /* XXXXX Check success */
90     tc58128_init(s, "shix_linux_nand.bin", NULL);
91     fprintf(stderr, "initialization terminated\n");
92 }
93 
94 static QEMUMachine shix_machine = {
95     .name = "shix",
96     .desc = "shix card",
97     .init = shix_init,
98     .is_default = 1,
99     DEFAULT_MACHINE_OPTIONS,
100 };
101 
102 static void shix_machine_init(void)
103 {
104     qemu_register_machine(&shix_machine);
105 }
106 
107 machine_init(shix_machine_init);
108