xref: /openbmc/qemu/hw/sh4/shix.c (revision c39f95dc)
1 /*
2  * SHIX 2.0 board description
3  *
4  * Copyright (c) 2005 Samuel Tardieu
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 /*
25    Shix 2.0 board by Alexis Polti, described at
26    https://web.archive.org/web/20070917001736/perso.enst.fr/~polti/realisations/shix20
27 
28    More information in target/sh4/README.sh4
29 */
30 #include "qemu/osdep.h"
31 #include "qapi/error.h"
32 #include "qemu-common.h"
33 #include "cpu.h"
34 #include "hw/hw.h"
35 #include "hw/sh4/sh.h"
36 #include "sysemu/sysemu.h"
37 #include "sysemu/qtest.h"
38 #include "hw/boards.h"
39 #include "hw/loader.h"
40 #include "exec/address-spaces.h"
41 #include "qemu/error-report.h"
42 
43 #define BIOS_FILENAME "shix_bios.bin"
44 #define BIOS_ADDRESS 0xA0000000
45 
46 static void shix_init(MachineState *machine)
47 {
48     const char *cpu_model = machine->cpu_model;
49     int ret;
50     SuperHCPU *cpu;
51     struct SH7750State *s;
52     MemoryRegion *sysmem = get_system_memory();
53     MemoryRegion *rom = g_new(MemoryRegion, 1);
54     MemoryRegion *sdram = g_new(MemoryRegion, 2);
55 
56     if (!cpu_model)
57         cpu_model = "any";
58 
59     cpu = SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));
60 
61     /* Allocate memory space */
62     memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_fatal);
63     memory_region_set_readonly(rom, true);
64     memory_region_add_subregion(sysmem, 0x00000000, rom);
65     memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000,
66                            &error_fatal);
67     memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
68     memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000,
69                            &error_fatal);
70     memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
71 
72     /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
73     if (bios_name == NULL)
74         bios_name = BIOS_FILENAME;
75     ret = load_image_targphys(bios_name, 0, 0x4000);
76     if (ret < 0 && !qtest_enabled()) {
77         error_report("Could not load SHIX bios '%s'", bios_name);
78         exit(1);
79     }
80 
81     /* Register peripherals */
82     s = sh7750_init(cpu, sysmem);
83     /* XXXXX Check success */
84     tc58128_init(s, "shix_linux_nand.bin", NULL);
85 }
86 
87 static void shix_machine_init(MachineClass *mc)
88 {
89     mc->desc = "shix card";
90     mc->init = shix_init;
91     mc->is_default = 1;
92 }
93 
94 DEFINE_MACHINE("shix", shix_machine_init)
95