xref: /openbmc/qemu/hw/sd/sdmmc-internal.c (revision 5c44e820)
12ed61fb5SPhilippe Mathieu-Daudé /*
22ed61fb5SPhilippe Mathieu-Daudé  * SD/MMC cards common helpers
32ed61fb5SPhilippe Mathieu-Daudé  *
42ed61fb5SPhilippe Mathieu-Daudé  * Copyright (c) 2018  Philippe Mathieu-Daudé <f4bug@amsat.org>
52ed61fb5SPhilippe Mathieu-Daudé  *
62ed61fb5SPhilippe Mathieu-Daudé  * This work is licensed under the terms of the GNU GPL, version 2 or later.
72ed61fb5SPhilippe Mathieu-Daudé  * See the COPYING file in the top-level directory.
82ed61fb5SPhilippe Mathieu-Daudé  * SPDX-License-Identifier: GPL-2.0-or-later
92ed61fb5SPhilippe Mathieu-Daudé  */
102ed61fb5SPhilippe Mathieu-Daudé 
112ed61fb5SPhilippe Mathieu-Daudé #include "qemu/osdep.h"
122ed61fb5SPhilippe Mathieu-Daudé #include "sdmmc-internal.h"
132ed61fb5SPhilippe Mathieu-Daudé 
sd_cmd_name(uint8_t cmd)142ed61fb5SPhilippe Mathieu-Daudé const char *sd_cmd_name(uint8_t cmd)
152ed61fb5SPhilippe Mathieu-Daudé {
162ed61fb5SPhilippe Mathieu-Daudé     static const char *cmd_abbrev[SDMMC_CMD_MAX] = {
17*5c44e820SPhilippe Mathieu-Daudé          [0]    = "GO_IDLE_STATE",           [1]    = "SEND_OP_CMD",
182ed61fb5SPhilippe Mathieu-Daudé          [2]    = "ALL_SEND_CID",            [3]    = "SEND_RELATIVE_ADDR",
192ed61fb5SPhilippe Mathieu-Daudé          [4]    = "SET_DSR",                 [5]    = "IO_SEND_OP_COND",
202ed61fb5SPhilippe Mathieu-Daudé          [6]    = "SWITCH_FUNC",             [7]    = "SELECT/DESELECT_CARD",
212ed61fb5SPhilippe Mathieu-Daudé          [8]    = "SEND_IF_COND",            [9]    = "SEND_CSD",
222ed61fb5SPhilippe Mathieu-Daudé         [10]    = "SEND_CID",               [11]    = "VOLTAGE_SWITCH",
232ed61fb5SPhilippe Mathieu-Daudé         [12]    = "STOP_TRANSMISSION",      [13]    = "SEND_STATUS",
242ed61fb5SPhilippe Mathieu-Daudé                                             [15]    = "GO_INACTIVE_STATE",
252ed61fb5SPhilippe Mathieu-Daudé         [16]    = "SET_BLOCKLEN",           [17]    = "READ_SINGLE_BLOCK",
262ed61fb5SPhilippe Mathieu-Daudé         [18]    = "READ_MULTIPLE_BLOCK",    [19]    = "SEND_TUNING_BLOCK",
272ed61fb5SPhilippe Mathieu-Daudé         [20]    = "SPEED_CLASS_CONTROL",    [21]    = "DPS_spec",
282ed61fb5SPhilippe Mathieu-Daudé                                             [23]    = "SET_BLOCK_COUNT",
292ed61fb5SPhilippe Mathieu-Daudé         [24]    = "WRITE_BLOCK",            [25]    = "WRITE_MULTIPLE_BLOCK",
302ed61fb5SPhilippe Mathieu-Daudé         [26]    = "MANUF_RSVD",             [27]    = "PROGRAM_CSD",
312ed61fb5SPhilippe Mathieu-Daudé         [28]    = "SET_WRITE_PROT",         [29]    = "CLR_WRITE_PROT",
322ed61fb5SPhilippe Mathieu-Daudé         [30]    = "SEND_WRITE_PROT",
332ed61fb5SPhilippe Mathieu-Daudé         [32]    = "ERASE_WR_BLK_START",     [33]    = "ERASE_WR_BLK_END",
342ed61fb5SPhilippe Mathieu-Daudé         [34]    = "SW_FUNC_RSVD",           [35]    = "SW_FUNC_RSVD",
352ed61fb5SPhilippe Mathieu-Daudé         [36]    = "SW_FUNC_RSVD",           [37]    = "SW_FUNC_RSVD",
362ed61fb5SPhilippe Mathieu-Daudé         [38]    = "ERASE",
372ed61fb5SPhilippe Mathieu-Daudé         [40]    = "DPS_spec",
382ed61fb5SPhilippe Mathieu-Daudé         [42]    = "LOCK_UNLOCK",            [43]    = "Q_MANAGEMENT",
392ed61fb5SPhilippe Mathieu-Daudé         [44]    = "Q_TASK_INFO_A",          [45]    = "Q_TASK_INFO_B",
402ed61fb5SPhilippe Mathieu-Daudé         [46]    = "Q_RD_TASK",              [47]    = "Q_WR_TASK",
412ed61fb5SPhilippe Mathieu-Daudé         [48]    = "READ_EXTR_SINGLE",       [49]    = "WRITE_EXTR_SINGLE",
422ed61fb5SPhilippe Mathieu-Daudé         [50]    = "SW_FUNC_RSVD",
432ed61fb5SPhilippe Mathieu-Daudé         [52]    = "IO_RW_DIRECT",           [53]    = "IO_RW_EXTENDED",
442ed61fb5SPhilippe Mathieu-Daudé         [54]    = "SDIO_RSVD",              [55]    = "APP_CMD",
452ed61fb5SPhilippe Mathieu-Daudé         [56]    = "GEN_CMD",                [57]    = "SW_FUNC_RSVD",
462ed61fb5SPhilippe Mathieu-Daudé         [58]    = "READ_EXTR_MULTI",        [59]    = "WRITE_EXTR_MULTI",
472ed61fb5SPhilippe Mathieu-Daudé         [60]    = "MANUF_RSVD",             [61]    = "MANUF_RSVD",
482ed61fb5SPhilippe Mathieu-Daudé         [62]    = "MANUF_RSVD",             [63]    = "MANUF_RSVD",
492ed61fb5SPhilippe Mathieu-Daudé     };
502ed61fb5SPhilippe Mathieu-Daudé     return cmd_abbrev[cmd] ? cmd_abbrev[cmd] : "UNKNOWN_CMD";
512ed61fb5SPhilippe Mathieu-Daudé }
522ed61fb5SPhilippe Mathieu-Daudé 
sd_acmd_name(uint8_t cmd)532ed61fb5SPhilippe Mathieu-Daudé const char *sd_acmd_name(uint8_t cmd)
542ed61fb5SPhilippe Mathieu-Daudé {
552ed61fb5SPhilippe Mathieu-Daudé     static const char *acmd_abbrev[SDMMC_CMD_MAX] = {
562ed61fb5SPhilippe Mathieu-Daudé          [6] = "SET_BUS_WIDTH",
572ed61fb5SPhilippe Mathieu-Daudé         [13] = "SD_STATUS",
582ed61fb5SPhilippe Mathieu-Daudé         [14] = "DPS_spec",                  [15] = "DPS_spec",
592ed61fb5SPhilippe Mathieu-Daudé         [16] = "DPS_spec",
602ed61fb5SPhilippe Mathieu-Daudé         [18] = "SECU_spec",
612ed61fb5SPhilippe Mathieu-Daudé         [22] = "SEND_NUM_WR_BLOCKS",        [23] = "SET_WR_BLK_ERASE_COUNT",
622ed61fb5SPhilippe Mathieu-Daudé         [41] = "SD_SEND_OP_COND",
632ed61fb5SPhilippe Mathieu-Daudé         [42] = "SET_CLR_CARD_DETECT",
642ed61fb5SPhilippe Mathieu-Daudé         [51] = "SEND_SCR",
652ed61fb5SPhilippe Mathieu-Daudé         [52] = "SECU_spec",                 [53] = "SECU_spec",
662ed61fb5SPhilippe Mathieu-Daudé         [54] = "SECU_spec",
672ed61fb5SPhilippe Mathieu-Daudé         [56] = "SECU_spec",                 [57] = "SECU_spec",
682ed61fb5SPhilippe Mathieu-Daudé         [58] = "SECU_spec",                 [59] = "SECU_spec",
692ed61fb5SPhilippe Mathieu-Daudé     };
702ed61fb5SPhilippe Mathieu-Daudé 
712ed61fb5SPhilippe Mathieu-Daudé     return acmd_abbrev[cmd] ? acmd_abbrev[cmd] : "UNKNOWN_ACMD";
722ed61fb5SPhilippe Mathieu-Daudé }
73