1881d588aSDmitry Fleytman /* 2881d588aSDmitry Fleytman * QEMU VMWARE PVSCSI paravirtual SCSI bus 3881d588aSDmitry Fleytman * 4881d588aSDmitry Fleytman * Copyright (c) 2012 Ravello Systems LTD (http://ravellosystems.com) 5881d588aSDmitry Fleytman * 6881d588aSDmitry Fleytman * Developed by Daynix Computing LTD (http://www.daynix.com) 7881d588aSDmitry Fleytman * 8881d588aSDmitry Fleytman * Based on implementation by Paolo Bonzini 9881d588aSDmitry Fleytman * http://lists.gnu.org/archive/html/qemu-devel/2011-08/msg00729.html 10881d588aSDmitry Fleytman * 11881d588aSDmitry Fleytman * Authors: 12881d588aSDmitry Fleytman * Paolo Bonzini <pbonzini@redhat.com> 13881d588aSDmitry Fleytman * Dmitry Fleytman <dmitry@daynix.com> 14881d588aSDmitry Fleytman * Yan Vugenfirer <yan@daynix.com> 15881d588aSDmitry Fleytman * 16881d588aSDmitry Fleytman * This work is licensed under the terms of the GNU GPL, version 2. 17881d588aSDmitry Fleytman * See the COPYING file in the top-level directory. 18881d588aSDmitry Fleytman * 19881d588aSDmitry Fleytman * NOTE about MSI-X: 20881d588aSDmitry Fleytman * MSI-X support has been removed for the moment because it leads Windows OS 21881d588aSDmitry Fleytman * to crash on startup. The crash happens because Windows driver requires 22881d588aSDmitry Fleytman * MSI-X shared memory to be part of the same BAR used for rings state 23881d588aSDmitry Fleytman * registers, etc. This is not supported by QEMU infrastructure so separate 24881d588aSDmitry Fleytman * BAR created from MSI-X purposes. Windows driver fails to deal with 2 BARs. 25881d588aSDmitry Fleytman * 26881d588aSDmitry Fleytman */ 27881d588aSDmitry Fleytman 28a4ab4792SPeter Maydell #include "qemu/osdep.h" 29da34e65cSMarkus Armbruster #include "qapi/error.h" 30db725815SMarkus Armbruster #include "qemu/main-loop.h" 310b8fa32fSMarkus Armbruster #include "qemu/module.h" 32881d588aSDmitry Fleytman #include "hw/scsi/scsi.h" 33d6454270SMarkus Armbruster #include "migration/vmstate.h" 3408e2c9f1SPaolo Bonzini #include "scsi/constants.h" 35881d588aSDmitry Fleytman #include "hw/pci/msi.h" 36a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h" 37881d588aSDmitry Fleytman #include "vmw_pvscsi.h" 38881d588aSDmitry Fleytman #include "trace.h" 39881d588aSDmitry Fleytman 40881d588aSDmitry Fleytman 41881d588aSDmitry Fleytman #define PVSCSI_USE_64BIT (true) 42881d588aSDmitry Fleytman #define PVSCSI_PER_VECTOR_MASK (false) 43881d588aSDmitry Fleytman 44881d588aSDmitry Fleytman #define PVSCSI_MAX_DEVS (64) 45881d588aSDmitry Fleytman #define PVSCSI_MSIX_NUM_VECTORS (1) 46881d588aSDmitry Fleytman 4749adc5d3SPrasad J Pandit #define PVSCSI_MAX_SG_ELEM 2048 4849adc5d3SPrasad J Pandit 49881d588aSDmitry Fleytman #define PVSCSI_MAX_CMD_DATA_WORDS \ 50881d588aSDmitry Fleytman (sizeof(PVSCSICmdDescSetupRings)/sizeof(uint32_t)) 51881d588aSDmitry Fleytman 520dc40f28SPaolo Bonzini #define RS_GET_FIELD(m, field) \ 530dc40f28SPaolo Bonzini (ldl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \ 540dc40f28SPaolo Bonzini (m)->rs_pa + offsetof(struct PVSCSIRingsState, field))) 550dc40f28SPaolo Bonzini #define RS_SET_FIELD(m, field, val) \ 560dc40f28SPaolo Bonzini (stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \ 570dc40f28SPaolo Bonzini (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val)) 58881d588aSDmitry Fleytman 59e2d4f3f7SShmulik Ladkani typedef struct PVSCSIClass { 60e2d4f3f7SShmulik Ladkani PCIDeviceClass parent_class; 611dd1305eSShmulik Ladkani DeviceRealize parent_dc_realize; 62e2d4f3f7SShmulik Ladkani } PVSCSIClass; 63e2d4f3f7SShmulik Ladkani 64881d588aSDmitry Fleytman #define TYPE_PVSCSI "pvscsi" 65881d588aSDmitry Fleytman #define PVSCSI(obj) OBJECT_CHECK(PVSCSIState, (obj), TYPE_PVSCSI) 66881d588aSDmitry Fleytman 67e2d4f3f7SShmulik Ladkani #define PVSCSI_DEVICE_CLASS(klass) \ 68e2d4f3f7SShmulik Ladkani OBJECT_CLASS_CHECK(PVSCSIClass, (klass), TYPE_PVSCSI) 69e2d4f3f7SShmulik Ladkani #define PVSCSI_DEVICE_GET_CLASS(obj) \ 70e2d4f3f7SShmulik Ladkani OBJECT_GET_CLASS(PVSCSIClass, (obj), TYPE_PVSCSI) 71e2d4f3f7SShmulik Ladkani 72cb8d4c8fSStefan Weil /* Compatibility flags for migration */ 73d29d4ff8SShmulik Ladkani #define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT 0 74d29d4ff8SShmulik Ladkani #define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION \ 75d29d4ff8SShmulik Ladkani (1 << PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT) 761dd1305eSShmulik Ladkani #define PVSCSI_COMPAT_DISABLE_PCIE_BIT 1 771dd1305eSShmulik Ladkani #define PVSCSI_COMPAT_DISABLE_PCIE \ 781dd1305eSShmulik Ladkani (1 << PVSCSI_COMPAT_DISABLE_PCIE_BIT) 79d29d4ff8SShmulik Ladkani 80d29d4ff8SShmulik Ladkani #define PVSCSI_USE_OLD_PCI_CONFIGURATION(s) \ 81d29d4ff8SShmulik Ladkani ((s)->compat_flags & PVSCSI_COMPAT_OLD_PCI_CONFIGURATION) 82836fc48cSShmulik Ladkani #define PVSCSI_MSI_OFFSET(s) \ 83836fc48cSShmulik Ladkani (PVSCSI_USE_OLD_PCI_CONFIGURATION(s) ? 0x50 : 0x7c) 841dd1305eSShmulik Ladkani #define PVSCSI_EXP_EP_OFFSET (0x40) 85d29d4ff8SShmulik Ladkani 86881d588aSDmitry Fleytman typedef struct PVSCSIRingInfo { 87881d588aSDmitry Fleytman uint64_t rs_pa; 88881d588aSDmitry Fleytman uint32_t txr_len_mask; 89881d588aSDmitry Fleytman uint32_t rxr_len_mask; 90881d588aSDmitry Fleytman uint32_t msg_len_mask; 91881d588aSDmitry Fleytman uint64_t req_ring_pages_pa[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES]; 92881d588aSDmitry Fleytman uint64_t cmp_ring_pages_pa[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES]; 93881d588aSDmitry Fleytman uint64_t msg_ring_pages_pa[PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES]; 94881d588aSDmitry Fleytman uint64_t consumed_ptr; 95881d588aSDmitry Fleytman uint64_t filled_cmp_ptr; 96881d588aSDmitry Fleytman uint64_t filled_msg_ptr; 97881d588aSDmitry Fleytman } PVSCSIRingInfo; 98881d588aSDmitry Fleytman 99881d588aSDmitry Fleytman typedef struct PVSCSISGState { 100881d588aSDmitry Fleytman hwaddr elemAddr; 101881d588aSDmitry Fleytman hwaddr dataAddr; 102881d588aSDmitry Fleytman uint32_t resid; 103881d588aSDmitry Fleytman } PVSCSISGState; 104881d588aSDmitry Fleytman 105881d588aSDmitry Fleytman typedef QTAILQ_HEAD(, PVSCSIRequest) PVSCSIRequestList; 106881d588aSDmitry Fleytman 107881d588aSDmitry Fleytman typedef struct { 108881d588aSDmitry Fleytman PCIDevice parent_obj; 109881d588aSDmitry Fleytman MemoryRegion io_space; 110881d588aSDmitry Fleytman SCSIBus bus; 111881d588aSDmitry Fleytman QEMUBH *completion_worker; 112881d588aSDmitry Fleytman PVSCSIRequestList pending_queue; 113881d588aSDmitry Fleytman PVSCSIRequestList completion_queue; 114881d588aSDmitry Fleytman 115881d588aSDmitry Fleytman uint64_t reg_interrupt_status; /* Interrupt status register value */ 116881d588aSDmitry Fleytman uint64_t reg_interrupt_enabled; /* Interrupt mask register value */ 117881d588aSDmitry Fleytman uint64_t reg_command_status; /* Command status register value */ 118881d588aSDmitry Fleytman 119881d588aSDmitry Fleytman /* Command data adoption mechanism */ 120881d588aSDmitry Fleytman uint64_t curr_cmd; /* Last command arrived */ 121881d588aSDmitry Fleytman uint32_t curr_cmd_data_cntr; /* Amount of data for last command */ 122881d588aSDmitry Fleytman 123881d588aSDmitry Fleytman /* Collector for current command data */ 124881d588aSDmitry Fleytman uint32_t curr_cmd_data[PVSCSI_MAX_CMD_DATA_WORDS]; 125881d588aSDmitry Fleytman 126881d588aSDmitry Fleytman uint8_t rings_info_valid; /* Whether data rings initialized */ 127881d588aSDmitry Fleytman uint8_t msg_ring_info_valid; /* Whether message ring initialized */ 128881d588aSDmitry Fleytman uint8_t use_msg; /* Whether to use message ring */ 129881d588aSDmitry Fleytman 130269fe4c3SCao jin uint8_t msi_used; /* For migration compatibility */ 131881d588aSDmitry Fleytman PVSCSIRingInfo rings; /* Data transfer rings manager */ 132881d588aSDmitry Fleytman uint32_t resetting; /* Reset in progress */ 133d29d4ff8SShmulik Ladkani 134d29d4ff8SShmulik Ladkani uint32_t compat_flags; 135881d588aSDmitry Fleytman } PVSCSIState; 136881d588aSDmitry Fleytman 137881d588aSDmitry Fleytman typedef struct PVSCSIRequest { 138881d588aSDmitry Fleytman SCSIRequest *sreq; 139881d588aSDmitry Fleytman PVSCSIState *dev; 140881d588aSDmitry Fleytman uint8_t sense_key; 141881d588aSDmitry Fleytman uint8_t completed; 142881d588aSDmitry Fleytman int lun; 143881d588aSDmitry Fleytman QEMUSGList sgl; 144881d588aSDmitry Fleytman PVSCSISGState sg; 145881d588aSDmitry Fleytman struct PVSCSIRingReqDesc req; 146881d588aSDmitry Fleytman struct PVSCSIRingCmpDesc cmp; 147881d588aSDmitry Fleytman QTAILQ_ENTRY(PVSCSIRequest) next; 148881d588aSDmitry Fleytman } PVSCSIRequest; 149881d588aSDmitry Fleytman 150881d588aSDmitry Fleytman /* Integer binary logarithm */ 151881d588aSDmitry Fleytman static int 152881d588aSDmitry Fleytman pvscsi_log2(uint32_t input) 153881d588aSDmitry Fleytman { 154881d588aSDmitry Fleytman int log = 0; 155881d588aSDmitry Fleytman assert(input > 0); 156881d588aSDmitry Fleytman while (input >> ++log) { 157881d588aSDmitry Fleytman } 158881d588aSDmitry Fleytman return log; 159881d588aSDmitry Fleytman } 160881d588aSDmitry Fleytman 1617f61f469SPrasad J Pandit static void 162881d588aSDmitry Fleytman pvscsi_ring_init_data(PVSCSIRingInfo *m, PVSCSICmdDescSetupRings *ri) 163881d588aSDmitry Fleytman { 164881d588aSDmitry Fleytman int i; 165881d588aSDmitry Fleytman uint32_t txr_len_log2, rxr_len_log2; 166881d588aSDmitry Fleytman uint32_t req_ring_size, cmp_ring_size; 167881d588aSDmitry Fleytman m->rs_pa = ri->ringsStatePPN << VMW_PAGE_SHIFT; 168881d588aSDmitry Fleytman 169881d588aSDmitry Fleytman req_ring_size = ri->reqRingNumPages * PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE; 170881d588aSDmitry Fleytman cmp_ring_size = ri->cmpRingNumPages * PVSCSI_MAX_NUM_CMP_ENTRIES_PER_PAGE; 171881d588aSDmitry Fleytman txr_len_log2 = pvscsi_log2(req_ring_size - 1); 172881d588aSDmitry Fleytman rxr_len_log2 = pvscsi_log2(cmp_ring_size - 1); 173881d588aSDmitry Fleytman 174881d588aSDmitry Fleytman m->txr_len_mask = MASK(txr_len_log2); 175881d588aSDmitry Fleytman m->rxr_len_mask = MASK(rxr_len_log2); 176881d588aSDmitry Fleytman 177881d588aSDmitry Fleytman m->consumed_ptr = 0; 178881d588aSDmitry Fleytman m->filled_cmp_ptr = 0; 179881d588aSDmitry Fleytman 180881d588aSDmitry Fleytman for (i = 0; i < ri->reqRingNumPages; i++) { 181881d588aSDmitry Fleytman m->req_ring_pages_pa[i] = ri->reqRingPPNs[i] << VMW_PAGE_SHIFT; 182881d588aSDmitry Fleytman } 183881d588aSDmitry Fleytman 184881d588aSDmitry Fleytman for (i = 0; i < ri->cmpRingNumPages; i++) { 185881d588aSDmitry Fleytman m->cmp_ring_pages_pa[i] = ri->cmpRingPPNs[i] << VMW_PAGE_SHIFT; 186881d588aSDmitry Fleytman } 187881d588aSDmitry Fleytman 1880dc40f28SPaolo Bonzini RS_SET_FIELD(m, reqProdIdx, 0); 1890dc40f28SPaolo Bonzini RS_SET_FIELD(m, reqConsIdx, 0); 1900dc40f28SPaolo Bonzini RS_SET_FIELD(m, reqNumEntriesLog2, txr_len_log2); 191881d588aSDmitry Fleytman 1920dc40f28SPaolo Bonzini RS_SET_FIELD(m, cmpProdIdx, 0); 1930dc40f28SPaolo Bonzini RS_SET_FIELD(m, cmpConsIdx, 0); 1940dc40f28SPaolo Bonzini RS_SET_FIELD(m, cmpNumEntriesLog2, rxr_len_log2); 195881d588aSDmitry Fleytman 196881d588aSDmitry Fleytman trace_pvscsi_ring_init_data(txr_len_log2, rxr_len_log2); 197881d588aSDmitry Fleytman 198881d588aSDmitry Fleytman /* Flush ring state page changes */ 199881d588aSDmitry Fleytman smp_wmb(); 200881d588aSDmitry Fleytman } 201881d588aSDmitry Fleytman 2023e831b40SPrasad J Pandit static int 203881d588aSDmitry Fleytman pvscsi_ring_init_msg(PVSCSIRingInfo *m, PVSCSICmdDescSetupMsgRing *ri) 204881d588aSDmitry Fleytman { 205881d588aSDmitry Fleytman int i; 206881d588aSDmitry Fleytman uint32_t len_log2; 207881d588aSDmitry Fleytman uint32_t ring_size; 208881d588aSDmitry Fleytman 209f6882698SP J P if (!ri->numPages || ri->numPages > PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES) { 2103e831b40SPrasad J Pandit return -1; 2113e831b40SPrasad J Pandit } 212881d588aSDmitry Fleytman ring_size = ri->numPages * PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE; 213881d588aSDmitry Fleytman len_log2 = pvscsi_log2(ring_size - 1); 214881d588aSDmitry Fleytman 215881d588aSDmitry Fleytman m->msg_len_mask = MASK(len_log2); 216881d588aSDmitry Fleytman 217881d588aSDmitry Fleytman m->filled_msg_ptr = 0; 218881d588aSDmitry Fleytman 219881d588aSDmitry Fleytman for (i = 0; i < ri->numPages; i++) { 220881d588aSDmitry Fleytman m->msg_ring_pages_pa[i] = ri->ringPPNs[i] << VMW_PAGE_SHIFT; 221881d588aSDmitry Fleytman } 222881d588aSDmitry Fleytman 2230dc40f28SPaolo Bonzini RS_SET_FIELD(m, msgProdIdx, 0); 2240dc40f28SPaolo Bonzini RS_SET_FIELD(m, msgConsIdx, 0); 2250dc40f28SPaolo Bonzini RS_SET_FIELD(m, msgNumEntriesLog2, len_log2); 226881d588aSDmitry Fleytman 227881d588aSDmitry Fleytman trace_pvscsi_ring_init_msg(len_log2); 228881d588aSDmitry Fleytman 229881d588aSDmitry Fleytman /* Flush ring state page changes */ 230881d588aSDmitry Fleytman smp_wmb(); 2313e831b40SPrasad J Pandit 2323e831b40SPrasad J Pandit return 0; 233881d588aSDmitry Fleytman } 234881d588aSDmitry Fleytman 235881d588aSDmitry Fleytman static void 236881d588aSDmitry Fleytman pvscsi_ring_cleanup(PVSCSIRingInfo *mgr) 237881d588aSDmitry Fleytman { 238881d588aSDmitry Fleytman mgr->rs_pa = 0; 239881d588aSDmitry Fleytman mgr->txr_len_mask = 0; 240881d588aSDmitry Fleytman mgr->rxr_len_mask = 0; 241881d588aSDmitry Fleytman mgr->msg_len_mask = 0; 242881d588aSDmitry Fleytman mgr->consumed_ptr = 0; 243881d588aSDmitry Fleytman mgr->filled_cmp_ptr = 0; 244881d588aSDmitry Fleytman mgr->filled_msg_ptr = 0; 245881d588aSDmitry Fleytman memset(mgr->req_ring_pages_pa, 0, sizeof(mgr->req_ring_pages_pa)); 246881d588aSDmitry Fleytman memset(mgr->cmp_ring_pages_pa, 0, sizeof(mgr->cmp_ring_pages_pa)); 247881d588aSDmitry Fleytman memset(mgr->msg_ring_pages_pa, 0, sizeof(mgr->msg_ring_pages_pa)); 248881d588aSDmitry Fleytman } 249881d588aSDmitry Fleytman 250881d588aSDmitry Fleytman static hwaddr 251881d588aSDmitry Fleytman pvscsi_ring_pop_req_descr(PVSCSIRingInfo *mgr) 252881d588aSDmitry Fleytman { 2530dc40f28SPaolo Bonzini uint32_t ready_ptr = RS_GET_FIELD(mgr, reqProdIdx); 254d251157aSPrasad J Pandit uint32_t ring_size = PVSCSI_MAX_NUM_PAGES_REQ_RING 255d251157aSPrasad J Pandit * PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE; 256881d588aSDmitry Fleytman 257d251157aSPrasad J Pandit if (ready_ptr != mgr->consumed_ptr 258d251157aSPrasad J Pandit && ready_ptr - mgr->consumed_ptr < ring_size) { 259881d588aSDmitry Fleytman uint32_t next_ready_ptr = 260881d588aSDmitry Fleytman mgr->consumed_ptr++ & mgr->txr_len_mask; 261881d588aSDmitry Fleytman uint32_t next_ready_page = 262881d588aSDmitry Fleytman next_ready_ptr / PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE; 263881d588aSDmitry Fleytman uint32_t inpage_idx = 264881d588aSDmitry Fleytman next_ready_ptr % PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE; 265881d588aSDmitry Fleytman 266881d588aSDmitry Fleytman return mgr->req_ring_pages_pa[next_ready_page] + 267881d588aSDmitry Fleytman inpage_idx * sizeof(PVSCSIRingReqDesc); 268881d588aSDmitry Fleytman } else { 269881d588aSDmitry Fleytman return 0; 270881d588aSDmitry Fleytman } 271881d588aSDmitry Fleytman } 272881d588aSDmitry Fleytman 273881d588aSDmitry Fleytman static void 274881d588aSDmitry Fleytman pvscsi_ring_flush_req(PVSCSIRingInfo *mgr) 275881d588aSDmitry Fleytman { 2760dc40f28SPaolo Bonzini RS_SET_FIELD(mgr, reqConsIdx, mgr->consumed_ptr); 277881d588aSDmitry Fleytman } 278881d588aSDmitry Fleytman 279881d588aSDmitry Fleytman static hwaddr 280881d588aSDmitry Fleytman pvscsi_ring_pop_cmp_descr(PVSCSIRingInfo *mgr) 281881d588aSDmitry Fleytman { 282881d588aSDmitry Fleytman /* 283881d588aSDmitry Fleytman * According to Linux driver code it explicitly verifies that number 284881d588aSDmitry Fleytman * of requests being processed by device is less then the size of 285881d588aSDmitry Fleytman * completion queue, so device may omit completion queue overflow 286881d588aSDmitry Fleytman * conditions check. We assume that this is true for other (Windows) 287881d588aSDmitry Fleytman * drivers as well. 288881d588aSDmitry Fleytman */ 289881d588aSDmitry Fleytman 290881d588aSDmitry Fleytman uint32_t free_cmp_ptr = 291881d588aSDmitry Fleytman mgr->filled_cmp_ptr++ & mgr->rxr_len_mask; 292881d588aSDmitry Fleytman uint32_t free_cmp_page = 293881d588aSDmitry Fleytman free_cmp_ptr / PVSCSI_MAX_NUM_CMP_ENTRIES_PER_PAGE; 294881d588aSDmitry Fleytman uint32_t inpage_idx = 295881d588aSDmitry Fleytman free_cmp_ptr % PVSCSI_MAX_NUM_CMP_ENTRIES_PER_PAGE; 296881d588aSDmitry Fleytman return mgr->cmp_ring_pages_pa[free_cmp_page] + 297881d588aSDmitry Fleytman inpage_idx * sizeof(PVSCSIRingCmpDesc); 298881d588aSDmitry Fleytman } 299881d588aSDmitry Fleytman 300881d588aSDmitry Fleytman static hwaddr 301881d588aSDmitry Fleytman pvscsi_ring_pop_msg_descr(PVSCSIRingInfo *mgr) 302881d588aSDmitry Fleytman { 303881d588aSDmitry Fleytman uint32_t free_msg_ptr = 304881d588aSDmitry Fleytman mgr->filled_msg_ptr++ & mgr->msg_len_mask; 305881d588aSDmitry Fleytman uint32_t free_msg_page = 306881d588aSDmitry Fleytman free_msg_ptr / PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE; 307881d588aSDmitry Fleytman uint32_t inpage_idx = 308881d588aSDmitry Fleytman free_msg_ptr % PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE; 309881d588aSDmitry Fleytman return mgr->msg_ring_pages_pa[free_msg_page] + 310881d588aSDmitry Fleytman inpage_idx * sizeof(PVSCSIRingMsgDesc); 311881d588aSDmitry Fleytman } 312881d588aSDmitry Fleytman 313881d588aSDmitry Fleytman static void 314881d588aSDmitry Fleytman pvscsi_ring_flush_cmp(PVSCSIRingInfo *mgr) 315881d588aSDmitry Fleytman { 316881d588aSDmitry Fleytman /* Flush descriptor changes */ 317881d588aSDmitry Fleytman smp_wmb(); 318881d588aSDmitry Fleytman 319881d588aSDmitry Fleytman trace_pvscsi_ring_flush_cmp(mgr->filled_cmp_ptr); 320881d588aSDmitry Fleytman 3210dc40f28SPaolo Bonzini RS_SET_FIELD(mgr, cmpProdIdx, mgr->filled_cmp_ptr); 322881d588aSDmitry Fleytman } 323881d588aSDmitry Fleytman 324881d588aSDmitry Fleytman static bool 325881d588aSDmitry Fleytman pvscsi_ring_msg_has_room(PVSCSIRingInfo *mgr) 326881d588aSDmitry Fleytman { 3270dc40f28SPaolo Bonzini uint32_t prodIdx = RS_GET_FIELD(mgr, msgProdIdx); 3280dc40f28SPaolo Bonzini uint32_t consIdx = RS_GET_FIELD(mgr, msgConsIdx); 329881d588aSDmitry Fleytman 330881d588aSDmitry Fleytman return (prodIdx - consIdx) < (mgr->msg_len_mask + 1); 331881d588aSDmitry Fleytman } 332881d588aSDmitry Fleytman 333881d588aSDmitry Fleytman static void 334881d588aSDmitry Fleytman pvscsi_ring_flush_msg(PVSCSIRingInfo *mgr) 335881d588aSDmitry Fleytman { 336881d588aSDmitry Fleytman /* Flush descriptor changes */ 337881d588aSDmitry Fleytman smp_wmb(); 338881d588aSDmitry Fleytman 339881d588aSDmitry Fleytman trace_pvscsi_ring_flush_msg(mgr->filled_msg_ptr); 340881d588aSDmitry Fleytman 3410dc40f28SPaolo Bonzini RS_SET_FIELD(mgr, msgProdIdx, mgr->filled_msg_ptr); 342881d588aSDmitry Fleytman } 343881d588aSDmitry Fleytman 344881d588aSDmitry Fleytman static void 345881d588aSDmitry Fleytman pvscsi_reset_state(PVSCSIState *s) 346881d588aSDmitry Fleytman { 347881d588aSDmitry Fleytman s->curr_cmd = PVSCSI_CMD_FIRST; 348881d588aSDmitry Fleytman s->curr_cmd_data_cntr = 0; 349881d588aSDmitry Fleytman s->reg_command_status = PVSCSI_COMMAND_PROCESSING_SUCCEEDED; 350881d588aSDmitry Fleytman s->reg_interrupt_status = 0; 351881d588aSDmitry Fleytman pvscsi_ring_cleanup(&s->rings); 352881d588aSDmitry Fleytman s->rings_info_valid = FALSE; 353881d588aSDmitry Fleytman s->msg_ring_info_valid = FALSE; 354881d588aSDmitry Fleytman QTAILQ_INIT(&s->pending_queue); 355881d588aSDmitry Fleytman QTAILQ_INIT(&s->completion_queue); 356881d588aSDmitry Fleytman } 357881d588aSDmitry Fleytman 358881d588aSDmitry Fleytman static void 359881d588aSDmitry Fleytman pvscsi_update_irq_status(PVSCSIState *s) 360881d588aSDmitry Fleytman { 361881d588aSDmitry Fleytman PCIDevice *d = PCI_DEVICE(s); 362881d588aSDmitry Fleytman bool should_raise = s->reg_interrupt_enabled & s->reg_interrupt_status; 363881d588aSDmitry Fleytman 364881d588aSDmitry Fleytman trace_pvscsi_update_irq_level(should_raise, s->reg_interrupt_enabled, 365881d588aSDmitry Fleytman s->reg_interrupt_status); 366881d588aSDmitry Fleytman 367269fe4c3SCao jin if (msi_enabled(d)) { 368881d588aSDmitry Fleytman if (should_raise) { 369881d588aSDmitry Fleytman trace_pvscsi_update_irq_msi(); 370881d588aSDmitry Fleytman msi_notify(d, PVSCSI_VECTOR_COMPLETION); 371881d588aSDmitry Fleytman } 372881d588aSDmitry Fleytman return; 373881d588aSDmitry Fleytman } 374881d588aSDmitry Fleytman 3759e64f8a3SMarcel Apfelbaum pci_set_irq(d, !!should_raise); 376881d588aSDmitry Fleytman } 377881d588aSDmitry Fleytman 378881d588aSDmitry Fleytman static void 379881d588aSDmitry Fleytman pvscsi_raise_completion_interrupt(PVSCSIState *s) 380881d588aSDmitry Fleytman { 381881d588aSDmitry Fleytman s->reg_interrupt_status |= PVSCSI_INTR_CMPL_0; 382881d588aSDmitry Fleytman 383881d588aSDmitry Fleytman /* Memory barrier to flush interrupt status register changes*/ 384881d588aSDmitry Fleytman smp_wmb(); 385881d588aSDmitry Fleytman 386881d588aSDmitry Fleytman pvscsi_update_irq_status(s); 387881d588aSDmitry Fleytman } 388881d588aSDmitry Fleytman 389881d588aSDmitry Fleytman static void 390881d588aSDmitry Fleytman pvscsi_raise_message_interrupt(PVSCSIState *s) 391881d588aSDmitry Fleytman { 392881d588aSDmitry Fleytman s->reg_interrupt_status |= PVSCSI_INTR_MSG_0; 393881d588aSDmitry Fleytman 394881d588aSDmitry Fleytman /* Memory barrier to flush interrupt status register changes*/ 395881d588aSDmitry Fleytman smp_wmb(); 396881d588aSDmitry Fleytman 397881d588aSDmitry Fleytman pvscsi_update_irq_status(s); 398881d588aSDmitry Fleytman } 399881d588aSDmitry Fleytman 400881d588aSDmitry Fleytman static void 401881d588aSDmitry Fleytman pvscsi_cmp_ring_put(PVSCSIState *s, struct PVSCSIRingCmpDesc *cmp_desc) 402881d588aSDmitry Fleytman { 403881d588aSDmitry Fleytman hwaddr cmp_descr_pa; 404881d588aSDmitry Fleytman 405881d588aSDmitry Fleytman cmp_descr_pa = pvscsi_ring_pop_cmp_descr(&s->rings); 406881d588aSDmitry Fleytman trace_pvscsi_cmp_ring_put(cmp_descr_pa); 407881d588aSDmitry Fleytman cpu_physical_memory_write(cmp_descr_pa, (void *)cmp_desc, 408881d588aSDmitry Fleytman sizeof(*cmp_desc)); 409881d588aSDmitry Fleytman } 410881d588aSDmitry Fleytman 411881d588aSDmitry Fleytman static void 412881d588aSDmitry Fleytman pvscsi_msg_ring_put(PVSCSIState *s, struct PVSCSIRingMsgDesc *msg_desc) 413881d588aSDmitry Fleytman { 414881d588aSDmitry Fleytman hwaddr msg_descr_pa; 415881d588aSDmitry Fleytman 416881d588aSDmitry Fleytman msg_descr_pa = pvscsi_ring_pop_msg_descr(&s->rings); 417881d588aSDmitry Fleytman trace_pvscsi_msg_ring_put(msg_descr_pa); 418881d588aSDmitry Fleytman cpu_physical_memory_write(msg_descr_pa, (void *)msg_desc, 419881d588aSDmitry Fleytman sizeof(*msg_desc)); 420881d588aSDmitry Fleytman } 421881d588aSDmitry Fleytman 422881d588aSDmitry Fleytman static void 423881d588aSDmitry Fleytman pvscsi_process_completion_queue(void *opaque) 424881d588aSDmitry Fleytman { 425881d588aSDmitry Fleytman PVSCSIState *s = opaque; 426881d588aSDmitry Fleytman PVSCSIRequest *pvscsi_req; 427881d588aSDmitry Fleytman bool has_completed = false; 428881d588aSDmitry Fleytman 429881d588aSDmitry Fleytman while (!QTAILQ_EMPTY(&s->completion_queue)) { 430881d588aSDmitry Fleytman pvscsi_req = QTAILQ_FIRST(&s->completion_queue); 431881d588aSDmitry Fleytman QTAILQ_REMOVE(&s->completion_queue, pvscsi_req, next); 432881d588aSDmitry Fleytman pvscsi_cmp_ring_put(s, &pvscsi_req->cmp); 433881d588aSDmitry Fleytman g_free(pvscsi_req); 434dcb07809SStefan Weil has_completed = true; 435881d588aSDmitry Fleytman } 436881d588aSDmitry Fleytman 437881d588aSDmitry Fleytman if (has_completed) { 438881d588aSDmitry Fleytman pvscsi_ring_flush_cmp(&s->rings); 439881d588aSDmitry Fleytman pvscsi_raise_completion_interrupt(s); 440881d588aSDmitry Fleytman } 441881d588aSDmitry Fleytman } 442881d588aSDmitry Fleytman 443881d588aSDmitry Fleytman static void 444881d588aSDmitry Fleytman pvscsi_reset_adapter(PVSCSIState *s) 445881d588aSDmitry Fleytman { 446881d588aSDmitry Fleytman s->resetting++; 447573c3e07SPhilippe Mathieu-Daudé qbus_reset_all(BUS(&s->bus)); 448881d588aSDmitry Fleytman s->resetting--; 449881d588aSDmitry Fleytman pvscsi_process_completion_queue(s); 450881d588aSDmitry Fleytman assert(QTAILQ_EMPTY(&s->pending_queue)); 451881d588aSDmitry Fleytman pvscsi_reset_state(s); 452881d588aSDmitry Fleytman } 453881d588aSDmitry Fleytman 454881d588aSDmitry Fleytman static void 455881d588aSDmitry Fleytman pvscsi_schedule_completion_processing(PVSCSIState *s) 456881d588aSDmitry Fleytman { 457881d588aSDmitry Fleytman /* Try putting more complete requests on the ring. */ 458881d588aSDmitry Fleytman if (!QTAILQ_EMPTY(&s->completion_queue)) { 459881d588aSDmitry Fleytman qemu_bh_schedule(s->completion_worker); 460881d588aSDmitry Fleytman } 461881d588aSDmitry Fleytman } 462881d588aSDmitry Fleytman 463881d588aSDmitry Fleytman static void 464881d588aSDmitry Fleytman pvscsi_complete_request(PVSCSIState *s, PVSCSIRequest *r) 465881d588aSDmitry Fleytman { 466881d588aSDmitry Fleytman assert(!r->completed); 467881d588aSDmitry Fleytman 468881d588aSDmitry Fleytman trace_pvscsi_complete_request(r->cmp.context, r->cmp.dataLen, 469881d588aSDmitry Fleytman r->sense_key); 470881d588aSDmitry Fleytman if (r->sreq != NULL) { 471881d588aSDmitry Fleytman scsi_req_unref(r->sreq); 472881d588aSDmitry Fleytman r->sreq = NULL; 473881d588aSDmitry Fleytman } 474881d588aSDmitry Fleytman r->completed = 1; 475881d588aSDmitry Fleytman QTAILQ_REMOVE(&s->pending_queue, r, next); 476881d588aSDmitry Fleytman QTAILQ_INSERT_TAIL(&s->completion_queue, r, next); 477881d588aSDmitry Fleytman pvscsi_schedule_completion_processing(s); 478881d588aSDmitry Fleytman } 479881d588aSDmitry Fleytman 480881d588aSDmitry Fleytman static QEMUSGList *pvscsi_get_sg_list(SCSIRequest *r) 481881d588aSDmitry Fleytman { 482881d588aSDmitry Fleytman PVSCSIRequest *req = r->hba_private; 483881d588aSDmitry Fleytman 484881d588aSDmitry Fleytman trace_pvscsi_get_sg_list(req->sgl.nsg, req->sgl.size); 485881d588aSDmitry Fleytman 486881d588aSDmitry Fleytman return &req->sgl; 487881d588aSDmitry Fleytman } 488881d588aSDmitry Fleytman 489881d588aSDmitry Fleytman static void 490881d588aSDmitry Fleytman pvscsi_get_next_sg_elem(PVSCSISGState *sg) 491881d588aSDmitry Fleytman { 492881d588aSDmitry Fleytman struct PVSCSISGElement elem; 493881d588aSDmitry Fleytman 494881d588aSDmitry Fleytman cpu_physical_memory_read(sg->elemAddr, (void *)&elem, sizeof(elem)); 495881d588aSDmitry Fleytman if ((elem.flags & ~PVSCSI_KNOWN_FLAGS) != 0) { 496881d588aSDmitry Fleytman /* 497881d588aSDmitry Fleytman * There is PVSCSI_SGE_FLAG_CHAIN_ELEMENT flag described in 498881d588aSDmitry Fleytman * header file but its value is unknown. This flag requires 499881d588aSDmitry Fleytman * additional processing, so we put warning here to catch it 500881d588aSDmitry Fleytman * some day and make proper implementation 501881d588aSDmitry Fleytman */ 502881d588aSDmitry Fleytman trace_pvscsi_get_next_sg_elem(elem.flags); 503881d588aSDmitry Fleytman } 504881d588aSDmitry Fleytman 505881d588aSDmitry Fleytman sg->elemAddr += sizeof(elem); 506881d588aSDmitry Fleytman sg->dataAddr = elem.addr; 507881d588aSDmitry Fleytman sg->resid = elem.length; 508881d588aSDmitry Fleytman } 509881d588aSDmitry Fleytman 510881d588aSDmitry Fleytman static void 511881d588aSDmitry Fleytman pvscsi_write_sense(PVSCSIRequest *r, uint8_t *sense, int len) 512881d588aSDmitry Fleytman { 513881d588aSDmitry Fleytman r->cmp.senseLen = MIN(r->req.senseLen, len); 514881d588aSDmitry Fleytman r->sense_key = sense[(sense[0] & 2) ? 1 : 2]; 515881d588aSDmitry Fleytman cpu_physical_memory_write(r->req.senseAddr, sense, r->cmp.senseLen); 516881d588aSDmitry Fleytman } 517881d588aSDmitry Fleytman 518881d588aSDmitry Fleytman static void 519881d588aSDmitry Fleytman pvscsi_command_complete(SCSIRequest *req, uint32_t status, size_t resid) 520881d588aSDmitry Fleytman { 521881d588aSDmitry Fleytman PVSCSIRequest *pvscsi_req = req->hba_private; 522b0f49d13SPrasad Joshi PVSCSIState *s; 523881d588aSDmitry Fleytman 524881d588aSDmitry Fleytman if (!pvscsi_req) { 525881d588aSDmitry Fleytman trace_pvscsi_command_complete_not_found(req->tag); 526881d588aSDmitry Fleytman return; 527881d588aSDmitry Fleytman } 528b0f49d13SPrasad Joshi s = pvscsi_req->dev; 529881d588aSDmitry Fleytman 530881d588aSDmitry Fleytman if (resid) { 531881d588aSDmitry Fleytman /* Short transfer. */ 532881d588aSDmitry Fleytman trace_pvscsi_command_complete_data_run(); 533881d588aSDmitry Fleytman pvscsi_req->cmp.hostStatus = BTSTAT_DATARUN; 534881d588aSDmitry Fleytman } 535881d588aSDmitry Fleytman 536881d588aSDmitry Fleytman pvscsi_req->cmp.scsiStatus = status; 537881d588aSDmitry Fleytman if (pvscsi_req->cmp.scsiStatus == CHECK_CONDITION) { 538881d588aSDmitry Fleytman uint8_t sense[SCSI_SENSE_BUF_SIZE]; 539881d588aSDmitry Fleytman int sense_len = 540881d588aSDmitry Fleytman scsi_req_get_sense(pvscsi_req->sreq, sense, sizeof(sense)); 541881d588aSDmitry Fleytman 542881d588aSDmitry Fleytman trace_pvscsi_command_complete_sense_len(sense_len); 543881d588aSDmitry Fleytman pvscsi_write_sense(pvscsi_req, sense, sense_len); 544881d588aSDmitry Fleytman } 545881d588aSDmitry Fleytman qemu_sglist_destroy(&pvscsi_req->sgl); 546881d588aSDmitry Fleytman pvscsi_complete_request(s, pvscsi_req); 547881d588aSDmitry Fleytman } 548881d588aSDmitry Fleytman 549881d588aSDmitry Fleytman static void 550881d588aSDmitry Fleytman pvscsi_send_msg(PVSCSIState *s, SCSIDevice *dev, uint32_t msg_type) 551881d588aSDmitry Fleytman { 552881d588aSDmitry Fleytman if (s->msg_ring_info_valid && pvscsi_ring_msg_has_room(&s->rings)) { 553881d588aSDmitry Fleytman PVSCSIMsgDescDevStatusChanged msg = {0}; 554881d588aSDmitry Fleytman 555881d588aSDmitry Fleytman msg.type = msg_type; 556881d588aSDmitry Fleytman msg.bus = dev->channel; 557881d588aSDmitry Fleytman msg.target = dev->id; 558881d588aSDmitry Fleytman msg.lun[1] = dev->lun; 559881d588aSDmitry Fleytman 560881d588aSDmitry Fleytman pvscsi_msg_ring_put(s, (PVSCSIRingMsgDesc *)&msg); 561881d588aSDmitry Fleytman pvscsi_ring_flush_msg(&s->rings); 562881d588aSDmitry Fleytman pvscsi_raise_message_interrupt(s); 563881d588aSDmitry Fleytman } 564881d588aSDmitry Fleytman } 565881d588aSDmitry Fleytman 566881d588aSDmitry Fleytman static void 56791c8daadSIgor Mammedov pvscsi_hotplug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) 568881d588aSDmitry Fleytman { 56991c8daadSIgor Mammedov PVSCSIState *s = PVSCSI(hotplug_dev); 57091c8daadSIgor Mammedov 57191c8daadSIgor Mammedov pvscsi_send_msg(s, SCSI_DEVICE(dev), PVSCSI_MSG_DEV_ADDED); 572881d588aSDmitry Fleytman } 573881d588aSDmitry Fleytman 574881d588aSDmitry Fleytman static void 57591c8daadSIgor Mammedov pvscsi_hot_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) 576881d588aSDmitry Fleytman { 57791c8daadSIgor Mammedov PVSCSIState *s = PVSCSI(hotplug_dev); 57891c8daadSIgor Mammedov 57991c8daadSIgor Mammedov pvscsi_send_msg(s, SCSI_DEVICE(dev), PVSCSI_MSG_DEV_REMOVED); 58091c8daadSIgor Mammedov qdev_simple_device_unplug_cb(hotplug_dev, dev, errp); 581881d588aSDmitry Fleytman } 582881d588aSDmitry Fleytman 583881d588aSDmitry Fleytman static void 584881d588aSDmitry Fleytman pvscsi_request_cancelled(SCSIRequest *req) 585881d588aSDmitry Fleytman { 586881d588aSDmitry Fleytman PVSCSIRequest *pvscsi_req = req->hba_private; 587881d588aSDmitry Fleytman PVSCSIState *s = pvscsi_req->dev; 588881d588aSDmitry Fleytman 589881d588aSDmitry Fleytman if (pvscsi_req->completed) { 590881d588aSDmitry Fleytman return; 591881d588aSDmitry Fleytman } 592881d588aSDmitry Fleytman 593881d588aSDmitry Fleytman if (pvscsi_req->dev->resetting) { 594881d588aSDmitry Fleytman pvscsi_req->cmp.hostStatus = BTSTAT_BUSRESET; 595881d588aSDmitry Fleytman } else { 596881d588aSDmitry Fleytman pvscsi_req->cmp.hostStatus = BTSTAT_ABORTQUEUE; 597881d588aSDmitry Fleytman } 598881d588aSDmitry Fleytman 599881d588aSDmitry Fleytman pvscsi_complete_request(s, pvscsi_req); 600881d588aSDmitry Fleytman } 601881d588aSDmitry Fleytman 602881d588aSDmitry Fleytman static SCSIDevice* 603881d588aSDmitry Fleytman pvscsi_device_find(PVSCSIState *s, int channel, int target, 604881d588aSDmitry Fleytman uint8_t *requested_lun, uint8_t *target_lun) 605881d588aSDmitry Fleytman { 606881d588aSDmitry Fleytman if (requested_lun[0] || requested_lun[2] || requested_lun[3] || 607881d588aSDmitry Fleytman requested_lun[4] || requested_lun[5] || requested_lun[6] || 608881d588aSDmitry Fleytman requested_lun[7] || (target > PVSCSI_MAX_DEVS)) { 609881d588aSDmitry Fleytman return NULL; 610881d588aSDmitry Fleytman } else { 611881d588aSDmitry Fleytman *target_lun = requested_lun[1]; 612881d588aSDmitry Fleytman return scsi_device_find(&s->bus, channel, target, *target_lun); 613881d588aSDmitry Fleytman } 614881d588aSDmitry Fleytman } 615881d588aSDmitry Fleytman 616881d588aSDmitry Fleytman static PVSCSIRequest * 617881d588aSDmitry Fleytman pvscsi_queue_pending_descriptor(PVSCSIState *s, SCSIDevice **d, 618881d588aSDmitry Fleytman struct PVSCSIRingReqDesc *descr) 619881d588aSDmitry Fleytman { 620881d588aSDmitry Fleytman PVSCSIRequest *pvscsi_req; 621881d588aSDmitry Fleytman uint8_t lun; 622881d588aSDmitry Fleytman 623881d588aSDmitry Fleytman pvscsi_req = g_malloc0(sizeof(*pvscsi_req)); 624881d588aSDmitry Fleytman pvscsi_req->dev = s; 625881d588aSDmitry Fleytman pvscsi_req->req = *descr; 626881d588aSDmitry Fleytman pvscsi_req->cmp.context = pvscsi_req->req.context; 627881d588aSDmitry Fleytman QTAILQ_INSERT_TAIL(&s->pending_queue, pvscsi_req, next); 628881d588aSDmitry Fleytman 629881d588aSDmitry Fleytman *d = pvscsi_device_find(s, descr->bus, descr->target, descr->lun, &lun); 630881d588aSDmitry Fleytman if (*d) { 631881d588aSDmitry Fleytman pvscsi_req->lun = lun; 632881d588aSDmitry Fleytman } 633881d588aSDmitry Fleytman 634881d588aSDmitry Fleytman return pvscsi_req; 635881d588aSDmitry Fleytman } 636881d588aSDmitry Fleytman 637881d588aSDmitry Fleytman static void 638881d588aSDmitry Fleytman pvscsi_convert_sglist(PVSCSIRequest *r) 639881d588aSDmitry Fleytman { 64049adc5d3SPrasad J Pandit uint32_t chunk_size, elmcnt = 0; 641881d588aSDmitry Fleytman uint64_t data_length = r->req.dataLen; 642881d588aSDmitry Fleytman PVSCSISGState sg = r->sg; 64349adc5d3SPrasad J Pandit while (data_length && elmcnt < PVSCSI_MAX_SG_ELEM) { 64449adc5d3SPrasad J Pandit while (!sg.resid && elmcnt++ < PVSCSI_MAX_SG_ELEM) { 645881d588aSDmitry Fleytman pvscsi_get_next_sg_elem(&sg); 646881d588aSDmitry Fleytman trace_pvscsi_convert_sglist(r->req.context, r->sg.dataAddr, 647881d588aSDmitry Fleytman r->sg.resid); 648881d588aSDmitry Fleytman } 64949adc5d3SPrasad J Pandit chunk_size = MIN(data_length, sg.resid); 650881d588aSDmitry Fleytman if (chunk_size) { 651881d588aSDmitry Fleytman qemu_sglist_add(&r->sgl, sg.dataAddr, chunk_size); 652881d588aSDmitry Fleytman } 653881d588aSDmitry Fleytman 654881d588aSDmitry Fleytman sg.dataAddr += chunk_size; 655881d588aSDmitry Fleytman data_length -= chunk_size; 656881d588aSDmitry Fleytman sg.resid -= chunk_size; 657881d588aSDmitry Fleytman } 658881d588aSDmitry Fleytman } 659881d588aSDmitry Fleytman 660881d588aSDmitry Fleytman static void 661881d588aSDmitry Fleytman pvscsi_build_sglist(PVSCSIState *s, PVSCSIRequest *r) 662881d588aSDmitry Fleytman { 663881d588aSDmitry Fleytman PCIDevice *d = PCI_DEVICE(s); 664881d588aSDmitry Fleytman 665df32fd1cSPaolo Bonzini pci_dma_sglist_init(&r->sgl, d, 1); 666881d588aSDmitry Fleytman if (r->req.flags & PVSCSI_FLAG_CMD_WITH_SG_LIST) { 667881d588aSDmitry Fleytman pvscsi_convert_sglist(r); 668881d588aSDmitry Fleytman } else { 669881d588aSDmitry Fleytman qemu_sglist_add(&r->sgl, r->req.dataAddr, r->req.dataLen); 670881d588aSDmitry Fleytman } 671881d588aSDmitry Fleytman } 672881d588aSDmitry Fleytman 673881d588aSDmitry Fleytman static void 674881d588aSDmitry Fleytman pvscsi_process_request_descriptor(PVSCSIState *s, 675881d588aSDmitry Fleytman struct PVSCSIRingReqDesc *descr) 676881d588aSDmitry Fleytman { 677881d588aSDmitry Fleytman SCSIDevice *d; 678881d588aSDmitry Fleytman PVSCSIRequest *r = pvscsi_queue_pending_descriptor(s, &d, descr); 679881d588aSDmitry Fleytman int64_t n; 680881d588aSDmitry Fleytman 681881d588aSDmitry Fleytman trace_pvscsi_process_req_descr(descr->cdb[0], descr->context); 682881d588aSDmitry Fleytman 683881d588aSDmitry Fleytman if (!d) { 684881d588aSDmitry Fleytman r->cmp.hostStatus = BTSTAT_SELTIMEO; 685881d588aSDmitry Fleytman trace_pvscsi_process_req_descr_unknown_device(); 686881d588aSDmitry Fleytman pvscsi_complete_request(s, r); 687881d588aSDmitry Fleytman return; 688881d588aSDmitry Fleytman } 689881d588aSDmitry Fleytman 690881d588aSDmitry Fleytman if (descr->flags & PVSCSI_FLAG_CMD_WITH_SG_LIST) { 691881d588aSDmitry Fleytman r->sg.elemAddr = descr->dataAddr; 692881d588aSDmitry Fleytman } 693881d588aSDmitry Fleytman 694881d588aSDmitry Fleytman r->sreq = scsi_req_new(d, descr->context, r->lun, descr->cdb, r); 695881d588aSDmitry Fleytman if (r->sreq->cmd.mode == SCSI_XFER_FROM_DEV && 696881d588aSDmitry Fleytman (descr->flags & PVSCSI_FLAG_CMD_DIR_TODEVICE)) { 697881d588aSDmitry Fleytman r->cmp.hostStatus = BTSTAT_BADMSG; 698881d588aSDmitry Fleytman trace_pvscsi_process_req_descr_invalid_dir(); 699881d588aSDmitry Fleytman scsi_req_cancel(r->sreq); 700881d588aSDmitry Fleytman return; 701881d588aSDmitry Fleytman } 702881d588aSDmitry Fleytman if (r->sreq->cmd.mode == SCSI_XFER_TO_DEV && 703881d588aSDmitry Fleytman (descr->flags & PVSCSI_FLAG_CMD_DIR_TOHOST)) { 704881d588aSDmitry Fleytman r->cmp.hostStatus = BTSTAT_BADMSG; 705881d588aSDmitry Fleytman trace_pvscsi_process_req_descr_invalid_dir(); 706881d588aSDmitry Fleytman scsi_req_cancel(r->sreq); 707881d588aSDmitry Fleytman return; 708881d588aSDmitry Fleytman } 709881d588aSDmitry Fleytman 710881d588aSDmitry Fleytman pvscsi_build_sglist(s, r); 711881d588aSDmitry Fleytman n = scsi_req_enqueue(r->sreq); 712881d588aSDmitry Fleytman 713881d588aSDmitry Fleytman if (n) { 714881d588aSDmitry Fleytman scsi_req_continue(r->sreq); 715881d588aSDmitry Fleytman } 716881d588aSDmitry Fleytman } 717881d588aSDmitry Fleytman 718881d588aSDmitry Fleytman static void 719881d588aSDmitry Fleytman pvscsi_process_io(PVSCSIState *s) 720881d588aSDmitry Fleytman { 721881d588aSDmitry Fleytman PVSCSIRingReqDesc descr; 722881d588aSDmitry Fleytman hwaddr next_descr_pa; 723881d588aSDmitry Fleytman 724881d588aSDmitry Fleytman assert(s->rings_info_valid); 725881d588aSDmitry Fleytman while ((next_descr_pa = pvscsi_ring_pop_req_descr(&s->rings)) != 0) { 726881d588aSDmitry Fleytman 727881d588aSDmitry Fleytman /* Only read after production index verification */ 728881d588aSDmitry Fleytman smp_rmb(); 729881d588aSDmitry Fleytman 730881d588aSDmitry Fleytman trace_pvscsi_process_io(next_descr_pa); 731881d588aSDmitry Fleytman cpu_physical_memory_read(next_descr_pa, &descr, sizeof(descr)); 732881d588aSDmitry Fleytman pvscsi_process_request_descriptor(s, &descr); 733881d588aSDmitry Fleytman } 734881d588aSDmitry Fleytman 735881d588aSDmitry Fleytman pvscsi_ring_flush_req(&s->rings); 736881d588aSDmitry Fleytman } 737881d588aSDmitry Fleytman 738881d588aSDmitry Fleytman static void 739881d588aSDmitry Fleytman pvscsi_dbg_dump_tx_rings_config(PVSCSICmdDescSetupRings *rc) 740881d588aSDmitry Fleytman { 741881d588aSDmitry Fleytman int i; 742881d588aSDmitry Fleytman trace_pvscsi_tx_rings_ppn("Rings State", rc->ringsStatePPN); 743881d588aSDmitry Fleytman 744881d588aSDmitry Fleytman trace_pvscsi_tx_rings_num_pages("Request Ring", rc->reqRingNumPages); 745881d588aSDmitry Fleytman for (i = 0; i < rc->reqRingNumPages; i++) { 746881d588aSDmitry Fleytman trace_pvscsi_tx_rings_ppn("Request Ring", rc->reqRingPPNs[i]); 747881d588aSDmitry Fleytman } 748881d588aSDmitry Fleytman 749881d588aSDmitry Fleytman trace_pvscsi_tx_rings_num_pages("Confirm Ring", rc->cmpRingNumPages); 750881d588aSDmitry Fleytman for (i = 0; i < rc->cmpRingNumPages; i++) { 7517f61f469SPrasad J Pandit trace_pvscsi_tx_rings_ppn("Confirm Ring", rc->cmpRingPPNs[i]); 752881d588aSDmitry Fleytman } 753881d588aSDmitry Fleytman } 754881d588aSDmitry Fleytman 755881d588aSDmitry Fleytman static uint64_t 756881d588aSDmitry Fleytman pvscsi_on_cmd_config(PVSCSIState *s) 757881d588aSDmitry Fleytman { 758881d588aSDmitry Fleytman trace_pvscsi_on_cmd_noimpl("PVSCSI_CMD_CONFIG"); 759881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_FAILED; 760881d588aSDmitry Fleytman } 761881d588aSDmitry Fleytman 762881d588aSDmitry Fleytman static uint64_t 763881d588aSDmitry Fleytman pvscsi_on_cmd_unplug(PVSCSIState *s) 764881d588aSDmitry Fleytman { 765881d588aSDmitry Fleytman trace_pvscsi_on_cmd_noimpl("PVSCSI_CMD_DEVICE_UNPLUG"); 766881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_FAILED; 767881d588aSDmitry Fleytman } 768881d588aSDmitry Fleytman 769881d588aSDmitry Fleytman static uint64_t 770881d588aSDmitry Fleytman pvscsi_on_issue_scsi(PVSCSIState *s) 771881d588aSDmitry Fleytman { 772881d588aSDmitry Fleytman trace_pvscsi_on_cmd_noimpl("PVSCSI_CMD_ISSUE_SCSI"); 773881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_FAILED; 774881d588aSDmitry Fleytman } 775881d588aSDmitry Fleytman 776881d588aSDmitry Fleytman static uint64_t 777881d588aSDmitry Fleytman pvscsi_on_cmd_setup_rings(PVSCSIState *s) 778881d588aSDmitry Fleytman { 779881d588aSDmitry Fleytman PVSCSICmdDescSetupRings *rc = 780881d588aSDmitry Fleytman (PVSCSICmdDescSetupRings *) s->curr_cmd_data; 781881d588aSDmitry Fleytman 782881d588aSDmitry Fleytman trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_SETUP_RINGS"); 783881d588aSDmitry Fleytman 7847f61f469SPrasad J Pandit if (!rc->reqRingNumPages 7857f61f469SPrasad J Pandit || rc->reqRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES 7867f61f469SPrasad J Pandit || !rc->cmpRingNumPages 7877f61f469SPrasad J Pandit || rc->cmpRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES) { 7883e831b40SPrasad J Pandit return PVSCSI_COMMAND_PROCESSING_FAILED; 7893e831b40SPrasad J Pandit } 7903e831b40SPrasad J Pandit 7917f61f469SPrasad J Pandit pvscsi_dbg_dump_tx_rings_config(rc); 7927f61f469SPrasad J Pandit pvscsi_ring_init_data(&s->rings, rc); 7937f61f469SPrasad J Pandit 794881d588aSDmitry Fleytman s->rings_info_valid = TRUE; 795881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_SUCCEEDED; 796881d588aSDmitry Fleytman } 797881d588aSDmitry Fleytman 798881d588aSDmitry Fleytman static uint64_t 799881d588aSDmitry Fleytman pvscsi_on_cmd_abort(PVSCSIState *s) 800881d588aSDmitry Fleytman { 801881d588aSDmitry Fleytman PVSCSICmdDescAbortCmd *cmd = (PVSCSICmdDescAbortCmd *) s->curr_cmd_data; 802881d588aSDmitry Fleytman PVSCSIRequest *r, *next; 803881d588aSDmitry Fleytman 804881d588aSDmitry Fleytman trace_pvscsi_on_cmd_abort(cmd->context, cmd->target); 805881d588aSDmitry Fleytman 806881d588aSDmitry Fleytman QTAILQ_FOREACH_SAFE(r, &s->pending_queue, next, next) { 807881d588aSDmitry Fleytman if (r->req.context == cmd->context) { 808881d588aSDmitry Fleytman break; 809881d588aSDmitry Fleytman } 810881d588aSDmitry Fleytman } 811881d588aSDmitry Fleytman if (r) { 812881d588aSDmitry Fleytman assert(!r->completed); 813881d588aSDmitry Fleytman r->cmp.hostStatus = BTSTAT_ABORTQUEUE; 814881d588aSDmitry Fleytman scsi_req_cancel(r->sreq); 815881d588aSDmitry Fleytman } 816881d588aSDmitry Fleytman 817881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_SUCCEEDED; 818881d588aSDmitry Fleytman } 819881d588aSDmitry Fleytman 820881d588aSDmitry Fleytman static uint64_t 821881d588aSDmitry Fleytman pvscsi_on_cmd_unknown(PVSCSIState *s) 822881d588aSDmitry Fleytman { 823881d588aSDmitry Fleytman trace_pvscsi_on_cmd_unknown_data(s->curr_cmd_data[0]); 824881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_FAILED; 825881d588aSDmitry Fleytman } 826881d588aSDmitry Fleytman 827881d588aSDmitry Fleytman static uint64_t 828881d588aSDmitry Fleytman pvscsi_on_cmd_reset_device(PVSCSIState *s) 829881d588aSDmitry Fleytman { 830881d588aSDmitry Fleytman uint8_t target_lun = 0; 831881d588aSDmitry Fleytman struct PVSCSICmdDescResetDevice *cmd = 832881d588aSDmitry Fleytman (struct PVSCSICmdDescResetDevice *) s->curr_cmd_data; 833881d588aSDmitry Fleytman SCSIDevice *sdev; 834881d588aSDmitry Fleytman 835881d588aSDmitry Fleytman sdev = pvscsi_device_find(s, 0, cmd->target, cmd->lun, &target_lun); 836881d588aSDmitry Fleytman 837881d588aSDmitry Fleytman trace_pvscsi_on_cmd_reset_dev(cmd->target, (int) target_lun, sdev); 838881d588aSDmitry Fleytman 839881d588aSDmitry Fleytman if (sdev != NULL) { 840881d588aSDmitry Fleytman s->resetting++; 841*f703a04cSDamien Hedde device_legacy_reset(&sdev->qdev); 842881d588aSDmitry Fleytman s->resetting--; 843881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_SUCCEEDED; 844881d588aSDmitry Fleytman } 845881d588aSDmitry Fleytman 846881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_FAILED; 847881d588aSDmitry Fleytman } 848881d588aSDmitry Fleytman 849881d588aSDmitry Fleytman static uint64_t 850881d588aSDmitry Fleytman pvscsi_on_cmd_reset_bus(PVSCSIState *s) 851881d588aSDmitry Fleytman { 852881d588aSDmitry Fleytman trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_RESET_BUS"); 853881d588aSDmitry Fleytman 854881d588aSDmitry Fleytman s->resetting++; 855573c3e07SPhilippe Mathieu-Daudé qbus_reset_all(BUS(&s->bus)); 856881d588aSDmitry Fleytman s->resetting--; 857881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_SUCCEEDED; 858881d588aSDmitry Fleytman } 859881d588aSDmitry Fleytman 860881d588aSDmitry Fleytman static uint64_t 861881d588aSDmitry Fleytman pvscsi_on_cmd_setup_msg_ring(PVSCSIState *s) 862881d588aSDmitry Fleytman { 863881d588aSDmitry Fleytman PVSCSICmdDescSetupMsgRing *rc = 864881d588aSDmitry Fleytman (PVSCSICmdDescSetupMsgRing *) s->curr_cmd_data; 865881d588aSDmitry Fleytman 866881d588aSDmitry Fleytman trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_SETUP_MSG_RING"); 867881d588aSDmitry Fleytman 868881d588aSDmitry Fleytman if (!s->use_msg) { 869881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_FAILED; 870881d588aSDmitry Fleytman } 871881d588aSDmitry Fleytman 872881d588aSDmitry Fleytman if (s->rings_info_valid) { 8733e831b40SPrasad J Pandit if (pvscsi_ring_init_msg(&s->rings, rc) < 0) { 8743e831b40SPrasad J Pandit return PVSCSI_COMMAND_PROCESSING_FAILED; 8753e831b40SPrasad J Pandit } 876881d588aSDmitry Fleytman s->msg_ring_info_valid = TRUE; 877881d588aSDmitry Fleytman } 878881d588aSDmitry Fleytman return sizeof(PVSCSICmdDescSetupMsgRing) / sizeof(uint32_t); 879881d588aSDmitry Fleytman } 880881d588aSDmitry Fleytman 881881d588aSDmitry Fleytman static uint64_t 882881d588aSDmitry Fleytman pvscsi_on_cmd_adapter_reset(PVSCSIState *s) 883881d588aSDmitry Fleytman { 884881d588aSDmitry Fleytman trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_ADAPTER_RESET"); 885881d588aSDmitry Fleytman 886881d588aSDmitry Fleytman pvscsi_reset_adapter(s); 887881d588aSDmitry Fleytman return PVSCSI_COMMAND_PROCESSING_SUCCEEDED; 888881d588aSDmitry Fleytman } 889881d588aSDmitry Fleytman 890881d588aSDmitry Fleytman static const struct { 891881d588aSDmitry Fleytman int data_size; 892881d588aSDmitry Fleytman uint64_t (*handler_fn)(PVSCSIState *s); 893881d588aSDmitry Fleytman } pvscsi_commands[] = { 894881d588aSDmitry Fleytman [PVSCSI_CMD_FIRST] = { 895881d588aSDmitry Fleytman .data_size = 0, 896881d588aSDmitry Fleytman .handler_fn = pvscsi_on_cmd_unknown, 897881d588aSDmitry Fleytman }, 898881d588aSDmitry Fleytman 899881d588aSDmitry Fleytman /* Not implemented, data size defined based on what arrives on windows */ 900881d588aSDmitry Fleytman [PVSCSI_CMD_CONFIG] = { 901881d588aSDmitry Fleytman .data_size = 6 * sizeof(uint32_t), 902881d588aSDmitry Fleytman .handler_fn = pvscsi_on_cmd_config, 903881d588aSDmitry Fleytman }, 904881d588aSDmitry Fleytman 905881d588aSDmitry Fleytman /* Command not implemented, data size is unknown */ 906881d588aSDmitry Fleytman [PVSCSI_CMD_ISSUE_SCSI] = { 907881d588aSDmitry Fleytman .data_size = 0, 908881d588aSDmitry Fleytman .handler_fn = pvscsi_on_issue_scsi, 909881d588aSDmitry Fleytman }, 910881d588aSDmitry Fleytman 911881d588aSDmitry Fleytman /* Command not implemented, data size is unknown */ 912881d588aSDmitry Fleytman [PVSCSI_CMD_DEVICE_UNPLUG] = { 913881d588aSDmitry Fleytman .data_size = 0, 914881d588aSDmitry Fleytman .handler_fn = pvscsi_on_cmd_unplug, 915881d588aSDmitry Fleytman }, 916881d588aSDmitry Fleytman 917881d588aSDmitry Fleytman [PVSCSI_CMD_SETUP_RINGS] = { 918881d588aSDmitry Fleytman .data_size = sizeof(PVSCSICmdDescSetupRings), 919881d588aSDmitry Fleytman .handler_fn = pvscsi_on_cmd_setup_rings, 920881d588aSDmitry Fleytman }, 921881d588aSDmitry Fleytman 922881d588aSDmitry Fleytman [PVSCSI_CMD_RESET_DEVICE] = { 923881d588aSDmitry Fleytman .data_size = sizeof(struct PVSCSICmdDescResetDevice), 924881d588aSDmitry Fleytman .handler_fn = pvscsi_on_cmd_reset_device, 925881d588aSDmitry Fleytman }, 926881d588aSDmitry Fleytman 927881d588aSDmitry Fleytman [PVSCSI_CMD_RESET_BUS] = { 928881d588aSDmitry Fleytman .data_size = 0, 929881d588aSDmitry Fleytman .handler_fn = pvscsi_on_cmd_reset_bus, 930881d588aSDmitry Fleytman }, 931881d588aSDmitry Fleytman 932881d588aSDmitry Fleytman [PVSCSI_CMD_SETUP_MSG_RING] = { 933881d588aSDmitry Fleytman .data_size = sizeof(PVSCSICmdDescSetupMsgRing), 934881d588aSDmitry Fleytman .handler_fn = pvscsi_on_cmd_setup_msg_ring, 935881d588aSDmitry Fleytman }, 936881d588aSDmitry Fleytman 937881d588aSDmitry Fleytman [PVSCSI_CMD_ADAPTER_RESET] = { 938881d588aSDmitry Fleytman .data_size = 0, 939881d588aSDmitry Fleytman .handler_fn = pvscsi_on_cmd_adapter_reset, 940881d588aSDmitry Fleytman }, 941881d588aSDmitry Fleytman 942881d588aSDmitry Fleytman [PVSCSI_CMD_ABORT_CMD] = { 943881d588aSDmitry Fleytman .data_size = sizeof(struct PVSCSICmdDescAbortCmd), 944881d588aSDmitry Fleytman .handler_fn = pvscsi_on_cmd_abort, 945881d588aSDmitry Fleytman }, 946881d588aSDmitry Fleytman }; 947881d588aSDmitry Fleytman 948881d588aSDmitry Fleytman static void 949881d588aSDmitry Fleytman pvscsi_do_command_processing(PVSCSIState *s) 950881d588aSDmitry Fleytman { 951881d588aSDmitry Fleytman size_t bytes_arrived = s->curr_cmd_data_cntr * sizeof(uint32_t); 952881d588aSDmitry Fleytman 953881d588aSDmitry Fleytman assert(s->curr_cmd < PVSCSI_CMD_LAST); 954881d588aSDmitry Fleytman if (bytes_arrived >= pvscsi_commands[s->curr_cmd].data_size) { 955881d588aSDmitry Fleytman s->reg_command_status = pvscsi_commands[s->curr_cmd].handler_fn(s); 956881d588aSDmitry Fleytman s->curr_cmd = PVSCSI_CMD_FIRST; 957881d588aSDmitry Fleytman s->curr_cmd_data_cntr = 0; 958881d588aSDmitry Fleytman } 959881d588aSDmitry Fleytman } 960881d588aSDmitry Fleytman 961881d588aSDmitry Fleytman static void 962881d588aSDmitry Fleytman pvscsi_on_command_data(PVSCSIState *s, uint32_t value) 963881d588aSDmitry Fleytman { 964881d588aSDmitry Fleytman size_t bytes_arrived = s->curr_cmd_data_cntr * sizeof(uint32_t); 965881d588aSDmitry Fleytman 966881d588aSDmitry Fleytman assert(bytes_arrived < sizeof(s->curr_cmd_data)); 967881d588aSDmitry Fleytman s->curr_cmd_data[s->curr_cmd_data_cntr++] = value; 968881d588aSDmitry Fleytman 969881d588aSDmitry Fleytman pvscsi_do_command_processing(s); 970881d588aSDmitry Fleytman } 971881d588aSDmitry Fleytman 972881d588aSDmitry Fleytman static void 973881d588aSDmitry Fleytman pvscsi_on_command(PVSCSIState *s, uint64_t cmd_id) 974881d588aSDmitry Fleytman { 975881d588aSDmitry Fleytman if ((cmd_id > PVSCSI_CMD_FIRST) && (cmd_id < PVSCSI_CMD_LAST)) { 976881d588aSDmitry Fleytman s->curr_cmd = cmd_id; 977881d588aSDmitry Fleytman } else { 978881d588aSDmitry Fleytman s->curr_cmd = PVSCSI_CMD_FIRST; 979881d588aSDmitry Fleytman trace_pvscsi_on_cmd_unknown(cmd_id); 980881d588aSDmitry Fleytman } 981881d588aSDmitry Fleytman 982881d588aSDmitry Fleytman s->curr_cmd_data_cntr = 0; 983881d588aSDmitry Fleytman s->reg_command_status = PVSCSI_COMMAND_NOT_ENOUGH_DATA; 984881d588aSDmitry Fleytman 985881d588aSDmitry Fleytman pvscsi_do_command_processing(s); 986881d588aSDmitry Fleytman } 987881d588aSDmitry Fleytman 988881d588aSDmitry Fleytman static void 989881d588aSDmitry Fleytman pvscsi_io_write(void *opaque, hwaddr addr, 990881d588aSDmitry Fleytman uint64_t val, unsigned size) 991881d588aSDmitry Fleytman { 992881d588aSDmitry Fleytman PVSCSIState *s = opaque; 993881d588aSDmitry Fleytman 994881d588aSDmitry Fleytman switch (addr) { 995881d588aSDmitry Fleytman case PVSCSI_REG_OFFSET_COMMAND: 996881d588aSDmitry Fleytman pvscsi_on_command(s, val); 997881d588aSDmitry Fleytman break; 998881d588aSDmitry Fleytman 999881d588aSDmitry Fleytman case PVSCSI_REG_OFFSET_COMMAND_DATA: 1000881d588aSDmitry Fleytman pvscsi_on_command_data(s, (uint32_t) val); 1001881d588aSDmitry Fleytman break; 1002881d588aSDmitry Fleytman 1003881d588aSDmitry Fleytman case PVSCSI_REG_OFFSET_INTR_STATUS: 1004881d588aSDmitry Fleytman trace_pvscsi_io_write("PVSCSI_REG_OFFSET_INTR_STATUS", val); 1005881d588aSDmitry Fleytman s->reg_interrupt_status &= ~val; 1006881d588aSDmitry Fleytman pvscsi_update_irq_status(s); 1007881d588aSDmitry Fleytman pvscsi_schedule_completion_processing(s); 1008881d588aSDmitry Fleytman break; 1009881d588aSDmitry Fleytman 1010881d588aSDmitry Fleytman case PVSCSI_REG_OFFSET_INTR_MASK: 1011881d588aSDmitry Fleytman trace_pvscsi_io_write("PVSCSI_REG_OFFSET_INTR_MASK", val); 1012881d588aSDmitry Fleytman s->reg_interrupt_enabled = val; 1013881d588aSDmitry Fleytman pvscsi_update_irq_status(s); 1014881d588aSDmitry Fleytman break; 1015881d588aSDmitry Fleytman 1016881d588aSDmitry Fleytman case PVSCSI_REG_OFFSET_KICK_NON_RW_IO: 1017881d588aSDmitry Fleytman trace_pvscsi_io_write("PVSCSI_REG_OFFSET_KICK_NON_RW_IO", val); 1018881d588aSDmitry Fleytman pvscsi_process_io(s); 1019881d588aSDmitry Fleytman break; 1020881d588aSDmitry Fleytman 1021881d588aSDmitry Fleytman case PVSCSI_REG_OFFSET_KICK_RW_IO: 1022881d588aSDmitry Fleytman trace_pvscsi_io_write("PVSCSI_REG_OFFSET_KICK_RW_IO", val); 1023881d588aSDmitry Fleytman pvscsi_process_io(s); 1024881d588aSDmitry Fleytman break; 1025881d588aSDmitry Fleytman 1026881d588aSDmitry Fleytman case PVSCSI_REG_OFFSET_DEBUG: 1027881d588aSDmitry Fleytman trace_pvscsi_io_write("PVSCSI_REG_OFFSET_DEBUG", val); 1028881d588aSDmitry Fleytman break; 1029881d588aSDmitry Fleytman 1030881d588aSDmitry Fleytman default: 1031881d588aSDmitry Fleytman trace_pvscsi_io_write_unknown(addr, size, val); 1032881d588aSDmitry Fleytman break; 1033881d588aSDmitry Fleytman } 1034881d588aSDmitry Fleytman 1035881d588aSDmitry Fleytman } 1036881d588aSDmitry Fleytman 1037881d588aSDmitry Fleytman static uint64_t 1038881d588aSDmitry Fleytman pvscsi_io_read(void *opaque, hwaddr addr, unsigned size) 1039881d588aSDmitry Fleytman { 1040881d588aSDmitry Fleytman PVSCSIState *s = opaque; 1041881d588aSDmitry Fleytman 1042881d588aSDmitry Fleytman switch (addr) { 1043881d588aSDmitry Fleytman case PVSCSI_REG_OFFSET_INTR_STATUS: 1044881d588aSDmitry Fleytman trace_pvscsi_io_read("PVSCSI_REG_OFFSET_INTR_STATUS", 1045881d588aSDmitry Fleytman s->reg_interrupt_status); 1046881d588aSDmitry Fleytman return s->reg_interrupt_status; 1047881d588aSDmitry Fleytman 1048881d588aSDmitry Fleytman case PVSCSI_REG_OFFSET_INTR_MASK: 1049881d588aSDmitry Fleytman trace_pvscsi_io_read("PVSCSI_REG_OFFSET_INTR_MASK", 1050881d588aSDmitry Fleytman s->reg_interrupt_status); 1051881d588aSDmitry Fleytman return s->reg_interrupt_enabled; 1052881d588aSDmitry Fleytman 1053881d588aSDmitry Fleytman case PVSCSI_REG_OFFSET_COMMAND_STATUS: 1054881d588aSDmitry Fleytman trace_pvscsi_io_read("PVSCSI_REG_OFFSET_COMMAND_STATUS", 1055881d588aSDmitry Fleytman s->reg_interrupt_status); 1056881d588aSDmitry Fleytman return s->reg_command_status; 1057881d588aSDmitry Fleytman 1058881d588aSDmitry Fleytman default: 1059881d588aSDmitry Fleytman trace_pvscsi_io_read_unknown(addr, size); 1060881d588aSDmitry Fleytman return 0; 1061881d588aSDmitry Fleytman } 1062881d588aSDmitry Fleytman } 1063881d588aSDmitry Fleytman 1064881d588aSDmitry Fleytman 1065b2e1fffbSCao jin static void 1066881d588aSDmitry Fleytman pvscsi_init_msi(PVSCSIState *s) 1067881d588aSDmitry Fleytman { 1068881d588aSDmitry Fleytman int res; 1069881d588aSDmitry Fleytman PCIDevice *d = PCI_DEVICE(s); 1070881d588aSDmitry Fleytman 1071836fc48cSShmulik Ladkani res = msi_init(d, PVSCSI_MSI_OFFSET(s), PVSCSI_MSIX_NUM_VECTORS, 10721108b2f8SCao jin PVSCSI_USE_64BIT, PVSCSI_PER_VECTOR_MASK, NULL); 1073881d588aSDmitry Fleytman if (res < 0) { 1074881d588aSDmitry Fleytman trace_pvscsi_init_msi_fail(res); 1075881d588aSDmitry Fleytman s->msi_used = false; 1076881d588aSDmitry Fleytman } else { 1077881d588aSDmitry Fleytman s->msi_used = true; 1078881d588aSDmitry Fleytman } 1079881d588aSDmitry Fleytman } 1080881d588aSDmitry Fleytman 1081881d588aSDmitry Fleytman static void 1082881d588aSDmitry Fleytman pvscsi_cleanup_msi(PVSCSIState *s) 1083881d588aSDmitry Fleytman { 1084881d588aSDmitry Fleytman PCIDevice *d = PCI_DEVICE(s); 1085881d588aSDmitry Fleytman 1086881d588aSDmitry Fleytman msi_uninit(d); 1087881d588aSDmitry Fleytman } 1088881d588aSDmitry Fleytman 1089881d588aSDmitry Fleytman static const MemoryRegionOps pvscsi_ops = { 1090881d588aSDmitry Fleytman .read = pvscsi_io_read, 1091881d588aSDmitry Fleytman .write = pvscsi_io_write, 1092881d588aSDmitry Fleytman .endianness = DEVICE_LITTLE_ENDIAN, 1093881d588aSDmitry Fleytman .impl = { 1094881d588aSDmitry Fleytman .min_access_size = 4, 1095881d588aSDmitry Fleytman .max_access_size = 4, 1096881d588aSDmitry Fleytman }, 1097881d588aSDmitry Fleytman }; 1098881d588aSDmitry Fleytman 1099881d588aSDmitry Fleytman static const struct SCSIBusInfo pvscsi_scsi_info = { 1100881d588aSDmitry Fleytman .tcq = true, 1101881d588aSDmitry Fleytman .max_target = PVSCSI_MAX_DEVS, 1102881d588aSDmitry Fleytman .max_channel = 0, 1103881d588aSDmitry Fleytman .max_lun = 0, 1104881d588aSDmitry Fleytman 1105881d588aSDmitry Fleytman .get_sg_list = pvscsi_get_sg_list, 1106881d588aSDmitry Fleytman .complete = pvscsi_command_complete, 1107881d588aSDmitry Fleytman .cancel = pvscsi_request_cancelled, 1108881d588aSDmitry Fleytman }; 1109881d588aSDmitry Fleytman 1110fafeb41cSMao Zhongyi static void 1111fafeb41cSMao Zhongyi pvscsi_realizefn(PCIDevice *pci_dev, Error **errp) 1112881d588aSDmitry Fleytman { 1113881d588aSDmitry Fleytman PVSCSIState *s = PVSCSI(pci_dev); 1114881d588aSDmitry Fleytman 1115881d588aSDmitry Fleytman trace_pvscsi_state("init"); 1116881d588aSDmitry Fleytman 1117d29d4ff8SShmulik Ladkani /* PCI subsystem ID, subsystem vendor ID, revision */ 1118d29d4ff8SShmulik Ladkani if (PVSCSI_USE_OLD_PCI_CONFIGURATION(s)) { 1119d29d4ff8SShmulik Ladkani pci_set_word(pci_dev->config + PCI_SUBSYSTEM_ID, 0x1000); 1120d29d4ff8SShmulik Ladkani } else { 1121d29d4ff8SShmulik Ladkani pci_set_word(pci_dev->config + PCI_SUBSYSTEM_VENDOR_ID, 1122d29d4ff8SShmulik Ladkani PCI_VENDOR_ID_VMWARE); 1123d29d4ff8SShmulik Ladkani pci_set_word(pci_dev->config + PCI_SUBSYSTEM_ID, 1124d29d4ff8SShmulik Ladkani PCI_DEVICE_ID_VMWARE_PVSCSI); 1125d29d4ff8SShmulik Ladkani pci_config_set_revision(pci_dev->config, 0x2); 1126d29d4ff8SShmulik Ladkani } 1127881d588aSDmitry Fleytman 1128881d588aSDmitry Fleytman /* PCI latency timer = 255 */ 1129881d588aSDmitry Fleytman pci_dev->config[PCI_LATENCY_TIMER] = 0xff; 1130881d588aSDmitry Fleytman 1131881d588aSDmitry Fleytman /* Interrupt pin A */ 1132881d588aSDmitry Fleytman pci_config_set_interrupt_pin(pci_dev->config, 1); 1133881d588aSDmitry Fleytman 113429776739SPaolo Bonzini memory_region_init_io(&s->io_space, OBJECT(s), &pvscsi_ops, s, 1135881d588aSDmitry Fleytman "pvscsi-io", PVSCSI_MEM_SPACE_SIZE); 1136881d588aSDmitry Fleytman pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->io_space); 1137881d588aSDmitry Fleytman 1138881d588aSDmitry Fleytman pvscsi_init_msi(s); 1139881d588aSDmitry Fleytman 1140fd56e061SDavid Gibson if (pci_is_express(pci_dev) && pci_bus_is_express(pci_get_bus(pci_dev))) { 11411dd1305eSShmulik Ladkani pcie_endpoint_cap_init(pci_dev, PVSCSI_EXP_EP_OFFSET); 11421dd1305eSShmulik Ladkani } 11431dd1305eSShmulik Ladkani 1144881d588aSDmitry Fleytman s->completion_worker = qemu_bh_new(pvscsi_process_completion_queue, s); 1145881d588aSDmitry Fleytman 1146b1187b51SAndreas Färber scsi_bus_new(&s->bus, sizeof(s->bus), DEVICE(pci_dev), 1147b1187b51SAndreas Färber &pvscsi_scsi_info, NULL); 114891c8daadSIgor Mammedov /* override default SCSI bus hotplug-handler, with pvscsi's one */ 114994d1cc5fSMichael Roth qbus_set_hotplug_handler(BUS(&s->bus), OBJECT(s), &error_abort); 1150881d588aSDmitry Fleytman pvscsi_reset_state(s); 1151881d588aSDmitry Fleytman } 1152881d588aSDmitry Fleytman 1153881d588aSDmitry Fleytman static void 1154881d588aSDmitry Fleytman pvscsi_uninit(PCIDevice *pci_dev) 1155881d588aSDmitry Fleytman { 1156881d588aSDmitry Fleytman PVSCSIState *s = PVSCSI(pci_dev); 1157881d588aSDmitry Fleytman 1158881d588aSDmitry Fleytman trace_pvscsi_state("uninit"); 1159881d588aSDmitry Fleytman qemu_bh_delete(s->completion_worker); 1160881d588aSDmitry Fleytman 1161881d588aSDmitry Fleytman pvscsi_cleanup_msi(s); 1162881d588aSDmitry Fleytman } 1163881d588aSDmitry Fleytman 1164881d588aSDmitry Fleytman static void 1165881d588aSDmitry Fleytman pvscsi_reset(DeviceState *dev) 1166881d588aSDmitry Fleytman { 1167881d588aSDmitry Fleytman PCIDevice *d = PCI_DEVICE(dev); 1168881d588aSDmitry Fleytman PVSCSIState *s = PVSCSI(d); 1169881d588aSDmitry Fleytman 1170881d588aSDmitry Fleytman trace_pvscsi_state("reset"); 1171881d588aSDmitry Fleytman pvscsi_reset_adapter(s); 1172881d588aSDmitry Fleytman } 1173881d588aSDmitry Fleytman 117444b1ff31SDr. David Alan Gilbert static int 1175881d588aSDmitry Fleytman pvscsi_pre_save(void *opaque) 1176881d588aSDmitry Fleytman { 1177881d588aSDmitry Fleytman PVSCSIState *s = (PVSCSIState *) opaque; 1178881d588aSDmitry Fleytman 1179881d588aSDmitry Fleytman trace_pvscsi_state("presave"); 1180881d588aSDmitry Fleytman 1181881d588aSDmitry Fleytman assert(QTAILQ_EMPTY(&s->pending_queue)); 1182881d588aSDmitry Fleytman assert(QTAILQ_EMPTY(&s->completion_queue)); 118344b1ff31SDr. David Alan Gilbert 118444b1ff31SDr. David Alan Gilbert return 0; 1185881d588aSDmitry Fleytman } 1186881d588aSDmitry Fleytman 1187881d588aSDmitry Fleytman static int 1188881d588aSDmitry Fleytman pvscsi_post_load(void *opaque, int version_id) 1189881d588aSDmitry Fleytman { 1190881d588aSDmitry Fleytman trace_pvscsi_state("postload"); 1191881d588aSDmitry Fleytman return 0; 1192881d588aSDmitry Fleytman } 1193881d588aSDmitry Fleytman 11941dd1305eSShmulik Ladkani static bool pvscsi_vmstate_need_pcie_device(void *opaque) 11951dd1305eSShmulik Ladkani { 11961dd1305eSShmulik Ladkani PVSCSIState *s = PVSCSI(opaque); 11971dd1305eSShmulik Ladkani 11981dd1305eSShmulik Ladkani return !(s->compat_flags & PVSCSI_COMPAT_DISABLE_PCIE); 11991dd1305eSShmulik Ladkani } 12001dd1305eSShmulik Ladkani 12011dd1305eSShmulik Ladkani static bool pvscsi_vmstate_test_pci_device(void *opaque, int version_id) 12021dd1305eSShmulik Ladkani { 12031dd1305eSShmulik Ladkani return !pvscsi_vmstate_need_pcie_device(opaque); 12041dd1305eSShmulik Ladkani } 12051dd1305eSShmulik Ladkani 12061dd1305eSShmulik Ladkani static const VMStateDescription vmstate_pvscsi_pcie_device = { 12071dd1305eSShmulik Ladkani .name = "pvscsi/pcie", 12081dd1305eSShmulik Ladkani .needed = pvscsi_vmstate_need_pcie_device, 12091dd1305eSShmulik Ladkani .fields = (VMStateField[]) { 121020daa90aSDr. David Alan Gilbert VMSTATE_PCI_DEVICE(parent_obj, PVSCSIState), 12111dd1305eSShmulik Ladkani VMSTATE_END_OF_LIST() 12121dd1305eSShmulik Ladkani } 12131dd1305eSShmulik Ladkani }; 12141dd1305eSShmulik Ladkani 1215881d588aSDmitry Fleytman static const VMStateDescription vmstate_pvscsi = { 12166783ecf1SPeter Maydell .name = "pvscsi", 1217881d588aSDmitry Fleytman .version_id = 0, 1218881d588aSDmitry Fleytman .minimum_version_id = 0, 1219881d588aSDmitry Fleytman .pre_save = pvscsi_pre_save, 1220881d588aSDmitry Fleytman .post_load = pvscsi_post_load, 1221881d588aSDmitry Fleytman .fields = (VMStateField[]) { 12221dd1305eSShmulik Ladkani VMSTATE_STRUCT_TEST(parent_obj, PVSCSIState, 12231dd1305eSShmulik Ladkani pvscsi_vmstate_test_pci_device, 0, 12241dd1305eSShmulik Ladkani vmstate_pci_device, PCIDevice), 1225881d588aSDmitry Fleytman VMSTATE_UINT8(msi_used, PVSCSIState), 1226881d588aSDmitry Fleytman VMSTATE_UINT32(resetting, PVSCSIState), 1227881d588aSDmitry Fleytman VMSTATE_UINT64(reg_interrupt_status, PVSCSIState), 1228881d588aSDmitry Fleytman VMSTATE_UINT64(reg_interrupt_enabled, PVSCSIState), 1229881d588aSDmitry Fleytman VMSTATE_UINT64(reg_command_status, PVSCSIState), 1230881d588aSDmitry Fleytman VMSTATE_UINT64(curr_cmd, PVSCSIState), 1231881d588aSDmitry Fleytman VMSTATE_UINT32(curr_cmd_data_cntr, PVSCSIState), 1232881d588aSDmitry Fleytman VMSTATE_UINT32_ARRAY(curr_cmd_data, PVSCSIState, 1233881d588aSDmitry Fleytman ARRAY_SIZE(((PVSCSIState *)NULL)->curr_cmd_data)), 1234881d588aSDmitry Fleytman VMSTATE_UINT8(rings_info_valid, PVSCSIState), 1235881d588aSDmitry Fleytman VMSTATE_UINT8(msg_ring_info_valid, PVSCSIState), 1236881d588aSDmitry Fleytman VMSTATE_UINT8(use_msg, PVSCSIState), 1237881d588aSDmitry Fleytman 1238881d588aSDmitry Fleytman VMSTATE_UINT64(rings.rs_pa, PVSCSIState), 1239881d588aSDmitry Fleytman VMSTATE_UINT32(rings.txr_len_mask, PVSCSIState), 1240881d588aSDmitry Fleytman VMSTATE_UINT32(rings.rxr_len_mask, PVSCSIState), 1241881d588aSDmitry Fleytman VMSTATE_UINT64_ARRAY(rings.req_ring_pages_pa, PVSCSIState, 1242881d588aSDmitry Fleytman PVSCSI_SETUP_RINGS_MAX_NUM_PAGES), 1243881d588aSDmitry Fleytman VMSTATE_UINT64_ARRAY(rings.cmp_ring_pages_pa, PVSCSIState, 1244881d588aSDmitry Fleytman PVSCSI_SETUP_RINGS_MAX_NUM_PAGES), 1245881d588aSDmitry Fleytman VMSTATE_UINT64(rings.consumed_ptr, PVSCSIState), 1246881d588aSDmitry Fleytman VMSTATE_UINT64(rings.filled_cmp_ptr, PVSCSIState), 1247881d588aSDmitry Fleytman 1248881d588aSDmitry Fleytman VMSTATE_END_OF_LIST() 12491dd1305eSShmulik Ladkani }, 12501dd1305eSShmulik Ladkani .subsections = (const VMStateDescription*[]) { 12511dd1305eSShmulik Ladkani &vmstate_pvscsi_pcie_device, 12521dd1305eSShmulik Ladkani NULL 1253881d588aSDmitry Fleytman } 1254881d588aSDmitry Fleytman }; 1255881d588aSDmitry Fleytman 1256881d588aSDmitry Fleytman static Property pvscsi_properties[] = { 1257881d588aSDmitry Fleytman DEFINE_PROP_UINT8("use_msg", PVSCSIState, use_msg, 1), 1258952970baSShmulik Ladkani DEFINE_PROP_BIT("x-old-pci-configuration", PVSCSIState, compat_flags, 1259952970baSShmulik Ladkani PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT, false), 1260d5da3ef2SShmulik Ladkani DEFINE_PROP_BIT("x-disable-pcie", PVSCSIState, compat_flags, 1261d5da3ef2SShmulik Ladkani PVSCSI_COMPAT_DISABLE_PCIE_BIT, false), 1262881d588aSDmitry Fleytman DEFINE_PROP_END_OF_LIST(), 1263881d588aSDmitry Fleytman }; 1264881d588aSDmitry Fleytman 12651dd1305eSShmulik Ladkani static void pvscsi_realize(DeviceState *qdev, Error **errp) 12661dd1305eSShmulik Ladkani { 12671dd1305eSShmulik Ladkani PVSCSIClass *pvs_c = PVSCSI_DEVICE_GET_CLASS(qdev); 12681dd1305eSShmulik Ladkani PCIDevice *pci_dev = PCI_DEVICE(qdev); 12691dd1305eSShmulik Ladkani PVSCSIState *s = PVSCSI(qdev); 12701dd1305eSShmulik Ladkani 12711dd1305eSShmulik Ladkani if (!(s->compat_flags & PVSCSI_COMPAT_DISABLE_PCIE)) { 12721dd1305eSShmulik Ladkani pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; 12731dd1305eSShmulik Ladkani } 12741dd1305eSShmulik Ladkani 12751dd1305eSShmulik Ladkani pvs_c->parent_dc_realize(qdev, errp); 12761dd1305eSShmulik Ladkani } 12771dd1305eSShmulik Ladkani 1278881d588aSDmitry Fleytman static void pvscsi_class_init(ObjectClass *klass, void *data) 1279881d588aSDmitry Fleytman { 1280881d588aSDmitry Fleytman DeviceClass *dc = DEVICE_CLASS(klass); 1281881d588aSDmitry Fleytman PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 12821dd1305eSShmulik Ladkani PVSCSIClass *pvs_k = PVSCSI_DEVICE_CLASS(klass); 128391c8daadSIgor Mammedov HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); 1284881d588aSDmitry Fleytman 1285fafeb41cSMao Zhongyi k->realize = pvscsi_realizefn; 1286881d588aSDmitry Fleytman k->exit = pvscsi_uninit; 1287881d588aSDmitry Fleytman k->vendor_id = PCI_VENDOR_ID_VMWARE; 1288881d588aSDmitry Fleytman k->device_id = PCI_DEVICE_ID_VMWARE_PVSCSI; 1289881d588aSDmitry Fleytman k->class_id = PCI_CLASS_STORAGE_SCSI; 1290881d588aSDmitry Fleytman k->subsystem_id = 0x1000; 1291bf853881SPhilippe Mathieu-Daudé device_class_set_parent_realize(dc, pvscsi_realize, 1292bf853881SPhilippe Mathieu-Daudé &pvs_k->parent_dc_realize); 1293881d588aSDmitry Fleytman dc->reset = pvscsi_reset; 1294881d588aSDmitry Fleytman dc->vmsd = &vmstate_pvscsi; 12954f67d30bSMarc-André Lureau device_class_set_props(dc, pvscsi_properties); 1296125ee0edSMarcel Apfelbaum set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 129791c8daadSIgor Mammedov hc->unplug = pvscsi_hot_unplug; 129891c8daadSIgor Mammedov hc->plug = pvscsi_hotplug; 1299881d588aSDmitry Fleytman } 1300881d588aSDmitry Fleytman 1301881d588aSDmitry Fleytman static const TypeInfo pvscsi_info = { 13026783ecf1SPeter Maydell .name = TYPE_PVSCSI, 1303881d588aSDmitry Fleytman .parent = TYPE_PCI_DEVICE, 1304e2d4f3f7SShmulik Ladkani .class_size = sizeof(PVSCSIClass), 1305881d588aSDmitry Fleytman .instance_size = sizeof(PVSCSIState), 1306881d588aSDmitry Fleytman .class_init = pvscsi_class_init, 130791c8daadSIgor Mammedov .interfaces = (InterfaceInfo[]) { 130891c8daadSIgor Mammedov { TYPE_HOTPLUG_HANDLER }, 1309a5fa336fSEduardo Habkost { INTERFACE_PCIE_DEVICE }, 1310a5fa336fSEduardo Habkost { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 131191c8daadSIgor Mammedov { } 131291c8daadSIgor Mammedov } 1313881d588aSDmitry Fleytman }; 1314881d588aSDmitry Fleytman 1315881d588aSDmitry Fleytman static void 1316881d588aSDmitry Fleytman pvscsi_register_types(void) 1317881d588aSDmitry Fleytman { 1318881d588aSDmitry Fleytman type_register_static(&pvscsi_info); 1319881d588aSDmitry Fleytman } 1320881d588aSDmitry Fleytman 1321881d588aSDmitry Fleytman type_init(pvscsi_register_types); 1322