xref: /openbmc/qemu/hw/scsi/vmw_pvscsi.c (revision b2e1fffb)
1881d588aSDmitry Fleytman /*
2881d588aSDmitry Fleytman  * QEMU VMWARE PVSCSI paravirtual SCSI bus
3881d588aSDmitry Fleytman  *
4881d588aSDmitry Fleytman  * Copyright (c) 2012 Ravello Systems LTD (http://ravellosystems.com)
5881d588aSDmitry Fleytman  *
6881d588aSDmitry Fleytman  * Developed by Daynix Computing LTD (http://www.daynix.com)
7881d588aSDmitry Fleytman  *
8881d588aSDmitry Fleytman  * Based on implementation by Paolo Bonzini
9881d588aSDmitry Fleytman  * http://lists.gnu.org/archive/html/qemu-devel/2011-08/msg00729.html
10881d588aSDmitry Fleytman  *
11881d588aSDmitry Fleytman  * Authors:
12881d588aSDmitry Fleytman  * Paolo Bonzini <pbonzini@redhat.com>
13881d588aSDmitry Fleytman  * Dmitry Fleytman <dmitry@daynix.com>
14881d588aSDmitry Fleytman  * Yan Vugenfirer <yan@daynix.com>
15881d588aSDmitry Fleytman  *
16881d588aSDmitry Fleytman  * This work is licensed under the terms of the GNU GPL, version 2.
17881d588aSDmitry Fleytman  * See the COPYING file in the top-level directory.
18881d588aSDmitry Fleytman  *
19881d588aSDmitry Fleytman  * NOTE about MSI-X:
20881d588aSDmitry Fleytman  * MSI-X support has been removed for the moment because it leads Windows OS
21881d588aSDmitry Fleytman  * to crash on startup. The crash happens because Windows driver requires
22881d588aSDmitry Fleytman  * MSI-X shared memory to be part of the same BAR used for rings state
23881d588aSDmitry Fleytman  * registers, etc. This is not supported by QEMU infrastructure so separate
24881d588aSDmitry Fleytman  * BAR created from MSI-X purposes. Windows driver fails to deal with 2 BARs.
25881d588aSDmitry Fleytman  *
26881d588aSDmitry Fleytman  */
27881d588aSDmitry Fleytman 
28a4ab4792SPeter Maydell #include "qemu/osdep.h"
29da34e65cSMarkus Armbruster #include "qapi/error.h"
30881d588aSDmitry Fleytman #include "hw/scsi/scsi.h"
31881d588aSDmitry Fleytman #include <block/scsi.h>
32881d588aSDmitry Fleytman #include "hw/pci/msi.h"
33881d588aSDmitry Fleytman #include "vmw_pvscsi.h"
34881d588aSDmitry Fleytman #include "trace.h"
35881d588aSDmitry Fleytman 
36881d588aSDmitry Fleytman 
37881d588aSDmitry Fleytman #define PVSCSI_USE_64BIT         (true)
38881d588aSDmitry Fleytman #define PVSCSI_PER_VECTOR_MASK   (false)
39881d588aSDmitry Fleytman 
40881d588aSDmitry Fleytman #define PVSCSI_MAX_DEVS                   (64)
41881d588aSDmitry Fleytman #define PVSCSI_MSIX_NUM_VECTORS           (1)
42881d588aSDmitry Fleytman 
43881d588aSDmitry Fleytman #define PVSCSI_MAX_CMD_DATA_WORDS \
44881d588aSDmitry Fleytman     (sizeof(PVSCSICmdDescSetupRings)/sizeof(uint32_t))
45881d588aSDmitry Fleytman 
460dc40f28SPaolo Bonzini #define RS_GET_FIELD(m, field) \
470dc40f28SPaolo Bonzini     (ldl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
480dc40f28SPaolo Bonzini                  (m)->rs_pa + offsetof(struct PVSCSIRingsState, field)))
490dc40f28SPaolo Bonzini #define RS_SET_FIELD(m, field, val) \
500dc40f28SPaolo Bonzini     (stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
510dc40f28SPaolo Bonzini                  (m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val))
52881d588aSDmitry Fleytman 
53e2d4f3f7SShmulik Ladkani typedef struct PVSCSIClass {
54e2d4f3f7SShmulik Ladkani     PCIDeviceClass parent_class;
551dd1305eSShmulik Ladkani     DeviceRealize parent_dc_realize;
56e2d4f3f7SShmulik Ladkani } PVSCSIClass;
57e2d4f3f7SShmulik Ladkani 
58881d588aSDmitry Fleytman #define TYPE_PVSCSI "pvscsi"
59881d588aSDmitry Fleytman #define PVSCSI(obj) OBJECT_CHECK(PVSCSIState, (obj), TYPE_PVSCSI)
60881d588aSDmitry Fleytman 
61e2d4f3f7SShmulik Ladkani #define PVSCSI_DEVICE_CLASS(klass) \
62e2d4f3f7SShmulik Ladkani     OBJECT_CLASS_CHECK(PVSCSIClass, (klass), TYPE_PVSCSI)
63e2d4f3f7SShmulik Ladkani #define PVSCSI_DEVICE_GET_CLASS(obj) \
64e2d4f3f7SShmulik Ladkani     OBJECT_GET_CLASS(PVSCSIClass, (obj), TYPE_PVSCSI)
65e2d4f3f7SShmulik Ladkani 
66cb8d4c8fSStefan Weil /* Compatibility flags for migration */
67d29d4ff8SShmulik Ladkani #define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT 0
68d29d4ff8SShmulik Ladkani #define PVSCSI_COMPAT_OLD_PCI_CONFIGURATION \
69d29d4ff8SShmulik Ladkani     (1 << PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT)
701dd1305eSShmulik Ladkani #define PVSCSI_COMPAT_DISABLE_PCIE_BIT 1
711dd1305eSShmulik Ladkani #define PVSCSI_COMPAT_DISABLE_PCIE \
721dd1305eSShmulik Ladkani     (1 << PVSCSI_COMPAT_DISABLE_PCIE_BIT)
73d29d4ff8SShmulik Ladkani 
74d29d4ff8SShmulik Ladkani #define PVSCSI_USE_OLD_PCI_CONFIGURATION(s) \
75d29d4ff8SShmulik Ladkani     ((s)->compat_flags & PVSCSI_COMPAT_OLD_PCI_CONFIGURATION)
76836fc48cSShmulik Ladkani #define PVSCSI_MSI_OFFSET(s) \
77836fc48cSShmulik Ladkani     (PVSCSI_USE_OLD_PCI_CONFIGURATION(s) ? 0x50 : 0x7c)
781dd1305eSShmulik Ladkani #define PVSCSI_EXP_EP_OFFSET (0x40)
79d29d4ff8SShmulik Ladkani 
80881d588aSDmitry Fleytman typedef struct PVSCSIRingInfo {
81881d588aSDmitry Fleytman     uint64_t            rs_pa;
82881d588aSDmitry Fleytman     uint32_t            txr_len_mask;
83881d588aSDmitry Fleytman     uint32_t            rxr_len_mask;
84881d588aSDmitry Fleytman     uint32_t            msg_len_mask;
85881d588aSDmitry Fleytman     uint64_t            req_ring_pages_pa[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
86881d588aSDmitry Fleytman     uint64_t            cmp_ring_pages_pa[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
87881d588aSDmitry Fleytman     uint64_t            msg_ring_pages_pa[PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES];
88881d588aSDmitry Fleytman     uint64_t            consumed_ptr;
89881d588aSDmitry Fleytman     uint64_t            filled_cmp_ptr;
90881d588aSDmitry Fleytman     uint64_t            filled_msg_ptr;
91881d588aSDmitry Fleytman } PVSCSIRingInfo;
92881d588aSDmitry Fleytman 
93881d588aSDmitry Fleytman typedef struct PVSCSISGState {
94881d588aSDmitry Fleytman     hwaddr elemAddr;
95881d588aSDmitry Fleytman     hwaddr dataAddr;
96881d588aSDmitry Fleytman     uint32_t resid;
97881d588aSDmitry Fleytman } PVSCSISGState;
98881d588aSDmitry Fleytman 
99881d588aSDmitry Fleytman typedef QTAILQ_HEAD(, PVSCSIRequest) PVSCSIRequestList;
100881d588aSDmitry Fleytman 
101881d588aSDmitry Fleytman typedef struct {
102881d588aSDmitry Fleytman     PCIDevice parent_obj;
103881d588aSDmitry Fleytman     MemoryRegion io_space;
104881d588aSDmitry Fleytman     SCSIBus bus;
105881d588aSDmitry Fleytman     QEMUBH *completion_worker;
106881d588aSDmitry Fleytman     PVSCSIRequestList pending_queue;
107881d588aSDmitry Fleytman     PVSCSIRequestList completion_queue;
108881d588aSDmitry Fleytman 
109881d588aSDmitry Fleytman     uint64_t reg_interrupt_status;        /* Interrupt status register value */
110881d588aSDmitry Fleytman     uint64_t reg_interrupt_enabled;       /* Interrupt mask register value   */
111881d588aSDmitry Fleytman     uint64_t reg_command_status;          /* Command status register value   */
112881d588aSDmitry Fleytman 
113881d588aSDmitry Fleytman     /* Command data adoption mechanism */
114881d588aSDmitry Fleytman     uint64_t curr_cmd;                   /* Last command arrived             */
115881d588aSDmitry Fleytman     uint32_t curr_cmd_data_cntr;         /* Amount of data for last command  */
116881d588aSDmitry Fleytman 
117881d588aSDmitry Fleytman     /* Collector for current command data */
118881d588aSDmitry Fleytman     uint32_t curr_cmd_data[PVSCSI_MAX_CMD_DATA_WORDS];
119881d588aSDmitry Fleytman 
120881d588aSDmitry Fleytman     uint8_t rings_info_valid;            /* Whether data rings initialized   */
121881d588aSDmitry Fleytman     uint8_t msg_ring_info_valid;         /* Whether message ring initialized */
122881d588aSDmitry Fleytman     uint8_t use_msg;                     /* Whether to use message ring      */
123881d588aSDmitry Fleytman 
124881d588aSDmitry Fleytman     uint8_t msi_used;    /* Whether MSI support was installed successfully   */
125881d588aSDmitry Fleytman 
126881d588aSDmitry Fleytman     PVSCSIRingInfo rings;                /* Data transfer rings manager      */
127881d588aSDmitry Fleytman     uint32_t resetting;                  /* Reset in progress                */
128d29d4ff8SShmulik Ladkani 
129d29d4ff8SShmulik Ladkani     uint32_t compat_flags;
130881d588aSDmitry Fleytman } PVSCSIState;
131881d588aSDmitry Fleytman 
132881d588aSDmitry Fleytman typedef struct PVSCSIRequest {
133881d588aSDmitry Fleytman     SCSIRequest *sreq;
134881d588aSDmitry Fleytman     PVSCSIState *dev;
135881d588aSDmitry Fleytman     uint8_t sense_key;
136881d588aSDmitry Fleytman     uint8_t completed;
137881d588aSDmitry Fleytman     int lun;
138881d588aSDmitry Fleytman     QEMUSGList sgl;
139881d588aSDmitry Fleytman     PVSCSISGState sg;
140881d588aSDmitry Fleytman     struct PVSCSIRingReqDesc req;
141881d588aSDmitry Fleytman     struct PVSCSIRingCmpDesc cmp;
142881d588aSDmitry Fleytman     QTAILQ_ENTRY(PVSCSIRequest) next;
143881d588aSDmitry Fleytman } PVSCSIRequest;
144881d588aSDmitry Fleytman 
145881d588aSDmitry Fleytman /* Integer binary logarithm */
146881d588aSDmitry Fleytman static int
147881d588aSDmitry Fleytman pvscsi_log2(uint32_t input)
148881d588aSDmitry Fleytman {
149881d588aSDmitry Fleytman     int log = 0;
150881d588aSDmitry Fleytman     assert(input > 0);
151881d588aSDmitry Fleytman     while (input >> ++log) {
152881d588aSDmitry Fleytman     }
153881d588aSDmitry Fleytman     return log;
154881d588aSDmitry Fleytman }
155881d588aSDmitry Fleytman 
1563e831b40SPrasad J Pandit static int
157881d588aSDmitry Fleytman pvscsi_ring_init_data(PVSCSIRingInfo *m, PVSCSICmdDescSetupRings *ri)
158881d588aSDmitry Fleytman {
159881d588aSDmitry Fleytman     int i;
160881d588aSDmitry Fleytman     uint32_t txr_len_log2, rxr_len_log2;
161881d588aSDmitry Fleytman     uint32_t req_ring_size, cmp_ring_size;
162881d588aSDmitry Fleytman     m->rs_pa = ri->ringsStatePPN << VMW_PAGE_SHIFT;
163881d588aSDmitry Fleytman 
1643e831b40SPrasad J Pandit     if ((ri->reqRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES)
1653e831b40SPrasad J Pandit         || (ri->cmpRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES)) {
1663e831b40SPrasad J Pandit         return -1;
1673e831b40SPrasad J Pandit     }
168881d588aSDmitry Fleytman     req_ring_size = ri->reqRingNumPages * PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE;
169881d588aSDmitry Fleytman     cmp_ring_size = ri->cmpRingNumPages * PVSCSI_MAX_NUM_CMP_ENTRIES_PER_PAGE;
170881d588aSDmitry Fleytman     txr_len_log2 = pvscsi_log2(req_ring_size - 1);
171881d588aSDmitry Fleytman     rxr_len_log2 = pvscsi_log2(cmp_ring_size - 1);
172881d588aSDmitry Fleytman 
173881d588aSDmitry Fleytman     m->txr_len_mask = MASK(txr_len_log2);
174881d588aSDmitry Fleytman     m->rxr_len_mask = MASK(rxr_len_log2);
175881d588aSDmitry Fleytman 
176881d588aSDmitry Fleytman     m->consumed_ptr = 0;
177881d588aSDmitry Fleytman     m->filled_cmp_ptr = 0;
178881d588aSDmitry Fleytman 
179881d588aSDmitry Fleytman     for (i = 0; i < ri->reqRingNumPages; i++) {
180881d588aSDmitry Fleytman         m->req_ring_pages_pa[i] = ri->reqRingPPNs[i] << VMW_PAGE_SHIFT;
181881d588aSDmitry Fleytman     }
182881d588aSDmitry Fleytman 
183881d588aSDmitry Fleytman     for (i = 0; i < ri->cmpRingNumPages; i++) {
184881d588aSDmitry Fleytman         m->cmp_ring_pages_pa[i] = ri->cmpRingPPNs[i] << VMW_PAGE_SHIFT;
185881d588aSDmitry Fleytman     }
186881d588aSDmitry Fleytman 
1870dc40f28SPaolo Bonzini     RS_SET_FIELD(m, reqProdIdx, 0);
1880dc40f28SPaolo Bonzini     RS_SET_FIELD(m, reqConsIdx, 0);
1890dc40f28SPaolo Bonzini     RS_SET_FIELD(m, reqNumEntriesLog2, txr_len_log2);
190881d588aSDmitry Fleytman 
1910dc40f28SPaolo Bonzini     RS_SET_FIELD(m, cmpProdIdx, 0);
1920dc40f28SPaolo Bonzini     RS_SET_FIELD(m, cmpConsIdx, 0);
1930dc40f28SPaolo Bonzini     RS_SET_FIELD(m, cmpNumEntriesLog2, rxr_len_log2);
194881d588aSDmitry Fleytman 
195881d588aSDmitry Fleytman     trace_pvscsi_ring_init_data(txr_len_log2, rxr_len_log2);
196881d588aSDmitry Fleytman 
197881d588aSDmitry Fleytman     /* Flush ring state page changes */
198881d588aSDmitry Fleytman     smp_wmb();
1993e831b40SPrasad J Pandit 
2003e831b40SPrasad J Pandit     return 0;
201881d588aSDmitry Fleytman }
202881d588aSDmitry Fleytman 
2033e831b40SPrasad J Pandit static int
204881d588aSDmitry Fleytman pvscsi_ring_init_msg(PVSCSIRingInfo *m, PVSCSICmdDescSetupMsgRing *ri)
205881d588aSDmitry Fleytman {
206881d588aSDmitry Fleytman     int i;
207881d588aSDmitry Fleytman     uint32_t len_log2;
208881d588aSDmitry Fleytman     uint32_t ring_size;
209881d588aSDmitry Fleytman 
2103e831b40SPrasad J Pandit     if (ri->numPages > PVSCSI_SETUP_MSG_RING_MAX_NUM_PAGES) {
2113e831b40SPrasad J Pandit         return -1;
2123e831b40SPrasad J Pandit     }
213881d588aSDmitry Fleytman     ring_size = ri->numPages * PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE;
214881d588aSDmitry Fleytman     len_log2 = pvscsi_log2(ring_size - 1);
215881d588aSDmitry Fleytman 
216881d588aSDmitry Fleytman     m->msg_len_mask = MASK(len_log2);
217881d588aSDmitry Fleytman 
218881d588aSDmitry Fleytman     m->filled_msg_ptr = 0;
219881d588aSDmitry Fleytman 
220881d588aSDmitry Fleytman     for (i = 0; i < ri->numPages; i++) {
221881d588aSDmitry Fleytman         m->msg_ring_pages_pa[i] = ri->ringPPNs[i] << VMW_PAGE_SHIFT;
222881d588aSDmitry Fleytman     }
223881d588aSDmitry Fleytman 
2240dc40f28SPaolo Bonzini     RS_SET_FIELD(m, msgProdIdx, 0);
2250dc40f28SPaolo Bonzini     RS_SET_FIELD(m, msgConsIdx, 0);
2260dc40f28SPaolo Bonzini     RS_SET_FIELD(m, msgNumEntriesLog2, len_log2);
227881d588aSDmitry Fleytman 
228881d588aSDmitry Fleytman     trace_pvscsi_ring_init_msg(len_log2);
229881d588aSDmitry Fleytman 
230881d588aSDmitry Fleytman     /* Flush ring state page changes */
231881d588aSDmitry Fleytman     smp_wmb();
2323e831b40SPrasad J Pandit 
2333e831b40SPrasad J Pandit     return 0;
234881d588aSDmitry Fleytman }
235881d588aSDmitry Fleytman 
236881d588aSDmitry Fleytman static void
237881d588aSDmitry Fleytman pvscsi_ring_cleanup(PVSCSIRingInfo *mgr)
238881d588aSDmitry Fleytman {
239881d588aSDmitry Fleytman     mgr->rs_pa = 0;
240881d588aSDmitry Fleytman     mgr->txr_len_mask = 0;
241881d588aSDmitry Fleytman     mgr->rxr_len_mask = 0;
242881d588aSDmitry Fleytman     mgr->msg_len_mask = 0;
243881d588aSDmitry Fleytman     mgr->consumed_ptr = 0;
244881d588aSDmitry Fleytman     mgr->filled_cmp_ptr = 0;
245881d588aSDmitry Fleytman     mgr->filled_msg_ptr = 0;
246881d588aSDmitry Fleytman     memset(mgr->req_ring_pages_pa, 0, sizeof(mgr->req_ring_pages_pa));
247881d588aSDmitry Fleytman     memset(mgr->cmp_ring_pages_pa, 0, sizeof(mgr->cmp_ring_pages_pa));
248881d588aSDmitry Fleytman     memset(mgr->msg_ring_pages_pa, 0, sizeof(mgr->msg_ring_pages_pa));
249881d588aSDmitry Fleytman }
250881d588aSDmitry Fleytman 
251881d588aSDmitry Fleytman static hwaddr
252881d588aSDmitry Fleytman pvscsi_ring_pop_req_descr(PVSCSIRingInfo *mgr)
253881d588aSDmitry Fleytman {
2540dc40f28SPaolo Bonzini     uint32_t ready_ptr = RS_GET_FIELD(mgr, reqProdIdx);
255881d588aSDmitry Fleytman 
256881d588aSDmitry Fleytman     if (ready_ptr != mgr->consumed_ptr) {
257881d588aSDmitry Fleytman         uint32_t next_ready_ptr =
258881d588aSDmitry Fleytman             mgr->consumed_ptr++ & mgr->txr_len_mask;
259881d588aSDmitry Fleytman         uint32_t next_ready_page =
260881d588aSDmitry Fleytman             next_ready_ptr / PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE;
261881d588aSDmitry Fleytman         uint32_t inpage_idx =
262881d588aSDmitry Fleytman             next_ready_ptr % PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE;
263881d588aSDmitry Fleytman 
264881d588aSDmitry Fleytman         return mgr->req_ring_pages_pa[next_ready_page] +
265881d588aSDmitry Fleytman                inpage_idx * sizeof(PVSCSIRingReqDesc);
266881d588aSDmitry Fleytman     } else {
267881d588aSDmitry Fleytman         return 0;
268881d588aSDmitry Fleytman     }
269881d588aSDmitry Fleytman }
270881d588aSDmitry Fleytman 
271881d588aSDmitry Fleytman static void
272881d588aSDmitry Fleytman pvscsi_ring_flush_req(PVSCSIRingInfo *mgr)
273881d588aSDmitry Fleytman {
2740dc40f28SPaolo Bonzini     RS_SET_FIELD(mgr, reqConsIdx, mgr->consumed_ptr);
275881d588aSDmitry Fleytman }
276881d588aSDmitry Fleytman 
277881d588aSDmitry Fleytman static hwaddr
278881d588aSDmitry Fleytman pvscsi_ring_pop_cmp_descr(PVSCSIRingInfo *mgr)
279881d588aSDmitry Fleytman {
280881d588aSDmitry Fleytman     /*
281881d588aSDmitry Fleytman      * According to Linux driver code it explicitly verifies that number
282881d588aSDmitry Fleytman      * of requests being processed by device is less then the size of
283881d588aSDmitry Fleytman      * completion queue, so device may omit completion queue overflow
284881d588aSDmitry Fleytman      * conditions check. We assume that this is true for other (Windows)
285881d588aSDmitry Fleytman      * drivers as well.
286881d588aSDmitry Fleytman      */
287881d588aSDmitry Fleytman 
288881d588aSDmitry Fleytman     uint32_t free_cmp_ptr =
289881d588aSDmitry Fleytman         mgr->filled_cmp_ptr++ & mgr->rxr_len_mask;
290881d588aSDmitry Fleytman     uint32_t free_cmp_page =
291881d588aSDmitry Fleytman         free_cmp_ptr / PVSCSI_MAX_NUM_CMP_ENTRIES_PER_PAGE;
292881d588aSDmitry Fleytman     uint32_t inpage_idx =
293881d588aSDmitry Fleytman         free_cmp_ptr % PVSCSI_MAX_NUM_CMP_ENTRIES_PER_PAGE;
294881d588aSDmitry Fleytman     return mgr->cmp_ring_pages_pa[free_cmp_page] +
295881d588aSDmitry Fleytman            inpage_idx * sizeof(PVSCSIRingCmpDesc);
296881d588aSDmitry Fleytman }
297881d588aSDmitry Fleytman 
298881d588aSDmitry Fleytman static hwaddr
299881d588aSDmitry Fleytman pvscsi_ring_pop_msg_descr(PVSCSIRingInfo *mgr)
300881d588aSDmitry Fleytman {
301881d588aSDmitry Fleytman     uint32_t free_msg_ptr =
302881d588aSDmitry Fleytman         mgr->filled_msg_ptr++ & mgr->msg_len_mask;
303881d588aSDmitry Fleytman     uint32_t free_msg_page =
304881d588aSDmitry Fleytman         free_msg_ptr / PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE;
305881d588aSDmitry Fleytman     uint32_t inpage_idx =
306881d588aSDmitry Fleytman         free_msg_ptr % PVSCSI_MAX_NUM_MSG_ENTRIES_PER_PAGE;
307881d588aSDmitry Fleytman     return mgr->msg_ring_pages_pa[free_msg_page] +
308881d588aSDmitry Fleytman            inpage_idx * sizeof(PVSCSIRingMsgDesc);
309881d588aSDmitry Fleytman }
310881d588aSDmitry Fleytman 
311881d588aSDmitry Fleytman static void
312881d588aSDmitry Fleytman pvscsi_ring_flush_cmp(PVSCSIRingInfo *mgr)
313881d588aSDmitry Fleytman {
314881d588aSDmitry Fleytman     /* Flush descriptor changes */
315881d588aSDmitry Fleytman     smp_wmb();
316881d588aSDmitry Fleytman 
317881d588aSDmitry Fleytman     trace_pvscsi_ring_flush_cmp(mgr->filled_cmp_ptr);
318881d588aSDmitry Fleytman 
3190dc40f28SPaolo Bonzini     RS_SET_FIELD(mgr, cmpProdIdx, mgr->filled_cmp_ptr);
320881d588aSDmitry Fleytman }
321881d588aSDmitry Fleytman 
322881d588aSDmitry Fleytman static bool
323881d588aSDmitry Fleytman pvscsi_ring_msg_has_room(PVSCSIRingInfo *mgr)
324881d588aSDmitry Fleytman {
3250dc40f28SPaolo Bonzini     uint32_t prodIdx = RS_GET_FIELD(mgr, msgProdIdx);
3260dc40f28SPaolo Bonzini     uint32_t consIdx = RS_GET_FIELD(mgr, msgConsIdx);
327881d588aSDmitry Fleytman 
328881d588aSDmitry Fleytman     return (prodIdx - consIdx) < (mgr->msg_len_mask + 1);
329881d588aSDmitry Fleytman }
330881d588aSDmitry Fleytman 
331881d588aSDmitry Fleytman static void
332881d588aSDmitry Fleytman pvscsi_ring_flush_msg(PVSCSIRingInfo *mgr)
333881d588aSDmitry Fleytman {
334881d588aSDmitry Fleytman     /* Flush descriptor changes */
335881d588aSDmitry Fleytman     smp_wmb();
336881d588aSDmitry Fleytman 
337881d588aSDmitry Fleytman     trace_pvscsi_ring_flush_msg(mgr->filled_msg_ptr);
338881d588aSDmitry Fleytman 
3390dc40f28SPaolo Bonzini     RS_SET_FIELD(mgr, msgProdIdx, mgr->filled_msg_ptr);
340881d588aSDmitry Fleytman }
341881d588aSDmitry Fleytman 
342881d588aSDmitry Fleytman static void
343881d588aSDmitry Fleytman pvscsi_reset_state(PVSCSIState *s)
344881d588aSDmitry Fleytman {
345881d588aSDmitry Fleytman     s->curr_cmd = PVSCSI_CMD_FIRST;
346881d588aSDmitry Fleytman     s->curr_cmd_data_cntr = 0;
347881d588aSDmitry Fleytman     s->reg_command_status = PVSCSI_COMMAND_PROCESSING_SUCCEEDED;
348881d588aSDmitry Fleytman     s->reg_interrupt_status = 0;
349881d588aSDmitry Fleytman     pvscsi_ring_cleanup(&s->rings);
350881d588aSDmitry Fleytman     s->rings_info_valid = FALSE;
351881d588aSDmitry Fleytman     s->msg_ring_info_valid = FALSE;
352881d588aSDmitry Fleytman     QTAILQ_INIT(&s->pending_queue);
353881d588aSDmitry Fleytman     QTAILQ_INIT(&s->completion_queue);
354881d588aSDmitry Fleytman }
355881d588aSDmitry Fleytman 
356881d588aSDmitry Fleytman static void
357881d588aSDmitry Fleytman pvscsi_update_irq_status(PVSCSIState *s)
358881d588aSDmitry Fleytman {
359881d588aSDmitry Fleytman     PCIDevice *d = PCI_DEVICE(s);
360881d588aSDmitry Fleytman     bool should_raise = s->reg_interrupt_enabled & s->reg_interrupt_status;
361881d588aSDmitry Fleytman 
362881d588aSDmitry Fleytman     trace_pvscsi_update_irq_level(should_raise, s->reg_interrupt_enabled,
363881d588aSDmitry Fleytman                                   s->reg_interrupt_status);
364881d588aSDmitry Fleytman 
365881d588aSDmitry Fleytman     if (s->msi_used && msi_enabled(d)) {
366881d588aSDmitry Fleytman         if (should_raise) {
367881d588aSDmitry Fleytman             trace_pvscsi_update_irq_msi();
368881d588aSDmitry Fleytman             msi_notify(d, PVSCSI_VECTOR_COMPLETION);
369881d588aSDmitry Fleytman         }
370881d588aSDmitry Fleytman         return;
371881d588aSDmitry Fleytman     }
372881d588aSDmitry Fleytman 
3739e64f8a3SMarcel Apfelbaum     pci_set_irq(d, !!should_raise);
374881d588aSDmitry Fleytman }
375881d588aSDmitry Fleytman 
376881d588aSDmitry Fleytman static void
377881d588aSDmitry Fleytman pvscsi_raise_completion_interrupt(PVSCSIState *s)
378881d588aSDmitry Fleytman {
379881d588aSDmitry Fleytman     s->reg_interrupt_status |= PVSCSI_INTR_CMPL_0;
380881d588aSDmitry Fleytman 
381881d588aSDmitry Fleytman     /* Memory barrier to flush interrupt status register changes*/
382881d588aSDmitry Fleytman     smp_wmb();
383881d588aSDmitry Fleytman 
384881d588aSDmitry Fleytman     pvscsi_update_irq_status(s);
385881d588aSDmitry Fleytman }
386881d588aSDmitry Fleytman 
387881d588aSDmitry Fleytman static void
388881d588aSDmitry Fleytman pvscsi_raise_message_interrupt(PVSCSIState *s)
389881d588aSDmitry Fleytman {
390881d588aSDmitry Fleytman     s->reg_interrupt_status |= PVSCSI_INTR_MSG_0;
391881d588aSDmitry Fleytman 
392881d588aSDmitry Fleytman     /* Memory barrier to flush interrupt status register changes*/
393881d588aSDmitry Fleytman     smp_wmb();
394881d588aSDmitry Fleytman 
395881d588aSDmitry Fleytman     pvscsi_update_irq_status(s);
396881d588aSDmitry Fleytman }
397881d588aSDmitry Fleytman 
398881d588aSDmitry Fleytman static void
399881d588aSDmitry Fleytman pvscsi_cmp_ring_put(PVSCSIState *s, struct PVSCSIRingCmpDesc *cmp_desc)
400881d588aSDmitry Fleytman {
401881d588aSDmitry Fleytman     hwaddr cmp_descr_pa;
402881d588aSDmitry Fleytman 
403881d588aSDmitry Fleytman     cmp_descr_pa = pvscsi_ring_pop_cmp_descr(&s->rings);
404881d588aSDmitry Fleytman     trace_pvscsi_cmp_ring_put(cmp_descr_pa);
405881d588aSDmitry Fleytman     cpu_physical_memory_write(cmp_descr_pa, (void *)cmp_desc,
406881d588aSDmitry Fleytman                               sizeof(*cmp_desc));
407881d588aSDmitry Fleytman }
408881d588aSDmitry Fleytman 
409881d588aSDmitry Fleytman static void
410881d588aSDmitry Fleytman pvscsi_msg_ring_put(PVSCSIState *s, struct PVSCSIRingMsgDesc *msg_desc)
411881d588aSDmitry Fleytman {
412881d588aSDmitry Fleytman     hwaddr msg_descr_pa;
413881d588aSDmitry Fleytman 
414881d588aSDmitry Fleytman     msg_descr_pa = pvscsi_ring_pop_msg_descr(&s->rings);
415881d588aSDmitry Fleytman     trace_pvscsi_msg_ring_put(msg_descr_pa);
416881d588aSDmitry Fleytman     cpu_physical_memory_write(msg_descr_pa, (void *)msg_desc,
417881d588aSDmitry Fleytman                               sizeof(*msg_desc));
418881d588aSDmitry Fleytman }
419881d588aSDmitry Fleytman 
420881d588aSDmitry Fleytman static void
421881d588aSDmitry Fleytman pvscsi_process_completion_queue(void *opaque)
422881d588aSDmitry Fleytman {
423881d588aSDmitry Fleytman     PVSCSIState *s = opaque;
424881d588aSDmitry Fleytman     PVSCSIRequest *pvscsi_req;
425881d588aSDmitry Fleytman     bool has_completed = false;
426881d588aSDmitry Fleytman 
427881d588aSDmitry Fleytman     while (!QTAILQ_EMPTY(&s->completion_queue)) {
428881d588aSDmitry Fleytman         pvscsi_req = QTAILQ_FIRST(&s->completion_queue);
429881d588aSDmitry Fleytman         QTAILQ_REMOVE(&s->completion_queue, pvscsi_req, next);
430881d588aSDmitry Fleytman         pvscsi_cmp_ring_put(s, &pvscsi_req->cmp);
431881d588aSDmitry Fleytman         g_free(pvscsi_req);
432dcb07809SStefan Weil         has_completed = true;
433881d588aSDmitry Fleytman     }
434881d588aSDmitry Fleytman 
435881d588aSDmitry Fleytman     if (has_completed) {
436881d588aSDmitry Fleytman         pvscsi_ring_flush_cmp(&s->rings);
437881d588aSDmitry Fleytman         pvscsi_raise_completion_interrupt(s);
438881d588aSDmitry Fleytman     }
439881d588aSDmitry Fleytman }
440881d588aSDmitry Fleytman 
441881d588aSDmitry Fleytman static void
442881d588aSDmitry Fleytman pvscsi_reset_adapter(PVSCSIState *s)
443881d588aSDmitry Fleytman {
444881d588aSDmitry Fleytman     s->resetting++;
445881d588aSDmitry Fleytman     qbus_reset_all_fn(&s->bus);
446881d588aSDmitry Fleytman     s->resetting--;
447881d588aSDmitry Fleytman     pvscsi_process_completion_queue(s);
448881d588aSDmitry Fleytman     assert(QTAILQ_EMPTY(&s->pending_queue));
449881d588aSDmitry Fleytman     pvscsi_reset_state(s);
450881d588aSDmitry Fleytman }
451881d588aSDmitry Fleytman 
452881d588aSDmitry Fleytman static void
453881d588aSDmitry Fleytman pvscsi_schedule_completion_processing(PVSCSIState *s)
454881d588aSDmitry Fleytman {
455881d588aSDmitry Fleytman     /* Try putting more complete requests on the ring. */
456881d588aSDmitry Fleytman     if (!QTAILQ_EMPTY(&s->completion_queue)) {
457881d588aSDmitry Fleytman         qemu_bh_schedule(s->completion_worker);
458881d588aSDmitry Fleytman     }
459881d588aSDmitry Fleytman }
460881d588aSDmitry Fleytman 
461881d588aSDmitry Fleytman static void
462881d588aSDmitry Fleytman pvscsi_complete_request(PVSCSIState *s, PVSCSIRequest *r)
463881d588aSDmitry Fleytman {
464881d588aSDmitry Fleytman     assert(!r->completed);
465881d588aSDmitry Fleytman 
466881d588aSDmitry Fleytman     trace_pvscsi_complete_request(r->cmp.context, r->cmp.dataLen,
467881d588aSDmitry Fleytman                                   r->sense_key);
468881d588aSDmitry Fleytman     if (r->sreq != NULL) {
469881d588aSDmitry Fleytman         scsi_req_unref(r->sreq);
470881d588aSDmitry Fleytman         r->sreq = NULL;
471881d588aSDmitry Fleytman     }
472881d588aSDmitry Fleytman     r->completed = 1;
473881d588aSDmitry Fleytman     QTAILQ_REMOVE(&s->pending_queue, r, next);
474881d588aSDmitry Fleytman     QTAILQ_INSERT_TAIL(&s->completion_queue, r, next);
475881d588aSDmitry Fleytman     pvscsi_schedule_completion_processing(s);
476881d588aSDmitry Fleytman }
477881d588aSDmitry Fleytman 
478881d588aSDmitry Fleytman static QEMUSGList *pvscsi_get_sg_list(SCSIRequest *r)
479881d588aSDmitry Fleytman {
480881d588aSDmitry Fleytman     PVSCSIRequest *req = r->hba_private;
481881d588aSDmitry Fleytman 
482881d588aSDmitry Fleytman     trace_pvscsi_get_sg_list(req->sgl.nsg, req->sgl.size);
483881d588aSDmitry Fleytman 
484881d588aSDmitry Fleytman     return &req->sgl;
485881d588aSDmitry Fleytman }
486881d588aSDmitry Fleytman 
487881d588aSDmitry Fleytman static void
488881d588aSDmitry Fleytman pvscsi_get_next_sg_elem(PVSCSISGState *sg)
489881d588aSDmitry Fleytman {
490881d588aSDmitry Fleytman     struct PVSCSISGElement elem;
491881d588aSDmitry Fleytman 
492881d588aSDmitry Fleytman     cpu_physical_memory_read(sg->elemAddr, (void *)&elem, sizeof(elem));
493881d588aSDmitry Fleytman     if ((elem.flags & ~PVSCSI_KNOWN_FLAGS) != 0) {
494881d588aSDmitry Fleytman         /*
495881d588aSDmitry Fleytman             * There is PVSCSI_SGE_FLAG_CHAIN_ELEMENT flag described in
496881d588aSDmitry Fleytman             * header file but its value is unknown. This flag requires
497881d588aSDmitry Fleytman             * additional processing, so we put warning here to catch it
498881d588aSDmitry Fleytman             * some day and make proper implementation
499881d588aSDmitry Fleytman             */
500881d588aSDmitry Fleytman         trace_pvscsi_get_next_sg_elem(elem.flags);
501881d588aSDmitry Fleytman     }
502881d588aSDmitry Fleytman 
503881d588aSDmitry Fleytman     sg->elemAddr += sizeof(elem);
504881d588aSDmitry Fleytman     sg->dataAddr = elem.addr;
505881d588aSDmitry Fleytman     sg->resid = elem.length;
506881d588aSDmitry Fleytman }
507881d588aSDmitry Fleytman 
508881d588aSDmitry Fleytman static void
509881d588aSDmitry Fleytman pvscsi_write_sense(PVSCSIRequest *r, uint8_t *sense, int len)
510881d588aSDmitry Fleytman {
511881d588aSDmitry Fleytman     r->cmp.senseLen = MIN(r->req.senseLen, len);
512881d588aSDmitry Fleytman     r->sense_key = sense[(sense[0] & 2) ? 1 : 2];
513881d588aSDmitry Fleytman     cpu_physical_memory_write(r->req.senseAddr, sense, r->cmp.senseLen);
514881d588aSDmitry Fleytman }
515881d588aSDmitry Fleytman 
516881d588aSDmitry Fleytman static void
517881d588aSDmitry Fleytman pvscsi_command_complete(SCSIRequest *req, uint32_t status, size_t resid)
518881d588aSDmitry Fleytman {
519881d588aSDmitry Fleytman     PVSCSIRequest *pvscsi_req = req->hba_private;
520b0f49d13SPrasad Joshi     PVSCSIState *s;
521881d588aSDmitry Fleytman 
522881d588aSDmitry Fleytman     if (!pvscsi_req) {
523881d588aSDmitry Fleytman         trace_pvscsi_command_complete_not_found(req->tag);
524881d588aSDmitry Fleytman         return;
525881d588aSDmitry Fleytman     }
526b0f49d13SPrasad Joshi     s = pvscsi_req->dev;
527881d588aSDmitry Fleytman 
528881d588aSDmitry Fleytman     if (resid) {
529881d588aSDmitry Fleytman         /* Short transfer.  */
530881d588aSDmitry Fleytman         trace_pvscsi_command_complete_data_run();
531881d588aSDmitry Fleytman         pvscsi_req->cmp.hostStatus = BTSTAT_DATARUN;
532881d588aSDmitry Fleytman     }
533881d588aSDmitry Fleytman 
534881d588aSDmitry Fleytman     pvscsi_req->cmp.scsiStatus = status;
535881d588aSDmitry Fleytman     if (pvscsi_req->cmp.scsiStatus == CHECK_CONDITION) {
536881d588aSDmitry Fleytman         uint8_t sense[SCSI_SENSE_BUF_SIZE];
537881d588aSDmitry Fleytman         int sense_len =
538881d588aSDmitry Fleytman             scsi_req_get_sense(pvscsi_req->sreq, sense, sizeof(sense));
539881d588aSDmitry Fleytman 
540881d588aSDmitry Fleytman         trace_pvscsi_command_complete_sense_len(sense_len);
541881d588aSDmitry Fleytman         pvscsi_write_sense(pvscsi_req, sense, sense_len);
542881d588aSDmitry Fleytman     }
543881d588aSDmitry Fleytman     qemu_sglist_destroy(&pvscsi_req->sgl);
544881d588aSDmitry Fleytman     pvscsi_complete_request(s, pvscsi_req);
545881d588aSDmitry Fleytman }
546881d588aSDmitry Fleytman 
547881d588aSDmitry Fleytman static void
548881d588aSDmitry Fleytman pvscsi_send_msg(PVSCSIState *s, SCSIDevice *dev, uint32_t msg_type)
549881d588aSDmitry Fleytman {
550881d588aSDmitry Fleytman     if (s->msg_ring_info_valid && pvscsi_ring_msg_has_room(&s->rings)) {
551881d588aSDmitry Fleytman         PVSCSIMsgDescDevStatusChanged msg = {0};
552881d588aSDmitry Fleytman 
553881d588aSDmitry Fleytman         msg.type = msg_type;
554881d588aSDmitry Fleytman         msg.bus = dev->channel;
555881d588aSDmitry Fleytman         msg.target = dev->id;
556881d588aSDmitry Fleytman         msg.lun[1] = dev->lun;
557881d588aSDmitry Fleytman 
558881d588aSDmitry Fleytman         pvscsi_msg_ring_put(s, (PVSCSIRingMsgDesc *)&msg);
559881d588aSDmitry Fleytman         pvscsi_ring_flush_msg(&s->rings);
560881d588aSDmitry Fleytman         pvscsi_raise_message_interrupt(s);
561881d588aSDmitry Fleytman     }
562881d588aSDmitry Fleytman }
563881d588aSDmitry Fleytman 
564881d588aSDmitry Fleytman static void
56591c8daadSIgor Mammedov pvscsi_hotplug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp)
566881d588aSDmitry Fleytman {
56791c8daadSIgor Mammedov     PVSCSIState *s = PVSCSI(hotplug_dev);
56891c8daadSIgor Mammedov 
56991c8daadSIgor Mammedov     pvscsi_send_msg(s, SCSI_DEVICE(dev), PVSCSI_MSG_DEV_ADDED);
570881d588aSDmitry Fleytman }
571881d588aSDmitry Fleytman 
572881d588aSDmitry Fleytman static void
57391c8daadSIgor Mammedov pvscsi_hot_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp)
574881d588aSDmitry Fleytman {
57591c8daadSIgor Mammedov     PVSCSIState *s = PVSCSI(hotplug_dev);
57691c8daadSIgor Mammedov 
57791c8daadSIgor Mammedov     pvscsi_send_msg(s, SCSI_DEVICE(dev), PVSCSI_MSG_DEV_REMOVED);
57891c8daadSIgor Mammedov     qdev_simple_device_unplug_cb(hotplug_dev, dev, errp);
579881d588aSDmitry Fleytman }
580881d588aSDmitry Fleytman 
581881d588aSDmitry Fleytman static void
582881d588aSDmitry Fleytman pvscsi_request_cancelled(SCSIRequest *req)
583881d588aSDmitry Fleytman {
584881d588aSDmitry Fleytman     PVSCSIRequest *pvscsi_req = req->hba_private;
585881d588aSDmitry Fleytman     PVSCSIState *s = pvscsi_req->dev;
586881d588aSDmitry Fleytman 
587881d588aSDmitry Fleytman     if (pvscsi_req->completed) {
588881d588aSDmitry Fleytman         return;
589881d588aSDmitry Fleytman     }
590881d588aSDmitry Fleytman 
591881d588aSDmitry Fleytman    if (pvscsi_req->dev->resetting) {
592881d588aSDmitry Fleytman        pvscsi_req->cmp.hostStatus = BTSTAT_BUSRESET;
593881d588aSDmitry Fleytman     } else {
594881d588aSDmitry Fleytman        pvscsi_req->cmp.hostStatus = BTSTAT_ABORTQUEUE;
595881d588aSDmitry Fleytman     }
596881d588aSDmitry Fleytman 
597881d588aSDmitry Fleytman     pvscsi_complete_request(s, pvscsi_req);
598881d588aSDmitry Fleytman }
599881d588aSDmitry Fleytman 
600881d588aSDmitry Fleytman static SCSIDevice*
601881d588aSDmitry Fleytman pvscsi_device_find(PVSCSIState *s, int channel, int target,
602881d588aSDmitry Fleytman                    uint8_t *requested_lun, uint8_t *target_lun)
603881d588aSDmitry Fleytman {
604881d588aSDmitry Fleytman     if (requested_lun[0] || requested_lun[2] || requested_lun[3] ||
605881d588aSDmitry Fleytman         requested_lun[4] || requested_lun[5] || requested_lun[6] ||
606881d588aSDmitry Fleytman         requested_lun[7] || (target > PVSCSI_MAX_DEVS)) {
607881d588aSDmitry Fleytman         return NULL;
608881d588aSDmitry Fleytman     } else {
609881d588aSDmitry Fleytman         *target_lun = requested_lun[1];
610881d588aSDmitry Fleytman         return scsi_device_find(&s->bus, channel, target, *target_lun);
611881d588aSDmitry Fleytman     }
612881d588aSDmitry Fleytman }
613881d588aSDmitry Fleytman 
614881d588aSDmitry Fleytman static PVSCSIRequest *
615881d588aSDmitry Fleytman pvscsi_queue_pending_descriptor(PVSCSIState *s, SCSIDevice **d,
616881d588aSDmitry Fleytman                                 struct PVSCSIRingReqDesc *descr)
617881d588aSDmitry Fleytman {
618881d588aSDmitry Fleytman     PVSCSIRequest *pvscsi_req;
619881d588aSDmitry Fleytman     uint8_t lun;
620881d588aSDmitry Fleytman 
621881d588aSDmitry Fleytman     pvscsi_req = g_malloc0(sizeof(*pvscsi_req));
622881d588aSDmitry Fleytman     pvscsi_req->dev = s;
623881d588aSDmitry Fleytman     pvscsi_req->req = *descr;
624881d588aSDmitry Fleytman     pvscsi_req->cmp.context = pvscsi_req->req.context;
625881d588aSDmitry Fleytman     QTAILQ_INSERT_TAIL(&s->pending_queue, pvscsi_req, next);
626881d588aSDmitry Fleytman 
627881d588aSDmitry Fleytman     *d = pvscsi_device_find(s, descr->bus, descr->target, descr->lun, &lun);
628881d588aSDmitry Fleytman     if (*d) {
629881d588aSDmitry Fleytman         pvscsi_req->lun = lun;
630881d588aSDmitry Fleytman     }
631881d588aSDmitry Fleytman 
632881d588aSDmitry Fleytman     return pvscsi_req;
633881d588aSDmitry Fleytman }
634881d588aSDmitry Fleytman 
635881d588aSDmitry Fleytman static void
636881d588aSDmitry Fleytman pvscsi_convert_sglist(PVSCSIRequest *r)
637881d588aSDmitry Fleytman {
638881d588aSDmitry Fleytman     int chunk_size;
639881d588aSDmitry Fleytman     uint64_t data_length = r->req.dataLen;
640881d588aSDmitry Fleytman     PVSCSISGState sg = r->sg;
641881d588aSDmitry Fleytman     while (data_length) {
642881d588aSDmitry Fleytman         while (!sg.resid) {
643881d588aSDmitry Fleytman             pvscsi_get_next_sg_elem(&sg);
644881d588aSDmitry Fleytman             trace_pvscsi_convert_sglist(r->req.context, r->sg.dataAddr,
645881d588aSDmitry Fleytman                                         r->sg.resid);
646881d588aSDmitry Fleytman         }
647881d588aSDmitry Fleytman         assert(data_length > 0);
648881d588aSDmitry Fleytman         chunk_size = MIN((unsigned) data_length, sg.resid);
649881d588aSDmitry Fleytman         if (chunk_size) {
650881d588aSDmitry Fleytman             qemu_sglist_add(&r->sgl, sg.dataAddr, chunk_size);
651881d588aSDmitry Fleytman         }
652881d588aSDmitry Fleytman 
653881d588aSDmitry Fleytman         sg.dataAddr += chunk_size;
654881d588aSDmitry Fleytman         data_length -= chunk_size;
655881d588aSDmitry Fleytman         sg.resid -= chunk_size;
656881d588aSDmitry Fleytman     }
657881d588aSDmitry Fleytman }
658881d588aSDmitry Fleytman 
659881d588aSDmitry Fleytman static void
660881d588aSDmitry Fleytman pvscsi_build_sglist(PVSCSIState *s, PVSCSIRequest *r)
661881d588aSDmitry Fleytman {
662881d588aSDmitry Fleytman     PCIDevice *d = PCI_DEVICE(s);
663881d588aSDmitry Fleytman 
664df32fd1cSPaolo Bonzini     pci_dma_sglist_init(&r->sgl, d, 1);
665881d588aSDmitry Fleytman     if (r->req.flags & PVSCSI_FLAG_CMD_WITH_SG_LIST) {
666881d588aSDmitry Fleytman         pvscsi_convert_sglist(r);
667881d588aSDmitry Fleytman     } else {
668881d588aSDmitry Fleytman         qemu_sglist_add(&r->sgl, r->req.dataAddr, r->req.dataLen);
669881d588aSDmitry Fleytman     }
670881d588aSDmitry Fleytman }
671881d588aSDmitry Fleytman 
672881d588aSDmitry Fleytman static void
673881d588aSDmitry Fleytman pvscsi_process_request_descriptor(PVSCSIState *s,
674881d588aSDmitry Fleytman                                   struct PVSCSIRingReqDesc *descr)
675881d588aSDmitry Fleytman {
676881d588aSDmitry Fleytman     SCSIDevice *d;
677881d588aSDmitry Fleytman     PVSCSIRequest *r = pvscsi_queue_pending_descriptor(s, &d, descr);
678881d588aSDmitry Fleytman     int64_t n;
679881d588aSDmitry Fleytman 
680881d588aSDmitry Fleytman     trace_pvscsi_process_req_descr(descr->cdb[0], descr->context);
681881d588aSDmitry Fleytman 
682881d588aSDmitry Fleytman     if (!d) {
683881d588aSDmitry Fleytman         r->cmp.hostStatus = BTSTAT_SELTIMEO;
684881d588aSDmitry Fleytman         trace_pvscsi_process_req_descr_unknown_device();
685881d588aSDmitry Fleytman         pvscsi_complete_request(s, r);
686881d588aSDmitry Fleytman         return;
687881d588aSDmitry Fleytman     }
688881d588aSDmitry Fleytman 
689881d588aSDmitry Fleytman     if (descr->flags & PVSCSI_FLAG_CMD_WITH_SG_LIST) {
690881d588aSDmitry Fleytman         r->sg.elemAddr = descr->dataAddr;
691881d588aSDmitry Fleytman     }
692881d588aSDmitry Fleytman 
693881d588aSDmitry Fleytman     r->sreq = scsi_req_new(d, descr->context, r->lun, descr->cdb, r);
694881d588aSDmitry Fleytman     if (r->sreq->cmd.mode == SCSI_XFER_FROM_DEV &&
695881d588aSDmitry Fleytman         (descr->flags & PVSCSI_FLAG_CMD_DIR_TODEVICE)) {
696881d588aSDmitry Fleytman         r->cmp.hostStatus = BTSTAT_BADMSG;
697881d588aSDmitry Fleytman         trace_pvscsi_process_req_descr_invalid_dir();
698881d588aSDmitry Fleytman         scsi_req_cancel(r->sreq);
699881d588aSDmitry Fleytman         return;
700881d588aSDmitry Fleytman     }
701881d588aSDmitry Fleytman     if (r->sreq->cmd.mode == SCSI_XFER_TO_DEV &&
702881d588aSDmitry Fleytman         (descr->flags & PVSCSI_FLAG_CMD_DIR_TOHOST)) {
703881d588aSDmitry Fleytman         r->cmp.hostStatus = BTSTAT_BADMSG;
704881d588aSDmitry Fleytman         trace_pvscsi_process_req_descr_invalid_dir();
705881d588aSDmitry Fleytman         scsi_req_cancel(r->sreq);
706881d588aSDmitry Fleytman         return;
707881d588aSDmitry Fleytman     }
708881d588aSDmitry Fleytman 
709881d588aSDmitry Fleytman     pvscsi_build_sglist(s, r);
710881d588aSDmitry Fleytman     n = scsi_req_enqueue(r->sreq);
711881d588aSDmitry Fleytman 
712881d588aSDmitry Fleytman     if (n) {
713881d588aSDmitry Fleytman         scsi_req_continue(r->sreq);
714881d588aSDmitry Fleytman     }
715881d588aSDmitry Fleytman }
716881d588aSDmitry Fleytman 
717881d588aSDmitry Fleytman static void
718881d588aSDmitry Fleytman pvscsi_process_io(PVSCSIState *s)
719881d588aSDmitry Fleytman {
720881d588aSDmitry Fleytman     PVSCSIRingReqDesc descr;
721881d588aSDmitry Fleytman     hwaddr next_descr_pa;
722881d588aSDmitry Fleytman 
723881d588aSDmitry Fleytman     assert(s->rings_info_valid);
724881d588aSDmitry Fleytman     while ((next_descr_pa = pvscsi_ring_pop_req_descr(&s->rings)) != 0) {
725881d588aSDmitry Fleytman 
726881d588aSDmitry Fleytman         /* Only read after production index verification */
727881d588aSDmitry Fleytman         smp_rmb();
728881d588aSDmitry Fleytman 
729881d588aSDmitry Fleytman         trace_pvscsi_process_io(next_descr_pa);
730881d588aSDmitry Fleytman         cpu_physical_memory_read(next_descr_pa, &descr, sizeof(descr));
731881d588aSDmitry Fleytman         pvscsi_process_request_descriptor(s, &descr);
732881d588aSDmitry Fleytman     }
733881d588aSDmitry Fleytman 
734881d588aSDmitry Fleytman     pvscsi_ring_flush_req(&s->rings);
735881d588aSDmitry Fleytman }
736881d588aSDmitry Fleytman 
737881d588aSDmitry Fleytman static void
738881d588aSDmitry Fleytman pvscsi_dbg_dump_tx_rings_config(PVSCSICmdDescSetupRings *rc)
739881d588aSDmitry Fleytman {
740881d588aSDmitry Fleytman     int i;
741881d588aSDmitry Fleytman     trace_pvscsi_tx_rings_ppn("Rings State", rc->ringsStatePPN);
742881d588aSDmitry Fleytman 
743881d588aSDmitry Fleytman     trace_pvscsi_tx_rings_num_pages("Request Ring", rc->reqRingNumPages);
744881d588aSDmitry Fleytman     for (i = 0; i < rc->reqRingNumPages; i++) {
745881d588aSDmitry Fleytman         trace_pvscsi_tx_rings_ppn("Request Ring", rc->reqRingPPNs[i]);
746881d588aSDmitry Fleytman     }
747881d588aSDmitry Fleytman 
748881d588aSDmitry Fleytman     trace_pvscsi_tx_rings_num_pages("Confirm Ring", rc->cmpRingNumPages);
749881d588aSDmitry Fleytman     for (i = 0; i < rc->cmpRingNumPages; i++) {
750881d588aSDmitry Fleytman         trace_pvscsi_tx_rings_ppn("Confirm Ring", rc->reqRingPPNs[i]);
751881d588aSDmitry Fleytman     }
752881d588aSDmitry Fleytman }
753881d588aSDmitry Fleytman 
754881d588aSDmitry Fleytman static uint64_t
755881d588aSDmitry Fleytman pvscsi_on_cmd_config(PVSCSIState *s)
756881d588aSDmitry Fleytman {
757881d588aSDmitry Fleytman     trace_pvscsi_on_cmd_noimpl("PVSCSI_CMD_CONFIG");
758881d588aSDmitry Fleytman     return PVSCSI_COMMAND_PROCESSING_FAILED;
759881d588aSDmitry Fleytman }
760881d588aSDmitry Fleytman 
761881d588aSDmitry Fleytman static uint64_t
762881d588aSDmitry Fleytman pvscsi_on_cmd_unplug(PVSCSIState *s)
763881d588aSDmitry Fleytman {
764881d588aSDmitry Fleytman     trace_pvscsi_on_cmd_noimpl("PVSCSI_CMD_DEVICE_UNPLUG");
765881d588aSDmitry Fleytman     return PVSCSI_COMMAND_PROCESSING_FAILED;
766881d588aSDmitry Fleytman }
767881d588aSDmitry Fleytman 
768881d588aSDmitry Fleytman static uint64_t
769881d588aSDmitry Fleytman pvscsi_on_issue_scsi(PVSCSIState *s)
770881d588aSDmitry Fleytman {
771881d588aSDmitry Fleytman     trace_pvscsi_on_cmd_noimpl("PVSCSI_CMD_ISSUE_SCSI");
772881d588aSDmitry Fleytman     return PVSCSI_COMMAND_PROCESSING_FAILED;
773881d588aSDmitry Fleytman }
774881d588aSDmitry Fleytman 
775881d588aSDmitry Fleytman static uint64_t
776881d588aSDmitry Fleytman pvscsi_on_cmd_setup_rings(PVSCSIState *s)
777881d588aSDmitry Fleytman {
778881d588aSDmitry Fleytman     PVSCSICmdDescSetupRings *rc =
779881d588aSDmitry Fleytman         (PVSCSICmdDescSetupRings *) s->curr_cmd_data;
780881d588aSDmitry Fleytman 
781881d588aSDmitry Fleytman     trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_SETUP_RINGS");
782881d588aSDmitry Fleytman 
783881d588aSDmitry Fleytman     pvscsi_dbg_dump_tx_rings_config(rc);
7843e831b40SPrasad J Pandit     if (pvscsi_ring_init_data(&s->rings, rc) < 0) {
7853e831b40SPrasad J Pandit         return PVSCSI_COMMAND_PROCESSING_FAILED;
7863e831b40SPrasad J Pandit     }
7873e831b40SPrasad J Pandit 
788881d588aSDmitry Fleytman     s->rings_info_valid = TRUE;
789881d588aSDmitry Fleytman     return PVSCSI_COMMAND_PROCESSING_SUCCEEDED;
790881d588aSDmitry Fleytman }
791881d588aSDmitry Fleytman 
792881d588aSDmitry Fleytman static uint64_t
793881d588aSDmitry Fleytman pvscsi_on_cmd_abort(PVSCSIState *s)
794881d588aSDmitry Fleytman {
795881d588aSDmitry Fleytman     PVSCSICmdDescAbortCmd *cmd = (PVSCSICmdDescAbortCmd *) s->curr_cmd_data;
796881d588aSDmitry Fleytman     PVSCSIRequest *r, *next;
797881d588aSDmitry Fleytman 
798881d588aSDmitry Fleytman     trace_pvscsi_on_cmd_abort(cmd->context, cmd->target);
799881d588aSDmitry Fleytman 
800881d588aSDmitry Fleytman     QTAILQ_FOREACH_SAFE(r, &s->pending_queue, next, next) {
801881d588aSDmitry Fleytman         if (r->req.context == cmd->context) {
802881d588aSDmitry Fleytman             break;
803881d588aSDmitry Fleytman         }
804881d588aSDmitry Fleytman     }
805881d588aSDmitry Fleytman     if (r) {
806881d588aSDmitry Fleytman         assert(!r->completed);
807881d588aSDmitry Fleytman         r->cmp.hostStatus = BTSTAT_ABORTQUEUE;
808881d588aSDmitry Fleytman         scsi_req_cancel(r->sreq);
809881d588aSDmitry Fleytman     }
810881d588aSDmitry Fleytman 
811881d588aSDmitry Fleytman     return PVSCSI_COMMAND_PROCESSING_SUCCEEDED;
812881d588aSDmitry Fleytman }
813881d588aSDmitry Fleytman 
814881d588aSDmitry Fleytman static uint64_t
815881d588aSDmitry Fleytman pvscsi_on_cmd_unknown(PVSCSIState *s)
816881d588aSDmitry Fleytman {
817881d588aSDmitry Fleytman     trace_pvscsi_on_cmd_unknown_data(s->curr_cmd_data[0]);
818881d588aSDmitry Fleytman     return PVSCSI_COMMAND_PROCESSING_FAILED;
819881d588aSDmitry Fleytman }
820881d588aSDmitry Fleytman 
821881d588aSDmitry Fleytman static uint64_t
822881d588aSDmitry Fleytman pvscsi_on_cmd_reset_device(PVSCSIState *s)
823881d588aSDmitry Fleytman {
824881d588aSDmitry Fleytman     uint8_t target_lun = 0;
825881d588aSDmitry Fleytman     struct PVSCSICmdDescResetDevice *cmd =
826881d588aSDmitry Fleytman         (struct PVSCSICmdDescResetDevice *) s->curr_cmd_data;
827881d588aSDmitry Fleytman     SCSIDevice *sdev;
828881d588aSDmitry Fleytman 
829881d588aSDmitry Fleytman     sdev = pvscsi_device_find(s, 0, cmd->target, cmd->lun, &target_lun);
830881d588aSDmitry Fleytman 
831881d588aSDmitry Fleytman     trace_pvscsi_on_cmd_reset_dev(cmd->target, (int) target_lun, sdev);
832881d588aSDmitry Fleytman 
833881d588aSDmitry Fleytman     if (sdev != NULL) {
834881d588aSDmitry Fleytman         s->resetting++;
835881d588aSDmitry Fleytman         device_reset(&sdev->qdev);
836881d588aSDmitry Fleytman         s->resetting--;
837881d588aSDmitry Fleytman         return PVSCSI_COMMAND_PROCESSING_SUCCEEDED;
838881d588aSDmitry Fleytman     }
839881d588aSDmitry Fleytman 
840881d588aSDmitry Fleytman     return PVSCSI_COMMAND_PROCESSING_FAILED;
841881d588aSDmitry Fleytman }
842881d588aSDmitry Fleytman 
843881d588aSDmitry Fleytman static uint64_t
844881d588aSDmitry Fleytman pvscsi_on_cmd_reset_bus(PVSCSIState *s)
845881d588aSDmitry Fleytman {
846881d588aSDmitry Fleytman     trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_RESET_BUS");
847881d588aSDmitry Fleytman 
848881d588aSDmitry Fleytman     s->resetting++;
849881d588aSDmitry Fleytman     qbus_reset_all_fn(&s->bus);
850881d588aSDmitry Fleytman     s->resetting--;
851881d588aSDmitry Fleytman     return PVSCSI_COMMAND_PROCESSING_SUCCEEDED;
852881d588aSDmitry Fleytman }
853881d588aSDmitry Fleytman 
854881d588aSDmitry Fleytman static uint64_t
855881d588aSDmitry Fleytman pvscsi_on_cmd_setup_msg_ring(PVSCSIState *s)
856881d588aSDmitry Fleytman {
857881d588aSDmitry Fleytman     PVSCSICmdDescSetupMsgRing *rc =
858881d588aSDmitry Fleytman         (PVSCSICmdDescSetupMsgRing *) s->curr_cmd_data;
859881d588aSDmitry Fleytman 
860881d588aSDmitry Fleytman     trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_SETUP_MSG_RING");
861881d588aSDmitry Fleytman 
862881d588aSDmitry Fleytman     if (!s->use_msg) {
863881d588aSDmitry Fleytman         return PVSCSI_COMMAND_PROCESSING_FAILED;
864881d588aSDmitry Fleytman     }
865881d588aSDmitry Fleytman 
866881d588aSDmitry Fleytman     if (s->rings_info_valid) {
8673e831b40SPrasad J Pandit         if (pvscsi_ring_init_msg(&s->rings, rc) < 0) {
8683e831b40SPrasad J Pandit             return PVSCSI_COMMAND_PROCESSING_FAILED;
8693e831b40SPrasad J Pandit         }
870881d588aSDmitry Fleytman         s->msg_ring_info_valid = TRUE;
871881d588aSDmitry Fleytman     }
872881d588aSDmitry Fleytman     return sizeof(PVSCSICmdDescSetupMsgRing) / sizeof(uint32_t);
873881d588aSDmitry Fleytman }
874881d588aSDmitry Fleytman 
875881d588aSDmitry Fleytman static uint64_t
876881d588aSDmitry Fleytman pvscsi_on_cmd_adapter_reset(PVSCSIState *s)
877881d588aSDmitry Fleytman {
878881d588aSDmitry Fleytman     trace_pvscsi_on_cmd_arrived("PVSCSI_CMD_ADAPTER_RESET");
879881d588aSDmitry Fleytman 
880881d588aSDmitry Fleytman     pvscsi_reset_adapter(s);
881881d588aSDmitry Fleytman     return PVSCSI_COMMAND_PROCESSING_SUCCEEDED;
882881d588aSDmitry Fleytman }
883881d588aSDmitry Fleytman 
884881d588aSDmitry Fleytman static const struct {
885881d588aSDmitry Fleytman     int       data_size;
886881d588aSDmitry Fleytman     uint64_t  (*handler_fn)(PVSCSIState *s);
887881d588aSDmitry Fleytman } pvscsi_commands[] = {
888881d588aSDmitry Fleytman     [PVSCSI_CMD_FIRST] = {
889881d588aSDmitry Fleytman         .data_size = 0,
890881d588aSDmitry Fleytman         .handler_fn = pvscsi_on_cmd_unknown,
891881d588aSDmitry Fleytman     },
892881d588aSDmitry Fleytman 
893881d588aSDmitry Fleytman     /* Not implemented, data size defined based on what arrives on windows */
894881d588aSDmitry Fleytman     [PVSCSI_CMD_CONFIG] = {
895881d588aSDmitry Fleytman         .data_size = 6 * sizeof(uint32_t),
896881d588aSDmitry Fleytman         .handler_fn = pvscsi_on_cmd_config,
897881d588aSDmitry Fleytman     },
898881d588aSDmitry Fleytman 
899881d588aSDmitry Fleytman     /* Command not implemented, data size is unknown */
900881d588aSDmitry Fleytman     [PVSCSI_CMD_ISSUE_SCSI] = {
901881d588aSDmitry Fleytman         .data_size = 0,
902881d588aSDmitry Fleytman         .handler_fn = pvscsi_on_issue_scsi,
903881d588aSDmitry Fleytman     },
904881d588aSDmitry Fleytman 
905881d588aSDmitry Fleytman     /* Command not implemented, data size is unknown */
906881d588aSDmitry Fleytman     [PVSCSI_CMD_DEVICE_UNPLUG] = {
907881d588aSDmitry Fleytman         .data_size = 0,
908881d588aSDmitry Fleytman         .handler_fn = pvscsi_on_cmd_unplug,
909881d588aSDmitry Fleytman     },
910881d588aSDmitry Fleytman 
911881d588aSDmitry Fleytman     [PVSCSI_CMD_SETUP_RINGS] = {
912881d588aSDmitry Fleytman         .data_size = sizeof(PVSCSICmdDescSetupRings),
913881d588aSDmitry Fleytman         .handler_fn = pvscsi_on_cmd_setup_rings,
914881d588aSDmitry Fleytman     },
915881d588aSDmitry Fleytman 
916881d588aSDmitry Fleytman     [PVSCSI_CMD_RESET_DEVICE] = {
917881d588aSDmitry Fleytman         .data_size = sizeof(struct PVSCSICmdDescResetDevice),
918881d588aSDmitry Fleytman         .handler_fn = pvscsi_on_cmd_reset_device,
919881d588aSDmitry Fleytman     },
920881d588aSDmitry Fleytman 
921881d588aSDmitry Fleytman     [PVSCSI_CMD_RESET_BUS] = {
922881d588aSDmitry Fleytman         .data_size = 0,
923881d588aSDmitry Fleytman         .handler_fn = pvscsi_on_cmd_reset_bus,
924881d588aSDmitry Fleytman     },
925881d588aSDmitry Fleytman 
926881d588aSDmitry Fleytman     [PVSCSI_CMD_SETUP_MSG_RING] = {
927881d588aSDmitry Fleytman         .data_size = sizeof(PVSCSICmdDescSetupMsgRing),
928881d588aSDmitry Fleytman         .handler_fn = pvscsi_on_cmd_setup_msg_ring,
929881d588aSDmitry Fleytman     },
930881d588aSDmitry Fleytman 
931881d588aSDmitry Fleytman     [PVSCSI_CMD_ADAPTER_RESET] = {
932881d588aSDmitry Fleytman         .data_size = 0,
933881d588aSDmitry Fleytman         .handler_fn = pvscsi_on_cmd_adapter_reset,
934881d588aSDmitry Fleytman     },
935881d588aSDmitry Fleytman 
936881d588aSDmitry Fleytman     [PVSCSI_CMD_ABORT_CMD] = {
937881d588aSDmitry Fleytman         .data_size = sizeof(struct PVSCSICmdDescAbortCmd),
938881d588aSDmitry Fleytman         .handler_fn = pvscsi_on_cmd_abort,
939881d588aSDmitry Fleytman     },
940881d588aSDmitry Fleytman };
941881d588aSDmitry Fleytman 
942881d588aSDmitry Fleytman static void
943881d588aSDmitry Fleytman pvscsi_do_command_processing(PVSCSIState *s)
944881d588aSDmitry Fleytman {
945881d588aSDmitry Fleytman     size_t bytes_arrived = s->curr_cmd_data_cntr * sizeof(uint32_t);
946881d588aSDmitry Fleytman 
947881d588aSDmitry Fleytman     assert(s->curr_cmd < PVSCSI_CMD_LAST);
948881d588aSDmitry Fleytman     if (bytes_arrived >= pvscsi_commands[s->curr_cmd].data_size) {
949881d588aSDmitry Fleytman         s->reg_command_status = pvscsi_commands[s->curr_cmd].handler_fn(s);
950881d588aSDmitry Fleytman         s->curr_cmd = PVSCSI_CMD_FIRST;
951881d588aSDmitry Fleytman         s->curr_cmd_data_cntr   = 0;
952881d588aSDmitry Fleytman     }
953881d588aSDmitry Fleytman }
954881d588aSDmitry Fleytman 
955881d588aSDmitry Fleytman static void
956881d588aSDmitry Fleytman pvscsi_on_command_data(PVSCSIState *s, uint32_t value)
957881d588aSDmitry Fleytman {
958881d588aSDmitry Fleytman     size_t bytes_arrived = s->curr_cmd_data_cntr * sizeof(uint32_t);
959881d588aSDmitry Fleytman 
960881d588aSDmitry Fleytman     assert(bytes_arrived < sizeof(s->curr_cmd_data));
961881d588aSDmitry Fleytman     s->curr_cmd_data[s->curr_cmd_data_cntr++] = value;
962881d588aSDmitry Fleytman 
963881d588aSDmitry Fleytman     pvscsi_do_command_processing(s);
964881d588aSDmitry Fleytman }
965881d588aSDmitry Fleytman 
966881d588aSDmitry Fleytman static void
967881d588aSDmitry Fleytman pvscsi_on_command(PVSCSIState *s, uint64_t cmd_id)
968881d588aSDmitry Fleytman {
969881d588aSDmitry Fleytman     if ((cmd_id > PVSCSI_CMD_FIRST) && (cmd_id < PVSCSI_CMD_LAST)) {
970881d588aSDmitry Fleytman         s->curr_cmd = cmd_id;
971881d588aSDmitry Fleytman     } else {
972881d588aSDmitry Fleytman         s->curr_cmd = PVSCSI_CMD_FIRST;
973881d588aSDmitry Fleytman         trace_pvscsi_on_cmd_unknown(cmd_id);
974881d588aSDmitry Fleytman     }
975881d588aSDmitry Fleytman 
976881d588aSDmitry Fleytman     s->curr_cmd_data_cntr = 0;
977881d588aSDmitry Fleytman     s->reg_command_status = PVSCSI_COMMAND_NOT_ENOUGH_DATA;
978881d588aSDmitry Fleytman 
979881d588aSDmitry Fleytman     pvscsi_do_command_processing(s);
980881d588aSDmitry Fleytman }
981881d588aSDmitry Fleytman 
982881d588aSDmitry Fleytman static void
983881d588aSDmitry Fleytman pvscsi_io_write(void *opaque, hwaddr addr,
984881d588aSDmitry Fleytman                 uint64_t val, unsigned size)
985881d588aSDmitry Fleytman {
986881d588aSDmitry Fleytman     PVSCSIState *s = opaque;
987881d588aSDmitry Fleytman 
988881d588aSDmitry Fleytman     switch (addr) {
989881d588aSDmitry Fleytman     case PVSCSI_REG_OFFSET_COMMAND:
990881d588aSDmitry Fleytman         pvscsi_on_command(s, val);
991881d588aSDmitry Fleytman         break;
992881d588aSDmitry Fleytman 
993881d588aSDmitry Fleytman     case PVSCSI_REG_OFFSET_COMMAND_DATA:
994881d588aSDmitry Fleytman         pvscsi_on_command_data(s, (uint32_t) val);
995881d588aSDmitry Fleytman         break;
996881d588aSDmitry Fleytman 
997881d588aSDmitry Fleytman     case PVSCSI_REG_OFFSET_INTR_STATUS:
998881d588aSDmitry Fleytman         trace_pvscsi_io_write("PVSCSI_REG_OFFSET_INTR_STATUS", val);
999881d588aSDmitry Fleytman         s->reg_interrupt_status &= ~val;
1000881d588aSDmitry Fleytman         pvscsi_update_irq_status(s);
1001881d588aSDmitry Fleytman         pvscsi_schedule_completion_processing(s);
1002881d588aSDmitry Fleytman         break;
1003881d588aSDmitry Fleytman 
1004881d588aSDmitry Fleytman     case PVSCSI_REG_OFFSET_INTR_MASK:
1005881d588aSDmitry Fleytman         trace_pvscsi_io_write("PVSCSI_REG_OFFSET_INTR_MASK", val);
1006881d588aSDmitry Fleytman         s->reg_interrupt_enabled = val;
1007881d588aSDmitry Fleytman         pvscsi_update_irq_status(s);
1008881d588aSDmitry Fleytman         break;
1009881d588aSDmitry Fleytman 
1010881d588aSDmitry Fleytman     case PVSCSI_REG_OFFSET_KICK_NON_RW_IO:
1011881d588aSDmitry Fleytman         trace_pvscsi_io_write("PVSCSI_REG_OFFSET_KICK_NON_RW_IO", val);
1012881d588aSDmitry Fleytman         pvscsi_process_io(s);
1013881d588aSDmitry Fleytman         break;
1014881d588aSDmitry Fleytman 
1015881d588aSDmitry Fleytman     case PVSCSI_REG_OFFSET_KICK_RW_IO:
1016881d588aSDmitry Fleytman         trace_pvscsi_io_write("PVSCSI_REG_OFFSET_KICK_RW_IO", val);
1017881d588aSDmitry Fleytman         pvscsi_process_io(s);
1018881d588aSDmitry Fleytman         break;
1019881d588aSDmitry Fleytman 
1020881d588aSDmitry Fleytman     case PVSCSI_REG_OFFSET_DEBUG:
1021881d588aSDmitry Fleytman         trace_pvscsi_io_write("PVSCSI_REG_OFFSET_DEBUG", val);
1022881d588aSDmitry Fleytman         break;
1023881d588aSDmitry Fleytman 
1024881d588aSDmitry Fleytman     default:
1025881d588aSDmitry Fleytman         trace_pvscsi_io_write_unknown(addr, size, val);
1026881d588aSDmitry Fleytman         break;
1027881d588aSDmitry Fleytman     }
1028881d588aSDmitry Fleytman 
1029881d588aSDmitry Fleytman }
1030881d588aSDmitry Fleytman 
1031881d588aSDmitry Fleytman static uint64_t
1032881d588aSDmitry Fleytman pvscsi_io_read(void *opaque, hwaddr addr, unsigned size)
1033881d588aSDmitry Fleytman {
1034881d588aSDmitry Fleytman     PVSCSIState *s = opaque;
1035881d588aSDmitry Fleytman 
1036881d588aSDmitry Fleytman     switch (addr) {
1037881d588aSDmitry Fleytman     case PVSCSI_REG_OFFSET_INTR_STATUS:
1038881d588aSDmitry Fleytman         trace_pvscsi_io_read("PVSCSI_REG_OFFSET_INTR_STATUS",
1039881d588aSDmitry Fleytman                              s->reg_interrupt_status);
1040881d588aSDmitry Fleytman         return s->reg_interrupt_status;
1041881d588aSDmitry Fleytman 
1042881d588aSDmitry Fleytman     case PVSCSI_REG_OFFSET_INTR_MASK:
1043881d588aSDmitry Fleytman         trace_pvscsi_io_read("PVSCSI_REG_OFFSET_INTR_MASK",
1044881d588aSDmitry Fleytman                              s->reg_interrupt_status);
1045881d588aSDmitry Fleytman         return s->reg_interrupt_enabled;
1046881d588aSDmitry Fleytman 
1047881d588aSDmitry Fleytman     case PVSCSI_REG_OFFSET_COMMAND_STATUS:
1048881d588aSDmitry Fleytman         trace_pvscsi_io_read("PVSCSI_REG_OFFSET_COMMAND_STATUS",
1049881d588aSDmitry Fleytman                              s->reg_interrupt_status);
1050881d588aSDmitry Fleytman         return s->reg_command_status;
1051881d588aSDmitry Fleytman 
1052881d588aSDmitry Fleytman     default:
1053881d588aSDmitry Fleytman         trace_pvscsi_io_read_unknown(addr, size);
1054881d588aSDmitry Fleytman         return 0;
1055881d588aSDmitry Fleytman     }
1056881d588aSDmitry Fleytman }
1057881d588aSDmitry Fleytman 
1058881d588aSDmitry Fleytman 
1059*b2e1fffbSCao jin static void
1060881d588aSDmitry Fleytman pvscsi_init_msi(PVSCSIState *s)
1061881d588aSDmitry Fleytman {
1062881d588aSDmitry Fleytman     int res;
1063881d588aSDmitry Fleytman     PCIDevice *d = PCI_DEVICE(s);
1064881d588aSDmitry Fleytman 
1065836fc48cSShmulik Ladkani     res = msi_init(d, PVSCSI_MSI_OFFSET(s), PVSCSI_MSIX_NUM_VECTORS,
1066881d588aSDmitry Fleytman                    PVSCSI_USE_64BIT, PVSCSI_PER_VECTOR_MASK);
1067881d588aSDmitry Fleytman     if (res < 0) {
1068881d588aSDmitry Fleytman         trace_pvscsi_init_msi_fail(res);
1069881d588aSDmitry Fleytman         s->msi_used = false;
1070881d588aSDmitry Fleytman     } else {
1071881d588aSDmitry Fleytman         s->msi_used = true;
1072881d588aSDmitry Fleytman     }
1073881d588aSDmitry Fleytman }
1074881d588aSDmitry Fleytman 
1075881d588aSDmitry Fleytman static void
1076881d588aSDmitry Fleytman pvscsi_cleanup_msi(PVSCSIState *s)
1077881d588aSDmitry Fleytman {
1078881d588aSDmitry Fleytman     PCIDevice *d = PCI_DEVICE(s);
1079881d588aSDmitry Fleytman 
1080881d588aSDmitry Fleytman     if (s->msi_used) {
1081881d588aSDmitry Fleytman         msi_uninit(d);
1082881d588aSDmitry Fleytman     }
1083881d588aSDmitry Fleytman }
1084881d588aSDmitry Fleytman 
1085881d588aSDmitry Fleytman static const MemoryRegionOps pvscsi_ops = {
1086881d588aSDmitry Fleytman         .read = pvscsi_io_read,
1087881d588aSDmitry Fleytman         .write = pvscsi_io_write,
1088881d588aSDmitry Fleytman         .endianness = DEVICE_LITTLE_ENDIAN,
1089881d588aSDmitry Fleytman         .impl = {
1090881d588aSDmitry Fleytman                 .min_access_size = 4,
1091881d588aSDmitry Fleytman                 .max_access_size = 4,
1092881d588aSDmitry Fleytman         },
1093881d588aSDmitry Fleytman };
1094881d588aSDmitry Fleytman 
1095881d588aSDmitry Fleytman static const struct SCSIBusInfo pvscsi_scsi_info = {
1096881d588aSDmitry Fleytman         .tcq = true,
1097881d588aSDmitry Fleytman         .max_target = PVSCSI_MAX_DEVS,
1098881d588aSDmitry Fleytman         .max_channel = 0,
1099881d588aSDmitry Fleytman         .max_lun = 0,
1100881d588aSDmitry Fleytman 
1101881d588aSDmitry Fleytman         .get_sg_list = pvscsi_get_sg_list,
1102881d588aSDmitry Fleytman         .complete = pvscsi_command_complete,
1103881d588aSDmitry Fleytman         .cancel = pvscsi_request_cancelled,
1104881d588aSDmitry Fleytman };
1105881d588aSDmitry Fleytman 
1106881d588aSDmitry Fleytman static int
1107881d588aSDmitry Fleytman pvscsi_init(PCIDevice *pci_dev)
1108881d588aSDmitry Fleytman {
1109881d588aSDmitry Fleytman     PVSCSIState *s = PVSCSI(pci_dev);
1110881d588aSDmitry Fleytman 
1111881d588aSDmitry Fleytman     trace_pvscsi_state("init");
1112881d588aSDmitry Fleytman 
1113d29d4ff8SShmulik Ladkani     /* PCI subsystem ID, subsystem vendor ID, revision */
1114d29d4ff8SShmulik Ladkani     if (PVSCSI_USE_OLD_PCI_CONFIGURATION(s)) {
1115d29d4ff8SShmulik Ladkani         pci_set_word(pci_dev->config + PCI_SUBSYSTEM_ID, 0x1000);
1116d29d4ff8SShmulik Ladkani     } else {
1117d29d4ff8SShmulik Ladkani         pci_set_word(pci_dev->config + PCI_SUBSYSTEM_VENDOR_ID,
1118d29d4ff8SShmulik Ladkani                      PCI_VENDOR_ID_VMWARE);
1119d29d4ff8SShmulik Ladkani         pci_set_word(pci_dev->config + PCI_SUBSYSTEM_ID,
1120d29d4ff8SShmulik Ladkani                      PCI_DEVICE_ID_VMWARE_PVSCSI);
1121d29d4ff8SShmulik Ladkani         pci_config_set_revision(pci_dev->config, 0x2);
1122d29d4ff8SShmulik Ladkani     }
1123881d588aSDmitry Fleytman 
1124881d588aSDmitry Fleytman     /* PCI latency timer = 255 */
1125881d588aSDmitry Fleytman     pci_dev->config[PCI_LATENCY_TIMER] = 0xff;
1126881d588aSDmitry Fleytman 
1127881d588aSDmitry Fleytman     /* Interrupt pin A */
1128881d588aSDmitry Fleytman     pci_config_set_interrupt_pin(pci_dev->config, 1);
1129881d588aSDmitry Fleytman 
113029776739SPaolo Bonzini     memory_region_init_io(&s->io_space, OBJECT(s), &pvscsi_ops, s,
1131881d588aSDmitry Fleytman                           "pvscsi-io", PVSCSI_MEM_SPACE_SIZE);
1132881d588aSDmitry Fleytman     pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->io_space);
1133881d588aSDmitry Fleytman 
1134881d588aSDmitry Fleytman     pvscsi_init_msi(s);
1135881d588aSDmitry Fleytman 
11361dd1305eSShmulik Ladkani     if (pci_is_express(pci_dev) && pci_bus_is_express(pci_dev->bus)) {
11371dd1305eSShmulik Ladkani         pcie_endpoint_cap_init(pci_dev, PVSCSI_EXP_EP_OFFSET);
11381dd1305eSShmulik Ladkani     }
11391dd1305eSShmulik Ladkani 
1140881d588aSDmitry Fleytman     s->completion_worker = qemu_bh_new(pvscsi_process_completion_queue, s);
1141881d588aSDmitry Fleytman     if (!s->completion_worker) {
1142881d588aSDmitry Fleytman         pvscsi_cleanup_msi(s);
1143881d588aSDmitry Fleytman         return -ENOMEM;
1144881d588aSDmitry Fleytman     }
1145881d588aSDmitry Fleytman 
1146b1187b51SAndreas Färber     scsi_bus_new(&s->bus, sizeof(s->bus), DEVICE(pci_dev),
1147b1187b51SAndreas Färber                  &pvscsi_scsi_info, NULL);
114891c8daadSIgor Mammedov     /* override default SCSI bus hotplug-handler, with pvscsi's one */
114991c8daadSIgor Mammedov     qbus_set_hotplug_handler(BUS(&s->bus), DEVICE(s), &error_abort);
1150881d588aSDmitry Fleytman     pvscsi_reset_state(s);
1151881d588aSDmitry Fleytman 
1152881d588aSDmitry Fleytman     return 0;
1153881d588aSDmitry Fleytman }
1154881d588aSDmitry Fleytman 
1155881d588aSDmitry Fleytman static void
1156881d588aSDmitry Fleytman pvscsi_uninit(PCIDevice *pci_dev)
1157881d588aSDmitry Fleytman {
1158881d588aSDmitry Fleytman     PVSCSIState *s = PVSCSI(pci_dev);
1159881d588aSDmitry Fleytman 
1160881d588aSDmitry Fleytman     trace_pvscsi_state("uninit");
1161881d588aSDmitry Fleytman     qemu_bh_delete(s->completion_worker);
1162881d588aSDmitry Fleytman 
1163881d588aSDmitry Fleytman     pvscsi_cleanup_msi(s);
1164881d588aSDmitry Fleytman }
1165881d588aSDmitry Fleytman 
1166881d588aSDmitry Fleytman static void
1167881d588aSDmitry Fleytman pvscsi_reset(DeviceState *dev)
1168881d588aSDmitry Fleytman {
1169881d588aSDmitry Fleytman     PCIDevice *d = PCI_DEVICE(dev);
1170881d588aSDmitry Fleytman     PVSCSIState *s = PVSCSI(d);
1171881d588aSDmitry Fleytman 
1172881d588aSDmitry Fleytman     trace_pvscsi_state("reset");
1173881d588aSDmitry Fleytman     pvscsi_reset_adapter(s);
1174881d588aSDmitry Fleytman }
1175881d588aSDmitry Fleytman 
1176881d588aSDmitry Fleytman static void
1177881d588aSDmitry Fleytman pvscsi_pre_save(void *opaque)
1178881d588aSDmitry Fleytman {
1179881d588aSDmitry Fleytman     PVSCSIState *s = (PVSCSIState *) opaque;
1180881d588aSDmitry Fleytman 
1181881d588aSDmitry Fleytman     trace_pvscsi_state("presave");
1182881d588aSDmitry Fleytman 
1183881d588aSDmitry Fleytman     assert(QTAILQ_EMPTY(&s->pending_queue));
1184881d588aSDmitry Fleytman     assert(QTAILQ_EMPTY(&s->completion_queue));
1185881d588aSDmitry Fleytman }
1186881d588aSDmitry Fleytman 
1187881d588aSDmitry Fleytman static int
1188881d588aSDmitry Fleytman pvscsi_post_load(void *opaque, int version_id)
1189881d588aSDmitry Fleytman {
1190881d588aSDmitry Fleytman     trace_pvscsi_state("postload");
1191881d588aSDmitry Fleytman     return 0;
1192881d588aSDmitry Fleytman }
1193881d588aSDmitry Fleytman 
11941dd1305eSShmulik Ladkani static bool pvscsi_vmstate_need_pcie_device(void *opaque)
11951dd1305eSShmulik Ladkani {
11961dd1305eSShmulik Ladkani     PVSCSIState *s = PVSCSI(opaque);
11971dd1305eSShmulik Ladkani 
11981dd1305eSShmulik Ladkani     return !(s->compat_flags & PVSCSI_COMPAT_DISABLE_PCIE);
11991dd1305eSShmulik Ladkani }
12001dd1305eSShmulik Ladkani 
12011dd1305eSShmulik Ladkani static bool pvscsi_vmstate_test_pci_device(void *opaque, int version_id)
12021dd1305eSShmulik Ladkani {
12031dd1305eSShmulik Ladkani     return !pvscsi_vmstate_need_pcie_device(opaque);
12041dd1305eSShmulik Ladkani }
12051dd1305eSShmulik Ladkani 
12061dd1305eSShmulik Ladkani static const VMStateDescription vmstate_pvscsi_pcie_device = {
12071dd1305eSShmulik Ladkani     .name = "pvscsi/pcie",
12081dd1305eSShmulik Ladkani     .needed = pvscsi_vmstate_need_pcie_device,
12091dd1305eSShmulik Ladkani     .fields = (VMStateField[]) {
12101dd1305eSShmulik Ladkani         VMSTATE_PCIE_DEVICE(parent_obj, PVSCSIState),
12111dd1305eSShmulik Ladkani         VMSTATE_END_OF_LIST()
12121dd1305eSShmulik Ladkani     }
12131dd1305eSShmulik Ladkani };
12141dd1305eSShmulik Ladkani 
1215881d588aSDmitry Fleytman static const VMStateDescription vmstate_pvscsi = {
12166783ecf1SPeter Maydell     .name = "pvscsi",
1217881d588aSDmitry Fleytman     .version_id = 0,
1218881d588aSDmitry Fleytman     .minimum_version_id = 0,
1219881d588aSDmitry Fleytman     .pre_save = pvscsi_pre_save,
1220881d588aSDmitry Fleytman     .post_load = pvscsi_post_load,
1221881d588aSDmitry Fleytman     .fields = (VMStateField[]) {
12221dd1305eSShmulik Ladkani         VMSTATE_STRUCT_TEST(parent_obj, PVSCSIState,
12231dd1305eSShmulik Ladkani                             pvscsi_vmstate_test_pci_device, 0,
12241dd1305eSShmulik Ladkani                             vmstate_pci_device, PCIDevice),
1225881d588aSDmitry Fleytman         VMSTATE_UINT8(msi_used, PVSCSIState),
1226881d588aSDmitry Fleytman         VMSTATE_UINT32(resetting, PVSCSIState),
1227881d588aSDmitry Fleytman         VMSTATE_UINT64(reg_interrupt_status, PVSCSIState),
1228881d588aSDmitry Fleytman         VMSTATE_UINT64(reg_interrupt_enabled, PVSCSIState),
1229881d588aSDmitry Fleytman         VMSTATE_UINT64(reg_command_status, PVSCSIState),
1230881d588aSDmitry Fleytman         VMSTATE_UINT64(curr_cmd, PVSCSIState),
1231881d588aSDmitry Fleytman         VMSTATE_UINT32(curr_cmd_data_cntr, PVSCSIState),
1232881d588aSDmitry Fleytman         VMSTATE_UINT32_ARRAY(curr_cmd_data, PVSCSIState,
1233881d588aSDmitry Fleytman                              ARRAY_SIZE(((PVSCSIState *)NULL)->curr_cmd_data)),
1234881d588aSDmitry Fleytman         VMSTATE_UINT8(rings_info_valid, PVSCSIState),
1235881d588aSDmitry Fleytman         VMSTATE_UINT8(msg_ring_info_valid, PVSCSIState),
1236881d588aSDmitry Fleytman         VMSTATE_UINT8(use_msg, PVSCSIState),
1237881d588aSDmitry Fleytman 
1238881d588aSDmitry Fleytman         VMSTATE_UINT64(rings.rs_pa, PVSCSIState),
1239881d588aSDmitry Fleytman         VMSTATE_UINT32(rings.txr_len_mask, PVSCSIState),
1240881d588aSDmitry Fleytman         VMSTATE_UINT32(rings.rxr_len_mask, PVSCSIState),
1241881d588aSDmitry Fleytman         VMSTATE_UINT64_ARRAY(rings.req_ring_pages_pa, PVSCSIState,
1242881d588aSDmitry Fleytman                              PVSCSI_SETUP_RINGS_MAX_NUM_PAGES),
1243881d588aSDmitry Fleytman         VMSTATE_UINT64_ARRAY(rings.cmp_ring_pages_pa, PVSCSIState,
1244881d588aSDmitry Fleytman                              PVSCSI_SETUP_RINGS_MAX_NUM_PAGES),
1245881d588aSDmitry Fleytman         VMSTATE_UINT64(rings.consumed_ptr, PVSCSIState),
1246881d588aSDmitry Fleytman         VMSTATE_UINT64(rings.filled_cmp_ptr, PVSCSIState),
1247881d588aSDmitry Fleytman 
1248881d588aSDmitry Fleytman         VMSTATE_END_OF_LIST()
12491dd1305eSShmulik Ladkani     },
12501dd1305eSShmulik Ladkani     .subsections = (const VMStateDescription*[]) {
12511dd1305eSShmulik Ladkani         &vmstate_pvscsi_pcie_device,
12521dd1305eSShmulik Ladkani         NULL
1253881d588aSDmitry Fleytman     }
1254881d588aSDmitry Fleytman };
1255881d588aSDmitry Fleytman 
1256881d588aSDmitry Fleytman static Property pvscsi_properties[] = {
1257881d588aSDmitry Fleytman     DEFINE_PROP_UINT8("use_msg", PVSCSIState, use_msg, 1),
1258952970baSShmulik Ladkani     DEFINE_PROP_BIT("x-old-pci-configuration", PVSCSIState, compat_flags,
1259952970baSShmulik Ladkani                     PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT, false),
1260d5da3ef2SShmulik Ladkani     DEFINE_PROP_BIT("x-disable-pcie", PVSCSIState, compat_flags,
1261d5da3ef2SShmulik Ladkani                     PVSCSI_COMPAT_DISABLE_PCIE_BIT, false),
1262881d588aSDmitry Fleytman     DEFINE_PROP_END_OF_LIST(),
1263881d588aSDmitry Fleytman };
1264881d588aSDmitry Fleytman 
12651dd1305eSShmulik Ladkani static void pvscsi_realize(DeviceState *qdev, Error **errp)
12661dd1305eSShmulik Ladkani {
12671dd1305eSShmulik Ladkani     PVSCSIClass *pvs_c = PVSCSI_DEVICE_GET_CLASS(qdev);
12681dd1305eSShmulik Ladkani     PCIDevice *pci_dev = PCI_DEVICE(qdev);
12691dd1305eSShmulik Ladkani     PVSCSIState *s = PVSCSI(qdev);
12701dd1305eSShmulik Ladkani 
12711dd1305eSShmulik Ladkani     if (!(s->compat_flags & PVSCSI_COMPAT_DISABLE_PCIE)) {
12721dd1305eSShmulik Ladkani         pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
12731dd1305eSShmulik Ladkani     }
12741dd1305eSShmulik Ladkani 
12751dd1305eSShmulik Ladkani     pvs_c->parent_dc_realize(qdev, errp);
12761dd1305eSShmulik Ladkani }
12771dd1305eSShmulik Ladkani 
1278881d588aSDmitry Fleytman static void pvscsi_class_init(ObjectClass *klass, void *data)
1279881d588aSDmitry Fleytman {
1280881d588aSDmitry Fleytman     DeviceClass *dc = DEVICE_CLASS(klass);
1281881d588aSDmitry Fleytman     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
12821dd1305eSShmulik Ladkani     PVSCSIClass *pvs_k = PVSCSI_DEVICE_CLASS(klass);
128391c8daadSIgor Mammedov     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
1284881d588aSDmitry Fleytman 
1285881d588aSDmitry Fleytman     k->init = pvscsi_init;
1286881d588aSDmitry Fleytman     k->exit = pvscsi_uninit;
1287881d588aSDmitry Fleytman     k->vendor_id = PCI_VENDOR_ID_VMWARE;
1288881d588aSDmitry Fleytman     k->device_id = PCI_DEVICE_ID_VMWARE_PVSCSI;
1289881d588aSDmitry Fleytman     k->class_id = PCI_CLASS_STORAGE_SCSI;
1290881d588aSDmitry Fleytman     k->subsystem_id = 0x1000;
12911dd1305eSShmulik Ladkani     pvs_k->parent_dc_realize = dc->realize;
12921dd1305eSShmulik Ladkani     dc->realize = pvscsi_realize;
1293881d588aSDmitry Fleytman     dc->reset = pvscsi_reset;
1294881d588aSDmitry Fleytman     dc->vmsd = &vmstate_pvscsi;
1295881d588aSDmitry Fleytman     dc->props = pvscsi_properties;
1296125ee0edSMarcel Apfelbaum     set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
129791c8daadSIgor Mammedov     hc->unplug = pvscsi_hot_unplug;
129891c8daadSIgor Mammedov     hc->plug = pvscsi_hotplug;
1299881d588aSDmitry Fleytman }
1300881d588aSDmitry Fleytman 
1301881d588aSDmitry Fleytman static const TypeInfo pvscsi_info = {
13026783ecf1SPeter Maydell     .name          = TYPE_PVSCSI,
1303881d588aSDmitry Fleytman     .parent        = TYPE_PCI_DEVICE,
1304e2d4f3f7SShmulik Ladkani     .class_size    = sizeof(PVSCSIClass),
1305881d588aSDmitry Fleytman     .instance_size = sizeof(PVSCSIState),
1306881d588aSDmitry Fleytman     .class_init    = pvscsi_class_init,
130791c8daadSIgor Mammedov     .interfaces = (InterfaceInfo[]) {
130891c8daadSIgor Mammedov         { TYPE_HOTPLUG_HANDLER },
130991c8daadSIgor Mammedov         { }
131091c8daadSIgor Mammedov     }
1311881d588aSDmitry Fleytman };
1312881d588aSDmitry Fleytman 
1313881d588aSDmitry Fleytman static void
1314881d588aSDmitry Fleytman pvscsi_register_types(void)
1315881d588aSDmitry Fleytman {
1316881d588aSDmitry Fleytman     type_register_static(&pvscsi_info);
1317881d588aSDmitry Fleytman }
1318881d588aSDmitry Fleytman 
1319881d588aSDmitry Fleytman type_init(pvscsi_register_types);
1320