1 /* 2 * s390 PCI BUS 3 * 4 * Copyright 2014 IBM Corp. 5 * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com> 6 * Hong Bo Li <lihbbj@cn.ibm.com> 7 * Yi Min Zhao <zyimin@cn.ibm.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or (at 10 * your option) any later version. See the COPYING file in the top-level 11 * directory. 12 */ 13 14 #include "qemu/osdep.h" 15 #include "qapi/error.h" 16 #include "qapi/visitor.h" 17 #include "cpu.h" 18 #include "s390-pci-bus.h" 19 #include "s390-pci-inst.h" 20 #include "hw/pci/pci_bus.h" 21 #include "hw/pci/pci_bridge.h" 22 #include "hw/pci/msi.h" 23 #include "qemu/error-report.h" 24 #include "qemu/module.h" 25 26 #ifndef DEBUG_S390PCI_BUS 27 #define DEBUG_S390PCI_BUS 0 28 #endif 29 30 #define DPRINTF(fmt, ...) \ 31 do { \ 32 if (DEBUG_S390PCI_BUS) { \ 33 fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); \ 34 } \ 35 } while (0) 36 37 S390pciState *s390_get_phb(void) 38 { 39 static S390pciState *phb; 40 41 if (!phb) { 42 phb = S390_PCI_HOST_BRIDGE( 43 object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL)); 44 assert(phb != NULL); 45 } 46 47 return phb; 48 } 49 50 int pci_chsc_sei_nt2_get_event(void *res) 51 { 52 ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res; 53 PciCcdfAvail *accdf; 54 PciCcdfErr *eccdf; 55 int rc = 1; 56 SeiContainer *sei_cont; 57 S390pciState *s = s390_get_phb(); 58 59 sei_cont = QTAILQ_FIRST(&s->pending_sei); 60 if (sei_cont) { 61 QTAILQ_REMOVE(&s->pending_sei, sei_cont, link); 62 nt2_res->nt = 2; 63 nt2_res->cc = sei_cont->cc; 64 nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res)); 65 switch (sei_cont->cc) { 66 case 1: /* error event */ 67 eccdf = (PciCcdfErr *)nt2_res->ccdf; 68 eccdf->fid = cpu_to_be32(sei_cont->fid); 69 eccdf->fh = cpu_to_be32(sei_cont->fh); 70 eccdf->e = cpu_to_be32(sei_cont->e); 71 eccdf->faddr = cpu_to_be64(sei_cont->faddr); 72 eccdf->pec = cpu_to_be16(sei_cont->pec); 73 break; 74 case 2: /* availability event */ 75 accdf = (PciCcdfAvail *)nt2_res->ccdf; 76 accdf->fid = cpu_to_be32(sei_cont->fid); 77 accdf->fh = cpu_to_be32(sei_cont->fh); 78 accdf->pec = cpu_to_be16(sei_cont->pec); 79 break; 80 default: 81 abort(); 82 } 83 g_free(sei_cont); 84 rc = 0; 85 } 86 87 return rc; 88 } 89 90 int pci_chsc_sei_nt2_have_event(void) 91 { 92 S390pciState *s = s390_get_phb(); 93 94 return !QTAILQ_EMPTY(&s->pending_sei); 95 } 96 97 S390PCIBusDevice *s390_pci_find_next_avail_dev(S390pciState *s, 98 S390PCIBusDevice *pbdev) 99 { 100 S390PCIBusDevice *ret = pbdev ? QTAILQ_NEXT(pbdev, link) : 101 QTAILQ_FIRST(&s->zpci_devs); 102 103 while (ret && ret->state == ZPCI_FS_RESERVED) { 104 ret = QTAILQ_NEXT(ret, link); 105 } 106 107 return ret; 108 } 109 110 S390PCIBusDevice *s390_pci_find_dev_by_fid(S390pciState *s, uint32_t fid) 111 { 112 S390PCIBusDevice *pbdev; 113 114 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 115 if (pbdev->fid == fid) { 116 return pbdev; 117 } 118 } 119 120 return NULL; 121 } 122 123 void s390_pci_sclp_configure(SCCB *sccb) 124 { 125 IoaCfgSccb *psccb = (IoaCfgSccb *)sccb; 126 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(), 127 be32_to_cpu(psccb->aid)); 128 uint16_t rc; 129 130 if (!pbdev) { 131 DPRINTF("sclp config no dev found\n"); 132 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; 133 goto out; 134 } 135 136 switch (pbdev->state) { 137 case ZPCI_FS_RESERVED: 138 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; 139 break; 140 case ZPCI_FS_STANDBY: 141 pbdev->state = ZPCI_FS_DISABLED; 142 rc = SCLP_RC_NORMAL_COMPLETION; 143 break; 144 default: 145 rc = SCLP_RC_NO_ACTION_REQUIRED; 146 } 147 out: 148 psccb->header.response_code = cpu_to_be16(rc); 149 } 150 151 static void s390_pci_perform_unplug(S390PCIBusDevice *pbdev) 152 { 153 HotplugHandler *hotplug_ctrl; 154 155 /* Unplug the PCI device */ 156 if (pbdev->pdev) { 157 DeviceState *pdev = DEVICE(pbdev->pdev); 158 159 hotplug_ctrl = qdev_get_hotplug_handler(pdev); 160 hotplug_handler_unplug(hotplug_ctrl, pdev, &error_abort); 161 object_unparent(OBJECT(pdev)); 162 } 163 164 /* Unplug the zPCI device */ 165 hotplug_ctrl = qdev_get_hotplug_handler(DEVICE(pbdev)); 166 hotplug_handler_unplug(hotplug_ctrl, DEVICE(pbdev), &error_abort); 167 object_unparent(OBJECT(pbdev)); 168 } 169 170 void s390_pci_sclp_deconfigure(SCCB *sccb) 171 { 172 IoaCfgSccb *psccb = (IoaCfgSccb *)sccb; 173 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(), 174 be32_to_cpu(psccb->aid)); 175 uint16_t rc; 176 177 if (!pbdev) { 178 DPRINTF("sclp deconfig no dev found\n"); 179 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; 180 goto out; 181 } 182 183 switch (pbdev->state) { 184 case ZPCI_FS_RESERVED: 185 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; 186 break; 187 case ZPCI_FS_STANDBY: 188 rc = SCLP_RC_NO_ACTION_REQUIRED; 189 break; 190 default: 191 if (pbdev->summary_ind) { 192 pci_dereg_irqs(pbdev); 193 } 194 if (pbdev->iommu->enabled) { 195 pci_dereg_ioat(pbdev->iommu); 196 } 197 pbdev->state = ZPCI_FS_STANDBY; 198 rc = SCLP_RC_NORMAL_COMPLETION; 199 200 if (pbdev->unplug_requested) { 201 s390_pci_perform_unplug(pbdev); 202 } 203 } 204 out: 205 psccb->header.response_code = cpu_to_be16(rc); 206 } 207 208 static S390PCIBusDevice *s390_pci_find_dev_by_uid(S390pciState *s, uint16_t uid) 209 { 210 S390PCIBusDevice *pbdev; 211 212 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 213 if (pbdev->uid == uid) { 214 return pbdev; 215 } 216 } 217 218 return NULL; 219 } 220 221 S390PCIBusDevice *s390_pci_find_dev_by_target(S390pciState *s, 222 const char *target) 223 { 224 S390PCIBusDevice *pbdev; 225 226 if (!target) { 227 return NULL; 228 } 229 230 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 231 if (!strcmp(pbdev->target, target)) { 232 return pbdev; 233 } 234 } 235 236 return NULL; 237 } 238 239 static S390PCIBusDevice *s390_pci_find_dev_by_pci(S390pciState *s, 240 PCIDevice *pci_dev) 241 { 242 S390PCIBusDevice *pbdev; 243 244 if (!pci_dev) { 245 return NULL; 246 } 247 248 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 249 if (pbdev->pdev == pci_dev) { 250 return pbdev; 251 } 252 } 253 254 return NULL; 255 } 256 257 S390PCIBusDevice *s390_pci_find_dev_by_idx(S390pciState *s, uint32_t idx) 258 { 259 return g_hash_table_lookup(s->zpci_table, &idx); 260 } 261 262 S390PCIBusDevice *s390_pci_find_dev_by_fh(S390pciState *s, uint32_t fh) 263 { 264 uint32_t idx = FH_MASK_INDEX & fh; 265 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_idx(s, idx); 266 267 if (pbdev && pbdev->fh == fh) { 268 return pbdev; 269 } 270 271 return NULL; 272 } 273 274 static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh, 275 uint32_t fid, uint64_t faddr, uint32_t e) 276 { 277 SeiContainer *sei_cont; 278 S390pciState *s = s390_get_phb(); 279 280 sei_cont = g_new0(SeiContainer, 1); 281 sei_cont->fh = fh; 282 sei_cont->fid = fid; 283 sei_cont->cc = cc; 284 sei_cont->pec = pec; 285 sei_cont->faddr = faddr; 286 sei_cont->e = e; 287 288 QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link); 289 css_generate_css_crws(0); 290 } 291 292 static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh, 293 uint32_t fid) 294 { 295 s390_pci_generate_event(2, pec, fh, fid, 0, 0); 296 } 297 298 void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid, 299 uint64_t faddr, uint32_t e) 300 { 301 s390_pci_generate_event(1, pec, fh, fid, faddr, e); 302 } 303 304 static void s390_pci_set_irq(void *opaque, int irq, int level) 305 { 306 /* nothing to do */ 307 } 308 309 static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num) 310 { 311 /* nothing to do */ 312 return 0; 313 } 314 315 static uint64_t s390_pci_get_table_origin(uint64_t iota) 316 { 317 return iota & ~ZPCI_IOTA_RTTO_FLAG; 318 } 319 320 static unsigned int calc_rtx(dma_addr_t ptr) 321 { 322 return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK; 323 } 324 325 static unsigned int calc_sx(dma_addr_t ptr) 326 { 327 return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK; 328 } 329 330 static unsigned int calc_px(dma_addr_t ptr) 331 { 332 return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK; 333 } 334 335 static uint64_t get_rt_sto(uint64_t entry) 336 { 337 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX) 338 ? (entry & ZPCI_RTE_ADDR_MASK) 339 : 0; 340 } 341 342 static uint64_t get_st_pto(uint64_t entry) 343 { 344 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX) 345 ? (entry & ZPCI_STE_ADDR_MASK) 346 : 0; 347 } 348 349 static bool rt_entry_isvalid(uint64_t entry) 350 { 351 return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID; 352 } 353 354 static bool pt_entry_isvalid(uint64_t entry) 355 { 356 return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID; 357 } 358 359 static bool entry_isprotected(uint64_t entry) 360 { 361 return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED; 362 } 363 364 /* ett is expected table type, -1 page table, 0 segment table, 1 region table */ 365 static uint64_t get_table_index(uint64_t iova, int8_t ett) 366 { 367 switch (ett) { 368 case ZPCI_ETT_PT: 369 return calc_px(iova); 370 case ZPCI_ETT_ST: 371 return calc_sx(iova); 372 case ZPCI_ETT_RT: 373 return calc_rtx(iova); 374 } 375 376 return -1; 377 } 378 379 static bool entry_isvalid(uint64_t entry, int8_t ett) 380 { 381 switch (ett) { 382 case ZPCI_ETT_PT: 383 return pt_entry_isvalid(entry); 384 case ZPCI_ETT_ST: 385 case ZPCI_ETT_RT: 386 return rt_entry_isvalid(entry); 387 } 388 389 return false; 390 } 391 392 /* Return true if address translation is done */ 393 static bool translate_iscomplete(uint64_t entry, int8_t ett) 394 { 395 switch (ett) { 396 case 0: 397 return (entry & ZPCI_TABLE_FC) ? true : false; 398 case 1: 399 return false; 400 } 401 402 return true; 403 } 404 405 static uint64_t get_frame_size(int8_t ett) 406 { 407 switch (ett) { 408 case ZPCI_ETT_PT: 409 return 1ULL << 12; 410 case ZPCI_ETT_ST: 411 return 1ULL << 20; 412 case ZPCI_ETT_RT: 413 return 1ULL << 31; 414 } 415 416 return 0; 417 } 418 419 static uint64_t get_next_table_origin(uint64_t entry, int8_t ett) 420 { 421 switch (ett) { 422 case ZPCI_ETT_PT: 423 return entry & ZPCI_PTE_ADDR_MASK; 424 case ZPCI_ETT_ST: 425 return get_st_pto(entry); 426 case ZPCI_ETT_RT: 427 return get_rt_sto(entry); 428 } 429 430 return 0; 431 } 432 433 /** 434 * table_translate: do translation within one table and return the following 435 * table origin 436 * 437 * @entry: the entry being translated, the result is stored in this. 438 * @to: the address of table origin. 439 * @ett: expected table type, 1 region table, 0 segment table and -1 page table. 440 * @error: error code 441 */ 442 static uint64_t table_translate(S390IOTLBEntry *entry, uint64_t to, int8_t ett, 443 uint16_t *error) 444 { 445 uint64_t tx, te, nto = 0; 446 uint16_t err = 0; 447 448 tx = get_table_index(entry->iova, ett); 449 te = address_space_ldq(&address_space_memory, to + tx * sizeof(uint64_t), 450 MEMTXATTRS_UNSPECIFIED, NULL); 451 452 if (!te) { 453 err = ERR_EVENT_INVALTE; 454 goto out; 455 } 456 457 if (!entry_isvalid(te, ett)) { 458 entry->perm &= IOMMU_NONE; 459 goto out; 460 } 461 462 if (ett == ZPCI_ETT_RT && ((te & ZPCI_TABLE_LEN_RTX) != ZPCI_TABLE_LEN_RTX 463 || te & ZPCI_TABLE_OFFSET_MASK)) { 464 err = ERR_EVENT_INVALTL; 465 goto out; 466 } 467 468 nto = get_next_table_origin(te, ett); 469 if (!nto) { 470 err = ERR_EVENT_TT; 471 goto out; 472 } 473 474 if (entry_isprotected(te)) { 475 entry->perm &= IOMMU_RO; 476 } else { 477 entry->perm &= IOMMU_RW; 478 } 479 480 if (translate_iscomplete(te, ett)) { 481 switch (ett) { 482 case ZPCI_ETT_PT: 483 entry->translated_addr = te & ZPCI_PTE_ADDR_MASK; 484 break; 485 case ZPCI_ETT_ST: 486 entry->translated_addr = (te & ZPCI_SFAA_MASK) | 487 (entry->iova & ~ZPCI_SFAA_MASK); 488 break; 489 } 490 nto = 0; 491 } 492 out: 493 if (err) { 494 entry->perm = IOMMU_NONE; 495 *error = err; 496 } 497 entry->len = get_frame_size(ett); 498 return nto; 499 } 500 501 uint16_t s390_guest_io_table_walk(uint64_t g_iota, hwaddr addr, 502 S390IOTLBEntry *entry) 503 { 504 uint64_t to = s390_pci_get_table_origin(g_iota); 505 int8_t ett = 1; 506 uint16_t error = 0; 507 508 entry->iova = addr & PAGE_MASK; 509 entry->translated_addr = 0; 510 entry->perm = IOMMU_RW; 511 512 if (entry_isprotected(g_iota)) { 513 entry->perm &= IOMMU_RO; 514 } 515 516 while (to) { 517 to = table_translate(entry, to, ett--, &error); 518 } 519 520 return error; 521 } 522 523 static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr addr, 524 IOMMUAccessFlags flag, int iommu_idx) 525 { 526 S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr); 527 S390IOTLBEntry *entry; 528 uint64_t iova = addr & PAGE_MASK; 529 uint16_t error = 0; 530 IOMMUTLBEntry ret = { 531 .target_as = &address_space_memory, 532 .iova = 0, 533 .translated_addr = 0, 534 .addr_mask = ~(hwaddr)0, 535 .perm = IOMMU_NONE, 536 }; 537 538 switch (iommu->pbdev->state) { 539 case ZPCI_FS_ENABLED: 540 case ZPCI_FS_BLOCKED: 541 if (!iommu->enabled) { 542 return ret; 543 } 544 break; 545 default: 546 return ret; 547 } 548 549 DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr); 550 551 if (addr < iommu->pba || addr > iommu->pal) { 552 error = ERR_EVENT_OORANGE; 553 goto err; 554 } 555 556 entry = g_hash_table_lookup(iommu->iotlb, &iova); 557 if (entry) { 558 ret.iova = entry->iova; 559 ret.translated_addr = entry->translated_addr; 560 ret.addr_mask = entry->len - 1; 561 ret.perm = entry->perm; 562 } else { 563 ret.iova = iova; 564 ret.addr_mask = ~PAGE_MASK; 565 ret.perm = IOMMU_NONE; 566 } 567 568 if (flag != IOMMU_NONE && !(flag & ret.perm)) { 569 error = ERR_EVENT_TPROTE; 570 } 571 err: 572 if (error) { 573 iommu->pbdev->state = ZPCI_FS_ERROR; 574 s390_pci_generate_error_event(error, iommu->pbdev->fh, 575 iommu->pbdev->fid, addr, 0); 576 } 577 return ret; 578 } 579 580 static void s390_pci_iommu_replay(IOMMUMemoryRegion *iommu, 581 IOMMUNotifier *notifier) 582 { 583 /* It's impossible to plug a pci device on s390x that already has iommu 584 * mappings which need to be replayed, that is due to the "one iommu per 585 * zpci device" construct. But when we support migration of vfio-pci 586 * devices in future, we need to revisit this. 587 */ 588 return; 589 } 590 591 static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus, 592 int devfn) 593 { 594 uint64_t key = (uintptr_t)bus; 595 S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key); 596 S390PCIIOMMU *iommu; 597 598 if (!table) { 599 table = g_new0(S390PCIIOMMUTable, 1); 600 table->key = key; 601 g_hash_table_insert(s->iommu_table, &table->key, table); 602 } 603 604 iommu = table->iommu[PCI_SLOT(devfn)]; 605 if (!iommu) { 606 iommu = S390_PCI_IOMMU(object_new(TYPE_S390_PCI_IOMMU)); 607 608 char *mr_name = g_strdup_printf("iommu-root-%02x:%02x.%01x", 609 pci_bus_num(bus), 610 PCI_SLOT(devfn), 611 PCI_FUNC(devfn)); 612 char *as_name = g_strdup_printf("iommu-pci-%02x:%02x.%01x", 613 pci_bus_num(bus), 614 PCI_SLOT(devfn), 615 PCI_FUNC(devfn)); 616 memory_region_init(&iommu->mr, OBJECT(iommu), mr_name, UINT64_MAX); 617 address_space_init(&iommu->as, &iommu->mr, as_name); 618 iommu->iotlb = g_hash_table_new_full(g_int64_hash, g_int64_equal, 619 NULL, g_free); 620 table->iommu[PCI_SLOT(devfn)] = iommu; 621 622 g_free(mr_name); 623 g_free(as_name); 624 } 625 626 return iommu; 627 } 628 629 static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn) 630 { 631 S390pciState *s = opaque; 632 S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn); 633 634 return &iommu->as; 635 } 636 637 static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set) 638 { 639 uint8_t ind_old, ind_new; 640 hwaddr len = 1; 641 uint8_t *ind_addr; 642 643 ind_addr = cpu_physical_memory_map(ind_loc, &len, 1); 644 if (!ind_addr) { 645 s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0); 646 return -1; 647 } 648 do { 649 ind_old = *ind_addr; 650 ind_new = ind_old | to_be_set; 651 } while (atomic_cmpxchg(ind_addr, ind_old, ind_new) != ind_old); 652 cpu_physical_memory_unmap(ind_addr, len, 1, len); 653 654 return ind_old; 655 } 656 657 static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data, 658 unsigned int size) 659 { 660 S390PCIBusDevice *pbdev = opaque; 661 uint32_t vec = data & ZPCI_MSI_VEC_MASK; 662 uint64_t ind_bit; 663 uint32_t sum_bit; 664 665 assert(pbdev); 666 DPRINTF("write_msix data 0x%" PRIx64 " idx %d vec 0x%x\n", data, 667 pbdev->idx, vec); 668 669 if (pbdev->state != ZPCI_FS_ENABLED) { 670 return; 671 } 672 673 ind_bit = pbdev->routes.adapter.ind_offset; 674 sum_bit = pbdev->routes.adapter.summary_offset; 675 676 set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8, 677 0x80 >> ((ind_bit + vec) % 8)); 678 if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8, 679 0x80 >> (sum_bit % 8))) { 680 css_adapter_interrupt(CSS_IO_ADAPTER_PCI, pbdev->isc); 681 } 682 } 683 684 static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size) 685 { 686 return 0xffffffff; 687 } 688 689 static const MemoryRegionOps s390_msi_ctrl_ops = { 690 .write = s390_msi_ctrl_write, 691 .read = s390_msi_ctrl_read, 692 .endianness = DEVICE_LITTLE_ENDIAN, 693 }; 694 695 void s390_pci_iommu_enable(S390PCIIOMMU *iommu) 696 { 697 char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid); 698 memory_region_init_iommu(&iommu->iommu_mr, sizeof(iommu->iommu_mr), 699 TYPE_S390_IOMMU_MEMORY_REGION, OBJECT(&iommu->mr), 700 name, iommu->pal - iommu->pba + 1); 701 iommu->enabled = true; 702 memory_region_add_subregion(&iommu->mr, 0, MEMORY_REGION(&iommu->iommu_mr)); 703 g_free(name); 704 } 705 706 void s390_pci_iommu_disable(S390PCIIOMMU *iommu) 707 { 708 iommu->enabled = false; 709 g_hash_table_remove_all(iommu->iotlb); 710 memory_region_del_subregion(&iommu->mr, MEMORY_REGION(&iommu->iommu_mr)); 711 object_unparent(OBJECT(&iommu->iommu_mr)); 712 } 713 714 static void s390_pci_iommu_free(S390pciState *s, PCIBus *bus, int32_t devfn) 715 { 716 uint64_t key = (uintptr_t)bus; 717 S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key); 718 S390PCIIOMMU *iommu = table ? table->iommu[PCI_SLOT(devfn)] : NULL; 719 720 if (!table || !iommu) { 721 return; 722 } 723 724 table->iommu[PCI_SLOT(devfn)] = NULL; 725 g_hash_table_destroy(iommu->iotlb); 726 address_space_destroy(&iommu->as); 727 object_unparent(OBJECT(&iommu->mr)); 728 object_unparent(OBJECT(iommu)); 729 object_unref(OBJECT(iommu)); 730 } 731 732 static void s390_pcihost_realize(DeviceState *dev, Error **errp) 733 { 734 PCIBus *b; 735 BusState *bus; 736 PCIHostState *phb = PCI_HOST_BRIDGE(dev); 737 S390pciState *s = S390_PCI_HOST_BRIDGE(dev); 738 Error *local_err = NULL; 739 740 DPRINTF("host_init\n"); 741 742 b = pci_register_root_bus(dev, NULL, s390_pci_set_irq, s390_pci_map_irq, 743 NULL, get_system_memory(), get_system_io(), 0, 744 64, TYPE_PCI_BUS); 745 pci_setup_iommu(b, s390_pci_dma_iommu, s); 746 747 bus = BUS(b); 748 qbus_set_hotplug_handler(bus, OBJECT(dev), &local_err); 749 if (local_err) { 750 error_propagate(errp, local_err); 751 return; 752 } 753 phb->bus = b; 754 755 s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, dev, NULL)); 756 qbus_set_hotplug_handler(BUS(s->bus), OBJECT(dev), &local_err); 757 if (local_err) { 758 error_propagate(errp, local_err); 759 return; 760 } 761 762 s->iommu_table = g_hash_table_new_full(g_int64_hash, g_int64_equal, 763 NULL, g_free); 764 s->zpci_table = g_hash_table_new_full(g_int_hash, g_int_equal, NULL, NULL); 765 s->bus_no = 0; 766 QTAILQ_INIT(&s->pending_sei); 767 QTAILQ_INIT(&s->zpci_devs); 768 769 css_register_io_adapters(CSS_IO_ADAPTER_PCI, true, false, 770 S390_ADAPTER_SUPPRESSIBLE, &local_err); 771 error_propagate(errp, local_err); 772 } 773 774 static int s390_pci_msix_init(S390PCIBusDevice *pbdev) 775 { 776 char *name; 777 uint8_t pos; 778 uint16_t ctrl; 779 uint32_t table, pba; 780 781 pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX); 782 if (!pos) { 783 return -1; 784 } 785 786 ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS, 787 pci_config_size(pbdev->pdev), sizeof(ctrl)); 788 table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE, 789 pci_config_size(pbdev->pdev), sizeof(table)); 790 pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA, 791 pci_config_size(pbdev->pdev), sizeof(pba)); 792 793 pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK; 794 pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK; 795 pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK; 796 pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; 797 pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; 798 799 name = g_strdup_printf("msix-s390-%04x", pbdev->uid); 800 memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev), 801 &s390_msi_ctrl_ops, pbdev, name, PAGE_SIZE); 802 memory_region_add_subregion(&pbdev->iommu->mr, ZPCI_MSI_ADDR, 803 &pbdev->msix_notify_mr); 804 g_free(name); 805 806 return 0; 807 } 808 809 static void s390_pci_msix_free(S390PCIBusDevice *pbdev) 810 { 811 memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr); 812 object_unparent(OBJECT(&pbdev->msix_notify_mr)); 813 } 814 815 static S390PCIBusDevice *s390_pci_device_new(S390pciState *s, 816 const char *target, Error **errp) 817 { 818 Error *local_err = NULL; 819 DeviceState *dev; 820 821 dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE); 822 if (!dev) { 823 error_setg(errp, "zPCI device could not be created"); 824 return NULL; 825 } 826 827 object_property_set_str(OBJECT(dev), target, "target", &local_err); 828 if (local_err) { 829 object_unparent(OBJECT(dev)); 830 error_propagate_prepend(errp, local_err, 831 "zPCI device could not be created: "); 832 return NULL; 833 } 834 object_property_set_bool(OBJECT(dev), true, "realized", &local_err); 835 if (local_err) { 836 object_unparent(OBJECT(dev)); 837 error_propagate_prepend(errp, local_err, 838 "zPCI device could not be created: "); 839 return NULL; 840 } 841 842 return S390_PCI_DEVICE(dev); 843 } 844 845 static bool s390_pci_alloc_idx(S390pciState *s, S390PCIBusDevice *pbdev) 846 { 847 uint32_t idx; 848 849 idx = s->next_idx; 850 while (s390_pci_find_dev_by_idx(s, idx)) { 851 idx = (idx + 1) & FH_MASK_INDEX; 852 if (idx == s->next_idx) { 853 return false; 854 } 855 } 856 857 pbdev->idx = idx; 858 return true; 859 } 860 861 static void s390_pcihost_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 862 Error **errp) 863 { 864 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 865 866 if (!s390_has_feat(S390_FEAT_ZPCI)) { 867 warn_report("Plugging a PCI/zPCI device without the 'zpci' CPU " 868 "feature enabled; the guest will not be able to see/use " 869 "this device"); 870 } 871 872 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 873 PCIDevice *pdev = PCI_DEVICE(dev); 874 875 if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) { 876 error_setg(errp, "multifunction not supported in s390"); 877 return; 878 } 879 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 880 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev); 881 882 if (!s390_pci_alloc_idx(s, pbdev)) { 883 error_setg(errp, "no slot for plugging zpci device"); 884 return; 885 } 886 } 887 } 888 889 static void s390_pci_update_subordinate(PCIDevice *dev, uint32_t nr) 890 { 891 uint32_t old_nr; 892 893 pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1); 894 while (!pci_bus_is_root(pci_get_bus(dev))) { 895 dev = pci_get_bus(dev)->parent_dev; 896 897 old_nr = pci_default_read_config(dev, PCI_SUBORDINATE_BUS, 1); 898 if (old_nr < nr) { 899 pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1); 900 } 901 } 902 } 903 904 static void s390_pcihost_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 905 Error **errp) 906 { 907 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 908 PCIDevice *pdev = NULL; 909 S390PCIBusDevice *pbdev = NULL; 910 911 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { 912 PCIBridge *pb = PCI_BRIDGE(dev); 913 914 pdev = PCI_DEVICE(dev); 915 pci_bridge_map_irq(pb, dev->id, s390_pci_map_irq); 916 pci_setup_iommu(&pb->sec_bus, s390_pci_dma_iommu, s); 917 918 qbus_set_hotplug_handler(BUS(&pb->sec_bus), OBJECT(s), errp); 919 920 if (dev->hotplugged) { 921 pci_default_write_config(pdev, PCI_PRIMARY_BUS, 922 pci_dev_bus_num(pdev), 1); 923 s->bus_no += 1; 924 pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1); 925 926 s390_pci_update_subordinate(pdev, s->bus_no); 927 } 928 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 929 pdev = PCI_DEVICE(dev); 930 931 if (!dev->id) { 932 /* In the case the PCI device does not define an id */ 933 /* we generate one based on the PCI address */ 934 dev->id = g_strdup_printf("auto_%02x:%02x.%01x", 935 pci_dev_bus_num(pdev), 936 PCI_SLOT(pdev->devfn), 937 PCI_FUNC(pdev->devfn)); 938 } 939 940 pbdev = s390_pci_find_dev_by_target(s, dev->id); 941 if (!pbdev) { 942 pbdev = s390_pci_device_new(s, dev->id, errp); 943 if (!pbdev) { 944 return; 945 } 946 } 947 948 if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) { 949 pbdev->fh |= FH_SHM_VFIO; 950 } else { 951 pbdev->fh |= FH_SHM_EMUL; 952 } 953 954 pbdev->pdev = pdev; 955 pbdev->iommu = s390_pci_get_iommu(s, pci_get_bus(pdev), pdev->devfn); 956 pbdev->iommu->pbdev = pbdev; 957 pbdev->state = ZPCI_FS_DISABLED; 958 959 if (s390_pci_msix_init(pbdev)) { 960 error_setg(errp, "MSI-X support is mandatory " 961 "in the S390 architecture"); 962 return; 963 } 964 965 if (dev->hotplugged) { 966 s390_pci_generate_plug_event(HP_EVENT_TO_CONFIGURED , 967 pbdev->fh, pbdev->fid); 968 } 969 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 970 pbdev = S390_PCI_DEVICE(dev); 971 972 /* the allocated idx is actually getting used */ 973 s->next_idx = (pbdev->idx + 1) & FH_MASK_INDEX; 974 pbdev->fh = pbdev->idx; 975 QTAILQ_INSERT_TAIL(&s->zpci_devs, pbdev, link); 976 g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev); 977 } else { 978 g_assert_not_reached(); 979 } 980 } 981 982 static void s390_pcihost_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, 983 Error **errp) 984 { 985 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 986 S390PCIBusDevice *pbdev = NULL; 987 988 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 989 PCIDevice *pci_dev = PCI_DEVICE(dev); 990 PCIBus *bus; 991 int32_t devfn; 992 993 pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev)); 994 g_assert(pbdev); 995 996 s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED, 997 pbdev->fh, pbdev->fid); 998 bus = pci_get_bus(pci_dev); 999 devfn = pci_dev->devfn; 1000 object_property_set_bool(OBJECT(dev), false, "realized", NULL); 1001 1002 s390_pci_msix_free(pbdev); 1003 s390_pci_iommu_free(s, bus, devfn); 1004 pbdev->pdev = NULL; 1005 pbdev->state = ZPCI_FS_RESERVED; 1006 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 1007 pbdev = S390_PCI_DEVICE(dev); 1008 pbdev->fid = 0; 1009 QTAILQ_REMOVE(&s->zpci_devs, pbdev, link); 1010 g_hash_table_remove(s->zpci_table, &pbdev->idx); 1011 object_property_set_bool(OBJECT(dev), false, "realized", NULL); 1012 } 1013 } 1014 1015 static void s390_pcihost_unplug_request(HotplugHandler *hotplug_dev, 1016 DeviceState *dev, 1017 Error **errp) 1018 { 1019 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 1020 S390PCIBusDevice *pbdev; 1021 1022 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { 1023 error_setg(errp, "PCI bridge hot unplug currently not supported"); 1024 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 1025 /* 1026 * Redirect the unplug request to the zPCI device and remember that 1027 * we've checked the PCI device already (to prevent endless recursion). 1028 */ 1029 pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev)); 1030 g_assert(pbdev); 1031 pbdev->pci_unplug_request_processed = true; 1032 qdev_unplug(DEVICE(pbdev), errp); 1033 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 1034 pbdev = S390_PCI_DEVICE(dev); 1035 1036 /* 1037 * If unplug was initially requested for the zPCI device, we 1038 * first have to redirect to the PCI device, which will in return 1039 * redirect back to us after performing its checks (if the request 1040 * is not blocked, e.g. because it's a PCI bridge). 1041 */ 1042 if (pbdev->pdev && !pbdev->pci_unplug_request_processed) { 1043 qdev_unplug(DEVICE(pbdev->pdev), errp); 1044 return; 1045 } 1046 pbdev->pci_unplug_request_processed = false; 1047 1048 switch (pbdev->state) { 1049 case ZPCI_FS_STANDBY: 1050 case ZPCI_FS_RESERVED: 1051 s390_pci_perform_unplug(pbdev); 1052 break; 1053 default: 1054 /* 1055 * Allow to send multiple requests, e.g. if the guest crashed 1056 * before releasing the device, we would not be able to send 1057 * another request to the same VM (e.g. fresh OS). 1058 */ 1059 pbdev->unplug_requested = true; 1060 s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST, 1061 pbdev->fh, pbdev->fid); 1062 } 1063 } else { 1064 g_assert_not_reached(); 1065 } 1066 } 1067 1068 static void s390_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev, 1069 void *opaque) 1070 { 1071 S390pciState *s = opaque; 1072 PCIBus *sec_bus = NULL; 1073 1074 if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) != 1075 PCI_HEADER_TYPE_BRIDGE)) { 1076 return; 1077 } 1078 1079 (s->bus_no)++; 1080 pci_default_write_config(pdev, PCI_PRIMARY_BUS, pci_dev_bus_num(pdev), 1); 1081 pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1); 1082 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1); 1083 1084 sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); 1085 if (!sec_bus) { 1086 return; 1087 } 1088 1089 /* Assign numbers to all child bridges. The last is the highest number. */ 1090 pci_for_each_device(sec_bus, pci_bus_num(sec_bus), 1091 s390_pci_enumerate_bridge, s); 1092 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1); 1093 } 1094 1095 static void s390_pcihost_reset(DeviceState *dev) 1096 { 1097 S390pciState *s = S390_PCI_HOST_BRIDGE(dev); 1098 PCIBus *bus = s->parent_obj.bus; 1099 S390PCIBusDevice *pbdev, *next; 1100 1101 /* Process all pending unplug requests */ 1102 QTAILQ_FOREACH_SAFE(pbdev, &s->zpci_devs, link, next) { 1103 if (pbdev->unplug_requested) { 1104 if (pbdev->summary_ind) { 1105 pci_dereg_irqs(pbdev); 1106 } 1107 if (pbdev->iommu->enabled) { 1108 pci_dereg_ioat(pbdev->iommu); 1109 } 1110 pbdev->state = ZPCI_FS_STANDBY; 1111 s390_pci_perform_unplug(pbdev); 1112 } 1113 } 1114 1115 /* 1116 * When resetting a PCI bridge, the assigned numbers are set to 0. So 1117 * on every system reset, we also have to reassign numbers. 1118 */ 1119 s->bus_no = 0; 1120 pci_for_each_device(bus, pci_bus_num(bus), s390_pci_enumerate_bridge, s); 1121 } 1122 1123 static void s390_pcihost_class_init(ObjectClass *klass, void *data) 1124 { 1125 DeviceClass *dc = DEVICE_CLASS(klass); 1126 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); 1127 1128 dc->reset = s390_pcihost_reset; 1129 dc->realize = s390_pcihost_realize; 1130 hc->pre_plug = s390_pcihost_pre_plug; 1131 hc->plug = s390_pcihost_plug; 1132 hc->unplug_request = s390_pcihost_unplug_request; 1133 hc->unplug = s390_pcihost_unplug; 1134 msi_nonbroken = true; 1135 } 1136 1137 static const TypeInfo s390_pcihost_info = { 1138 .name = TYPE_S390_PCI_HOST_BRIDGE, 1139 .parent = TYPE_PCI_HOST_BRIDGE, 1140 .instance_size = sizeof(S390pciState), 1141 .class_init = s390_pcihost_class_init, 1142 .interfaces = (InterfaceInfo[]) { 1143 { TYPE_HOTPLUG_HANDLER }, 1144 { } 1145 } 1146 }; 1147 1148 static const TypeInfo s390_pcibus_info = { 1149 .name = TYPE_S390_PCI_BUS, 1150 .parent = TYPE_BUS, 1151 .instance_size = sizeof(S390PCIBus), 1152 }; 1153 1154 static uint16_t s390_pci_generate_uid(S390pciState *s) 1155 { 1156 uint16_t uid = 0; 1157 1158 do { 1159 uid++; 1160 if (!s390_pci_find_dev_by_uid(s, uid)) { 1161 return uid; 1162 } 1163 } while (uid < ZPCI_MAX_UID); 1164 1165 return UID_UNDEFINED; 1166 } 1167 1168 static uint32_t s390_pci_generate_fid(S390pciState *s, Error **errp) 1169 { 1170 uint32_t fid = 0; 1171 1172 do { 1173 if (!s390_pci_find_dev_by_fid(s, fid)) { 1174 return fid; 1175 } 1176 } while (fid++ != ZPCI_MAX_FID); 1177 1178 error_setg(errp, "no free fid could be found"); 1179 return 0; 1180 } 1181 1182 static void s390_pci_device_realize(DeviceState *dev, Error **errp) 1183 { 1184 S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev); 1185 S390pciState *s = s390_get_phb(); 1186 1187 if (!zpci->target) { 1188 error_setg(errp, "target must be defined"); 1189 return; 1190 } 1191 1192 if (s390_pci_find_dev_by_target(s, zpci->target)) { 1193 error_setg(errp, "target %s already has an associated zpci device", 1194 zpci->target); 1195 return; 1196 } 1197 1198 if (zpci->uid == UID_UNDEFINED) { 1199 zpci->uid = s390_pci_generate_uid(s); 1200 if (!zpci->uid) { 1201 error_setg(errp, "no free uid could be found"); 1202 return; 1203 } 1204 } else if (s390_pci_find_dev_by_uid(s, zpci->uid)) { 1205 error_setg(errp, "uid %u already in use", zpci->uid); 1206 return; 1207 } 1208 1209 if (!zpci->fid_defined) { 1210 Error *local_error = NULL; 1211 1212 zpci->fid = s390_pci_generate_fid(s, &local_error); 1213 if (local_error) { 1214 error_propagate(errp, local_error); 1215 return; 1216 } 1217 } else if (s390_pci_find_dev_by_fid(s, zpci->fid)) { 1218 error_setg(errp, "fid %u already in use", zpci->fid); 1219 return; 1220 } 1221 1222 zpci->state = ZPCI_FS_RESERVED; 1223 zpci->fmb.format = ZPCI_FMB_FORMAT; 1224 } 1225 1226 static void s390_pci_device_reset(DeviceState *dev) 1227 { 1228 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev); 1229 1230 switch (pbdev->state) { 1231 case ZPCI_FS_RESERVED: 1232 return; 1233 case ZPCI_FS_STANDBY: 1234 break; 1235 default: 1236 pbdev->fh &= ~FH_MASK_ENABLE; 1237 pbdev->state = ZPCI_FS_DISABLED; 1238 break; 1239 } 1240 1241 if (pbdev->summary_ind) { 1242 pci_dereg_irqs(pbdev); 1243 } 1244 if (pbdev->iommu->enabled) { 1245 pci_dereg_ioat(pbdev->iommu); 1246 } 1247 1248 fmb_timer_free(pbdev); 1249 } 1250 1251 static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name, 1252 void *opaque, Error **errp) 1253 { 1254 Property *prop = opaque; 1255 uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop); 1256 1257 visit_type_uint32(v, name, ptr, errp); 1258 } 1259 1260 static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name, 1261 void *opaque, Error **errp) 1262 { 1263 DeviceState *dev = DEVICE(obj); 1264 S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj); 1265 Property *prop = opaque; 1266 uint32_t *ptr = qdev_get_prop_ptr(dev, prop); 1267 1268 if (dev->realized) { 1269 qdev_prop_set_after_realize(dev, name, errp); 1270 return; 1271 } 1272 1273 visit_type_uint32(v, name, ptr, errp); 1274 zpci->fid_defined = true; 1275 } 1276 1277 static const PropertyInfo s390_pci_fid_propinfo = { 1278 .name = "zpci_fid", 1279 .get = s390_pci_get_fid, 1280 .set = s390_pci_set_fid, 1281 }; 1282 1283 #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \ 1284 DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t) 1285 1286 static Property s390_pci_device_properties[] = { 1287 DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED), 1288 DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid), 1289 DEFINE_PROP_STRING("target", S390PCIBusDevice, target), 1290 DEFINE_PROP_END_OF_LIST(), 1291 }; 1292 1293 static const VMStateDescription s390_pci_device_vmstate = { 1294 .name = TYPE_S390_PCI_DEVICE, 1295 /* 1296 * TODO: add state handling here, so migration works at least with 1297 * emulated pci devices on s390x 1298 */ 1299 .unmigratable = 1, 1300 }; 1301 1302 static void s390_pci_device_class_init(ObjectClass *klass, void *data) 1303 { 1304 DeviceClass *dc = DEVICE_CLASS(klass); 1305 1306 dc->desc = "zpci device"; 1307 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 1308 dc->reset = s390_pci_device_reset; 1309 dc->bus_type = TYPE_S390_PCI_BUS; 1310 dc->realize = s390_pci_device_realize; 1311 dc->props = s390_pci_device_properties; 1312 dc->vmsd = &s390_pci_device_vmstate; 1313 } 1314 1315 static const TypeInfo s390_pci_device_info = { 1316 .name = TYPE_S390_PCI_DEVICE, 1317 .parent = TYPE_DEVICE, 1318 .instance_size = sizeof(S390PCIBusDevice), 1319 .class_init = s390_pci_device_class_init, 1320 }; 1321 1322 static TypeInfo s390_pci_iommu_info = { 1323 .name = TYPE_S390_PCI_IOMMU, 1324 .parent = TYPE_OBJECT, 1325 .instance_size = sizeof(S390PCIIOMMU), 1326 }; 1327 1328 static void s390_iommu_memory_region_class_init(ObjectClass *klass, void *data) 1329 { 1330 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass); 1331 1332 imrc->translate = s390_translate_iommu; 1333 imrc->replay = s390_pci_iommu_replay; 1334 } 1335 1336 static const TypeInfo s390_iommu_memory_region_info = { 1337 .parent = TYPE_IOMMU_MEMORY_REGION, 1338 .name = TYPE_S390_IOMMU_MEMORY_REGION, 1339 .class_init = s390_iommu_memory_region_class_init, 1340 }; 1341 1342 static void s390_pci_register_types(void) 1343 { 1344 type_register_static(&s390_pcihost_info); 1345 type_register_static(&s390_pcibus_info); 1346 type_register_static(&s390_pci_device_info); 1347 type_register_static(&s390_pci_iommu_info); 1348 type_register_static(&s390_iommu_memory_region_info); 1349 } 1350 1351 type_init(s390_pci_register_types) 1352