1 /* 2 * s390 PCI BUS 3 * 4 * Copyright 2014 IBM Corp. 5 * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com> 6 * Hong Bo Li <lihbbj@cn.ibm.com> 7 * Yi Min Zhao <zyimin@cn.ibm.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or (at 10 * your option) any later version. See the COPYING file in the top-level 11 * directory. 12 */ 13 14 #include "qemu/osdep.h" 15 #include "qapi/error.h" 16 #include "qapi/visitor.h" 17 #include "qemu-common.h" 18 #include "cpu.h" 19 #include "s390-pci-bus.h" 20 #include "s390-pci-inst.h" 21 #include "hw/pci/pci_bus.h" 22 #include "hw/pci/pci_bridge.h" 23 #include "hw/pci/msi.h" 24 #include "qemu/error-report.h" 25 26 #ifndef DEBUG_S390PCI_BUS 27 #define DEBUG_S390PCI_BUS 0 28 #endif 29 30 #define DPRINTF(fmt, ...) \ 31 do { \ 32 if (DEBUG_S390PCI_BUS) { \ 33 fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); \ 34 } \ 35 } while (0) 36 37 S390pciState *s390_get_phb(void) 38 { 39 static S390pciState *phb; 40 41 if (!phb) { 42 phb = S390_PCI_HOST_BRIDGE( 43 object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL)); 44 assert(phb != NULL); 45 } 46 47 return phb; 48 } 49 50 int pci_chsc_sei_nt2_get_event(void *res) 51 { 52 ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res; 53 PciCcdfAvail *accdf; 54 PciCcdfErr *eccdf; 55 int rc = 1; 56 SeiContainer *sei_cont; 57 S390pciState *s = s390_get_phb(); 58 59 sei_cont = QTAILQ_FIRST(&s->pending_sei); 60 if (sei_cont) { 61 QTAILQ_REMOVE(&s->pending_sei, sei_cont, link); 62 nt2_res->nt = 2; 63 nt2_res->cc = sei_cont->cc; 64 nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res)); 65 switch (sei_cont->cc) { 66 case 1: /* error event */ 67 eccdf = (PciCcdfErr *)nt2_res->ccdf; 68 eccdf->fid = cpu_to_be32(sei_cont->fid); 69 eccdf->fh = cpu_to_be32(sei_cont->fh); 70 eccdf->e = cpu_to_be32(sei_cont->e); 71 eccdf->faddr = cpu_to_be64(sei_cont->faddr); 72 eccdf->pec = cpu_to_be16(sei_cont->pec); 73 break; 74 case 2: /* availability event */ 75 accdf = (PciCcdfAvail *)nt2_res->ccdf; 76 accdf->fid = cpu_to_be32(sei_cont->fid); 77 accdf->fh = cpu_to_be32(sei_cont->fh); 78 accdf->pec = cpu_to_be16(sei_cont->pec); 79 break; 80 default: 81 abort(); 82 } 83 g_free(sei_cont); 84 rc = 0; 85 } 86 87 return rc; 88 } 89 90 int pci_chsc_sei_nt2_have_event(void) 91 { 92 S390pciState *s = s390_get_phb(); 93 94 return !QTAILQ_EMPTY(&s->pending_sei); 95 } 96 97 S390PCIBusDevice *s390_pci_find_next_avail_dev(S390pciState *s, 98 S390PCIBusDevice *pbdev) 99 { 100 S390PCIBusDevice *ret = pbdev ? QTAILQ_NEXT(pbdev, link) : 101 QTAILQ_FIRST(&s->zpci_devs); 102 103 while (ret && ret->state == ZPCI_FS_RESERVED) { 104 ret = QTAILQ_NEXT(ret, link); 105 } 106 107 return ret; 108 } 109 110 S390PCIBusDevice *s390_pci_find_dev_by_fid(S390pciState *s, uint32_t fid) 111 { 112 S390PCIBusDevice *pbdev; 113 114 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 115 if (pbdev->fid == fid) { 116 return pbdev; 117 } 118 } 119 120 return NULL; 121 } 122 123 void s390_pci_sclp_configure(SCCB *sccb) 124 { 125 IoaCfgSccb *psccb = (IoaCfgSccb *)sccb; 126 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(), 127 be32_to_cpu(psccb->aid)); 128 uint16_t rc; 129 130 if (!pbdev) { 131 DPRINTF("sclp config no dev found\n"); 132 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; 133 goto out; 134 } 135 136 switch (pbdev->state) { 137 case ZPCI_FS_RESERVED: 138 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; 139 break; 140 case ZPCI_FS_STANDBY: 141 pbdev->state = ZPCI_FS_DISABLED; 142 rc = SCLP_RC_NORMAL_COMPLETION; 143 break; 144 default: 145 rc = SCLP_RC_NO_ACTION_REQUIRED; 146 } 147 out: 148 psccb->header.response_code = cpu_to_be16(rc); 149 } 150 151 static void s390_pci_perform_unplug(S390PCIBusDevice *pbdev) 152 { 153 HotplugHandler *hotplug_ctrl; 154 155 /* Unplug the PCI device */ 156 if (pbdev->pdev) { 157 hotplug_ctrl = qdev_get_hotplug_handler(DEVICE(pbdev->pdev)); 158 hotplug_handler_unplug(hotplug_ctrl, DEVICE(pbdev->pdev), 159 &error_abort); 160 } 161 162 /* Unplug the zPCI device */ 163 hotplug_ctrl = qdev_get_hotplug_handler(DEVICE(pbdev)); 164 hotplug_handler_unplug(hotplug_ctrl, DEVICE(pbdev), &error_abort); 165 } 166 167 void s390_pci_sclp_deconfigure(SCCB *sccb) 168 { 169 IoaCfgSccb *psccb = (IoaCfgSccb *)sccb; 170 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(), 171 be32_to_cpu(psccb->aid)); 172 uint16_t rc; 173 174 if (!pbdev) { 175 DPRINTF("sclp deconfig no dev found\n"); 176 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; 177 goto out; 178 } 179 180 switch (pbdev->state) { 181 case ZPCI_FS_RESERVED: 182 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; 183 break; 184 case ZPCI_FS_STANDBY: 185 rc = SCLP_RC_NO_ACTION_REQUIRED; 186 break; 187 default: 188 if (pbdev->summary_ind) { 189 pci_dereg_irqs(pbdev); 190 } 191 if (pbdev->iommu->enabled) { 192 pci_dereg_ioat(pbdev->iommu); 193 } 194 pbdev->state = ZPCI_FS_STANDBY; 195 rc = SCLP_RC_NORMAL_COMPLETION; 196 197 if (pbdev->unplug_requested) { 198 s390_pci_perform_unplug(pbdev); 199 } 200 } 201 out: 202 psccb->header.response_code = cpu_to_be16(rc); 203 } 204 205 static S390PCIBusDevice *s390_pci_find_dev_by_uid(S390pciState *s, uint16_t uid) 206 { 207 S390PCIBusDevice *pbdev; 208 209 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 210 if (pbdev->uid == uid) { 211 return pbdev; 212 } 213 } 214 215 return NULL; 216 } 217 218 S390PCIBusDevice *s390_pci_find_dev_by_target(S390pciState *s, 219 const char *target) 220 { 221 S390PCIBusDevice *pbdev; 222 223 if (!target) { 224 return NULL; 225 } 226 227 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 228 if (!strcmp(pbdev->target, target)) { 229 return pbdev; 230 } 231 } 232 233 return NULL; 234 } 235 236 static S390PCIBusDevice *s390_pci_find_dev_by_pci(S390pciState *s, 237 PCIDevice *pci_dev) 238 { 239 S390PCIBusDevice *pbdev; 240 241 if (!pci_dev) { 242 return NULL; 243 } 244 245 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 246 if (pbdev->pdev == pci_dev) { 247 return pbdev; 248 } 249 } 250 251 return NULL; 252 } 253 254 S390PCIBusDevice *s390_pci_find_dev_by_idx(S390pciState *s, uint32_t idx) 255 { 256 return g_hash_table_lookup(s->zpci_table, &idx); 257 } 258 259 S390PCIBusDevice *s390_pci_find_dev_by_fh(S390pciState *s, uint32_t fh) 260 { 261 uint32_t idx = FH_MASK_INDEX & fh; 262 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_idx(s, idx); 263 264 if (pbdev && pbdev->fh == fh) { 265 return pbdev; 266 } 267 268 return NULL; 269 } 270 271 static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh, 272 uint32_t fid, uint64_t faddr, uint32_t e) 273 { 274 SeiContainer *sei_cont; 275 S390pciState *s = s390_get_phb(); 276 277 sei_cont = g_new0(SeiContainer, 1); 278 sei_cont->fh = fh; 279 sei_cont->fid = fid; 280 sei_cont->cc = cc; 281 sei_cont->pec = pec; 282 sei_cont->faddr = faddr; 283 sei_cont->e = e; 284 285 QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link); 286 css_generate_css_crws(0); 287 } 288 289 static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh, 290 uint32_t fid) 291 { 292 s390_pci_generate_event(2, pec, fh, fid, 0, 0); 293 } 294 295 void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid, 296 uint64_t faddr, uint32_t e) 297 { 298 s390_pci_generate_event(1, pec, fh, fid, faddr, e); 299 } 300 301 static void s390_pci_set_irq(void *opaque, int irq, int level) 302 { 303 /* nothing to do */ 304 } 305 306 static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num) 307 { 308 /* nothing to do */ 309 return 0; 310 } 311 312 static uint64_t s390_pci_get_table_origin(uint64_t iota) 313 { 314 return iota & ~ZPCI_IOTA_RTTO_FLAG; 315 } 316 317 static unsigned int calc_rtx(dma_addr_t ptr) 318 { 319 return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK; 320 } 321 322 static unsigned int calc_sx(dma_addr_t ptr) 323 { 324 return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK; 325 } 326 327 static unsigned int calc_px(dma_addr_t ptr) 328 { 329 return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK; 330 } 331 332 static uint64_t get_rt_sto(uint64_t entry) 333 { 334 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX) 335 ? (entry & ZPCI_RTE_ADDR_MASK) 336 : 0; 337 } 338 339 static uint64_t get_st_pto(uint64_t entry) 340 { 341 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX) 342 ? (entry & ZPCI_STE_ADDR_MASK) 343 : 0; 344 } 345 346 static bool rt_entry_isvalid(uint64_t entry) 347 { 348 return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID; 349 } 350 351 static bool pt_entry_isvalid(uint64_t entry) 352 { 353 return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID; 354 } 355 356 static bool entry_isprotected(uint64_t entry) 357 { 358 return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED; 359 } 360 361 /* ett is expected table type, -1 page table, 0 segment table, 1 region table */ 362 static uint64_t get_table_index(uint64_t iova, int8_t ett) 363 { 364 switch (ett) { 365 case ZPCI_ETT_PT: 366 return calc_px(iova); 367 case ZPCI_ETT_ST: 368 return calc_sx(iova); 369 case ZPCI_ETT_RT: 370 return calc_rtx(iova); 371 } 372 373 return -1; 374 } 375 376 static bool entry_isvalid(uint64_t entry, int8_t ett) 377 { 378 switch (ett) { 379 case ZPCI_ETT_PT: 380 return pt_entry_isvalid(entry); 381 case ZPCI_ETT_ST: 382 case ZPCI_ETT_RT: 383 return rt_entry_isvalid(entry); 384 } 385 386 return false; 387 } 388 389 /* Return true if address translation is done */ 390 static bool translate_iscomplete(uint64_t entry, int8_t ett) 391 { 392 switch (ett) { 393 case 0: 394 return (entry & ZPCI_TABLE_FC) ? true : false; 395 case 1: 396 return false; 397 } 398 399 return true; 400 } 401 402 static uint64_t get_frame_size(int8_t ett) 403 { 404 switch (ett) { 405 case ZPCI_ETT_PT: 406 return 1ULL << 12; 407 case ZPCI_ETT_ST: 408 return 1ULL << 20; 409 case ZPCI_ETT_RT: 410 return 1ULL << 31; 411 } 412 413 return 0; 414 } 415 416 static uint64_t get_next_table_origin(uint64_t entry, int8_t ett) 417 { 418 switch (ett) { 419 case ZPCI_ETT_PT: 420 return entry & ZPCI_PTE_ADDR_MASK; 421 case ZPCI_ETT_ST: 422 return get_st_pto(entry); 423 case ZPCI_ETT_RT: 424 return get_rt_sto(entry); 425 } 426 427 return 0; 428 } 429 430 /** 431 * table_translate: do translation within one table and return the following 432 * table origin 433 * 434 * @entry: the entry being translated, the result is stored in this. 435 * @to: the address of table origin. 436 * @ett: expected table type, 1 region table, 0 segment table and -1 page table. 437 * @error: error code 438 */ 439 static uint64_t table_translate(S390IOTLBEntry *entry, uint64_t to, int8_t ett, 440 uint16_t *error) 441 { 442 uint64_t tx, te, nto = 0; 443 uint16_t err = 0; 444 445 tx = get_table_index(entry->iova, ett); 446 te = address_space_ldq(&address_space_memory, to + tx * sizeof(uint64_t), 447 MEMTXATTRS_UNSPECIFIED, NULL); 448 449 if (!te) { 450 err = ERR_EVENT_INVALTE; 451 goto out; 452 } 453 454 if (!entry_isvalid(te, ett)) { 455 entry->perm &= IOMMU_NONE; 456 goto out; 457 } 458 459 if (ett == ZPCI_ETT_RT && ((te & ZPCI_TABLE_LEN_RTX) != ZPCI_TABLE_LEN_RTX 460 || te & ZPCI_TABLE_OFFSET_MASK)) { 461 err = ERR_EVENT_INVALTL; 462 goto out; 463 } 464 465 nto = get_next_table_origin(te, ett); 466 if (!nto) { 467 err = ERR_EVENT_TT; 468 goto out; 469 } 470 471 if (entry_isprotected(te)) { 472 entry->perm &= IOMMU_RO; 473 } else { 474 entry->perm &= IOMMU_RW; 475 } 476 477 if (translate_iscomplete(te, ett)) { 478 switch (ett) { 479 case ZPCI_ETT_PT: 480 entry->translated_addr = te & ZPCI_PTE_ADDR_MASK; 481 break; 482 case ZPCI_ETT_ST: 483 entry->translated_addr = (te & ZPCI_SFAA_MASK) | 484 (entry->iova & ~ZPCI_SFAA_MASK); 485 break; 486 } 487 nto = 0; 488 } 489 out: 490 if (err) { 491 entry->perm = IOMMU_NONE; 492 *error = err; 493 } 494 entry->len = get_frame_size(ett); 495 return nto; 496 } 497 498 uint16_t s390_guest_io_table_walk(uint64_t g_iota, hwaddr addr, 499 S390IOTLBEntry *entry) 500 { 501 uint64_t to = s390_pci_get_table_origin(g_iota); 502 int8_t ett = 1; 503 uint16_t error = 0; 504 505 entry->iova = addr & PAGE_MASK; 506 entry->translated_addr = 0; 507 entry->perm = IOMMU_RW; 508 509 if (entry_isprotected(g_iota)) { 510 entry->perm &= IOMMU_RO; 511 } 512 513 while (to) { 514 to = table_translate(entry, to, ett--, &error); 515 } 516 517 return error; 518 } 519 520 static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr addr, 521 IOMMUAccessFlags flag, int iommu_idx) 522 { 523 S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr); 524 S390IOTLBEntry *entry; 525 uint64_t iova = addr & PAGE_MASK; 526 uint16_t error = 0; 527 IOMMUTLBEntry ret = { 528 .target_as = &address_space_memory, 529 .iova = 0, 530 .translated_addr = 0, 531 .addr_mask = ~(hwaddr)0, 532 .perm = IOMMU_NONE, 533 }; 534 535 switch (iommu->pbdev->state) { 536 case ZPCI_FS_ENABLED: 537 case ZPCI_FS_BLOCKED: 538 if (!iommu->enabled) { 539 return ret; 540 } 541 break; 542 default: 543 return ret; 544 } 545 546 DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr); 547 548 if (addr < iommu->pba || addr > iommu->pal) { 549 error = ERR_EVENT_OORANGE; 550 goto err; 551 } 552 553 entry = g_hash_table_lookup(iommu->iotlb, &iova); 554 if (entry) { 555 ret.iova = entry->iova; 556 ret.translated_addr = entry->translated_addr; 557 ret.addr_mask = entry->len - 1; 558 ret.perm = entry->perm; 559 } else { 560 ret.iova = iova; 561 ret.addr_mask = ~PAGE_MASK; 562 ret.perm = IOMMU_NONE; 563 } 564 565 if (flag != IOMMU_NONE && !(flag & ret.perm)) { 566 error = ERR_EVENT_TPROTE; 567 } 568 err: 569 if (error) { 570 iommu->pbdev->state = ZPCI_FS_ERROR; 571 s390_pci_generate_error_event(error, iommu->pbdev->fh, 572 iommu->pbdev->fid, addr, 0); 573 } 574 return ret; 575 } 576 577 static void s390_pci_iommu_replay(IOMMUMemoryRegion *iommu, 578 IOMMUNotifier *notifier) 579 { 580 /* It's impossible to plug a pci device on s390x that already has iommu 581 * mappings which need to be replayed, that is due to the "one iommu per 582 * zpci device" construct. But when we support migration of vfio-pci 583 * devices in future, we need to revisit this. 584 */ 585 return; 586 } 587 588 static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus, 589 int devfn) 590 { 591 uint64_t key = (uintptr_t)bus; 592 S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key); 593 S390PCIIOMMU *iommu; 594 595 if (!table) { 596 table = g_new0(S390PCIIOMMUTable, 1); 597 table->key = key; 598 g_hash_table_insert(s->iommu_table, &table->key, table); 599 } 600 601 iommu = table->iommu[PCI_SLOT(devfn)]; 602 if (!iommu) { 603 iommu = S390_PCI_IOMMU(object_new(TYPE_S390_PCI_IOMMU)); 604 605 char *mr_name = g_strdup_printf("iommu-root-%02x:%02x.%01x", 606 pci_bus_num(bus), 607 PCI_SLOT(devfn), 608 PCI_FUNC(devfn)); 609 char *as_name = g_strdup_printf("iommu-pci-%02x:%02x.%01x", 610 pci_bus_num(bus), 611 PCI_SLOT(devfn), 612 PCI_FUNC(devfn)); 613 memory_region_init(&iommu->mr, OBJECT(iommu), mr_name, UINT64_MAX); 614 address_space_init(&iommu->as, &iommu->mr, as_name); 615 iommu->iotlb = g_hash_table_new_full(g_int64_hash, g_int64_equal, 616 NULL, g_free); 617 table->iommu[PCI_SLOT(devfn)] = iommu; 618 619 g_free(mr_name); 620 g_free(as_name); 621 } 622 623 return iommu; 624 } 625 626 static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn) 627 { 628 S390pciState *s = opaque; 629 S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn); 630 631 return &iommu->as; 632 } 633 634 static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set) 635 { 636 uint8_t ind_old, ind_new; 637 hwaddr len = 1; 638 uint8_t *ind_addr; 639 640 ind_addr = cpu_physical_memory_map(ind_loc, &len, 1); 641 if (!ind_addr) { 642 s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0); 643 return -1; 644 } 645 do { 646 ind_old = *ind_addr; 647 ind_new = ind_old | to_be_set; 648 } while (atomic_cmpxchg(ind_addr, ind_old, ind_new) != ind_old); 649 cpu_physical_memory_unmap(ind_addr, len, 1, len); 650 651 return ind_old; 652 } 653 654 static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data, 655 unsigned int size) 656 { 657 S390PCIBusDevice *pbdev = opaque; 658 uint32_t vec = data & ZPCI_MSI_VEC_MASK; 659 uint64_t ind_bit; 660 uint32_t sum_bit; 661 662 assert(pbdev); 663 DPRINTF("write_msix data 0x%" PRIx64 " idx %d vec 0x%x\n", data, 664 pbdev->idx, vec); 665 666 if (pbdev->state != ZPCI_FS_ENABLED) { 667 return; 668 } 669 670 ind_bit = pbdev->routes.adapter.ind_offset; 671 sum_bit = pbdev->routes.adapter.summary_offset; 672 673 set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8, 674 0x80 >> ((ind_bit + vec) % 8)); 675 if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8, 676 0x80 >> (sum_bit % 8))) { 677 css_adapter_interrupt(CSS_IO_ADAPTER_PCI, pbdev->isc); 678 } 679 } 680 681 static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size) 682 { 683 return 0xffffffff; 684 } 685 686 static const MemoryRegionOps s390_msi_ctrl_ops = { 687 .write = s390_msi_ctrl_write, 688 .read = s390_msi_ctrl_read, 689 .endianness = DEVICE_LITTLE_ENDIAN, 690 }; 691 692 void s390_pci_iommu_enable(S390PCIIOMMU *iommu) 693 { 694 char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid); 695 memory_region_init_iommu(&iommu->iommu_mr, sizeof(iommu->iommu_mr), 696 TYPE_S390_IOMMU_MEMORY_REGION, OBJECT(&iommu->mr), 697 name, iommu->pal - iommu->pba + 1); 698 iommu->enabled = true; 699 memory_region_add_subregion(&iommu->mr, 0, MEMORY_REGION(&iommu->iommu_mr)); 700 g_free(name); 701 } 702 703 void s390_pci_iommu_disable(S390PCIIOMMU *iommu) 704 { 705 iommu->enabled = false; 706 g_hash_table_remove_all(iommu->iotlb); 707 memory_region_del_subregion(&iommu->mr, MEMORY_REGION(&iommu->iommu_mr)); 708 object_unparent(OBJECT(&iommu->iommu_mr)); 709 } 710 711 static void s390_pci_iommu_free(S390pciState *s, PCIBus *bus, int32_t devfn) 712 { 713 uint64_t key = (uintptr_t)bus; 714 S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key); 715 S390PCIIOMMU *iommu = table ? table->iommu[PCI_SLOT(devfn)] : NULL; 716 717 if (!table || !iommu) { 718 return; 719 } 720 721 table->iommu[PCI_SLOT(devfn)] = NULL; 722 g_hash_table_destroy(iommu->iotlb); 723 address_space_destroy(&iommu->as); 724 object_unparent(OBJECT(&iommu->mr)); 725 object_unparent(OBJECT(iommu)); 726 object_unref(OBJECT(iommu)); 727 } 728 729 static void s390_pcihost_realize(DeviceState *dev, Error **errp) 730 { 731 PCIBus *b; 732 BusState *bus; 733 PCIHostState *phb = PCI_HOST_BRIDGE(dev); 734 S390pciState *s = S390_PCI_HOST_BRIDGE(dev); 735 Error *local_err = NULL; 736 737 DPRINTF("host_init\n"); 738 739 b = pci_register_root_bus(dev, NULL, s390_pci_set_irq, s390_pci_map_irq, 740 NULL, get_system_memory(), get_system_io(), 0, 741 64, TYPE_PCI_BUS); 742 pci_setup_iommu(b, s390_pci_dma_iommu, s); 743 744 bus = BUS(b); 745 qbus_set_hotplug_handler(bus, OBJECT(dev), &local_err); 746 if (local_err) { 747 error_propagate(errp, local_err); 748 return; 749 } 750 phb->bus = b; 751 752 s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, dev, NULL)); 753 qbus_set_hotplug_handler(BUS(s->bus), OBJECT(dev), &local_err); 754 if (local_err) { 755 error_propagate(errp, local_err); 756 return; 757 } 758 759 s->iommu_table = g_hash_table_new_full(g_int64_hash, g_int64_equal, 760 NULL, g_free); 761 s->zpci_table = g_hash_table_new_full(g_int_hash, g_int_equal, NULL, NULL); 762 s->bus_no = 0; 763 QTAILQ_INIT(&s->pending_sei); 764 QTAILQ_INIT(&s->zpci_devs); 765 766 css_register_io_adapters(CSS_IO_ADAPTER_PCI, true, false, 767 S390_ADAPTER_SUPPRESSIBLE, &local_err); 768 error_propagate(errp, local_err); 769 } 770 771 static int s390_pci_msix_init(S390PCIBusDevice *pbdev) 772 { 773 char *name; 774 uint8_t pos; 775 uint16_t ctrl; 776 uint32_t table, pba; 777 778 pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX); 779 if (!pos) { 780 return -1; 781 } 782 783 ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS, 784 pci_config_size(pbdev->pdev), sizeof(ctrl)); 785 table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE, 786 pci_config_size(pbdev->pdev), sizeof(table)); 787 pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA, 788 pci_config_size(pbdev->pdev), sizeof(pba)); 789 790 pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK; 791 pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK; 792 pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK; 793 pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; 794 pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; 795 796 name = g_strdup_printf("msix-s390-%04x", pbdev->uid); 797 memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev), 798 &s390_msi_ctrl_ops, pbdev, name, PAGE_SIZE); 799 memory_region_add_subregion(&pbdev->iommu->mr, ZPCI_MSI_ADDR, 800 &pbdev->msix_notify_mr); 801 g_free(name); 802 803 return 0; 804 } 805 806 static void s390_pci_msix_free(S390PCIBusDevice *pbdev) 807 { 808 memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr); 809 object_unparent(OBJECT(&pbdev->msix_notify_mr)); 810 } 811 812 static S390PCIBusDevice *s390_pci_device_new(S390pciState *s, 813 const char *target, Error **errp) 814 { 815 Error *local_err = NULL; 816 DeviceState *dev; 817 818 dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE); 819 if (!dev) { 820 error_setg(errp, "zPCI device could not be created"); 821 return NULL; 822 } 823 824 object_property_set_str(OBJECT(dev), target, "target", &local_err); 825 if (local_err) { 826 object_unparent(OBJECT(dev)); 827 error_propagate_prepend(errp, local_err, 828 "zPCI device could not be created: "); 829 return NULL; 830 } 831 object_property_set_bool(OBJECT(dev), true, "realized", &local_err); 832 if (local_err) { 833 object_unparent(OBJECT(dev)); 834 error_propagate_prepend(errp, local_err, 835 "zPCI device could not be created: "); 836 return NULL; 837 } 838 839 return S390_PCI_DEVICE(dev); 840 } 841 842 static bool s390_pci_alloc_idx(S390pciState *s, S390PCIBusDevice *pbdev) 843 { 844 uint32_t idx; 845 846 idx = s->next_idx; 847 while (s390_pci_find_dev_by_idx(s, idx)) { 848 idx = (idx + 1) & FH_MASK_INDEX; 849 if (idx == s->next_idx) { 850 return false; 851 } 852 } 853 854 pbdev->idx = idx; 855 return true; 856 } 857 858 static void s390_pcihost_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 859 Error **errp) 860 { 861 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 862 863 if (!s390_has_feat(S390_FEAT_ZPCI)) { 864 warn_report("Plugging a PCI/zPCI device without the 'zpci' CPU " 865 "feature enabled; the guest will not be able to see/use " 866 "this device"); 867 } 868 869 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 870 PCIDevice *pdev = PCI_DEVICE(dev); 871 872 if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) { 873 error_setg(errp, "multifunction not supported in s390"); 874 return; 875 } 876 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 877 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev); 878 879 if (!s390_pci_alloc_idx(s, pbdev)) { 880 error_setg(errp, "no slot for plugging zpci device"); 881 return; 882 } 883 } 884 } 885 886 static void s390_pci_update_subordinate(PCIDevice *dev, uint32_t nr) 887 { 888 uint32_t old_nr; 889 890 pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1); 891 while (!pci_bus_is_root(pci_get_bus(dev))) { 892 dev = pci_get_bus(dev)->parent_dev; 893 894 old_nr = pci_default_read_config(dev, PCI_SUBORDINATE_BUS, 1); 895 if (old_nr < nr) { 896 pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1); 897 } 898 } 899 } 900 901 static void s390_pcihost_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 902 Error **errp) 903 { 904 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 905 PCIDevice *pdev = NULL; 906 S390PCIBusDevice *pbdev = NULL; 907 908 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { 909 PCIBridge *pb = PCI_BRIDGE(dev); 910 911 pdev = PCI_DEVICE(dev); 912 pci_bridge_map_irq(pb, dev->id, s390_pci_map_irq); 913 pci_setup_iommu(&pb->sec_bus, s390_pci_dma_iommu, s); 914 915 qbus_set_hotplug_handler(BUS(&pb->sec_bus), OBJECT(s), errp); 916 917 if (dev->hotplugged) { 918 pci_default_write_config(pdev, PCI_PRIMARY_BUS, 919 pci_dev_bus_num(pdev), 1); 920 s->bus_no += 1; 921 pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1); 922 923 s390_pci_update_subordinate(pdev, s->bus_no); 924 } 925 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 926 pdev = PCI_DEVICE(dev); 927 928 if (!dev->id) { 929 /* In the case the PCI device does not define an id */ 930 /* we generate one based on the PCI address */ 931 dev->id = g_strdup_printf("auto_%02x:%02x.%01x", 932 pci_dev_bus_num(pdev), 933 PCI_SLOT(pdev->devfn), 934 PCI_FUNC(pdev->devfn)); 935 } 936 937 pbdev = s390_pci_find_dev_by_target(s, dev->id); 938 if (!pbdev) { 939 pbdev = s390_pci_device_new(s, dev->id, errp); 940 if (!pbdev) { 941 return; 942 } 943 } 944 945 if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) { 946 pbdev->fh |= FH_SHM_VFIO; 947 } else { 948 pbdev->fh |= FH_SHM_EMUL; 949 } 950 951 pbdev->pdev = pdev; 952 pbdev->iommu = s390_pci_get_iommu(s, pci_get_bus(pdev), pdev->devfn); 953 pbdev->iommu->pbdev = pbdev; 954 pbdev->state = ZPCI_FS_DISABLED; 955 956 if (s390_pci_msix_init(pbdev)) { 957 error_setg(errp, "MSI-X support is mandatory " 958 "in the S390 architecture"); 959 return; 960 } 961 962 if (dev->hotplugged) { 963 s390_pci_generate_plug_event(HP_EVENT_TO_CONFIGURED , 964 pbdev->fh, pbdev->fid); 965 } 966 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 967 pbdev = S390_PCI_DEVICE(dev); 968 969 /* the allocated idx is actually getting used */ 970 s->next_idx = (pbdev->idx + 1) & FH_MASK_INDEX; 971 pbdev->fh = pbdev->idx; 972 QTAILQ_INSERT_TAIL(&s->zpci_devs, pbdev, link); 973 g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev); 974 } else { 975 g_assert_not_reached(); 976 } 977 } 978 979 static void s390_pcihost_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, 980 Error **errp) 981 { 982 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 983 S390PCIBusDevice *pbdev = NULL; 984 985 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 986 PCIDevice *pci_dev = PCI_DEVICE(dev); 987 PCIBus *bus; 988 int32_t devfn; 989 990 pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev)); 991 g_assert(pbdev); 992 993 s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED, 994 pbdev->fh, pbdev->fid); 995 bus = pci_get_bus(pci_dev); 996 devfn = pci_dev->devfn; 997 object_unparent(OBJECT(pci_dev)); 998 999 s390_pci_msix_free(pbdev); 1000 s390_pci_iommu_free(s, bus, devfn); 1001 pbdev->pdev = NULL; 1002 pbdev->state = ZPCI_FS_RESERVED; 1003 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 1004 pbdev = S390_PCI_DEVICE(dev); 1005 pbdev->fid = 0; 1006 QTAILQ_REMOVE(&s->zpci_devs, pbdev, link); 1007 g_hash_table_remove(s->zpci_table, &pbdev->idx); 1008 object_unparent(OBJECT(pbdev)); 1009 } 1010 } 1011 1012 static void s390_pcihost_unplug_request(HotplugHandler *hotplug_dev, 1013 DeviceState *dev, 1014 Error **errp) 1015 { 1016 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 1017 S390PCIBusDevice *pbdev; 1018 1019 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { 1020 error_setg(errp, "PCI bridge hot unplug currently not supported"); 1021 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 1022 /* 1023 * Redirect the unplug request to the zPCI device and remember that 1024 * we've checked the PCI device already (to prevent endless recursion). 1025 */ 1026 pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev)); 1027 g_assert(pbdev); 1028 pbdev->pci_unplug_request_processed = true; 1029 qdev_unplug(DEVICE(pbdev), errp); 1030 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 1031 pbdev = S390_PCI_DEVICE(dev); 1032 1033 /* 1034 * If unplug was initially requested for the zPCI device, we 1035 * first have to redirect to the PCI device, which will in return 1036 * redirect back to us after performing its checks (if the request 1037 * is not blocked, e.g. because it's a PCI bridge). 1038 */ 1039 if (pbdev->pdev && !pbdev->pci_unplug_request_processed) { 1040 qdev_unplug(DEVICE(pbdev->pdev), errp); 1041 return; 1042 } 1043 pbdev->pci_unplug_request_processed = false; 1044 1045 switch (pbdev->state) { 1046 case ZPCI_FS_STANDBY: 1047 case ZPCI_FS_RESERVED: 1048 s390_pci_perform_unplug(pbdev); 1049 break; 1050 default: 1051 /* 1052 * Allow to send multiple requests, e.g. if the guest crashed 1053 * before releasing the device, we would not be able to send 1054 * another request to the same VM (e.g. fresh OS). 1055 */ 1056 pbdev->unplug_requested = true; 1057 s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST, 1058 pbdev->fh, pbdev->fid); 1059 } 1060 } else { 1061 g_assert_not_reached(); 1062 } 1063 } 1064 1065 static void s390_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev, 1066 void *opaque) 1067 { 1068 S390pciState *s = opaque; 1069 PCIBus *sec_bus = NULL; 1070 1071 if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) != 1072 PCI_HEADER_TYPE_BRIDGE)) { 1073 return; 1074 } 1075 1076 (s->bus_no)++; 1077 pci_default_write_config(pdev, PCI_PRIMARY_BUS, pci_dev_bus_num(pdev), 1); 1078 pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1); 1079 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1); 1080 1081 sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); 1082 if (!sec_bus) { 1083 return; 1084 } 1085 1086 /* Assign numbers to all child bridges. The last is the highest number. */ 1087 pci_for_each_device(sec_bus, pci_bus_num(sec_bus), 1088 s390_pci_enumerate_bridge, s); 1089 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1); 1090 } 1091 1092 static void s390_pcihost_reset(DeviceState *dev) 1093 { 1094 S390pciState *s = S390_PCI_HOST_BRIDGE(dev); 1095 PCIBus *bus = s->parent_obj.bus; 1096 S390PCIBusDevice *pbdev, *next; 1097 1098 /* Process all pending unplug requests */ 1099 QTAILQ_FOREACH_SAFE(pbdev, &s->zpci_devs, link, next) { 1100 if (pbdev->unplug_requested) { 1101 if (pbdev->summary_ind) { 1102 pci_dereg_irqs(pbdev); 1103 } 1104 if (pbdev->iommu->enabled) { 1105 pci_dereg_ioat(pbdev->iommu); 1106 } 1107 pbdev->state = ZPCI_FS_STANDBY; 1108 s390_pci_perform_unplug(pbdev); 1109 } 1110 } 1111 1112 /* 1113 * When resetting a PCI bridge, the assigned numbers are set to 0. So 1114 * on every system reset, we also have to reassign numbers. 1115 */ 1116 s->bus_no = 0; 1117 pci_for_each_device(bus, pci_bus_num(bus), s390_pci_enumerate_bridge, s); 1118 } 1119 1120 static void s390_pcihost_class_init(ObjectClass *klass, void *data) 1121 { 1122 DeviceClass *dc = DEVICE_CLASS(klass); 1123 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); 1124 1125 dc->reset = s390_pcihost_reset; 1126 dc->realize = s390_pcihost_realize; 1127 hc->pre_plug = s390_pcihost_pre_plug; 1128 hc->plug = s390_pcihost_plug; 1129 hc->unplug_request = s390_pcihost_unplug_request; 1130 hc->unplug = s390_pcihost_unplug; 1131 msi_nonbroken = true; 1132 } 1133 1134 static const TypeInfo s390_pcihost_info = { 1135 .name = TYPE_S390_PCI_HOST_BRIDGE, 1136 .parent = TYPE_PCI_HOST_BRIDGE, 1137 .instance_size = sizeof(S390pciState), 1138 .class_init = s390_pcihost_class_init, 1139 .interfaces = (InterfaceInfo[]) { 1140 { TYPE_HOTPLUG_HANDLER }, 1141 { } 1142 } 1143 }; 1144 1145 static const TypeInfo s390_pcibus_info = { 1146 .name = TYPE_S390_PCI_BUS, 1147 .parent = TYPE_BUS, 1148 .instance_size = sizeof(S390PCIBus), 1149 }; 1150 1151 static uint16_t s390_pci_generate_uid(S390pciState *s) 1152 { 1153 uint16_t uid = 0; 1154 1155 do { 1156 uid++; 1157 if (!s390_pci_find_dev_by_uid(s, uid)) { 1158 return uid; 1159 } 1160 } while (uid < ZPCI_MAX_UID); 1161 1162 return UID_UNDEFINED; 1163 } 1164 1165 static uint32_t s390_pci_generate_fid(S390pciState *s, Error **errp) 1166 { 1167 uint32_t fid = 0; 1168 1169 do { 1170 if (!s390_pci_find_dev_by_fid(s, fid)) { 1171 return fid; 1172 } 1173 } while (fid++ != ZPCI_MAX_FID); 1174 1175 error_setg(errp, "no free fid could be found"); 1176 return 0; 1177 } 1178 1179 static void s390_pci_device_realize(DeviceState *dev, Error **errp) 1180 { 1181 S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev); 1182 S390pciState *s = s390_get_phb(); 1183 1184 if (!zpci->target) { 1185 error_setg(errp, "target must be defined"); 1186 return; 1187 } 1188 1189 if (s390_pci_find_dev_by_target(s, zpci->target)) { 1190 error_setg(errp, "target %s already has an associated zpci device", 1191 zpci->target); 1192 return; 1193 } 1194 1195 if (zpci->uid == UID_UNDEFINED) { 1196 zpci->uid = s390_pci_generate_uid(s); 1197 if (!zpci->uid) { 1198 error_setg(errp, "no free uid could be found"); 1199 return; 1200 } 1201 } else if (s390_pci_find_dev_by_uid(s, zpci->uid)) { 1202 error_setg(errp, "uid %u already in use", zpci->uid); 1203 return; 1204 } 1205 1206 if (!zpci->fid_defined) { 1207 Error *local_error = NULL; 1208 1209 zpci->fid = s390_pci_generate_fid(s, &local_error); 1210 if (local_error) { 1211 error_propagate(errp, local_error); 1212 return; 1213 } 1214 } else if (s390_pci_find_dev_by_fid(s, zpci->fid)) { 1215 error_setg(errp, "fid %u already in use", zpci->fid); 1216 return; 1217 } 1218 1219 zpci->state = ZPCI_FS_RESERVED; 1220 zpci->fmb.format = ZPCI_FMB_FORMAT; 1221 } 1222 1223 static void s390_pci_device_reset(DeviceState *dev) 1224 { 1225 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev); 1226 1227 switch (pbdev->state) { 1228 case ZPCI_FS_RESERVED: 1229 return; 1230 case ZPCI_FS_STANDBY: 1231 break; 1232 default: 1233 pbdev->fh &= ~FH_MASK_ENABLE; 1234 pbdev->state = ZPCI_FS_DISABLED; 1235 break; 1236 } 1237 1238 if (pbdev->summary_ind) { 1239 pci_dereg_irqs(pbdev); 1240 } 1241 if (pbdev->iommu->enabled) { 1242 pci_dereg_ioat(pbdev->iommu); 1243 } 1244 1245 fmb_timer_free(pbdev); 1246 } 1247 1248 static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name, 1249 void *opaque, Error **errp) 1250 { 1251 Property *prop = opaque; 1252 uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop); 1253 1254 visit_type_uint32(v, name, ptr, errp); 1255 } 1256 1257 static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name, 1258 void *opaque, Error **errp) 1259 { 1260 DeviceState *dev = DEVICE(obj); 1261 S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj); 1262 Property *prop = opaque; 1263 uint32_t *ptr = qdev_get_prop_ptr(dev, prop); 1264 1265 if (dev->realized) { 1266 qdev_prop_set_after_realize(dev, name, errp); 1267 return; 1268 } 1269 1270 visit_type_uint32(v, name, ptr, errp); 1271 zpci->fid_defined = true; 1272 } 1273 1274 static const PropertyInfo s390_pci_fid_propinfo = { 1275 .name = "zpci_fid", 1276 .get = s390_pci_get_fid, 1277 .set = s390_pci_set_fid, 1278 }; 1279 1280 #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \ 1281 DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t) 1282 1283 static Property s390_pci_device_properties[] = { 1284 DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED), 1285 DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid), 1286 DEFINE_PROP_STRING("target", S390PCIBusDevice, target), 1287 DEFINE_PROP_END_OF_LIST(), 1288 }; 1289 1290 static const VMStateDescription s390_pci_device_vmstate = { 1291 .name = TYPE_S390_PCI_DEVICE, 1292 /* 1293 * TODO: add state handling here, so migration works at least with 1294 * emulated pci devices on s390x 1295 */ 1296 .unmigratable = 1, 1297 }; 1298 1299 static void s390_pci_device_class_init(ObjectClass *klass, void *data) 1300 { 1301 DeviceClass *dc = DEVICE_CLASS(klass); 1302 1303 dc->desc = "zpci device"; 1304 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 1305 dc->reset = s390_pci_device_reset; 1306 dc->bus_type = TYPE_S390_PCI_BUS; 1307 dc->realize = s390_pci_device_realize; 1308 dc->props = s390_pci_device_properties; 1309 dc->vmsd = &s390_pci_device_vmstate; 1310 } 1311 1312 static const TypeInfo s390_pci_device_info = { 1313 .name = TYPE_S390_PCI_DEVICE, 1314 .parent = TYPE_DEVICE, 1315 .instance_size = sizeof(S390PCIBusDevice), 1316 .class_init = s390_pci_device_class_init, 1317 }; 1318 1319 static TypeInfo s390_pci_iommu_info = { 1320 .name = TYPE_S390_PCI_IOMMU, 1321 .parent = TYPE_OBJECT, 1322 .instance_size = sizeof(S390PCIIOMMU), 1323 }; 1324 1325 static void s390_iommu_memory_region_class_init(ObjectClass *klass, void *data) 1326 { 1327 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass); 1328 1329 imrc->translate = s390_translate_iommu; 1330 imrc->replay = s390_pci_iommu_replay; 1331 } 1332 1333 static const TypeInfo s390_iommu_memory_region_info = { 1334 .parent = TYPE_IOMMU_MEMORY_REGION, 1335 .name = TYPE_S390_IOMMU_MEMORY_REGION, 1336 .class_init = s390_iommu_memory_region_class_init, 1337 }; 1338 1339 static void s390_pci_register_types(void) 1340 { 1341 type_register_static(&s390_pcihost_info); 1342 type_register_static(&s390_pcibus_info); 1343 type_register_static(&s390_pci_device_info); 1344 type_register_static(&s390_pci_iommu_info); 1345 type_register_static(&s390_iommu_memory_region_info); 1346 } 1347 1348 type_init(s390_pci_register_types) 1349