1 /* 2 * s390 PCI BUS 3 * 4 * Copyright 2014 IBM Corp. 5 * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com> 6 * Hong Bo Li <lihbbj@cn.ibm.com> 7 * Yi Min Zhao <zyimin@cn.ibm.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or (at 10 * your option) any later version. See the COPYING file in the top-level 11 * directory. 12 */ 13 14 #include "qemu/osdep.h" 15 #include "qapi/error.h" 16 #include "qapi/visitor.h" 17 #include "cpu.h" 18 #include "hw/s390x/s390-pci-bus.h" 19 #include "hw/s390x/s390-pci-inst.h" 20 #include "hw/s390x/s390-pci-vfio.h" 21 #include "hw/pci/pci_bus.h" 22 #include "hw/qdev-properties.h" 23 #include "hw/pci/pci_bridge.h" 24 #include "hw/pci/msi.h" 25 #include "qemu/error-report.h" 26 #include "qemu/module.h" 27 28 #ifndef DEBUG_S390PCI_BUS 29 #define DEBUG_S390PCI_BUS 0 30 #endif 31 32 #define DPRINTF(fmt, ...) \ 33 do { \ 34 if (DEBUG_S390PCI_BUS) { \ 35 fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); \ 36 } \ 37 } while (0) 38 39 S390pciState *s390_get_phb(void) 40 { 41 static S390pciState *phb; 42 43 if (!phb) { 44 phb = S390_PCI_HOST_BRIDGE( 45 object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL)); 46 assert(phb != NULL); 47 } 48 49 return phb; 50 } 51 52 int pci_chsc_sei_nt2_get_event(void *res) 53 { 54 ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res; 55 PciCcdfAvail *accdf; 56 PciCcdfErr *eccdf; 57 int rc = 1; 58 SeiContainer *sei_cont; 59 S390pciState *s = s390_get_phb(); 60 61 sei_cont = QTAILQ_FIRST(&s->pending_sei); 62 if (sei_cont) { 63 QTAILQ_REMOVE(&s->pending_sei, sei_cont, link); 64 nt2_res->nt = 2; 65 nt2_res->cc = sei_cont->cc; 66 nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res)); 67 switch (sei_cont->cc) { 68 case 1: /* error event */ 69 eccdf = (PciCcdfErr *)nt2_res->ccdf; 70 eccdf->fid = cpu_to_be32(sei_cont->fid); 71 eccdf->fh = cpu_to_be32(sei_cont->fh); 72 eccdf->e = cpu_to_be32(sei_cont->e); 73 eccdf->faddr = cpu_to_be64(sei_cont->faddr); 74 eccdf->pec = cpu_to_be16(sei_cont->pec); 75 break; 76 case 2: /* availability event */ 77 accdf = (PciCcdfAvail *)nt2_res->ccdf; 78 accdf->fid = cpu_to_be32(sei_cont->fid); 79 accdf->fh = cpu_to_be32(sei_cont->fh); 80 accdf->pec = cpu_to_be16(sei_cont->pec); 81 break; 82 default: 83 abort(); 84 } 85 g_free(sei_cont); 86 rc = 0; 87 } 88 89 return rc; 90 } 91 92 int pci_chsc_sei_nt2_have_event(void) 93 { 94 S390pciState *s = s390_get_phb(); 95 96 return !QTAILQ_EMPTY(&s->pending_sei); 97 } 98 99 S390PCIBusDevice *s390_pci_find_next_avail_dev(S390pciState *s, 100 S390PCIBusDevice *pbdev) 101 { 102 S390PCIBusDevice *ret = pbdev ? QTAILQ_NEXT(pbdev, link) : 103 QTAILQ_FIRST(&s->zpci_devs); 104 105 while (ret && ret->state == ZPCI_FS_RESERVED) { 106 ret = QTAILQ_NEXT(ret, link); 107 } 108 109 return ret; 110 } 111 112 S390PCIBusDevice *s390_pci_find_dev_by_fid(S390pciState *s, uint32_t fid) 113 { 114 S390PCIBusDevice *pbdev; 115 116 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 117 if (pbdev->fid == fid) { 118 return pbdev; 119 } 120 } 121 122 return NULL; 123 } 124 125 void s390_pci_sclp_configure(SCCB *sccb) 126 { 127 IoaCfgSccb *psccb = (IoaCfgSccb *)sccb; 128 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(), 129 be32_to_cpu(psccb->aid)); 130 uint16_t rc; 131 132 if (!pbdev) { 133 DPRINTF("sclp config no dev found\n"); 134 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; 135 goto out; 136 } 137 138 switch (pbdev->state) { 139 case ZPCI_FS_RESERVED: 140 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; 141 break; 142 case ZPCI_FS_STANDBY: 143 pbdev->state = ZPCI_FS_DISABLED; 144 rc = SCLP_RC_NORMAL_COMPLETION; 145 break; 146 default: 147 rc = SCLP_RC_NO_ACTION_REQUIRED; 148 } 149 out: 150 psccb->header.response_code = cpu_to_be16(rc); 151 } 152 153 static void s390_pci_perform_unplug(S390PCIBusDevice *pbdev) 154 { 155 HotplugHandler *hotplug_ctrl; 156 157 /* Unplug the PCI device */ 158 if (pbdev->pdev) { 159 DeviceState *pdev = DEVICE(pbdev->pdev); 160 161 hotplug_ctrl = qdev_get_hotplug_handler(pdev); 162 hotplug_handler_unplug(hotplug_ctrl, pdev, &error_abort); 163 object_unparent(OBJECT(pdev)); 164 } 165 166 /* Unplug the zPCI device */ 167 hotplug_ctrl = qdev_get_hotplug_handler(DEVICE(pbdev)); 168 hotplug_handler_unplug(hotplug_ctrl, DEVICE(pbdev), &error_abort); 169 object_unparent(OBJECT(pbdev)); 170 } 171 172 void s390_pci_sclp_deconfigure(SCCB *sccb) 173 { 174 IoaCfgSccb *psccb = (IoaCfgSccb *)sccb; 175 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(), 176 be32_to_cpu(psccb->aid)); 177 uint16_t rc; 178 179 if (!pbdev) { 180 DPRINTF("sclp deconfig no dev found\n"); 181 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED; 182 goto out; 183 } 184 185 switch (pbdev->state) { 186 case ZPCI_FS_RESERVED: 187 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE; 188 break; 189 case ZPCI_FS_STANDBY: 190 rc = SCLP_RC_NO_ACTION_REQUIRED; 191 break; 192 default: 193 if (pbdev->summary_ind) { 194 pci_dereg_irqs(pbdev); 195 } 196 if (pbdev->iommu->enabled) { 197 pci_dereg_ioat(pbdev->iommu); 198 } 199 pbdev->state = ZPCI_FS_STANDBY; 200 rc = SCLP_RC_NORMAL_COMPLETION; 201 202 if (pbdev->unplug_requested) { 203 s390_pci_perform_unplug(pbdev); 204 } 205 } 206 out: 207 psccb->header.response_code = cpu_to_be16(rc); 208 } 209 210 static S390PCIBusDevice *s390_pci_find_dev_by_uid(S390pciState *s, uint16_t uid) 211 { 212 S390PCIBusDevice *pbdev; 213 214 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 215 if (pbdev->uid == uid) { 216 return pbdev; 217 } 218 } 219 220 return NULL; 221 } 222 223 S390PCIBusDevice *s390_pci_find_dev_by_target(S390pciState *s, 224 const char *target) 225 { 226 S390PCIBusDevice *pbdev; 227 228 if (!target) { 229 return NULL; 230 } 231 232 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 233 if (!strcmp(pbdev->target, target)) { 234 return pbdev; 235 } 236 } 237 238 return NULL; 239 } 240 241 static S390PCIBusDevice *s390_pci_find_dev_by_pci(S390pciState *s, 242 PCIDevice *pci_dev) 243 { 244 S390PCIBusDevice *pbdev; 245 246 if (!pci_dev) { 247 return NULL; 248 } 249 250 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) { 251 if (pbdev->pdev == pci_dev) { 252 return pbdev; 253 } 254 } 255 256 return NULL; 257 } 258 259 S390PCIBusDevice *s390_pci_find_dev_by_idx(S390pciState *s, uint32_t idx) 260 { 261 return g_hash_table_lookup(s->zpci_table, &idx); 262 } 263 264 S390PCIBusDevice *s390_pci_find_dev_by_fh(S390pciState *s, uint32_t fh) 265 { 266 uint32_t idx = FH_MASK_INDEX & fh; 267 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_idx(s, idx); 268 269 if (pbdev && pbdev->fh == fh) { 270 return pbdev; 271 } 272 273 return NULL; 274 } 275 276 static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh, 277 uint32_t fid, uint64_t faddr, uint32_t e) 278 { 279 SeiContainer *sei_cont; 280 S390pciState *s = s390_get_phb(); 281 282 sei_cont = g_new0(SeiContainer, 1); 283 sei_cont->fh = fh; 284 sei_cont->fid = fid; 285 sei_cont->cc = cc; 286 sei_cont->pec = pec; 287 sei_cont->faddr = faddr; 288 sei_cont->e = e; 289 290 QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link); 291 css_generate_css_crws(0); 292 } 293 294 static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh, 295 uint32_t fid) 296 { 297 s390_pci_generate_event(2, pec, fh, fid, 0, 0); 298 } 299 300 void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid, 301 uint64_t faddr, uint32_t e) 302 { 303 s390_pci_generate_event(1, pec, fh, fid, faddr, e); 304 } 305 306 static void s390_pci_set_irq(void *opaque, int irq, int level) 307 { 308 /* nothing to do */ 309 } 310 311 static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num) 312 { 313 /* nothing to do */ 314 return 0; 315 } 316 317 static uint64_t s390_pci_get_table_origin(uint64_t iota) 318 { 319 return iota & ~ZPCI_IOTA_RTTO_FLAG; 320 } 321 322 static unsigned int calc_rtx(dma_addr_t ptr) 323 { 324 return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK; 325 } 326 327 static unsigned int calc_sx(dma_addr_t ptr) 328 { 329 return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK; 330 } 331 332 static unsigned int calc_px(dma_addr_t ptr) 333 { 334 return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK; 335 } 336 337 static uint64_t get_rt_sto(uint64_t entry) 338 { 339 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX) 340 ? (entry & ZPCI_RTE_ADDR_MASK) 341 : 0; 342 } 343 344 static uint64_t get_st_pto(uint64_t entry) 345 { 346 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX) 347 ? (entry & ZPCI_STE_ADDR_MASK) 348 : 0; 349 } 350 351 static bool rt_entry_isvalid(uint64_t entry) 352 { 353 return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID; 354 } 355 356 static bool pt_entry_isvalid(uint64_t entry) 357 { 358 return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID; 359 } 360 361 static bool entry_isprotected(uint64_t entry) 362 { 363 return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED; 364 } 365 366 /* ett is expected table type, -1 page table, 0 segment table, 1 region table */ 367 static uint64_t get_table_index(uint64_t iova, int8_t ett) 368 { 369 switch (ett) { 370 case ZPCI_ETT_PT: 371 return calc_px(iova); 372 case ZPCI_ETT_ST: 373 return calc_sx(iova); 374 case ZPCI_ETT_RT: 375 return calc_rtx(iova); 376 } 377 378 return -1; 379 } 380 381 static bool entry_isvalid(uint64_t entry, int8_t ett) 382 { 383 switch (ett) { 384 case ZPCI_ETT_PT: 385 return pt_entry_isvalid(entry); 386 case ZPCI_ETT_ST: 387 case ZPCI_ETT_RT: 388 return rt_entry_isvalid(entry); 389 } 390 391 return false; 392 } 393 394 /* Return true if address translation is done */ 395 static bool translate_iscomplete(uint64_t entry, int8_t ett) 396 { 397 switch (ett) { 398 case 0: 399 return (entry & ZPCI_TABLE_FC) ? true : false; 400 case 1: 401 return false; 402 } 403 404 return true; 405 } 406 407 static uint64_t get_frame_size(int8_t ett) 408 { 409 switch (ett) { 410 case ZPCI_ETT_PT: 411 return 1ULL << 12; 412 case ZPCI_ETT_ST: 413 return 1ULL << 20; 414 case ZPCI_ETT_RT: 415 return 1ULL << 31; 416 } 417 418 return 0; 419 } 420 421 static uint64_t get_next_table_origin(uint64_t entry, int8_t ett) 422 { 423 switch (ett) { 424 case ZPCI_ETT_PT: 425 return entry & ZPCI_PTE_ADDR_MASK; 426 case ZPCI_ETT_ST: 427 return get_st_pto(entry); 428 case ZPCI_ETT_RT: 429 return get_rt_sto(entry); 430 } 431 432 return 0; 433 } 434 435 /** 436 * table_translate: do translation within one table and return the following 437 * table origin 438 * 439 * @entry: the entry being translated, the result is stored in this. 440 * @to: the address of table origin. 441 * @ett: expected table type, 1 region table, 0 segment table and -1 page table. 442 * @error: error code 443 */ 444 static uint64_t table_translate(S390IOTLBEntry *entry, uint64_t to, int8_t ett, 445 uint16_t *error) 446 { 447 uint64_t tx, te, nto = 0; 448 uint16_t err = 0; 449 450 tx = get_table_index(entry->iova, ett); 451 te = address_space_ldq(&address_space_memory, to + tx * sizeof(uint64_t), 452 MEMTXATTRS_UNSPECIFIED, NULL); 453 454 if (!te) { 455 err = ERR_EVENT_INVALTE; 456 goto out; 457 } 458 459 if (!entry_isvalid(te, ett)) { 460 entry->perm &= IOMMU_NONE; 461 goto out; 462 } 463 464 if (ett == ZPCI_ETT_RT && ((te & ZPCI_TABLE_LEN_RTX) != ZPCI_TABLE_LEN_RTX 465 || te & ZPCI_TABLE_OFFSET_MASK)) { 466 err = ERR_EVENT_INVALTL; 467 goto out; 468 } 469 470 nto = get_next_table_origin(te, ett); 471 if (!nto) { 472 err = ERR_EVENT_TT; 473 goto out; 474 } 475 476 if (entry_isprotected(te)) { 477 entry->perm &= IOMMU_RO; 478 } else { 479 entry->perm &= IOMMU_RW; 480 } 481 482 if (translate_iscomplete(te, ett)) { 483 switch (ett) { 484 case ZPCI_ETT_PT: 485 entry->translated_addr = te & ZPCI_PTE_ADDR_MASK; 486 break; 487 case ZPCI_ETT_ST: 488 entry->translated_addr = (te & ZPCI_SFAA_MASK) | 489 (entry->iova & ~ZPCI_SFAA_MASK); 490 break; 491 } 492 nto = 0; 493 } 494 out: 495 if (err) { 496 entry->perm = IOMMU_NONE; 497 *error = err; 498 } 499 entry->len = get_frame_size(ett); 500 return nto; 501 } 502 503 uint16_t s390_guest_io_table_walk(uint64_t g_iota, hwaddr addr, 504 S390IOTLBEntry *entry) 505 { 506 uint64_t to = s390_pci_get_table_origin(g_iota); 507 int8_t ett = 1; 508 uint16_t error = 0; 509 510 entry->iova = addr & PAGE_MASK; 511 entry->translated_addr = 0; 512 entry->perm = IOMMU_RW; 513 514 if (entry_isprotected(g_iota)) { 515 entry->perm &= IOMMU_RO; 516 } 517 518 while (to) { 519 to = table_translate(entry, to, ett--, &error); 520 } 521 522 return error; 523 } 524 525 static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr addr, 526 IOMMUAccessFlags flag, int iommu_idx) 527 { 528 S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr); 529 S390IOTLBEntry *entry; 530 uint64_t iova = addr & PAGE_MASK; 531 uint16_t error = 0; 532 IOMMUTLBEntry ret = { 533 .target_as = &address_space_memory, 534 .iova = 0, 535 .translated_addr = 0, 536 .addr_mask = ~(hwaddr)0, 537 .perm = IOMMU_NONE, 538 }; 539 540 switch (iommu->pbdev->state) { 541 case ZPCI_FS_ENABLED: 542 case ZPCI_FS_BLOCKED: 543 if (!iommu->enabled) { 544 return ret; 545 } 546 break; 547 default: 548 return ret; 549 } 550 551 DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr); 552 553 if (addr < iommu->pba || addr > iommu->pal) { 554 error = ERR_EVENT_OORANGE; 555 goto err; 556 } 557 558 entry = g_hash_table_lookup(iommu->iotlb, &iova); 559 if (entry) { 560 ret.iova = entry->iova; 561 ret.translated_addr = entry->translated_addr; 562 ret.addr_mask = entry->len - 1; 563 ret.perm = entry->perm; 564 } else { 565 ret.iova = iova; 566 ret.addr_mask = ~PAGE_MASK; 567 ret.perm = IOMMU_NONE; 568 } 569 570 if (flag != IOMMU_NONE && !(flag & ret.perm)) { 571 error = ERR_EVENT_TPROTE; 572 } 573 err: 574 if (error) { 575 iommu->pbdev->state = ZPCI_FS_ERROR; 576 s390_pci_generate_error_event(error, iommu->pbdev->fh, 577 iommu->pbdev->fid, addr, 0); 578 } 579 return ret; 580 } 581 582 static void s390_pci_iommu_replay(IOMMUMemoryRegion *iommu, 583 IOMMUNotifier *notifier) 584 { 585 /* It's impossible to plug a pci device on s390x that already has iommu 586 * mappings which need to be replayed, that is due to the "one iommu per 587 * zpci device" construct. But when we support migration of vfio-pci 588 * devices in future, we need to revisit this. 589 */ 590 return; 591 } 592 593 static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus, 594 int devfn) 595 { 596 uint64_t key = (uintptr_t)bus; 597 S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key); 598 S390PCIIOMMU *iommu; 599 600 if (!table) { 601 table = g_new0(S390PCIIOMMUTable, 1); 602 table->key = key; 603 g_hash_table_insert(s->iommu_table, &table->key, table); 604 } 605 606 iommu = table->iommu[PCI_SLOT(devfn)]; 607 if (!iommu) { 608 iommu = S390_PCI_IOMMU(object_new(TYPE_S390_PCI_IOMMU)); 609 610 char *mr_name = g_strdup_printf("iommu-root-%02x:%02x.%01x", 611 pci_bus_num(bus), 612 PCI_SLOT(devfn), 613 PCI_FUNC(devfn)); 614 char *as_name = g_strdup_printf("iommu-pci-%02x:%02x.%01x", 615 pci_bus_num(bus), 616 PCI_SLOT(devfn), 617 PCI_FUNC(devfn)); 618 memory_region_init(&iommu->mr, OBJECT(iommu), mr_name, UINT64_MAX); 619 address_space_init(&iommu->as, &iommu->mr, as_name); 620 iommu->iotlb = g_hash_table_new_full(g_int64_hash, g_int64_equal, 621 NULL, g_free); 622 table->iommu[PCI_SLOT(devfn)] = iommu; 623 624 g_free(mr_name); 625 g_free(as_name); 626 } 627 628 return iommu; 629 } 630 631 static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn) 632 { 633 S390pciState *s = opaque; 634 S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn); 635 636 return &iommu->as; 637 } 638 639 static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set) 640 { 641 uint8_t expected, actual; 642 hwaddr len = 1; 643 /* avoid multiple fetches */ 644 uint8_t volatile *ind_addr; 645 646 ind_addr = cpu_physical_memory_map(ind_loc, &len, true); 647 if (!ind_addr) { 648 s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0); 649 return -1; 650 } 651 actual = *ind_addr; 652 do { 653 expected = actual; 654 actual = qatomic_cmpxchg(ind_addr, expected, expected | to_be_set); 655 } while (actual != expected); 656 cpu_physical_memory_unmap((void *)ind_addr, len, 1, len); 657 658 return actual; 659 } 660 661 static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data, 662 unsigned int size) 663 { 664 S390PCIBusDevice *pbdev = opaque; 665 uint32_t vec = data & ZPCI_MSI_VEC_MASK; 666 uint64_t ind_bit; 667 uint32_t sum_bit; 668 669 assert(pbdev); 670 DPRINTF("write_msix data 0x%" PRIx64 " idx %d vec 0x%x\n", data, 671 pbdev->idx, vec); 672 673 if (pbdev->state != ZPCI_FS_ENABLED) { 674 return; 675 } 676 677 ind_bit = pbdev->routes.adapter.ind_offset; 678 sum_bit = pbdev->routes.adapter.summary_offset; 679 680 set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8, 681 0x80 >> ((ind_bit + vec) % 8)); 682 if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8, 683 0x80 >> (sum_bit % 8))) { 684 css_adapter_interrupt(CSS_IO_ADAPTER_PCI, pbdev->isc); 685 } 686 } 687 688 static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size) 689 { 690 return 0xffffffff; 691 } 692 693 static const MemoryRegionOps s390_msi_ctrl_ops = { 694 .write = s390_msi_ctrl_write, 695 .read = s390_msi_ctrl_read, 696 .endianness = DEVICE_LITTLE_ENDIAN, 697 }; 698 699 void s390_pci_iommu_enable(S390PCIIOMMU *iommu) 700 { 701 /* 702 * The iommu region is initialized against a 0-mapped address space, 703 * so the smallest IOMMU region we can define runs from 0 to the end 704 * of the PCI address space. 705 */ 706 char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid); 707 memory_region_init_iommu(&iommu->iommu_mr, sizeof(iommu->iommu_mr), 708 TYPE_S390_IOMMU_MEMORY_REGION, OBJECT(&iommu->mr), 709 name, iommu->pal + 1); 710 iommu->enabled = true; 711 memory_region_add_subregion(&iommu->mr, 0, MEMORY_REGION(&iommu->iommu_mr)); 712 g_free(name); 713 } 714 715 void s390_pci_iommu_disable(S390PCIIOMMU *iommu) 716 { 717 iommu->enabled = false; 718 g_hash_table_remove_all(iommu->iotlb); 719 memory_region_del_subregion(&iommu->mr, MEMORY_REGION(&iommu->iommu_mr)); 720 object_unparent(OBJECT(&iommu->iommu_mr)); 721 } 722 723 static void s390_pci_iommu_free(S390pciState *s, PCIBus *bus, int32_t devfn) 724 { 725 uint64_t key = (uintptr_t)bus; 726 S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key); 727 S390PCIIOMMU *iommu = table ? table->iommu[PCI_SLOT(devfn)] : NULL; 728 729 if (!table || !iommu) { 730 return; 731 } 732 733 table->iommu[PCI_SLOT(devfn)] = NULL; 734 g_hash_table_destroy(iommu->iotlb); 735 /* 736 * An attached PCI device may have memory listeners, eg. VFIO PCI. 737 * The associated subregion will already have been unmapped in 738 * s390_pci_iommu_disable in response to the guest deconfigure request. 739 * Remove the listeners now before destroying the address space. 740 */ 741 address_space_remove_listeners(&iommu->as); 742 address_space_destroy(&iommu->as); 743 object_unparent(OBJECT(&iommu->mr)); 744 object_unparent(OBJECT(iommu)); 745 object_unref(OBJECT(iommu)); 746 } 747 748 S390PCIGroup *s390_group_create(int id) 749 { 750 S390PCIGroup *group; 751 S390pciState *s = s390_get_phb(); 752 753 group = g_new0(S390PCIGroup, 1); 754 group->id = id; 755 QTAILQ_INSERT_TAIL(&s->zpci_groups, group, link); 756 return group; 757 } 758 759 S390PCIGroup *s390_group_find(int id) 760 { 761 S390PCIGroup *group; 762 S390pciState *s = s390_get_phb(); 763 764 QTAILQ_FOREACH(group, &s->zpci_groups, link) { 765 if (group->id == id) { 766 return group; 767 } 768 } 769 return NULL; 770 } 771 772 static void s390_pci_init_default_group(void) 773 { 774 S390PCIGroup *group; 775 ClpRspQueryPciGrp *resgrp; 776 777 group = s390_group_create(ZPCI_DEFAULT_FN_GRP); 778 resgrp = &group->zpci_group; 779 resgrp->fr = 1; 780 resgrp->dasm = 0; 781 resgrp->msia = ZPCI_MSI_ADDR; 782 resgrp->mui = DEFAULT_MUI; 783 resgrp->i = 128; 784 resgrp->maxstbl = 128; 785 resgrp->version = 0; 786 } 787 788 static void set_pbdev_info(S390PCIBusDevice *pbdev) 789 { 790 pbdev->zpci_fn.sdma = ZPCI_SDMA_ADDR; 791 pbdev->zpci_fn.edma = ZPCI_EDMA_ADDR; 792 pbdev->zpci_fn.pchid = 0; 793 pbdev->zpci_fn.pfgid = ZPCI_DEFAULT_FN_GRP; 794 pbdev->zpci_fn.fid = pbdev->fid; 795 pbdev->zpci_fn.uid = pbdev->uid; 796 pbdev->pci_group = s390_group_find(ZPCI_DEFAULT_FN_GRP); 797 } 798 799 static void s390_pcihost_realize(DeviceState *dev, Error **errp) 800 { 801 PCIBus *b; 802 BusState *bus; 803 PCIHostState *phb = PCI_HOST_BRIDGE(dev); 804 S390pciState *s = S390_PCI_HOST_BRIDGE(dev); 805 806 DPRINTF("host_init\n"); 807 808 b = pci_register_root_bus(dev, NULL, s390_pci_set_irq, s390_pci_map_irq, 809 NULL, get_system_memory(), get_system_io(), 0, 810 64, TYPE_PCI_BUS); 811 pci_setup_iommu(b, s390_pci_dma_iommu, s); 812 813 bus = BUS(b); 814 qbus_set_hotplug_handler(bus, OBJECT(dev)); 815 phb->bus = b; 816 817 s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, dev, NULL)); 818 qbus_set_hotplug_handler(BUS(s->bus), OBJECT(dev)); 819 820 s->iommu_table = g_hash_table_new_full(g_int64_hash, g_int64_equal, 821 NULL, g_free); 822 s->zpci_table = g_hash_table_new_full(g_int_hash, g_int_equal, NULL, NULL); 823 s->bus_no = 0; 824 QTAILQ_INIT(&s->pending_sei); 825 QTAILQ_INIT(&s->zpci_devs); 826 QTAILQ_INIT(&s->zpci_dma_limit); 827 QTAILQ_INIT(&s->zpci_groups); 828 829 s390_pci_init_default_group(); 830 css_register_io_adapters(CSS_IO_ADAPTER_PCI, true, false, 831 S390_ADAPTER_SUPPRESSIBLE, errp); 832 } 833 834 static void s390_pcihost_unrealize(DeviceState *dev) 835 { 836 S390PCIGroup *group; 837 S390pciState *s = S390_PCI_HOST_BRIDGE(dev); 838 839 while (!QTAILQ_EMPTY(&s->zpci_groups)) { 840 group = QTAILQ_FIRST(&s->zpci_groups); 841 QTAILQ_REMOVE(&s->zpci_groups, group, link); 842 } 843 } 844 845 static int s390_pci_msix_init(S390PCIBusDevice *pbdev) 846 { 847 char *name; 848 uint8_t pos; 849 uint16_t ctrl; 850 uint32_t table, pba; 851 852 pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX); 853 if (!pos) { 854 return -1; 855 } 856 857 ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS, 858 pci_config_size(pbdev->pdev), sizeof(ctrl)); 859 table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE, 860 pci_config_size(pbdev->pdev), sizeof(table)); 861 pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA, 862 pci_config_size(pbdev->pdev), sizeof(pba)); 863 864 pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK; 865 pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK; 866 pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK; 867 pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; 868 pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; 869 870 name = g_strdup_printf("msix-s390-%04x", pbdev->uid); 871 memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev), 872 &s390_msi_ctrl_ops, pbdev, name, PAGE_SIZE); 873 memory_region_add_subregion(&pbdev->iommu->mr, 874 pbdev->pci_group->zpci_group.msia, 875 &pbdev->msix_notify_mr); 876 g_free(name); 877 878 return 0; 879 } 880 881 static void s390_pci_msix_free(S390PCIBusDevice *pbdev) 882 { 883 memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr); 884 object_unparent(OBJECT(&pbdev->msix_notify_mr)); 885 } 886 887 static S390PCIBusDevice *s390_pci_device_new(S390pciState *s, 888 const char *target, Error **errp) 889 { 890 Error *local_err = NULL; 891 DeviceState *dev; 892 893 dev = qdev_try_new(TYPE_S390_PCI_DEVICE); 894 if (!dev) { 895 error_setg(errp, "zPCI device could not be created"); 896 return NULL; 897 } 898 899 if (!object_property_set_str(OBJECT(dev), "target", target, &local_err)) { 900 object_unparent(OBJECT(dev)); 901 error_propagate_prepend(errp, local_err, 902 "zPCI device could not be created: "); 903 return NULL; 904 } 905 if (!qdev_realize_and_unref(dev, BUS(s->bus), &local_err)) { 906 object_unparent(OBJECT(dev)); 907 error_propagate_prepend(errp, local_err, 908 "zPCI device could not be created: "); 909 return NULL; 910 } 911 912 return S390_PCI_DEVICE(dev); 913 } 914 915 static bool s390_pci_alloc_idx(S390pciState *s, S390PCIBusDevice *pbdev) 916 { 917 uint32_t idx; 918 919 idx = s->next_idx; 920 while (s390_pci_find_dev_by_idx(s, idx)) { 921 idx = (idx + 1) & FH_MASK_INDEX; 922 if (idx == s->next_idx) { 923 return false; 924 } 925 } 926 927 pbdev->idx = idx; 928 return true; 929 } 930 931 static void s390_pcihost_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 932 Error **errp) 933 { 934 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 935 936 if (!s390_has_feat(S390_FEAT_ZPCI)) { 937 warn_report("Plugging a PCI/zPCI device without the 'zpci' CPU " 938 "feature enabled; the guest will not be able to see/use " 939 "this device"); 940 } 941 942 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 943 PCIDevice *pdev = PCI_DEVICE(dev); 944 945 if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) { 946 error_setg(errp, "multifunction not supported in s390"); 947 return; 948 } 949 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 950 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev); 951 952 if (!s390_pci_alloc_idx(s, pbdev)) { 953 error_setg(errp, "no slot for plugging zpci device"); 954 return; 955 } 956 } 957 } 958 959 static void s390_pci_update_subordinate(PCIDevice *dev, uint32_t nr) 960 { 961 uint32_t old_nr; 962 963 pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1); 964 while (!pci_bus_is_root(pci_get_bus(dev))) { 965 dev = pci_get_bus(dev)->parent_dev; 966 967 old_nr = pci_default_read_config(dev, PCI_SUBORDINATE_BUS, 1); 968 if (old_nr < nr) { 969 pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1); 970 } 971 } 972 } 973 974 static void s390_pcihost_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 975 Error **errp) 976 { 977 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 978 PCIDevice *pdev = NULL; 979 S390PCIBusDevice *pbdev = NULL; 980 981 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { 982 PCIBridge *pb = PCI_BRIDGE(dev); 983 984 pdev = PCI_DEVICE(dev); 985 pci_bridge_map_irq(pb, dev->id, s390_pci_map_irq); 986 pci_setup_iommu(&pb->sec_bus, s390_pci_dma_iommu, s); 987 988 qbus_set_hotplug_handler(BUS(&pb->sec_bus), OBJECT(s)); 989 990 if (dev->hotplugged) { 991 pci_default_write_config(pdev, PCI_PRIMARY_BUS, 992 pci_dev_bus_num(pdev), 1); 993 s->bus_no += 1; 994 pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1); 995 996 s390_pci_update_subordinate(pdev, s->bus_no); 997 } 998 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 999 pdev = PCI_DEVICE(dev); 1000 1001 if (!dev->id) { 1002 /* In the case the PCI device does not define an id */ 1003 /* we generate one based on the PCI address */ 1004 dev->id = g_strdup_printf("auto_%02x:%02x.%01x", 1005 pci_dev_bus_num(pdev), 1006 PCI_SLOT(pdev->devfn), 1007 PCI_FUNC(pdev->devfn)); 1008 } 1009 1010 pbdev = s390_pci_find_dev_by_target(s, dev->id); 1011 if (!pbdev) { 1012 pbdev = s390_pci_device_new(s, dev->id, errp); 1013 if (!pbdev) { 1014 return; 1015 } 1016 } 1017 1018 pbdev->pdev = pdev; 1019 pbdev->iommu = s390_pci_get_iommu(s, pci_get_bus(pdev), pdev->devfn); 1020 pbdev->iommu->pbdev = pbdev; 1021 pbdev->state = ZPCI_FS_DISABLED; 1022 set_pbdev_info(pbdev); 1023 1024 if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) { 1025 pbdev->fh |= FH_SHM_VFIO; 1026 pbdev->iommu->dma_limit = s390_pci_start_dma_count(s, pbdev); 1027 /* Fill in CLP information passed via the vfio region */ 1028 s390_pci_get_clp_info(pbdev); 1029 } else { 1030 pbdev->fh |= FH_SHM_EMUL; 1031 } 1032 1033 if (s390_pci_msix_init(pbdev)) { 1034 error_setg(errp, "MSI-X support is mandatory " 1035 "in the S390 architecture"); 1036 return; 1037 } 1038 1039 if (dev->hotplugged) { 1040 s390_pci_generate_plug_event(HP_EVENT_TO_CONFIGURED , 1041 pbdev->fh, pbdev->fid); 1042 } 1043 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 1044 pbdev = S390_PCI_DEVICE(dev); 1045 1046 /* the allocated idx is actually getting used */ 1047 s->next_idx = (pbdev->idx + 1) & FH_MASK_INDEX; 1048 pbdev->fh = pbdev->idx; 1049 QTAILQ_INSERT_TAIL(&s->zpci_devs, pbdev, link); 1050 g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev); 1051 } else { 1052 g_assert_not_reached(); 1053 } 1054 } 1055 1056 static void s390_pcihost_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, 1057 Error **errp) 1058 { 1059 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 1060 S390PCIBusDevice *pbdev = NULL; 1061 1062 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 1063 PCIDevice *pci_dev = PCI_DEVICE(dev); 1064 PCIBus *bus; 1065 int32_t devfn; 1066 1067 pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev)); 1068 g_assert(pbdev); 1069 1070 s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED, 1071 pbdev->fh, pbdev->fid); 1072 bus = pci_get_bus(pci_dev); 1073 devfn = pci_dev->devfn; 1074 qdev_unrealize(dev); 1075 1076 s390_pci_msix_free(pbdev); 1077 s390_pci_iommu_free(s, bus, devfn); 1078 pbdev->pdev = NULL; 1079 pbdev->state = ZPCI_FS_RESERVED; 1080 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 1081 pbdev = S390_PCI_DEVICE(dev); 1082 pbdev->fid = 0; 1083 QTAILQ_REMOVE(&s->zpci_devs, pbdev, link); 1084 g_hash_table_remove(s->zpci_table, &pbdev->idx); 1085 if (pbdev->iommu->dma_limit) { 1086 s390_pci_end_dma_count(s, pbdev->iommu->dma_limit); 1087 } 1088 qdev_unrealize(dev); 1089 } 1090 } 1091 1092 static void s390_pcihost_unplug_request(HotplugHandler *hotplug_dev, 1093 DeviceState *dev, 1094 Error **errp) 1095 { 1096 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev); 1097 S390PCIBusDevice *pbdev; 1098 1099 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { 1100 error_setg(errp, "PCI bridge hot unplug currently not supported"); 1101 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { 1102 /* 1103 * Redirect the unplug request to the zPCI device and remember that 1104 * we've checked the PCI device already (to prevent endless recursion). 1105 */ 1106 pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev)); 1107 g_assert(pbdev); 1108 pbdev->pci_unplug_request_processed = true; 1109 qdev_unplug(DEVICE(pbdev), errp); 1110 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { 1111 pbdev = S390_PCI_DEVICE(dev); 1112 1113 /* 1114 * If unplug was initially requested for the zPCI device, we 1115 * first have to redirect to the PCI device, which will in return 1116 * redirect back to us after performing its checks (if the request 1117 * is not blocked, e.g. because it's a PCI bridge). 1118 */ 1119 if (pbdev->pdev && !pbdev->pci_unplug_request_processed) { 1120 qdev_unplug(DEVICE(pbdev->pdev), errp); 1121 return; 1122 } 1123 pbdev->pci_unplug_request_processed = false; 1124 1125 switch (pbdev->state) { 1126 case ZPCI_FS_STANDBY: 1127 case ZPCI_FS_RESERVED: 1128 s390_pci_perform_unplug(pbdev); 1129 break; 1130 default: 1131 /* 1132 * Allow to send multiple requests, e.g. if the guest crashed 1133 * before releasing the device, we would not be able to send 1134 * another request to the same VM (e.g. fresh OS). 1135 */ 1136 pbdev->unplug_requested = true; 1137 s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST, 1138 pbdev->fh, pbdev->fid); 1139 } 1140 } else { 1141 g_assert_not_reached(); 1142 } 1143 } 1144 1145 static void s390_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev, 1146 void *opaque) 1147 { 1148 S390pciState *s = opaque; 1149 PCIBus *sec_bus = NULL; 1150 1151 if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) != 1152 PCI_HEADER_TYPE_BRIDGE)) { 1153 return; 1154 } 1155 1156 (s->bus_no)++; 1157 pci_default_write_config(pdev, PCI_PRIMARY_BUS, pci_dev_bus_num(pdev), 1); 1158 pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1); 1159 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1); 1160 1161 sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); 1162 if (!sec_bus) { 1163 return; 1164 } 1165 1166 /* Assign numbers to all child bridges. The last is the highest number. */ 1167 pci_for_each_device(sec_bus, pci_bus_num(sec_bus), 1168 s390_pci_enumerate_bridge, s); 1169 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1); 1170 } 1171 1172 static void s390_pcihost_reset(DeviceState *dev) 1173 { 1174 S390pciState *s = S390_PCI_HOST_BRIDGE(dev); 1175 PCIBus *bus = s->parent_obj.bus; 1176 S390PCIBusDevice *pbdev, *next; 1177 1178 /* Process all pending unplug requests */ 1179 QTAILQ_FOREACH_SAFE(pbdev, &s->zpci_devs, link, next) { 1180 if (pbdev->unplug_requested) { 1181 if (pbdev->summary_ind) { 1182 pci_dereg_irqs(pbdev); 1183 } 1184 if (pbdev->iommu->enabled) { 1185 pci_dereg_ioat(pbdev->iommu); 1186 } 1187 pbdev->state = ZPCI_FS_STANDBY; 1188 s390_pci_perform_unplug(pbdev); 1189 } 1190 } 1191 1192 /* 1193 * When resetting a PCI bridge, the assigned numbers are set to 0. So 1194 * on every system reset, we also have to reassign numbers. 1195 */ 1196 s->bus_no = 0; 1197 pci_for_each_device(bus, pci_bus_num(bus), s390_pci_enumerate_bridge, s); 1198 } 1199 1200 static void s390_pcihost_class_init(ObjectClass *klass, void *data) 1201 { 1202 DeviceClass *dc = DEVICE_CLASS(klass); 1203 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); 1204 1205 dc->reset = s390_pcihost_reset; 1206 dc->realize = s390_pcihost_realize; 1207 dc->unrealize = s390_pcihost_unrealize; 1208 hc->pre_plug = s390_pcihost_pre_plug; 1209 hc->plug = s390_pcihost_plug; 1210 hc->unplug_request = s390_pcihost_unplug_request; 1211 hc->unplug = s390_pcihost_unplug; 1212 msi_nonbroken = true; 1213 } 1214 1215 static const TypeInfo s390_pcihost_info = { 1216 .name = TYPE_S390_PCI_HOST_BRIDGE, 1217 .parent = TYPE_PCI_HOST_BRIDGE, 1218 .instance_size = sizeof(S390pciState), 1219 .class_init = s390_pcihost_class_init, 1220 .interfaces = (InterfaceInfo[]) { 1221 { TYPE_HOTPLUG_HANDLER }, 1222 { } 1223 } 1224 }; 1225 1226 static const TypeInfo s390_pcibus_info = { 1227 .name = TYPE_S390_PCI_BUS, 1228 .parent = TYPE_BUS, 1229 .instance_size = sizeof(S390PCIBus), 1230 }; 1231 1232 static uint16_t s390_pci_generate_uid(S390pciState *s) 1233 { 1234 uint16_t uid = 0; 1235 1236 do { 1237 uid++; 1238 if (!s390_pci_find_dev_by_uid(s, uid)) { 1239 return uid; 1240 } 1241 } while (uid < ZPCI_MAX_UID); 1242 1243 return UID_UNDEFINED; 1244 } 1245 1246 static uint32_t s390_pci_generate_fid(S390pciState *s, Error **errp) 1247 { 1248 uint32_t fid = 0; 1249 1250 do { 1251 if (!s390_pci_find_dev_by_fid(s, fid)) { 1252 return fid; 1253 } 1254 } while (fid++ != ZPCI_MAX_FID); 1255 1256 error_setg(errp, "no free fid could be found"); 1257 return 0; 1258 } 1259 1260 static void s390_pci_device_realize(DeviceState *dev, Error **errp) 1261 { 1262 S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev); 1263 S390pciState *s = s390_get_phb(); 1264 1265 if (!zpci->target) { 1266 error_setg(errp, "target must be defined"); 1267 return; 1268 } 1269 1270 if (s390_pci_find_dev_by_target(s, zpci->target)) { 1271 error_setg(errp, "target %s already has an associated zpci device", 1272 zpci->target); 1273 return; 1274 } 1275 1276 if (zpci->uid == UID_UNDEFINED) { 1277 zpci->uid = s390_pci_generate_uid(s); 1278 if (!zpci->uid) { 1279 error_setg(errp, "no free uid could be found"); 1280 return; 1281 } 1282 } else if (s390_pci_find_dev_by_uid(s, zpci->uid)) { 1283 error_setg(errp, "uid %u already in use", zpci->uid); 1284 return; 1285 } 1286 1287 if (!zpci->fid_defined) { 1288 Error *local_error = NULL; 1289 1290 zpci->fid = s390_pci_generate_fid(s, &local_error); 1291 if (local_error) { 1292 error_propagate(errp, local_error); 1293 return; 1294 } 1295 } else if (s390_pci_find_dev_by_fid(s, zpci->fid)) { 1296 error_setg(errp, "fid %u already in use", zpci->fid); 1297 return; 1298 } 1299 1300 zpci->state = ZPCI_FS_RESERVED; 1301 zpci->fmb.format = ZPCI_FMB_FORMAT; 1302 } 1303 1304 static void s390_pci_device_reset(DeviceState *dev) 1305 { 1306 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev); 1307 1308 switch (pbdev->state) { 1309 case ZPCI_FS_RESERVED: 1310 return; 1311 case ZPCI_FS_STANDBY: 1312 break; 1313 default: 1314 pbdev->fh &= ~FH_MASK_ENABLE; 1315 pbdev->state = ZPCI_FS_DISABLED; 1316 break; 1317 } 1318 1319 if (pbdev->summary_ind) { 1320 pci_dereg_irqs(pbdev); 1321 } 1322 if (pbdev->iommu->enabled) { 1323 pci_dereg_ioat(pbdev->iommu); 1324 } 1325 1326 fmb_timer_free(pbdev); 1327 } 1328 1329 static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name, 1330 void *opaque, Error **errp) 1331 { 1332 Property *prop = opaque; 1333 uint32_t *ptr = object_field_prop_ptr(obj, prop); 1334 1335 visit_type_uint32(v, name, ptr, errp); 1336 } 1337 1338 static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name, 1339 void *opaque, Error **errp) 1340 { 1341 S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj); 1342 Property *prop = opaque; 1343 uint32_t *ptr = object_field_prop_ptr(obj, prop); 1344 1345 if (!visit_type_uint32(v, name, ptr, errp)) { 1346 return; 1347 } 1348 zpci->fid_defined = true; 1349 } 1350 1351 static const PropertyInfo s390_pci_fid_propinfo = { 1352 .name = "zpci_fid", 1353 .get = s390_pci_get_fid, 1354 .set = s390_pci_set_fid, 1355 }; 1356 1357 #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \ 1358 DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t) 1359 1360 static Property s390_pci_device_properties[] = { 1361 DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED), 1362 DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid), 1363 DEFINE_PROP_STRING("target", S390PCIBusDevice, target), 1364 DEFINE_PROP_END_OF_LIST(), 1365 }; 1366 1367 static const VMStateDescription s390_pci_device_vmstate = { 1368 .name = TYPE_S390_PCI_DEVICE, 1369 /* 1370 * TODO: add state handling here, so migration works at least with 1371 * emulated pci devices on s390x 1372 */ 1373 .unmigratable = 1, 1374 }; 1375 1376 static void s390_pci_device_class_init(ObjectClass *klass, void *data) 1377 { 1378 DeviceClass *dc = DEVICE_CLASS(klass); 1379 1380 dc->desc = "zpci device"; 1381 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 1382 dc->reset = s390_pci_device_reset; 1383 dc->bus_type = TYPE_S390_PCI_BUS; 1384 dc->realize = s390_pci_device_realize; 1385 device_class_set_props(dc, s390_pci_device_properties); 1386 dc->vmsd = &s390_pci_device_vmstate; 1387 } 1388 1389 static const TypeInfo s390_pci_device_info = { 1390 .name = TYPE_S390_PCI_DEVICE, 1391 .parent = TYPE_DEVICE, 1392 .instance_size = sizeof(S390PCIBusDevice), 1393 .class_init = s390_pci_device_class_init, 1394 }; 1395 1396 static TypeInfo s390_pci_iommu_info = { 1397 .name = TYPE_S390_PCI_IOMMU, 1398 .parent = TYPE_OBJECT, 1399 .instance_size = sizeof(S390PCIIOMMU), 1400 }; 1401 1402 static void s390_iommu_memory_region_class_init(ObjectClass *klass, void *data) 1403 { 1404 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass); 1405 1406 imrc->translate = s390_translate_iommu; 1407 imrc->replay = s390_pci_iommu_replay; 1408 } 1409 1410 static const TypeInfo s390_iommu_memory_region_info = { 1411 .parent = TYPE_IOMMU_MEMORY_REGION, 1412 .name = TYPE_S390_IOMMU_MEMORY_REGION, 1413 .class_init = s390_iommu_memory_region_class_init, 1414 }; 1415 1416 static void s390_pci_register_types(void) 1417 { 1418 type_register_static(&s390_pcihost_info); 1419 type_register_static(&s390_pcibus_info); 1420 type_register_static(&s390_pci_device_info); 1421 type_register_static(&s390_pci_iommu_info); 1422 type_register_static(&s390_iommu_memory_region_info); 1423 } 1424 1425 type_init(s390_pci_register_types) 1426