1 /* 2 * s390 IPL device 3 * 4 * Copyright 2015, 2020 IBM Corp. 5 * Author(s): Zhang Fan <bjfanzh@cn.ibm.com> 6 * Janosch Frank <frankja@linux.ibm.com> 7 * 8 * This work is licensed under the terms of the GNU GPL, version 2 or (at 9 * your option) any later version. See the COPYING file in the top-level 10 * directory. 11 */ 12 13 #ifndef HW_S390_IPL_H 14 #define HW_S390_IPL_H 15 16 #include "cpu.h" 17 #include "exec/address-spaces.h" 18 #include "hw/qdev-core.h" 19 #include "hw/s390x/ipl/qipl.h" 20 #include "qom/object.h" 21 22 #define DIAG308_FLAGS_LP_VALID 0x80 23 24 void s390_ipl_convert_loadparm(char *ascii_lp, uint8_t *ebcdic_lp); 25 void s390_ipl_fmt_loadparm(uint8_t *loadparm, char *str, Error **errp); 26 void s390_ipl_update_diag308(IplParameterBlock *iplb); 27 int s390_ipl_prepare_pv_header(Error **errp); 28 int s390_ipl_pv_unpack(void); 29 void s390_ipl_prepare_cpu(S390CPU *cpu); 30 IplParameterBlock *s390_ipl_get_iplb(void); 31 IplParameterBlock *s390_ipl_get_iplb_pv(void); 32 33 enum s390_reset { 34 /* default is a reset not triggered by a CPU e.g. issued by QMP */ 35 S390_RESET_EXTERNAL = 0, 36 S390_RESET_REIPL, 37 S390_RESET_MODIFIED_CLEAR, 38 S390_RESET_LOAD_NORMAL, 39 S390_RESET_PV, 40 }; 41 void s390_ipl_reset_request(CPUState *cs, enum s390_reset reset_type); 42 void s390_ipl_get_reset_request(CPUState **cs, enum s390_reset *reset_type); 43 void s390_ipl_clear_reset_request(void); 44 45 #define QIPL_ADDRESS 0xcc 46 47 /* Boot Menu flags */ 48 #define QIPL_FLAG_BM_OPTS_CMD 0x80 49 #define QIPL_FLAG_BM_OPTS_ZIPL 0x40 50 51 #define TYPE_S390_IPL "s390-ipl" 52 OBJECT_DECLARE_SIMPLE_TYPE(S390IPLState, S390_IPL) 53 54 struct S390IPLState { 55 /*< private >*/ 56 DeviceState parent_obj; 57 IplParameterBlock iplb; 58 IplParameterBlock iplb_pv; 59 QemuIplParameters qipl; 60 uint64_t start_addr; 61 uint64_t compat_start_addr; 62 uint64_t bios_start_addr; 63 uint64_t compat_bios_start_addr; 64 bool enforce_bios; 65 bool iplb_valid; 66 bool iplb_valid_pv; 67 bool netboot; 68 /* reset related properties don't have to be migrated or reset */ 69 enum s390_reset reset_type; 70 int reset_cpu_index; 71 72 /*< public >*/ 73 char *kernel; 74 char *initrd; 75 char *cmdline; 76 char *firmware; 77 uint8_t cssid; 78 uint8_t ssid; 79 uint16_t devno; 80 bool iplbext_migration; 81 }; 82 QEMU_BUILD_BUG_MSG(offsetof(S390IPLState, iplb) & 3, "alignment of iplb wrong"); 83 84 #define DIAG_308_RC_OK 0x0001 85 #define DIAG_308_RC_NO_CONF 0x0102 86 #define DIAG_308_RC_INVALID 0x0402 87 #define DIAG_308_RC_NO_PV_CONF 0x0902 88 #define DIAG_308_RC_INVAL_FOR_PV 0x0a02 89 90 #define DIAG308_RESET_MOD_CLR 0 91 #define DIAG308_RESET_LOAD_NORM 1 92 #define DIAG308_LOAD_CLEAR 3 93 #define DIAG308_LOAD_NORMAL_DUMP 4 94 #define DIAG308_SET 5 95 #define DIAG308_STORE 6 96 #define DIAG308_PV_SET 8 97 #define DIAG308_PV_STORE 9 98 #define DIAG308_PV_START 10 99 100 #define S390_IPL_TYPE_FCP 0x00 101 #define S390_IPL_TYPE_CCW 0x02 102 #define S390_IPL_TYPE_PV 0x05 103 #define S390_IPL_TYPE_QEMU_SCSI 0xff 104 105 #define S390_IPLB_HEADER_LEN 8 106 #define S390_IPLB_MIN_PV_LEN 148 107 #define S390_IPLB_MIN_CCW_LEN 200 108 #define S390_IPLB_MIN_FCP_LEN 384 109 #define S390_IPLB_MIN_QEMU_SCSI_LEN 200 110 111 static inline bool iplb_valid_len(IplParameterBlock *iplb) 112 { 113 return be32_to_cpu(iplb->len) <= sizeof(IplParameterBlock); 114 } 115 116 static inline bool ipl_valid_pv_components(IplParameterBlock *iplb) 117 { 118 IPLBlockPV *ipib_pv = &iplb->pv; 119 int i; 120 121 if (ipib_pv->num_comp == 0) { 122 return false; 123 } 124 125 for (i = 0; i < ipib_pv->num_comp; i++) { 126 /* Addr must be 4k aligned */ 127 if (ipib_pv->components[i].addr & ~TARGET_PAGE_MASK) { 128 return false; 129 } 130 131 /* Tweak prefix is monotonically increasing with each component */ 132 if (i < ipib_pv->num_comp - 1 && 133 ipib_pv->components[i].tweak_pref >= 134 ipib_pv->components[i + 1].tweak_pref) { 135 return false; 136 } 137 } 138 return true; 139 } 140 141 static inline bool ipl_valid_pv_header(IplParameterBlock *iplb) 142 { 143 IPLBlockPV *ipib_pv = &iplb->pv; 144 145 if (ipib_pv->pv_header_len > 2 * TARGET_PAGE_SIZE) { 146 return false; 147 } 148 149 if (!address_space_access_valid(&address_space_memory, 150 ipib_pv->pv_header_addr, 151 ipib_pv->pv_header_len, 152 false, 153 MEMTXATTRS_UNSPECIFIED)) { 154 return false; 155 } 156 157 return true; 158 } 159 160 static inline bool iplb_valid_pv(IplParameterBlock *iplb) 161 { 162 if (iplb->pbt != S390_IPL_TYPE_PV || 163 be32_to_cpu(iplb->len) < S390_IPLB_MIN_PV_LEN) { 164 return false; 165 } 166 if (!ipl_valid_pv_header(iplb)) { 167 return false; 168 } 169 return ipl_valid_pv_components(iplb); 170 } 171 172 static inline bool iplb_valid(IplParameterBlock *iplb) 173 { 174 switch (iplb->pbt) { 175 case S390_IPL_TYPE_FCP: 176 return be32_to_cpu(iplb->len) >= S390_IPLB_MIN_FCP_LEN; 177 case S390_IPL_TYPE_CCW: 178 return be32_to_cpu(iplb->len) >= S390_IPLB_MIN_CCW_LEN; 179 default: 180 return false; 181 } 182 } 183 184 #endif 185