1 /* 2 * Channel subsystem base support. 3 * 4 * Copyright 2012 IBM Corp. 5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com> 6 * 7 * This work is licensed under the terms of the GNU GPL, version 2 or (at 8 * your option) any later version. See the COPYING file in the top-level 9 * directory. 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qapi/error.h" 14 #include "qapi/visitor.h" 15 #include "hw/qdev.h" 16 #include "qemu/bitops.h" 17 #include "exec/address-spaces.h" 18 #include "cpu.h" 19 #include "hw/s390x/ioinst.h" 20 #include "hw/s390x/css.h" 21 #include "trace.h" 22 #include "hw/s390x/s390_flic.h" 23 24 typedef struct CrwContainer { 25 CRW crw; 26 QTAILQ_ENTRY(CrwContainer) sibling; 27 } CrwContainer; 28 29 typedef struct ChpInfo { 30 uint8_t in_use; 31 uint8_t type; 32 uint8_t is_virtual; 33 } ChpInfo; 34 35 typedef struct SubchSet { 36 SubchDev *sch[MAX_SCHID + 1]; 37 unsigned long schids_used[BITS_TO_LONGS(MAX_SCHID + 1)]; 38 unsigned long devnos_used[BITS_TO_LONGS(MAX_SCHID + 1)]; 39 } SubchSet; 40 41 typedef struct CssImage { 42 SubchSet *sch_set[MAX_SSID + 1]; 43 ChpInfo chpids[MAX_CHPID + 1]; 44 } CssImage; 45 46 typedef struct IoAdapter { 47 uint32_t id; 48 uint8_t type; 49 uint8_t isc; 50 } IoAdapter; 51 52 typedef struct ChannelSubSys { 53 QTAILQ_HEAD(, CrwContainer) pending_crws; 54 bool sei_pending; 55 bool do_crw_mchk; 56 bool crws_lost; 57 uint8_t max_cssid; 58 uint8_t max_ssid; 59 bool chnmon_active; 60 uint64_t chnmon_area; 61 CssImage *css[MAX_CSSID + 1]; 62 uint8_t default_cssid; 63 IoAdapter *io_adapters[CSS_IO_ADAPTER_TYPE_NUMS][MAX_ISC + 1]; 64 QTAILQ_HEAD(, IndAddr) indicator_addresses; 65 } ChannelSubSys; 66 67 static ChannelSubSys channel_subsys = { 68 .pending_crws = QTAILQ_HEAD_INITIALIZER(channel_subsys.pending_crws), 69 .do_crw_mchk = true, 70 .sei_pending = false, 71 .do_crw_mchk = true, 72 .crws_lost = false, 73 .chnmon_active = false, 74 .indicator_addresses = 75 QTAILQ_HEAD_INITIALIZER(channel_subsys.indicator_addresses), 76 }; 77 78 IndAddr *get_indicator(hwaddr ind_addr, int len) 79 { 80 IndAddr *indicator; 81 82 QTAILQ_FOREACH(indicator, &channel_subsys.indicator_addresses, sibling) { 83 if (indicator->addr == ind_addr) { 84 indicator->refcnt++; 85 return indicator; 86 } 87 } 88 indicator = g_new0(IndAddr, 1); 89 indicator->addr = ind_addr; 90 indicator->len = len; 91 indicator->refcnt = 1; 92 QTAILQ_INSERT_TAIL(&channel_subsys.indicator_addresses, 93 indicator, sibling); 94 return indicator; 95 } 96 97 static int s390_io_adapter_map(AdapterInfo *adapter, uint64_t map_addr, 98 bool do_map) 99 { 100 S390FLICState *fs = s390_get_flic(); 101 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs); 102 103 return fsc->io_adapter_map(fs, adapter->adapter_id, map_addr, do_map); 104 } 105 106 void release_indicator(AdapterInfo *adapter, IndAddr *indicator) 107 { 108 assert(indicator->refcnt > 0); 109 indicator->refcnt--; 110 if (indicator->refcnt > 0) { 111 return; 112 } 113 QTAILQ_REMOVE(&channel_subsys.indicator_addresses, indicator, sibling); 114 if (indicator->map) { 115 s390_io_adapter_map(adapter, indicator->map, false); 116 } 117 g_free(indicator); 118 } 119 120 int map_indicator(AdapterInfo *adapter, IndAddr *indicator) 121 { 122 int ret; 123 124 if (indicator->map) { 125 return 0; /* already mapped is not an error */ 126 } 127 indicator->map = indicator->addr; 128 ret = s390_io_adapter_map(adapter, indicator->map, true); 129 if ((ret != 0) && (ret != -ENOSYS)) { 130 goto out_err; 131 } 132 return 0; 133 134 out_err: 135 indicator->map = 0; 136 return ret; 137 } 138 139 int css_create_css_image(uint8_t cssid, bool default_image) 140 { 141 trace_css_new_image(cssid, default_image ? "(default)" : ""); 142 /* 255 is reserved */ 143 if (cssid == 255) { 144 return -EINVAL; 145 } 146 if (channel_subsys.css[cssid]) { 147 return -EBUSY; 148 } 149 channel_subsys.css[cssid] = g_malloc0(sizeof(CssImage)); 150 if (default_image) { 151 channel_subsys.default_cssid = cssid; 152 } 153 return 0; 154 } 155 156 uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc) 157 { 158 if (type >= CSS_IO_ADAPTER_TYPE_NUMS || isc > MAX_ISC || 159 !channel_subsys.io_adapters[type][isc]) { 160 return -1; 161 } 162 163 return channel_subsys.io_adapters[type][isc]->id; 164 } 165 166 /** 167 * css_register_io_adapters: Register I/O adapters per ISC during init 168 * 169 * @swap: an indication if byte swap is needed. 170 * @maskable: an indication if the adapter is subject to the mask operation. 171 * @errp: location to store error information. 172 */ 173 void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable, 174 Error **errp) 175 { 176 uint32_t id; 177 int ret, isc; 178 IoAdapter *adapter; 179 S390FLICState *fs = s390_get_flic(); 180 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs); 181 182 /* 183 * Disallow multiple registrations for the same device type. 184 * Report an error if registering for an already registered type. 185 */ 186 if (channel_subsys.io_adapters[type][0]) { 187 error_setg(errp, "Adapters for type %d already registered", type); 188 } 189 190 for (isc = 0; isc <= MAX_ISC; isc++) { 191 id = (type << 3) | isc; 192 ret = fsc->register_io_adapter(fs, id, isc, swap, maskable); 193 if (ret == 0) { 194 adapter = g_new0(IoAdapter, 1); 195 adapter->id = id; 196 adapter->isc = isc; 197 adapter->type = type; 198 channel_subsys.io_adapters[type][isc] = adapter; 199 } else { 200 error_setg_errno(errp, -ret, "Unexpected error %d when " 201 "registering adapter %d", ret, id); 202 break; 203 } 204 } 205 206 /* 207 * No need to free registered adapters in kvm: kvm will clean up 208 * when the machine goes away. 209 */ 210 if (ret) { 211 for (isc--; isc >= 0; isc--) { 212 g_free(channel_subsys.io_adapters[type][isc]); 213 channel_subsys.io_adapters[type][isc] = NULL; 214 } 215 } 216 217 } 218 219 static void css_clear_io_interrupt(uint16_t subchannel_id, 220 uint16_t subchannel_nr) 221 { 222 Error *err = NULL; 223 static bool no_clear_irq; 224 S390FLICState *fs = s390_get_flic(); 225 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs); 226 int r; 227 228 if (unlikely(no_clear_irq)) { 229 return; 230 } 231 r = fsc->clear_io_irq(fs, subchannel_id, subchannel_nr); 232 switch (r) { 233 case 0: 234 break; 235 case -ENOSYS: 236 no_clear_irq = true; 237 /* 238 * Ignore unavailability, as the user can't do anything 239 * about it anyway. 240 */ 241 break; 242 default: 243 error_setg_errno(&err, -r, "unexpected error condition"); 244 error_propagate(&error_abort, err); 245 } 246 } 247 248 static inline uint16_t css_do_build_subchannel_id(uint8_t cssid, uint8_t ssid) 249 { 250 if (channel_subsys.max_cssid > 0) { 251 return (cssid << 8) | (1 << 3) | (ssid << 1) | 1; 252 } 253 return (ssid << 1) | 1; 254 } 255 256 uint16_t css_build_subchannel_id(SubchDev *sch) 257 { 258 return css_do_build_subchannel_id(sch->cssid, sch->ssid); 259 } 260 261 static void css_inject_io_interrupt(SubchDev *sch) 262 { 263 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11; 264 265 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid, 266 sch->curr_status.pmcw.intparm, isc, ""); 267 s390_io_interrupt(css_build_subchannel_id(sch), 268 sch->schid, 269 sch->curr_status.pmcw.intparm, 270 isc << 27); 271 } 272 273 void css_conditional_io_interrupt(SubchDev *sch) 274 { 275 /* 276 * If the subchannel is not currently status pending, make it pending 277 * with alert status. 278 */ 279 if (!(sch->curr_status.scsw.ctrl & SCSW_STCTL_STATUS_PEND)) { 280 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11; 281 282 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid, 283 sch->curr_status.pmcw.intparm, isc, 284 "(unsolicited)"); 285 sch->curr_status.scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; 286 sch->curr_status.scsw.ctrl |= 287 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; 288 /* Inject an I/O interrupt. */ 289 s390_io_interrupt(css_build_subchannel_id(sch), 290 sch->schid, 291 sch->curr_status.pmcw.intparm, 292 isc << 27); 293 } 294 } 295 296 void css_adapter_interrupt(uint8_t isc) 297 { 298 uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI; 299 300 trace_css_adapter_interrupt(isc); 301 s390_io_interrupt(0, 0, 0, io_int_word); 302 } 303 304 static void sch_handle_clear_func(SubchDev *sch) 305 { 306 PMCW *p = &sch->curr_status.pmcw; 307 SCSW *s = &sch->curr_status.scsw; 308 int path; 309 310 /* Path management: In our simple css, we always choose the only path. */ 311 path = 0x80; 312 313 /* Reset values prior to 'issuing the clear signal'. */ 314 p->lpum = 0; 315 p->pom = 0xff; 316 s->flags &= ~SCSW_FLAGS_MASK_PNO; 317 318 /* We always 'attempt to issue the clear signal', and we always succeed. */ 319 sch->channel_prog = 0x0; 320 sch->last_cmd_valid = false; 321 s->ctrl &= ~SCSW_ACTL_CLEAR_PEND; 322 s->ctrl |= SCSW_STCTL_STATUS_PEND; 323 324 s->dstat = 0; 325 s->cstat = 0; 326 p->lpum = path; 327 328 } 329 330 static void sch_handle_halt_func(SubchDev *sch) 331 { 332 333 PMCW *p = &sch->curr_status.pmcw; 334 SCSW *s = &sch->curr_status.scsw; 335 hwaddr curr_ccw = sch->channel_prog; 336 int path; 337 338 /* Path management: In our simple css, we always choose the only path. */ 339 path = 0x80; 340 341 /* We always 'attempt to issue the halt signal', and we always succeed. */ 342 sch->channel_prog = 0x0; 343 sch->last_cmd_valid = false; 344 s->ctrl &= ~SCSW_ACTL_HALT_PEND; 345 s->ctrl |= SCSW_STCTL_STATUS_PEND; 346 347 if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) || 348 !((s->ctrl & SCSW_ACTL_START_PEND) || 349 (s->ctrl & SCSW_ACTL_SUSP))) { 350 s->dstat = SCSW_DSTAT_DEVICE_END; 351 } 352 if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) || 353 (s->ctrl & SCSW_ACTL_SUSP)) { 354 s->cpa = curr_ccw + 8; 355 } 356 s->cstat = 0; 357 p->lpum = path; 358 359 } 360 361 static void copy_sense_id_to_guest(SenseId *dest, SenseId *src) 362 { 363 int i; 364 365 dest->reserved = src->reserved; 366 dest->cu_type = cpu_to_be16(src->cu_type); 367 dest->cu_model = src->cu_model; 368 dest->dev_type = cpu_to_be16(src->dev_type); 369 dest->dev_model = src->dev_model; 370 dest->unused = src->unused; 371 for (i = 0; i < ARRAY_SIZE(dest->ciw); i++) { 372 dest->ciw[i].type = src->ciw[i].type; 373 dest->ciw[i].command = src->ciw[i].command; 374 dest->ciw[i].count = cpu_to_be16(src->ciw[i].count); 375 } 376 } 377 378 static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1) 379 { 380 CCW0 tmp0; 381 CCW1 tmp1; 382 CCW1 ret; 383 384 if (fmt1) { 385 cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1)); 386 ret.cmd_code = tmp1.cmd_code; 387 ret.flags = tmp1.flags; 388 ret.count = be16_to_cpu(tmp1.count); 389 ret.cda = be32_to_cpu(tmp1.cda); 390 } else { 391 cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0)); 392 if ((tmp0.cmd_code & 0x0f) == CCW_CMD_TIC) { 393 ret.cmd_code = CCW_CMD_TIC; 394 ret.flags = 0; 395 ret.count = 0; 396 } else { 397 ret.cmd_code = tmp0.cmd_code; 398 ret.flags = tmp0.flags; 399 ret.count = be16_to_cpu(tmp0.count); 400 } 401 ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16); 402 } 403 return ret; 404 } 405 406 static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr, 407 bool suspend_allowed) 408 { 409 int ret; 410 bool check_len; 411 int len; 412 CCW1 ccw; 413 414 if (!ccw_addr) { 415 return -EIO; 416 } 417 418 /* Translate everything to format-1 ccws - the information is the same. */ 419 ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1); 420 421 /* Check for invalid command codes. */ 422 if ((ccw.cmd_code & 0x0f) == 0) { 423 return -EINVAL; 424 } 425 if (((ccw.cmd_code & 0x0f) == CCW_CMD_TIC) && 426 ((ccw.cmd_code & 0xf0) != 0)) { 427 return -EINVAL; 428 } 429 if (!sch->ccw_fmt_1 && (ccw.count == 0) && 430 (ccw.cmd_code != CCW_CMD_TIC)) { 431 return -EINVAL; 432 } 433 434 if (ccw.flags & CCW_FLAG_SUSPEND) { 435 return suspend_allowed ? -EINPROGRESS : -EINVAL; 436 } 437 438 check_len = !((ccw.flags & CCW_FLAG_SLI) && !(ccw.flags & CCW_FLAG_DC)); 439 440 if (!ccw.cda) { 441 if (sch->ccw_no_data_cnt == 255) { 442 return -EINVAL; 443 } 444 sch->ccw_no_data_cnt++; 445 } 446 447 /* Look at the command. */ 448 switch (ccw.cmd_code) { 449 case CCW_CMD_NOOP: 450 /* Nothing to do. */ 451 ret = 0; 452 break; 453 case CCW_CMD_BASIC_SENSE: 454 if (check_len) { 455 if (ccw.count != sizeof(sch->sense_data)) { 456 ret = -EINVAL; 457 break; 458 } 459 } 460 len = MIN(ccw.count, sizeof(sch->sense_data)); 461 cpu_physical_memory_write(ccw.cda, sch->sense_data, len); 462 sch->curr_status.scsw.count = ccw.count - len; 463 memset(sch->sense_data, 0, sizeof(sch->sense_data)); 464 ret = 0; 465 break; 466 case CCW_CMD_SENSE_ID: 467 { 468 SenseId sense_id; 469 470 copy_sense_id_to_guest(&sense_id, &sch->id); 471 /* Sense ID information is device specific. */ 472 if (check_len) { 473 if (ccw.count != sizeof(sense_id)) { 474 ret = -EINVAL; 475 break; 476 } 477 } 478 len = MIN(ccw.count, sizeof(sense_id)); 479 /* 480 * Only indicate 0xff in the first sense byte if we actually 481 * have enough place to store at least bytes 0-3. 482 */ 483 if (len >= 4) { 484 sense_id.reserved = 0xff; 485 } else { 486 sense_id.reserved = 0; 487 } 488 cpu_physical_memory_write(ccw.cda, &sense_id, len); 489 sch->curr_status.scsw.count = ccw.count - len; 490 ret = 0; 491 break; 492 } 493 case CCW_CMD_TIC: 494 if (sch->last_cmd_valid && (sch->last_cmd.cmd_code == CCW_CMD_TIC)) { 495 ret = -EINVAL; 496 break; 497 } 498 if (ccw.flags & (CCW_FLAG_CC | CCW_FLAG_DC)) { 499 ret = -EINVAL; 500 break; 501 } 502 sch->channel_prog = ccw.cda; 503 ret = -EAGAIN; 504 break; 505 default: 506 if (sch->ccw_cb) { 507 /* Handle device specific commands. */ 508 ret = sch->ccw_cb(sch, ccw); 509 } else { 510 ret = -ENOSYS; 511 } 512 break; 513 } 514 sch->last_cmd = ccw; 515 sch->last_cmd_valid = true; 516 if (ret == 0) { 517 if (ccw.flags & CCW_FLAG_CC) { 518 sch->channel_prog += 8; 519 ret = -EAGAIN; 520 } 521 } 522 523 return ret; 524 } 525 526 static void sch_handle_start_func(SubchDev *sch, ORB *orb) 527 { 528 529 PMCW *p = &sch->curr_status.pmcw; 530 SCSW *s = &sch->curr_status.scsw; 531 int path; 532 int ret; 533 bool suspend_allowed; 534 535 /* Path management: In our simple css, we always choose the only path. */ 536 path = 0x80; 537 538 if (!(s->ctrl & SCSW_ACTL_SUSP)) { 539 /* Start Function triggered via ssch, i.e. we have an ORB */ 540 s->cstat = 0; 541 s->dstat = 0; 542 /* Look at the orb and try to execute the channel program. */ 543 assert(orb != NULL); /* resume does not pass an orb */ 544 p->intparm = orb->intparm; 545 if (!(orb->lpm & path)) { 546 /* Generate a deferred cc 3 condition. */ 547 s->flags |= SCSW_FLAGS_MASK_CC; 548 s->ctrl &= ~SCSW_CTRL_MASK_STCTL; 549 s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND); 550 return; 551 } 552 sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT); 553 s->flags |= (sch->ccw_fmt_1) ? SCSW_FLAGS_MASK_FMT : 0; 554 sch->ccw_no_data_cnt = 0; 555 suspend_allowed = !!(orb->ctrl0 & ORB_CTRL0_MASK_SPND); 556 } else { 557 /* Start Function resumed via rsch, i.e. we don't have an 558 * ORB */ 559 s->ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND); 560 /* The channel program had been suspended before. */ 561 suspend_allowed = true; 562 } 563 sch->last_cmd_valid = false; 564 do { 565 ret = css_interpret_ccw(sch, sch->channel_prog, suspend_allowed); 566 switch (ret) { 567 case -EAGAIN: 568 /* ccw chain, continue processing */ 569 break; 570 case 0: 571 /* success */ 572 s->ctrl &= ~SCSW_ACTL_START_PEND; 573 s->ctrl &= ~SCSW_CTRL_MASK_STCTL; 574 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | 575 SCSW_STCTL_STATUS_PEND; 576 s->dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END; 577 s->cpa = sch->channel_prog + 8; 578 break; 579 case -EIO: 580 /* I/O errors, status depends on specific devices */ 581 break; 582 case -ENOSYS: 583 /* unsupported command, generate unit check (command reject) */ 584 s->ctrl &= ~SCSW_ACTL_START_PEND; 585 s->dstat = SCSW_DSTAT_UNIT_CHECK; 586 /* Set sense bit 0 in ecw0. */ 587 sch->sense_data[0] = 0x80; 588 s->ctrl &= ~SCSW_CTRL_MASK_STCTL; 589 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | 590 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; 591 s->cpa = sch->channel_prog + 8; 592 break; 593 case -EFAULT: 594 /* memory problem, generate channel data check */ 595 s->ctrl &= ~SCSW_ACTL_START_PEND; 596 s->cstat = SCSW_CSTAT_DATA_CHECK; 597 s->ctrl &= ~SCSW_CTRL_MASK_STCTL; 598 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | 599 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; 600 s->cpa = sch->channel_prog + 8; 601 break; 602 case -EBUSY: 603 /* subchannel busy, generate deferred cc 1 */ 604 s->flags &= ~SCSW_FLAGS_MASK_CC; 605 s->flags |= (1 << 8); 606 s->ctrl &= ~SCSW_CTRL_MASK_STCTL; 607 s->ctrl |= SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; 608 break; 609 case -EINPROGRESS: 610 /* channel program has been suspended */ 611 s->ctrl &= ~SCSW_ACTL_START_PEND; 612 s->ctrl |= SCSW_ACTL_SUSP; 613 break; 614 default: 615 /* error, generate channel program check */ 616 s->ctrl &= ~SCSW_ACTL_START_PEND; 617 s->cstat = SCSW_CSTAT_PROG_CHECK; 618 s->ctrl &= ~SCSW_CTRL_MASK_STCTL; 619 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | 620 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; 621 s->cpa = sch->channel_prog + 8; 622 break; 623 } 624 } while (ret == -EAGAIN); 625 626 } 627 628 /* 629 * On real machines, this would run asynchronously to the main vcpus. 630 * We might want to make some parts of the ssch handling (interpreting 631 * read/writes) asynchronous later on if we start supporting more than 632 * our current very simple devices. 633 */ 634 static void do_subchannel_work(SubchDev *sch, ORB *orb) 635 { 636 637 SCSW *s = &sch->curr_status.scsw; 638 639 if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) { 640 sch_handle_clear_func(sch); 641 } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) { 642 sch_handle_halt_func(sch); 643 } else if (s->ctrl & SCSW_FCTL_START_FUNC) { 644 /* Triggered by both ssch and rsch. */ 645 sch_handle_start_func(sch, orb); 646 } else { 647 /* Cannot happen. */ 648 return; 649 } 650 css_inject_io_interrupt(sch); 651 } 652 653 static void copy_pmcw_to_guest(PMCW *dest, const PMCW *src) 654 { 655 int i; 656 657 dest->intparm = cpu_to_be32(src->intparm); 658 dest->flags = cpu_to_be16(src->flags); 659 dest->devno = cpu_to_be16(src->devno); 660 dest->lpm = src->lpm; 661 dest->pnom = src->pnom; 662 dest->lpum = src->lpum; 663 dest->pim = src->pim; 664 dest->mbi = cpu_to_be16(src->mbi); 665 dest->pom = src->pom; 666 dest->pam = src->pam; 667 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) { 668 dest->chpid[i] = src->chpid[i]; 669 } 670 dest->chars = cpu_to_be32(src->chars); 671 } 672 673 static void copy_scsw_to_guest(SCSW *dest, const SCSW *src) 674 { 675 dest->flags = cpu_to_be16(src->flags); 676 dest->ctrl = cpu_to_be16(src->ctrl); 677 dest->cpa = cpu_to_be32(src->cpa); 678 dest->dstat = src->dstat; 679 dest->cstat = src->cstat; 680 dest->count = cpu_to_be16(src->count); 681 } 682 683 static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src) 684 { 685 int i; 686 687 copy_pmcw_to_guest(&dest->pmcw, &src->pmcw); 688 copy_scsw_to_guest(&dest->scsw, &src->scsw); 689 dest->mba = cpu_to_be64(src->mba); 690 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) { 691 dest->mda[i] = src->mda[i]; 692 } 693 } 694 695 int css_do_stsch(SubchDev *sch, SCHIB *schib) 696 { 697 /* Use current status. */ 698 copy_schib_to_guest(schib, &sch->curr_status); 699 return 0; 700 } 701 702 static void copy_pmcw_from_guest(PMCW *dest, const PMCW *src) 703 { 704 int i; 705 706 dest->intparm = be32_to_cpu(src->intparm); 707 dest->flags = be16_to_cpu(src->flags); 708 dest->devno = be16_to_cpu(src->devno); 709 dest->lpm = src->lpm; 710 dest->pnom = src->pnom; 711 dest->lpum = src->lpum; 712 dest->pim = src->pim; 713 dest->mbi = be16_to_cpu(src->mbi); 714 dest->pom = src->pom; 715 dest->pam = src->pam; 716 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) { 717 dest->chpid[i] = src->chpid[i]; 718 } 719 dest->chars = be32_to_cpu(src->chars); 720 } 721 722 static void copy_scsw_from_guest(SCSW *dest, const SCSW *src) 723 { 724 dest->flags = be16_to_cpu(src->flags); 725 dest->ctrl = be16_to_cpu(src->ctrl); 726 dest->cpa = be32_to_cpu(src->cpa); 727 dest->dstat = src->dstat; 728 dest->cstat = src->cstat; 729 dest->count = be16_to_cpu(src->count); 730 } 731 732 static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src) 733 { 734 int i; 735 736 copy_pmcw_from_guest(&dest->pmcw, &src->pmcw); 737 copy_scsw_from_guest(&dest->scsw, &src->scsw); 738 dest->mba = be64_to_cpu(src->mba); 739 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) { 740 dest->mda[i] = src->mda[i]; 741 } 742 } 743 744 int css_do_msch(SubchDev *sch, const SCHIB *orig_schib) 745 { 746 SCSW *s = &sch->curr_status.scsw; 747 PMCW *p = &sch->curr_status.pmcw; 748 uint16_t oldflags; 749 int ret; 750 SCHIB schib; 751 752 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_DNV)) { 753 ret = 0; 754 goto out; 755 } 756 757 if (s->ctrl & SCSW_STCTL_STATUS_PEND) { 758 ret = -EINPROGRESS; 759 goto out; 760 } 761 762 if (s->ctrl & 763 (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) { 764 ret = -EBUSY; 765 goto out; 766 } 767 768 copy_schib_from_guest(&schib, orig_schib); 769 /* Only update the program-modifiable fields. */ 770 p->intparm = schib.pmcw.intparm; 771 oldflags = p->flags; 772 p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA | 773 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME | 774 PMCW_FLAGS_MASK_MP); 775 p->flags |= schib.pmcw.flags & 776 (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA | 777 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME | 778 PMCW_FLAGS_MASK_MP); 779 p->lpm = schib.pmcw.lpm; 780 p->mbi = schib.pmcw.mbi; 781 p->pom = schib.pmcw.pom; 782 p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE); 783 p->chars |= schib.pmcw.chars & 784 (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE); 785 sch->curr_status.mba = schib.mba; 786 787 /* Has the channel been disabled? */ 788 if (sch->disable_cb && (oldflags & PMCW_FLAGS_MASK_ENA) != 0 789 && (p->flags & PMCW_FLAGS_MASK_ENA) == 0) { 790 sch->disable_cb(sch); 791 } 792 793 ret = 0; 794 795 out: 796 return ret; 797 } 798 799 int css_do_xsch(SubchDev *sch) 800 { 801 SCSW *s = &sch->curr_status.scsw; 802 PMCW *p = &sch->curr_status.pmcw; 803 int ret; 804 805 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { 806 ret = -ENODEV; 807 goto out; 808 } 809 810 if (!(s->ctrl & SCSW_CTRL_MASK_FCTL) || 811 ((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) || 812 (!(s->ctrl & 813 (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) || 814 (s->ctrl & SCSW_ACTL_SUBCH_ACTIVE)) { 815 ret = -EINPROGRESS; 816 goto out; 817 } 818 819 if (s->ctrl & SCSW_CTRL_MASK_STCTL) { 820 ret = -EBUSY; 821 goto out; 822 } 823 824 /* Cancel the current operation. */ 825 s->ctrl &= ~(SCSW_FCTL_START_FUNC | 826 SCSW_ACTL_RESUME_PEND | 827 SCSW_ACTL_START_PEND | 828 SCSW_ACTL_SUSP); 829 sch->channel_prog = 0x0; 830 sch->last_cmd_valid = false; 831 s->dstat = 0; 832 s->cstat = 0; 833 ret = 0; 834 835 out: 836 return ret; 837 } 838 839 int css_do_csch(SubchDev *sch) 840 { 841 SCSW *s = &sch->curr_status.scsw; 842 PMCW *p = &sch->curr_status.pmcw; 843 int ret; 844 845 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { 846 ret = -ENODEV; 847 goto out; 848 } 849 850 /* Trigger the clear function. */ 851 s->ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL); 852 s->ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND; 853 854 do_subchannel_work(sch, NULL); 855 ret = 0; 856 857 out: 858 return ret; 859 } 860 861 int css_do_hsch(SubchDev *sch) 862 { 863 SCSW *s = &sch->curr_status.scsw; 864 PMCW *p = &sch->curr_status.pmcw; 865 int ret; 866 867 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { 868 ret = -ENODEV; 869 goto out; 870 } 871 872 if (((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) || 873 (s->ctrl & (SCSW_STCTL_PRIMARY | 874 SCSW_STCTL_SECONDARY | 875 SCSW_STCTL_ALERT))) { 876 ret = -EINPROGRESS; 877 goto out; 878 } 879 880 if (s->ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) { 881 ret = -EBUSY; 882 goto out; 883 } 884 885 /* Trigger the halt function. */ 886 s->ctrl |= SCSW_FCTL_HALT_FUNC; 887 s->ctrl &= ~SCSW_FCTL_START_FUNC; 888 if (((s->ctrl & SCSW_CTRL_MASK_ACTL) == 889 (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) && 890 ((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_INTERMEDIATE)) { 891 s->ctrl &= ~SCSW_STCTL_STATUS_PEND; 892 } 893 s->ctrl |= SCSW_ACTL_HALT_PEND; 894 895 do_subchannel_work(sch, NULL); 896 ret = 0; 897 898 out: 899 return ret; 900 } 901 902 static void css_update_chnmon(SubchDev *sch) 903 { 904 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_MME)) { 905 /* Not active. */ 906 return; 907 } 908 /* The counter is conveniently located at the beginning of the struct. */ 909 if (sch->curr_status.pmcw.chars & PMCW_CHARS_MASK_MBFC) { 910 /* Format 1, per-subchannel area. */ 911 uint32_t count; 912 913 count = address_space_ldl(&address_space_memory, 914 sch->curr_status.mba, 915 MEMTXATTRS_UNSPECIFIED, 916 NULL); 917 count++; 918 address_space_stl(&address_space_memory, sch->curr_status.mba, count, 919 MEMTXATTRS_UNSPECIFIED, NULL); 920 } else { 921 /* Format 0, global area. */ 922 uint32_t offset; 923 uint16_t count; 924 925 offset = sch->curr_status.pmcw.mbi << 5; 926 count = address_space_lduw(&address_space_memory, 927 channel_subsys.chnmon_area + offset, 928 MEMTXATTRS_UNSPECIFIED, 929 NULL); 930 count++; 931 address_space_stw(&address_space_memory, 932 channel_subsys.chnmon_area + offset, count, 933 MEMTXATTRS_UNSPECIFIED, NULL); 934 } 935 } 936 937 int css_do_ssch(SubchDev *sch, ORB *orb) 938 { 939 SCSW *s = &sch->curr_status.scsw; 940 PMCW *p = &sch->curr_status.pmcw; 941 int ret; 942 943 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { 944 ret = -ENODEV; 945 goto out; 946 } 947 948 if (s->ctrl & SCSW_STCTL_STATUS_PEND) { 949 ret = -EINPROGRESS; 950 goto out; 951 } 952 953 if (s->ctrl & (SCSW_FCTL_START_FUNC | 954 SCSW_FCTL_HALT_FUNC | 955 SCSW_FCTL_CLEAR_FUNC)) { 956 ret = -EBUSY; 957 goto out; 958 } 959 960 /* If monitoring is active, update counter. */ 961 if (channel_subsys.chnmon_active) { 962 css_update_chnmon(sch); 963 } 964 sch->channel_prog = orb->cpa; 965 /* Trigger the start function. */ 966 s->ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND); 967 s->flags &= ~SCSW_FLAGS_MASK_PNO; 968 969 do_subchannel_work(sch, orb); 970 ret = 0; 971 972 out: 973 return ret; 974 } 975 976 static void copy_irb_to_guest(IRB *dest, const IRB *src, PMCW *pmcw, 977 int *irb_len) 978 { 979 int i; 980 uint16_t stctl = src->scsw.ctrl & SCSW_CTRL_MASK_STCTL; 981 uint16_t actl = src->scsw.ctrl & SCSW_CTRL_MASK_ACTL; 982 983 copy_scsw_to_guest(&dest->scsw, &src->scsw); 984 985 for (i = 0; i < ARRAY_SIZE(dest->esw); i++) { 986 dest->esw[i] = cpu_to_be32(src->esw[i]); 987 } 988 for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) { 989 dest->ecw[i] = cpu_to_be32(src->ecw[i]); 990 } 991 *irb_len = sizeof(*dest) - sizeof(dest->emw); 992 993 /* extended measurements enabled? */ 994 if ((src->scsw.flags & SCSW_FLAGS_MASK_ESWF) || 995 !(pmcw->flags & PMCW_FLAGS_MASK_TF) || 996 !(pmcw->chars & PMCW_CHARS_MASK_XMWME)) { 997 return; 998 } 999 /* extended measurements pending? */ 1000 if (!(stctl & SCSW_STCTL_STATUS_PEND)) { 1001 return; 1002 } 1003 if ((stctl & SCSW_STCTL_PRIMARY) || 1004 (stctl == SCSW_STCTL_SECONDARY) || 1005 ((stctl & SCSW_STCTL_INTERMEDIATE) && (actl & SCSW_ACTL_SUSP))) { 1006 for (i = 0; i < ARRAY_SIZE(dest->emw); i++) { 1007 dest->emw[i] = cpu_to_be32(src->emw[i]); 1008 } 1009 } 1010 *irb_len = sizeof(*dest); 1011 } 1012 1013 int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len) 1014 { 1015 SCSW *s = &sch->curr_status.scsw; 1016 PMCW *p = &sch->curr_status.pmcw; 1017 uint16_t stctl; 1018 IRB irb; 1019 1020 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { 1021 return 3; 1022 } 1023 1024 stctl = s->ctrl & SCSW_CTRL_MASK_STCTL; 1025 1026 /* Prepare the irb for the guest. */ 1027 memset(&irb, 0, sizeof(IRB)); 1028 1029 /* Copy scsw from current status. */ 1030 memcpy(&irb.scsw, s, sizeof(SCSW)); 1031 if (stctl & SCSW_STCTL_STATUS_PEND) { 1032 if (s->cstat & (SCSW_CSTAT_DATA_CHECK | 1033 SCSW_CSTAT_CHN_CTRL_CHK | 1034 SCSW_CSTAT_INTF_CTRL_CHK)) { 1035 irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF; 1036 irb.esw[0] = 0x04804000; 1037 } else { 1038 irb.esw[0] = 0x00800000; 1039 } 1040 /* If a unit check is pending, copy sense data. */ 1041 if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) && 1042 (p->chars & PMCW_CHARS_MASK_CSENSE)) { 1043 int i; 1044 1045 irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL; 1046 /* Attention: sense_data is already BE! */ 1047 memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data)); 1048 for (i = 0; i < ARRAY_SIZE(irb.ecw); i++) { 1049 irb.ecw[i] = be32_to_cpu(irb.ecw[i]); 1050 } 1051 irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8); 1052 } 1053 } 1054 /* Store the irb to the guest. */ 1055 copy_irb_to_guest(target_irb, &irb, p, irb_len); 1056 1057 return ((stctl & SCSW_STCTL_STATUS_PEND) == 0); 1058 } 1059 1060 void css_do_tsch_update_subch(SubchDev *sch) 1061 { 1062 SCSW *s = &sch->curr_status.scsw; 1063 PMCW *p = &sch->curr_status.pmcw; 1064 uint16_t stctl; 1065 uint16_t fctl; 1066 uint16_t actl; 1067 1068 stctl = s->ctrl & SCSW_CTRL_MASK_STCTL; 1069 fctl = s->ctrl & SCSW_CTRL_MASK_FCTL; 1070 actl = s->ctrl & SCSW_CTRL_MASK_ACTL; 1071 1072 /* Clear conditions on subchannel, if applicable. */ 1073 if (stctl & SCSW_STCTL_STATUS_PEND) { 1074 s->ctrl &= ~SCSW_CTRL_MASK_STCTL; 1075 if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) || 1076 ((fctl & SCSW_FCTL_HALT_FUNC) && 1077 (actl & SCSW_ACTL_SUSP))) { 1078 s->ctrl &= ~SCSW_CTRL_MASK_FCTL; 1079 } 1080 if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) { 1081 s->flags &= ~SCSW_FLAGS_MASK_PNO; 1082 s->ctrl &= ~(SCSW_ACTL_RESUME_PEND | 1083 SCSW_ACTL_START_PEND | 1084 SCSW_ACTL_HALT_PEND | 1085 SCSW_ACTL_CLEAR_PEND | 1086 SCSW_ACTL_SUSP); 1087 } else { 1088 if ((actl & SCSW_ACTL_SUSP) && 1089 (fctl & SCSW_FCTL_START_FUNC)) { 1090 s->flags &= ~SCSW_FLAGS_MASK_PNO; 1091 if (fctl & SCSW_FCTL_HALT_FUNC) { 1092 s->ctrl &= ~(SCSW_ACTL_RESUME_PEND | 1093 SCSW_ACTL_START_PEND | 1094 SCSW_ACTL_HALT_PEND | 1095 SCSW_ACTL_CLEAR_PEND | 1096 SCSW_ACTL_SUSP); 1097 } else { 1098 s->ctrl &= ~SCSW_ACTL_RESUME_PEND; 1099 } 1100 } 1101 } 1102 /* Clear pending sense data. */ 1103 if (p->chars & PMCW_CHARS_MASK_CSENSE) { 1104 memset(sch->sense_data, 0 , sizeof(sch->sense_data)); 1105 } 1106 } 1107 } 1108 1109 static void copy_crw_to_guest(CRW *dest, const CRW *src) 1110 { 1111 dest->flags = cpu_to_be16(src->flags); 1112 dest->rsid = cpu_to_be16(src->rsid); 1113 } 1114 1115 int css_do_stcrw(CRW *crw) 1116 { 1117 CrwContainer *crw_cont; 1118 int ret; 1119 1120 crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws); 1121 if (crw_cont) { 1122 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling); 1123 copy_crw_to_guest(crw, &crw_cont->crw); 1124 g_free(crw_cont); 1125 ret = 0; 1126 } else { 1127 /* List was empty, turn crw machine checks on again. */ 1128 memset(crw, 0, sizeof(*crw)); 1129 channel_subsys.do_crw_mchk = true; 1130 ret = 1; 1131 } 1132 1133 return ret; 1134 } 1135 1136 static void copy_crw_from_guest(CRW *dest, const CRW *src) 1137 { 1138 dest->flags = be16_to_cpu(src->flags); 1139 dest->rsid = be16_to_cpu(src->rsid); 1140 } 1141 1142 void css_undo_stcrw(CRW *crw) 1143 { 1144 CrwContainer *crw_cont; 1145 1146 crw_cont = g_try_malloc0(sizeof(CrwContainer)); 1147 if (!crw_cont) { 1148 channel_subsys.crws_lost = true; 1149 return; 1150 } 1151 copy_crw_from_guest(&crw_cont->crw, crw); 1152 1153 QTAILQ_INSERT_HEAD(&channel_subsys.pending_crws, crw_cont, sibling); 1154 } 1155 1156 int css_do_tpi(IOIntCode *int_code, int lowcore) 1157 { 1158 /* No pending interrupts for !KVM. */ 1159 return 0; 1160 } 1161 1162 int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid, 1163 int rfmt, void *buf) 1164 { 1165 int i, desc_size; 1166 uint32_t words[8]; 1167 uint32_t chpid_type_word; 1168 CssImage *css; 1169 1170 if (!m && !cssid) { 1171 css = channel_subsys.css[channel_subsys.default_cssid]; 1172 } else { 1173 css = channel_subsys.css[cssid]; 1174 } 1175 if (!css) { 1176 return 0; 1177 } 1178 desc_size = 0; 1179 for (i = f_chpid; i <= l_chpid; i++) { 1180 if (css->chpids[i].in_use) { 1181 chpid_type_word = 0x80000000 | (css->chpids[i].type << 8) | i; 1182 if (rfmt == 0) { 1183 words[0] = cpu_to_be32(chpid_type_word); 1184 words[1] = 0; 1185 memcpy(buf + desc_size, words, 8); 1186 desc_size += 8; 1187 } else if (rfmt == 1) { 1188 words[0] = cpu_to_be32(chpid_type_word); 1189 words[1] = 0; 1190 words[2] = 0; 1191 words[3] = 0; 1192 words[4] = 0; 1193 words[5] = 0; 1194 words[6] = 0; 1195 words[7] = 0; 1196 memcpy(buf + desc_size, words, 32); 1197 desc_size += 32; 1198 } 1199 } 1200 } 1201 return desc_size; 1202 } 1203 1204 void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo) 1205 { 1206 /* dct is currently ignored (not really meaningful for our devices) */ 1207 /* TODO: Don't ignore mbk. */ 1208 if (update && !channel_subsys.chnmon_active) { 1209 /* Enable measuring. */ 1210 channel_subsys.chnmon_area = mbo; 1211 channel_subsys.chnmon_active = true; 1212 } 1213 if (!update && channel_subsys.chnmon_active) { 1214 /* Disable measuring. */ 1215 channel_subsys.chnmon_area = 0; 1216 channel_subsys.chnmon_active = false; 1217 } 1218 } 1219 1220 int css_do_rsch(SubchDev *sch) 1221 { 1222 SCSW *s = &sch->curr_status.scsw; 1223 PMCW *p = &sch->curr_status.pmcw; 1224 int ret; 1225 1226 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { 1227 ret = -ENODEV; 1228 goto out; 1229 } 1230 1231 if (s->ctrl & SCSW_STCTL_STATUS_PEND) { 1232 ret = -EINPROGRESS; 1233 goto out; 1234 } 1235 1236 if (((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) || 1237 (s->ctrl & SCSW_ACTL_RESUME_PEND) || 1238 (!(s->ctrl & SCSW_ACTL_SUSP))) { 1239 ret = -EINVAL; 1240 goto out; 1241 } 1242 1243 /* If monitoring is active, update counter. */ 1244 if (channel_subsys.chnmon_active) { 1245 css_update_chnmon(sch); 1246 } 1247 1248 s->ctrl |= SCSW_ACTL_RESUME_PEND; 1249 do_subchannel_work(sch, NULL); 1250 ret = 0; 1251 1252 out: 1253 return ret; 1254 } 1255 1256 int css_do_rchp(uint8_t cssid, uint8_t chpid) 1257 { 1258 uint8_t real_cssid; 1259 1260 if (cssid > channel_subsys.max_cssid) { 1261 return -EINVAL; 1262 } 1263 if (channel_subsys.max_cssid == 0) { 1264 real_cssid = channel_subsys.default_cssid; 1265 } else { 1266 real_cssid = cssid; 1267 } 1268 if (!channel_subsys.css[real_cssid]) { 1269 return -EINVAL; 1270 } 1271 1272 if (!channel_subsys.css[real_cssid]->chpids[chpid].in_use) { 1273 return -ENODEV; 1274 } 1275 1276 if (!channel_subsys.css[real_cssid]->chpids[chpid].is_virtual) { 1277 fprintf(stderr, 1278 "rchp unsupported for non-virtual chpid %x.%02x!\n", 1279 real_cssid, chpid); 1280 return -ENODEV; 1281 } 1282 1283 /* We don't really use a channel path, so we're done here. */ 1284 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 1285 channel_subsys.max_cssid > 0 ? 1 : 0, chpid); 1286 if (channel_subsys.max_cssid > 0) { 1287 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 0, real_cssid << 8); 1288 } 1289 return 0; 1290 } 1291 1292 bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid) 1293 { 1294 SubchSet *set; 1295 uint8_t real_cssid; 1296 1297 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid; 1298 if (ssid > MAX_SSID || 1299 !channel_subsys.css[real_cssid] || 1300 !channel_subsys.css[real_cssid]->sch_set[ssid]) { 1301 return true; 1302 } 1303 set = channel_subsys.css[real_cssid]->sch_set[ssid]; 1304 return schid > find_last_bit(set->schids_used, 1305 (MAX_SCHID + 1) / sizeof(unsigned long)); 1306 } 1307 1308 unsigned int css_find_free_chpid(uint8_t cssid) 1309 { 1310 CssImage *css = channel_subsys.css[cssid]; 1311 unsigned int chpid; 1312 1313 if (!css) { 1314 return MAX_CHPID + 1; 1315 } 1316 1317 for (chpid = 0; chpid <= MAX_CHPID; chpid++) { 1318 /* skip reserved chpid */ 1319 if (chpid == VIRTIO_CCW_CHPID) { 1320 continue; 1321 } 1322 if (!css->chpids[chpid].in_use) { 1323 return chpid; 1324 } 1325 } 1326 return MAX_CHPID + 1; 1327 } 1328 1329 static int css_add_virtual_chpid(uint8_t cssid, uint8_t chpid, uint8_t type) 1330 { 1331 CssImage *css; 1332 1333 trace_css_chpid_add(cssid, chpid, type); 1334 css = channel_subsys.css[cssid]; 1335 if (!css) { 1336 return -EINVAL; 1337 } 1338 if (css->chpids[chpid].in_use) { 1339 return -EEXIST; 1340 } 1341 css->chpids[chpid].in_use = 1; 1342 css->chpids[chpid].type = type; 1343 css->chpids[chpid].is_virtual = 1; 1344 1345 css_generate_chp_crws(cssid, chpid); 1346 1347 return 0; 1348 } 1349 1350 void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type) 1351 { 1352 PMCW *p = &sch->curr_status.pmcw; 1353 SCSW *s = &sch->curr_status.scsw; 1354 int i; 1355 CssImage *css = channel_subsys.css[sch->cssid]; 1356 1357 assert(css != NULL); 1358 memset(p, 0, sizeof(PMCW)); 1359 p->flags |= PMCW_FLAGS_MASK_DNV; 1360 p->devno = sch->devno; 1361 /* single path */ 1362 p->pim = 0x80; 1363 p->pom = 0xff; 1364 p->pam = 0x80; 1365 p->chpid[0] = chpid; 1366 if (!css->chpids[chpid].in_use) { 1367 css_add_virtual_chpid(sch->cssid, chpid, type); 1368 } 1369 1370 memset(s, 0, sizeof(SCSW)); 1371 sch->curr_status.mba = 0; 1372 for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) { 1373 sch->curr_status.mda[i] = 0; 1374 } 1375 } 1376 1377 SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid) 1378 { 1379 uint8_t real_cssid; 1380 1381 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid; 1382 1383 if (!channel_subsys.css[real_cssid]) { 1384 return NULL; 1385 } 1386 1387 if (!channel_subsys.css[real_cssid]->sch_set[ssid]) { 1388 return NULL; 1389 } 1390 1391 return channel_subsys.css[real_cssid]->sch_set[ssid]->sch[schid]; 1392 } 1393 1394 /** 1395 * Return free device number in subchannel set. 1396 * 1397 * Return index of the first free device number in the subchannel set 1398 * identified by @p cssid and @p ssid, beginning the search at @p 1399 * start and wrapping around at MAX_DEVNO. Return a value exceeding 1400 * MAX_SCHID if there are no free device numbers in the subchannel 1401 * set. 1402 */ 1403 static uint32_t css_find_free_devno(uint8_t cssid, uint8_t ssid, 1404 uint16_t start) 1405 { 1406 uint32_t round; 1407 1408 for (round = 0; round <= MAX_DEVNO; round++) { 1409 uint16_t devno = (start + round) % MAX_DEVNO; 1410 1411 if (!css_devno_used(cssid, ssid, devno)) { 1412 return devno; 1413 } 1414 } 1415 return MAX_DEVNO + 1; 1416 } 1417 1418 /** 1419 * Return first free subchannel (id) in subchannel set. 1420 * 1421 * Return index of the first free subchannel in the subchannel set 1422 * identified by @p cssid and @p ssid, if there is any. Return a value 1423 * exceeding MAX_SCHID if there are no free subchannels in the 1424 * subchannel set. 1425 */ 1426 static uint32_t css_find_free_subch(uint8_t cssid, uint8_t ssid) 1427 { 1428 uint32_t schid; 1429 1430 for (schid = 0; schid <= MAX_SCHID; schid++) { 1431 if (!css_find_subch(1, cssid, ssid, schid)) { 1432 return schid; 1433 } 1434 } 1435 return MAX_SCHID + 1; 1436 } 1437 1438 /** 1439 * Return first free subchannel (id) in subchannel set for a device number 1440 * 1441 * Verify the device number @p devno is not used yet in the subchannel 1442 * set identified by @p cssid and @p ssid. Set @p schid to the index 1443 * of the first free subchannel in the subchannel set, if there is 1444 * any. Return true if everything succeeded and false otherwise. 1445 */ 1446 static bool css_find_free_subch_for_devno(uint8_t cssid, uint8_t ssid, 1447 uint16_t devno, uint16_t *schid, 1448 Error **errp) 1449 { 1450 uint32_t free_schid; 1451 1452 assert(schid); 1453 if (css_devno_used(cssid, ssid, devno)) { 1454 error_setg(errp, "Device %x.%x.%04x already exists", 1455 cssid, ssid, devno); 1456 return false; 1457 } 1458 free_schid = css_find_free_subch(cssid, ssid); 1459 if (free_schid > MAX_SCHID) { 1460 error_setg(errp, "No free subchannel found for %x.%x.%04x", 1461 cssid, ssid, devno); 1462 return false; 1463 } 1464 *schid = free_schid; 1465 return true; 1466 } 1467 1468 /** 1469 * Return first free subchannel (id) and device number 1470 * 1471 * Locate the first free subchannel and first free device number in 1472 * any of the subchannel sets of the channel subsystem identified by 1473 * @p cssid. Return false if no free subchannel / device number could 1474 * be found. Otherwise set @p ssid, @p devno and @p schid to identify 1475 * the available subchannel and device number and return true. 1476 * 1477 * May modify @p ssid, @p devno and / or @p schid even if no free 1478 * subchannel / device number could be found. 1479 */ 1480 static bool css_find_free_subch_and_devno(uint8_t cssid, uint8_t *ssid, 1481 uint16_t *devno, uint16_t *schid, 1482 Error **errp) 1483 { 1484 uint32_t free_schid, free_devno; 1485 1486 assert(ssid && devno && schid); 1487 for (*ssid = 0; *ssid <= MAX_SSID; (*ssid)++) { 1488 free_schid = css_find_free_subch(cssid, *ssid); 1489 if (free_schid > MAX_SCHID) { 1490 continue; 1491 } 1492 free_devno = css_find_free_devno(cssid, *ssid, free_schid); 1493 if (free_devno > MAX_DEVNO) { 1494 continue; 1495 } 1496 *schid = free_schid; 1497 *devno = free_devno; 1498 return true; 1499 } 1500 error_setg(errp, "Virtual channel subsystem is full!"); 1501 return false; 1502 } 1503 1504 bool css_subch_visible(SubchDev *sch) 1505 { 1506 if (sch->ssid > channel_subsys.max_ssid) { 1507 return false; 1508 } 1509 1510 if (sch->cssid != channel_subsys.default_cssid) { 1511 return (channel_subsys.max_cssid > 0); 1512 } 1513 1514 return true; 1515 } 1516 1517 bool css_present(uint8_t cssid) 1518 { 1519 return (channel_subsys.css[cssid] != NULL); 1520 } 1521 1522 bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno) 1523 { 1524 if (!channel_subsys.css[cssid]) { 1525 return false; 1526 } 1527 if (!channel_subsys.css[cssid]->sch_set[ssid]) { 1528 return false; 1529 } 1530 1531 return !!test_bit(devno, 1532 channel_subsys.css[cssid]->sch_set[ssid]->devnos_used); 1533 } 1534 1535 void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid, 1536 uint16_t devno, SubchDev *sch) 1537 { 1538 CssImage *css; 1539 SubchSet *s_set; 1540 1541 trace_css_assign_subch(sch ? "assign" : "deassign", cssid, ssid, schid, 1542 devno); 1543 if (!channel_subsys.css[cssid]) { 1544 fprintf(stderr, 1545 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n", 1546 __func__, cssid, ssid, schid); 1547 return; 1548 } 1549 css = channel_subsys.css[cssid]; 1550 1551 if (!css->sch_set[ssid]) { 1552 css->sch_set[ssid] = g_malloc0(sizeof(SubchSet)); 1553 } 1554 s_set = css->sch_set[ssid]; 1555 1556 s_set->sch[schid] = sch; 1557 if (sch) { 1558 set_bit(schid, s_set->schids_used); 1559 set_bit(devno, s_set->devnos_used); 1560 } else { 1561 clear_bit(schid, s_set->schids_used); 1562 clear_bit(devno, s_set->devnos_used); 1563 } 1564 } 1565 1566 void css_queue_crw(uint8_t rsc, uint8_t erc, int chain, uint16_t rsid) 1567 { 1568 CrwContainer *crw_cont; 1569 1570 trace_css_crw(rsc, erc, rsid, chain ? "(chained)" : ""); 1571 /* TODO: Maybe use a static crw pool? */ 1572 crw_cont = g_try_malloc0(sizeof(CrwContainer)); 1573 if (!crw_cont) { 1574 channel_subsys.crws_lost = true; 1575 return; 1576 } 1577 crw_cont->crw.flags = (rsc << 8) | erc; 1578 if (chain) { 1579 crw_cont->crw.flags |= CRW_FLAGS_MASK_C; 1580 } 1581 crw_cont->crw.rsid = rsid; 1582 if (channel_subsys.crws_lost) { 1583 crw_cont->crw.flags |= CRW_FLAGS_MASK_R; 1584 channel_subsys.crws_lost = false; 1585 } 1586 1587 QTAILQ_INSERT_TAIL(&channel_subsys.pending_crws, crw_cont, sibling); 1588 1589 if (channel_subsys.do_crw_mchk) { 1590 channel_subsys.do_crw_mchk = false; 1591 /* Inject crw pending machine check. */ 1592 s390_crw_mchk(); 1593 } 1594 } 1595 1596 void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid, 1597 int hotplugged, int add) 1598 { 1599 uint8_t guest_cssid; 1600 bool chain_crw; 1601 1602 if (add && !hotplugged) { 1603 return; 1604 } 1605 if (channel_subsys.max_cssid == 0) { 1606 /* Default cssid shows up as 0. */ 1607 guest_cssid = (cssid == channel_subsys.default_cssid) ? 0 : cssid; 1608 } else { 1609 /* Show real cssid to the guest. */ 1610 guest_cssid = cssid; 1611 } 1612 /* 1613 * Only notify for higher subchannel sets/channel subsystems if the 1614 * guest has enabled it. 1615 */ 1616 if ((ssid > channel_subsys.max_ssid) || 1617 (guest_cssid > channel_subsys.max_cssid) || 1618 ((channel_subsys.max_cssid == 0) && 1619 (cssid != channel_subsys.default_cssid))) { 1620 return; 1621 } 1622 chain_crw = (channel_subsys.max_ssid > 0) || 1623 (channel_subsys.max_cssid > 0); 1624 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, chain_crw ? 1 : 0, schid); 1625 if (chain_crw) { 1626 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0, 1627 (guest_cssid << 8) | (ssid << 4)); 1628 } 1629 /* RW_ERC_IPI --> clear pending interrupts */ 1630 css_clear_io_interrupt(css_do_build_subchannel_id(cssid, ssid), schid); 1631 } 1632 1633 void css_generate_chp_crws(uint8_t cssid, uint8_t chpid) 1634 { 1635 /* TODO */ 1636 } 1637 1638 void css_generate_css_crws(uint8_t cssid) 1639 { 1640 if (!channel_subsys.sei_pending) { 1641 css_queue_crw(CRW_RSC_CSS, 0, 0, cssid); 1642 } 1643 channel_subsys.sei_pending = true; 1644 } 1645 1646 void css_clear_sei_pending(void) 1647 { 1648 channel_subsys.sei_pending = false; 1649 } 1650 1651 int css_enable_mcsse(void) 1652 { 1653 trace_css_enable_facility("mcsse"); 1654 channel_subsys.max_cssid = MAX_CSSID; 1655 return 0; 1656 } 1657 1658 int css_enable_mss(void) 1659 { 1660 trace_css_enable_facility("mss"); 1661 channel_subsys.max_ssid = MAX_SSID; 1662 return 0; 1663 } 1664 1665 void subch_device_save(SubchDev *s, QEMUFile *f) 1666 { 1667 int i; 1668 1669 qemu_put_byte(f, s->cssid); 1670 qemu_put_byte(f, s->ssid); 1671 qemu_put_be16(f, s->schid); 1672 qemu_put_be16(f, s->devno); 1673 qemu_put_byte(f, s->thinint_active); 1674 /* SCHIB */ 1675 /* PMCW */ 1676 qemu_put_be32(f, s->curr_status.pmcw.intparm); 1677 qemu_put_be16(f, s->curr_status.pmcw.flags); 1678 qemu_put_be16(f, s->curr_status.pmcw.devno); 1679 qemu_put_byte(f, s->curr_status.pmcw.lpm); 1680 qemu_put_byte(f, s->curr_status.pmcw.pnom); 1681 qemu_put_byte(f, s->curr_status.pmcw.lpum); 1682 qemu_put_byte(f, s->curr_status.pmcw.pim); 1683 qemu_put_be16(f, s->curr_status.pmcw.mbi); 1684 qemu_put_byte(f, s->curr_status.pmcw.pom); 1685 qemu_put_byte(f, s->curr_status.pmcw.pam); 1686 qemu_put_buffer(f, s->curr_status.pmcw.chpid, 8); 1687 qemu_put_be32(f, s->curr_status.pmcw.chars); 1688 /* SCSW */ 1689 qemu_put_be16(f, s->curr_status.scsw.flags); 1690 qemu_put_be16(f, s->curr_status.scsw.ctrl); 1691 qemu_put_be32(f, s->curr_status.scsw.cpa); 1692 qemu_put_byte(f, s->curr_status.scsw.dstat); 1693 qemu_put_byte(f, s->curr_status.scsw.cstat); 1694 qemu_put_be16(f, s->curr_status.scsw.count); 1695 qemu_put_be64(f, s->curr_status.mba); 1696 qemu_put_buffer(f, s->curr_status.mda, 4); 1697 /* end SCHIB */ 1698 qemu_put_buffer(f, s->sense_data, 32); 1699 qemu_put_be64(f, s->channel_prog); 1700 /* last cmd */ 1701 qemu_put_byte(f, s->last_cmd.cmd_code); 1702 qemu_put_byte(f, s->last_cmd.flags); 1703 qemu_put_be16(f, s->last_cmd.count); 1704 qemu_put_be32(f, s->last_cmd.cda); 1705 qemu_put_byte(f, s->last_cmd_valid); 1706 qemu_put_byte(f, s->id.reserved); 1707 qemu_put_be16(f, s->id.cu_type); 1708 qemu_put_byte(f, s->id.cu_model); 1709 qemu_put_be16(f, s->id.dev_type); 1710 qemu_put_byte(f, s->id.dev_model); 1711 qemu_put_byte(f, s->id.unused); 1712 for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) { 1713 qemu_put_byte(f, s->id.ciw[i].type); 1714 qemu_put_byte(f, s->id.ciw[i].command); 1715 qemu_put_be16(f, s->id.ciw[i].count); 1716 } 1717 qemu_put_byte(f, s->ccw_fmt_1); 1718 qemu_put_byte(f, s->ccw_no_data_cnt); 1719 } 1720 1721 int subch_device_load(SubchDev *s, QEMUFile *f) 1722 { 1723 SubchDev *old_s; 1724 uint16_t old_schid = s->schid; 1725 int i; 1726 1727 s->cssid = qemu_get_byte(f); 1728 s->ssid = qemu_get_byte(f); 1729 s->schid = qemu_get_be16(f); 1730 s->devno = qemu_get_be16(f); 1731 /* Re-assign subch. */ 1732 if (old_schid != s->schid) { 1733 old_s = channel_subsys.css[s->cssid]->sch_set[s->ssid]->sch[old_schid]; 1734 /* 1735 * (old_s != s) means that some other device has its correct 1736 * subchannel already assigned (in load). 1737 */ 1738 if (old_s == s) { 1739 css_subch_assign(s->cssid, s->ssid, old_schid, s->devno, NULL); 1740 } 1741 /* It's OK to re-assign without a prior de-assign. */ 1742 css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, s); 1743 } 1744 s->thinint_active = qemu_get_byte(f); 1745 /* SCHIB */ 1746 /* PMCW */ 1747 s->curr_status.pmcw.intparm = qemu_get_be32(f); 1748 s->curr_status.pmcw.flags = qemu_get_be16(f); 1749 s->curr_status.pmcw.devno = qemu_get_be16(f); 1750 s->curr_status.pmcw.lpm = qemu_get_byte(f); 1751 s->curr_status.pmcw.pnom = qemu_get_byte(f); 1752 s->curr_status.pmcw.lpum = qemu_get_byte(f); 1753 s->curr_status.pmcw.pim = qemu_get_byte(f); 1754 s->curr_status.pmcw.mbi = qemu_get_be16(f); 1755 s->curr_status.pmcw.pom = qemu_get_byte(f); 1756 s->curr_status.pmcw.pam = qemu_get_byte(f); 1757 qemu_get_buffer(f, s->curr_status.pmcw.chpid, 8); 1758 s->curr_status.pmcw.chars = qemu_get_be32(f); 1759 /* SCSW */ 1760 s->curr_status.scsw.flags = qemu_get_be16(f); 1761 s->curr_status.scsw.ctrl = qemu_get_be16(f); 1762 s->curr_status.scsw.cpa = qemu_get_be32(f); 1763 s->curr_status.scsw.dstat = qemu_get_byte(f); 1764 s->curr_status.scsw.cstat = qemu_get_byte(f); 1765 s->curr_status.scsw.count = qemu_get_be16(f); 1766 s->curr_status.mba = qemu_get_be64(f); 1767 qemu_get_buffer(f, s->curr_status.mda, 4); 1768 /* end SCHIB */ 1769 qemu_get_buffer(f, s->sense_data, 32); 1770 s->channel_prog = qemu_get_be64(f); 1771 /* last cmd */ 1772 s->last_cmd.cmd_code = qemu_get_byte(f); 1773 s->last_cmd.flags = qemu_get_byte(f); 1774 s->last_cmd.count = qemu_get_be16(f); 1775 s->last_cmd.cda = qemu_get_be32(f); 1776 s->last_cmd_valid = qemu_get_byte(f); 1777 s->id.reserved = qemu_get_byte(f); 1778 s->id.cu_type = qemu_get_be16(f); 1779 s->id.cu_model = qemu_get_byte(f); 1780 s->id.dev_type = qemu_get_be16(f); 1781 s->id.dev_model = qemu_get_byte(f); 1782 s->id.unused = qemu_get_byte(f); 1783 for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) { 1784 s->id.ciw[i].type = qemu_get_byte(f); 1785 s->id.ciw[i].command = qemu_get_byte(f); 1786 s->id.ciw[i].count = qemu_get_be16(f); 1787 } 1788 s->ccw_fmt_1 = qemu_get_byte(f); 1789 s->ccw_no_data_cnt = qemu_get_byte(f); 1790 /* 1791 * Hack alert. We don't migrate the channel subsystem status (no 1792 * device!), but we need to find out if the guest enabled mss/mcss-e. 1793 * If the subchannel is enabled, it certainly was able to access it, 1794 * so adjust the max_ssid/max_cssid values for relevant ssid/cssid 1795 * values. This is not watertight, but better than nothing. 1796 */ 1797 if (s->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA) { 1798 if (s->ssid) { 1799 channel_subsys.max_ssid = MAX_SSID; 1800 } 1801 if (s->cssid != channel_subsys.default_cssid) { 1802 channel_subsys.max_cssid = MAX_CSSID; 1803 } 1804 } 1805 return 0; 1806 } 1807 1808 void css_reset_sch(SubchDev *sch) 1809 { 1810 PMCW *p = &sch->curr_status.pmcw; 1811 1812 if ((p->flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) { 1813 sch->disable_cb(sch); 1814 } 1815 1816 p->intparm = 0; 1817 p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA | 1818 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME | 1819 PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF); 1820 p->flags |= PMCW_FLAGS_MASK_DNV; 1821 p->devno = sch->devno; 1822 p->pim = 0x80; 1823 p->lpm = p->pim; 1824 p->pnom = 0; 1825 p->lpum = 0; 1826 p->mbi = 0; 1827 p->pom = 0xff; 1828 p->pam = 0x80; 1829 p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME | 1830 PMCW_CHARS_MASK_CSENSE); 1831 1832 memset(&sch->curr_status.scsw, 0, sizeof(sch->curr_status.scsw)); 1833 sch->curr_status.mba = 0; 1834 1835 sch->channel_prog = 0x0; 1836 sch->last_cmd_valid = false; 1837 sch->thinint_active = false; 1838 } 1839 1840 void css_reset(void) 1841 { 1842 CrwContainer *crw_cont; 1843 1844 /* Clean up monitoring. */ 1845 channel_subsys.chnmon_active = false; 1846 channel_subsys.chnmon_area = 0; 1847 1848 /* Clear pending CRWs. */ 1849 while ((crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws))) { 1850 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling); 1851 g_free(crw_cont); 1852 } 1853 channel_subsys.sei_pending = false; 1854 channel_subsys.do_crw_mchk = true; 1855 channel_subsys.crws_lost = false; 1856 1857 /* Reset maximum ids. */ 1858 channel_subsys.max_cssid = 0; 1859 channel_subsys.max_ssid = 0; 1860 } 1861 1862 static void get_css_devid(Object *obj, Visitor *v, const char *name, 1863 void *opaque, Error **errp) 1864 { 1865 DeviceState *dev = DEVICE(obj); 1866 Property *prop = opaque; 1867 CssDevId *dev_id = qdev_get_prop_ptr(dev, prop); 1868 char buffer[] = "xx.x.xxxx"; 1869 char *p = buffer; 1870 int r; 1871 1872 if (dev_id->valid) { 1873 1874 r = snprintf(buffer, sizeof(buffer), "%02x.%1x.%04x", dev_id->cssid, 1875 dev_id->ssid, dev_id->devid); 1876 assert(r == sizeof(buffer) - 1); 1877 1878 /* drop leading zero */ 1879 if (dev_id->cssid <= 0xf) { 1880 p++; 1881 } 1882 } else { 1883 snprintf(buffer, sizeof(buffer), "<unset>"); 1884 } 1885 1886 visit_type_str(v, name, &p, errp); 1887 } 1888 1889 /* 1890 * parse <cssid>.<ssid>.<devid> and assert valid range for cssid/ssid 1891 */ 1892 static void set_css_devid(Object *obj, Visitor *v, const char *name, 1893 void *opaque, Error **errp) 1894 { 1895 DeviceState *dev = DEVICE(obj); 1896 Property *prop = opaque; 1897 CssDevId *dev_id = qdev_get_prop_ptr(dev, prop); 1898 Error *local_err = NULL; 1899 char *str; 1900 int num, n1, n2; 1901 unsigned int cssid, ssid, devid; 1902 1903 if (dev->realized) { 1904 qdev_prop_set_after_realize(dev, name, errp); 1905 return; 1906 } 1907 1908 visit_type_str(v, name, &str, &local_err); 1909 if (local_err) { 1910 error_propagate(errp, local_err); 1911 return; 1912 } 1913 1914 num = sscanf(str, "%2x.%1x%n.%4x%n", &cssid, &ssid, &n1, &devid, &n2); 1915 if (num != 3 || (n2 - n1) != 5 || strlen(str) != n2) { 1916 error_set_from_qdev_prop_error(errp, EINVAL, dev, prop, str); 1917 goto out; 1918 } 1919 if ((cssid > MAX_CSSID) || (ssid > MAX_SSID)) { 1920 error_setg(errp, "Invalid cssid or ssid: cssid %x, ssid %x", 1921 cssid, ssid); 1922 goto out; 1923 } 1924 1925 dev_id->cssid = cssid; 1926 dev_id->ssid = ssid; 1927 dev_id->devid = devid; 1928 dev_id->valid = true; 1929 1930 out: 1931 g_free(str); 1932 } 1933 1934 PropertyInfo css_devid_propinfo = { 1935 .name = "str", 1936 .description = "Identifier of an I/O device in the channel " 1937 "subsystem, example: fe.1.23ab", 1938 .get = get_css_devid, 1939 .set = set_css_devid, 1940 }; 1941 1942 PropertyInfo css_devid_ro_propinfo = { 1943 .name = "str", 1944 .description = "Read-only identifier of an I/O device in the channel " 1945 "subsystem, example: fe.1.23ab", 1946 .get = get_css_devid, 1947 }; 1948 1949 SubchDev *css_create_virtual_sch(CssDevId bus_id, Error **errp) 1950 { 1951 uint16_t schid = 0; 1952 SubchDev *sch; 1953 1954 if (bus_id.valid) { 1955 /* Enforce use of virtual cssid. */ 1956 if (bus_id.cssid != VIRTUAL_CSSID) { 1957 error_setg(errp, "cssid %hhx not valid for virtual devices", 1958 bus_id.cssid); 1959 return NULL; 1960 } 1961 if (!css_find_free_subch_for_devno(bus_id.cssid, bus_id.ssid, 1962 bus_id.devid, &schid, errp)) { 1963 return NULL; 1964 } 1965 } else { 1966 bus_id.cssid = VIRTUAL_CSSID; 1967 if (!css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid, 1968 &bus_id.devid, &schid, errp)) { 1969 return NULL; 1970 } 1971 } 1972 1973 sch = g_malloc0(sizeof(*sch)); 1974 sch->cssid = bus_id.cssid; 1975 sch->ssid = bus_id.ssid; 1976 sch->devno = bus_id.devid; 1977 sch->schid = schid; 1978 css_subch_assign(sch->cssid, sch->ssid, schid, sch->devno, sch); 1979 return sch; 1980 } 1981