1 /* 2 * RX QEMU GDB simulator 3 * 4 * Copyright (c) 2019 Yoshinori Sato 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2 or later, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along with 16 * this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 #include "qemu/osdep.h" 20 #include "qemu/cutils.h" 21 #include "qemu/error-report.h" 22 #include "qapi/error.h" 23 #include "qemu-common.h" 24 #include "cpu.h" 25 #include "hw/loader.h" 26 #include "hw/rx/rx62n.h" 27 #include "sysemu/qtest.h" 28 #include "sysemu/device_tree.h" 29 #include "hw/boards.h" 30 #include "qom/object.h" 31 32 /* Same address of GDB integrated simulator */ 33 #define SDRAM_BASE EXT_CS_BASE 34 35 struct RxGdbSimMachineClass { 36 /*< private >*/ 37 MachineClass parent_class; 38 /*< public >*/ 39 const char *mcu_name; 40 uint32_t xtal_freq_hz; 41 }; 42 typedef struct RxGdbSimMachineClass RxGdbSimMachineClass; 43 44 struct RxGdbSimMachineState { 45 /*< private >*/ 46 MachineState parent_obj; 47 /*< public >*/ 48 RX62NState mcu; 49 }; 50 typedef struct RxGdbSimMachineState RxGdbSimMachineState; 51 52 #define TYPE_RX_GDBSIM_MACHINE MACHINE_TYPE_NAME("rx62n-common") 53 54 DECLARE_OBJ_CHECKERS(RxGdbSimMachineState, RxGdbSimMachineClass, 55 RX_GDBSIM_MACHINE, TYPE_RX_GDBSIM_MACHINE) 56 57 58 static void rx_load_image(RXCPU *cpu, const char *filename, 59 uint32_t start, uint32_t size) 60 { 61 static uint32_t extable[32]; 62 long kernel_size; 63 int i; 64 65 kernel_size = load_image_targphys(filename, start, size); 66 if (kernel_size < 0) { 67 fprintf(stderr, "qemu: could not load kernel '%s'\n", filename); 68 exit(1); 69 } 70 cpu->env.pc = start; 71 72 /* setup exception trap trampoline */ 73 /* linux kernel only works little-endian mode */ 74 for (i = 0; i < ARRAY_SIZE(extable); i++) { 75 extable[i] = cpu_to_le32(0x10 + i * 4); 76 } 77 rom_add_blob_fixed("extable", extable, sizeof(extable), VECTOR_TABLE_BASE); 78 } 79 80 static void rx_gdbsim_init(MachineState *machine) 81 { 82 MachineClass *mc = MACHINE_GET_CLASS(machine); 83 RxGdbSimMachineState *s = RX_GDBSIM_MACHINE(machine); 84 RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_GET_CLASS(machine); 85 MemoryRegion *sysmem = get_system_memory(); 86 const char *kernel_filename = machine->kernel_filename; 87 const char *dtb_filename = machine->dtb; 88 89 if (machine->ram_size < mc->default_ram_size) { 90 char *sz = size_to_str(mc->default_ram_size); 91 error_report("Invalid RAM size, should be more than %s", sz); 92 g_free(sz); 93 } 94 95 /* Allocate memory space */ 96 memory_region_add_subregion(sysmem, SDRAM_BASE, machine->ram); 97 98 /* Initialize MCU */ 99 object_initialize_child(OBJECT(machine), "mcu", &s->mcu, rxc->mcu_name); 100 object_property_set_link(OBJECT(&s->mcu), "main-bus", OBJECT(sysmem), 101 &error_abort); 102 object_property_set_uint(OBJECT(&s->mcu), "xtal-frequency-hz", 103 rxc->xtal_freq_hz, &error_abort); 104 object_property_set_bool(OBJECT(&s->mcu), "load-kernel", 105 kernel_filename != NULL, &error_abort); 106 107 if (!kernel_filename) { 108 if (machine->firmware) { 109 rom_add_file_fixed(machine->firmware, RX62N_CFLASH_BASE, 0); 110 } else if (!qtest_enabled()) { 111 error_report("No bios or kernel specified"); 112 exit(1); 113 } 114 } 115 116 qdev_realize(DEVICE(&s->mcu), NULL, &error_abort); 117 118 /* Load kernel and dtb */ 119 if (kernel_filename) { 120 ram_addr_t kernel_offset; 121 122 /* 123 * The kernel image is loaded into 124 * the latter half of the SDRAM space. 125 */ 126 kernel_offset = machine->ram_size / 2; 127 rx_load_image(RX_CPU(first_cpu), kernel_filename, 128 SDRAM_BASE + kernel_offset, kernel_offset); 129 if (dtb_filename) { 130 ram_addr_t dtb_offset; 131 int dtb_size; 132 g_autofree void *dtb = load_device_tree(dtb_filename, &dtb_size); 133 134 if (dtb == NULL) { 135 error_report("Couldn't open dtb file %s", dtb_filename); 136 exit(1); 137 } 138 if (machine->kernel_cmdline && 139 qemu_fdt_setprop_string(dtb, "/chosen", "bootargs", 140 machine->kernel_cmdline) < 0) { 141 error_report("Couldn't set /chosen/bootargs"); 142 exit(1); 143 } 144 /* DTB is located at the end of SDRAM space. */ 145 dtb_offset = machine->ram_size - dtb_size; 146 rom_add_blob_fixed("dtb", dtb, dtb_size, 147 SDRAM_BASE + dtb_offset); 148 /* Set dtb address to R1 */ 149 RX_CPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset; 150 } 151 } 152 } 153 154 static void rx_gdbsim_class_init(ObjectClass *oc, void *data) 155 { 156 MachineClass *mc = MACHINE_CLASS(oc); 157 158 mc->init = rx_gdbsim_init; 159 mc->default_cpu_type = TYPE_RX62N_CPU; 160 mc->default_ram_size = 16 * MiB; 161 mc->default_ram_id = "ext-sdram"; 162 } 163 164 static void rx62n7_class_init(ObjectClass *oc, void *data) 165 { 166 RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_CLASS(oc); 167 MachineClass *mc = MACHINE_CLASS(oc); 168 169 rxc->mcu_name = TYPE_R5F562N7_MCU; 170 rxc->xtal_freq_hz = 12 * 1000 * 1000; 171 mc->desc = "gdb simulator (R5F562N7 MCU and external RAM)"; 172 }; 173 174 static void rx62n8_class_init(ObjectClass *oc, void *data) 175 { 176 RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_CLASS(oc); 177 MachineClass *mc = MACHINE_CLASS(oc); 178 179 rxc->mcu_name = TYPE_R5F562N8_MCU; 180 rxc->xtal_freq_hz = 12 * 1000 * 1000; 181 mc->desc = "gdb simulator (R5F562N8 MCU and external RAM)"; 182 }; 183 184 static const TypeInfo rx_gdbsim_types[] = { 185 { 186 .name = MACHINE_TYPE_NAME("gdbsim-r5f562n7"), 187 .parent = TYPE_RX_GDBSIM_MACHINE, 188 .class_init = rx62n7_class_init, 189 }, { 190 .name = MACHINE_TYPE_NAME("gdbsim-r5f562n8"), 191 .parent = TYPE_RX_GDBSIM_MACHINE, 192 .class_init = rx62n8_class_init, 193 }, { 194 .name = TYPE_RX_GDBSIM_MACHINE, 195 .parent = TYPE_MACHINE, 196 .instance_size = sizeof(RxGdbSimMachineState), 197 .class_size = sizeof(RxGdbSimMachineClass), 198 .class_init = rx_gdbsim_class_init, 199 .abstract = true, 200 } 201 }; 202 203 DEFINE_TYPES(rx_gdbsim_types) 204