xref: /openbmc/qemu/hw/rx/rx-gdbsim.c (revision 19f4ed36)
1 /*
2  * RX QEMU GDB simulator
3  *
4  * Copyright (c) 2019 Yoshinori Sato
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2 or later, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18 
19 #include "qemu/osdep.h"
20 #include "qemu/cutils.h"
21 #include "qemu/error-report.h"
22 #include "qapi/error.h"
23 #include "qemu-common.h"
24 #include "cpu.h"
25 #include "hw/loader.h"
26 #include "hw/rx/rx62n.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/qtest.h"
29 #include "sysemu/device_tree.h"
30 #include "hw/boards.h"
31 #include "qom/object.h"
32 
33 /* Same address of GDB integrated simulator */
34 #define SDRAM_BASE  EXT_CS_BASE
35 
36 struct RxGdbSimMachineClass {
37     /*< private >*/
38     MachineClass parent_class;
39     /*< public >*/
40     const char *mcu_name;
41     uint32_t xtal_freq_hz;
42 };
43 typedef struct RxGdbSimMachineClass RxGdbSimMachineClass;
44 
45 struct RxGdbSimMachineState {
46     /*< private >*/
47     MachineState parent_obj;
48     /*< public >*/
49     RX62NState mcu;
50 };
51 typedef struct RxGdbSimMachineState RxGdbSimMachineState;
52 
53 #define TYPE_RX_GDBSIM_MACHINE MACHINE_TYPE_NAME("rx62n-common")
54 
55 DECLARE_OBJ_CHECKERS(RxGdbSimMachineState, RxGdbSimMachineClass,
56                      RX_GDBSIM_MACHINE, TYPE_RX_GDBSIM_MACHINE)
57 
58 
59 static void rx_load_image(RXCPU *cpu, const char *filename,
60                           uint32_t start, uint32_t size)
61 {
62     static uint32_t extable[32];
63     long kernel_size;
64     int i;
65 
66     kernel_size = load_image_targphys(filename, start, size);
67     if (kernel_size < 0) {
68         fprintf(stderr, "qemu: could not load kernel '%s'\n", filename);
69         exit(1);
70     }
71     cpu->env.pc = start;
72 
73     /* setup exception trap trampoline */
74     /* linux kernel only works little-endian mode */
75     for (i = 0; i < ARRAY_SIZE(extable); i++) {
76         extable[i] = cpu_to_le32(0x10 + i * 4);
77     }
78     rom_add_blob_fixed("extable", extable, sizeof(extable), VECTOR_TABLE_BASE);
79 }
80 
81 static void rx_gdbsim_init(MachineState *machine)
82 {
83     MachineClass *mc = MACHINE_GET_CLASS(machine);
84     RxGdbSimMachineState *s = RX_GDBSIM_MACHINE(machine);
85     RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_GET_CLASS(machine);
86     MemoryRegion *sysmem = get_system_memory();
87     const char *kernel_filename = machine->kernel_filename;
88     const char *dtb_filename = machine->dtb;
89 
90     if (machine->ram_size < mc->default_ram_size) {
91         char *sz = size_to_str(mc->default_ram_size);
92         error_report("Invalid RAM size, should be more than %s", sz);
93         g_free(sz);
94     }
95 
96     /* Allocate memory space */
97     memory_region_add_subregion(sysmem, SDRAM_BASE, machine->ram);
98 
99     /* Initialize MCU */
100     object_initialize_child(OBJECT(machine), "mcu", &s->mcu, rxc->mcu_name);
101     object_property_set_link(OBJECT(&s->mcu), "main-bus", OBJECT(sysmem),
102                              &error_abort);
103     object_property_set_uint(OBJECT(&s->mcu), "xtal-frequency-hz",
104                              rxc->xtal_freq_hz, &error_abort);
105     object_property_set_bool(OBJECT(&s->mcu), "load-kernel",
106                              kernel_filename != NULL, &error_abort);
107 
108     if (!kernel_filename) {
109         if (machine->firmware) {
110             rom_add_file_fixed(machine->firmware, RX62N_CFLASH_BASE, 0);
111         } else if (!qtest_enabled()) {
112             error_report("No bios or kernel specified");
113             exit(1);
114         }
115     }
116 
117     qdev_realize(DEVICE(&s->mcu), NULL, &error_abort);
118 
119     /* Load kernel and dtb */
120     if (kernel_filename) {
121         ram_addr_t kernel_offset;
122 
123         /*
124          * The kernel image is loaded into
125          * the latter half of the SDRAM space.
126          */
127         kernel_offset = machine->ram_size / 2;
128         rx_load_image(RX_CPU(first_cpu), kernel_filename,
129                       SDRAM_BASE + kernel_offset, kernel_offset);
130         if (dtb_filename) {
131             ram_addr_t dtb_offset;
132             int dtb_size;
133             g_autofree void *dtb = load_device_tree(dtb_filename, &dtb_size);
134 
135             if (dtb == NULL) {
136                 error_report("Couldn't open dtb file %s", dtb_filename);
137                 exit(1);
138             }
139             if (machine->kernel_cmdline &&
140                 qemu_fdt_setprop_string(dtb, "/chosen", "bootargs",
141                                         machine->kernel_cmdline) < 0) {
142                 error_report("Couldn't set /chosen/bootargs");
143                 exit(1);
144             }
145             /* DTB is located at the end of SDRAM space. */
146             dtb_offset = machine->ram_size - dtb_size;
147             rom_add_blob_fixed("dtb", dtb, dtb_size,
148                                SDRAM_BASE + dtb_offset);
149             /* Set dtb address to R1 */
150             RX_CPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset;
151         }
152     }
153 }
154 
155 static void rx_gdbsim_class_init(ObjectClass *oc, void *data)
156 {
157     MachineClass *mc = MACHINE_CLASS(oc);
158 
159     mc->init = rx_gdbsim_init;
160     mc->default_cpu_type = TYPE_RX62N_CPU;
161     mc->default_ram_size = 16 * MiB;
162     mc->default_ram_id = "ext-sdram";
163 }
164 
165 static void rx62n7_class_init(ObjectClass *oc, void *data)
166 {
167     RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_CLASS(oc);
168     MachineClass *mc = MACHINE_CLASS(oc);
169 
170     rxc->mcu_name = TYPE_R5F562N7_MCU;
171     rxc->xtal_freq_hz = 12 * 1000 * 1000;
172     mc->desc = "gdb simulator (R5F562N7 MCU and external RAM)";
173 };
174 
175 static void rx62n8_class_init(ObjectClass *oc, void *data)
176 {
177     RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_CLASS(oc);
178     MachineClass *mc = MACHINE_CLASS(oc);
179 
180     rxc->mcu_name = TYPE_R5F562N8_MCU;
181     rxc->xtal_freq_hz = 12 * 1000 * 1000;
182     mc->desc = "gdb simulator (R5F562N8 MCU and external RAM)";
183 };
184 
185 static const TypeInfo rx_gdbsim_types[] = {
186     {
187         .name           = MACHINE_TYPE_NAME("gdbsim-r5f562n7"),
188         .parent         = TYPE_RX_GDBSIM_MACHINE,
189         .class_init     = rx62n7_class_init,
190     }, {
191         .name           = MACHINE_TYPE_NAME("gdbsim-r5f562n8"),
192         .parent         = TYPE_RX_GDBSIM_MACHINE,
193         .class_init     = rx62n8_class_init,
194     }, {
195         .name           = TYPE_RX_GDBSIM_MACHINE,
196         .parent         = TYPE_MACHINE,
197         .instance_size  = sizeof(RxGdbSimMachineState),
198         .class_size     = sizeof(RxGdbSimMachineClass),
199         .class_init     = rx_gdbsim_class_init,
200         .abstract       = true,
201      }
202 };
203 
204 DEFINE_TYPES(rx_gdbsim_types)
205