1 /* 2 * TI TWL92230C energy-management companion device for the OMAP24xx. 3 * Aka. Menelaus (N4200 MENELAUS1_V2.2) 4 * 5 * Copyright (C) 2008 Nokia Corporation 6 * Written by Andrzej Zaborowski <andrew@openedhand.com> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 or 11 * (at your option) version 3 of the License. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License along 19 * with this program; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "qemu-common.h" 24 #include "qemu/timer.h" 25 #include "hw/i2c/i2c.h" 26 #include "hw/irq.h" 27 #include "migration/qemu-file-types.h" 28 #include "migration/vmstate.h" 29 #include "sysemu/sysemu.h" 30 #include "ui/console.h" 31 #include "qemu/bcd.h" 32 #include "qemu/module.h" 33 34 #define VERBOSE 1 35 36 #define TYPE_TWL92230 "twl92230" 37 #define TWL92230(obj) OBJECT_CHECK(MenelausState, (obj), TYPE_TWL92230) 38 39 typedef struct MenelausState { 40 I2CSlave parent_obj; 41 42 int firstbyte; 43 uint8_t reg; 44 45 uint8_t vcore[5]; 46 uint8_t dcdc[3]; 47 uint8_t ldo[8]; 48 uint8_t sleep[2]; 49 uint8_t osc; 50 uint8_t detect; 51 uint16_t mask; 52 uint16_t status; 53 uint8_t dir; 54 uint8_t inputs; 55 uint8_t outputs; 56 uint8_t bbsms; 57 uint8_t pull[4]; 58 uint8_t mmc_ctrl[3]; 59 uint8_t mmc_debounce; 60 struct { 61 uint8_t ctrl; 62 uint16_t comp; 63 QEMUTimer *hz_tm; 64 int64_t next; 65 struct tm tm; 66 struct tm new; 67 struct tm alm; 68 int sec_offset; 69 int alm_sec; 70 int next_comp; 71 } rtc; 72 uint16_t rtc_next_vmstate; 73 qemu_irq out[4]; 74 uint8_t pwrbtn_state; 75 } MenelausState; 76 77 static inline void menelaus_update(MenelausState *s) 78 { 79 qemu_set_irq(s->out[3], s->status & ~s->mask); 80 } 81 82 static inline void menelaus_rtc_start(MenelausState *s) 83 { 84 s->rtc.next += qemu_clock_get_ms(rtc_clock); 85 timer_mod(s->rtc.hz_tm, s->rtc.next); 86 } 87 88 static inline void menelaus_rtc_stop(MenelausState *s) 89 { 90 timer_del(s->rtc.hz_tm); 91 s->rtc.next -= qemu_clock_get_ms(rtc_clock); 92 if (s->rtc.next < 1) 93 s->rtc.next = 1; 94 } 95 96 static void menelaus_rtc_update(MenelausState *s) 97 { 98 qemu_get_timedate(&s->rtc.tm, s->rtc.sec_offset); 99 } 100 101 static void menelaus_alm_update(MenelausState *s) 102 { 103 if ((s->rtc.ctrl & 3) == 3) 104 s->rtc.alm_sec = qemu_timedate_diff(&s->rtc.alm) - s->rtc.sec_offset; 105 } 106 107 static void menelaus_rtc_hz(void *opaque) 108 { 109 MenelausState *s = (MenelausState *) opaque; 110 111 s->rtc.next_comp --; 112 s->rtc.alm_sec --; 113 s->rtc.next += 1000; 114 timer_mod(s->rtc.hz_tm, s->rtc.next); 115 if ((s->rtc.ctrl >> 3) & 3) { /* EVERY */ 116 menelaus_rtc_update(s); 117 if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec) 118 s->status |= 1 << 8; /* RTCTMR */ 119 else if (((s->rtc.ctrl >> 3) & 3) == 2 && !s->rtc.tm.tm_min) 120 s->status |= 1 << 8; /* RTCTMR */ 121 else if (!s->rtc.tm.tm_hour) 122 s->status |= 1 << 8; /* RTCTMR */ 123 } else 124 s->status |= 1 << 8; /* RTCTMR */ 125 if ((s->rtc.ctrl >> 1) & 1) { /* RTC_AL_EN */ 126 if (s->rtc.alm_sec == 0) 127 s->status |= 1 << 9; /* RTCALM */ 128 /* TODO: wake-up */ 129 } 130 if (s->rtc.next_comp <= 0) { 131 s->rtc.next -= muldiv64((int16_t) s->rtc.comp, 1000, 0x8000); 132 s->rtc.next_comp = 3600; 133 } 134 menelaus_update(s); 135 } 136 137 static void menelaus_reset(I2CSlave *i2c) 138 { 139 MenelausState *s = TWL92230(i2c); 140 141 s->reg = 0x00; 142 143 s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check! */ 144 s->vcore[1] = 0x05; 145 s->vcore[2] = 0x02; 146 s->vcore[3] = 0x0c; 147 s->vcore[4] = 0x03; 148 s->dcdc[0] = 0x33; /* Depends on wiring */ 149 s->dcdc[1] = 0x03; 150 s->dcdc[2] = 0x00; 151 s->ldo[0] = 0x95; 152 s->ldo[1] = 0x7e; 153 s->ldo[2] = 0x00; 154 s->ldo[3] = 0x00; /* Depends on wiring */ 155 s->ldo[4] = 0x03; /* Depends on wiring */ 156 s->ldo[5] = 0x00; 157 s->ldo[6] = 0x00; 158 s->ldo[7] = 0x00; 159 s->sleep[0] = 0x00; 160 s->sleep[1] = 0x00; 161 s->osc = 0x01; 162 s->detect = 0x09; 163 s->mask = 0x0fff; 164 s->status = 0; 165 s->dir = 0x07; 166 s->outputs = 0x00; 167 s->bbsms = 0x00; 168 s->pull[0] = 0x00; 169 s->pull[1] = 0x00; 170 s->pull[2] = 0x00; 171 s->pull[3] = 0x00; 172 s->mmc_ctrl[0] = 0x03; 173 s->mmc_ctrl[1] = 0xc0; 174 s->mmc_ctrl[2] = 0x00; 175 s->mmc_debounce = 0x05; 176 177 if (s->rtc.ctrl & 1) 178 menelaus_rtc_stop(s); 179 s->rtc.ctrl = 0x00; 180 s->rtc.comp = 0x0000; 181 s->rtc.next = 1000; 182 s->rtc.sec_offset = 0; 183 s->rtc.next_comp = 1800; 184 s->rtc.alm_sec = 1800; 185 s->rtc.alm.tm_sec = 0x00; 186 s->rtc.alm.tm_min = 0x00; 187 s->rtc.alm.tm_hour = 0x00; 188 s->rtc.alm.tm_mday = 0x01; 189 s->rtc.alm.tm_mon = 0x00; 190 s->rtc.alm.tm_year = 2004; 191 menelaus_update(s); 192 } 193 194 static void menelaus_gpio_set(void *opaque, int line, int level) 195 { 196 MenelausState *s = (MenelausState *) opaque; 197 198 if (line < 3) { 199 /* No interrupt generated */ 200 s->inputs &= ~(1 << line); 201 s->inputs |= level << line; 202 return; 203 } 204 205 if (!s->pwrbtn_state && level) { 206 s->status |= 1 << 11; /* PSHBTN */ 207 menelaus_update(s); 208 } 209 s->pwrbtn_state = level; 210 } 211 212 #define MENELAUS_REV 0x01 213 #define MENELAUS_VCORE_CTRL1 0x02 214 #define MENELAUS_VCORE_CTRL2 0x03 215 #define MENELAUS_VCORE_CTRL3 0x04 216 #define MENELAUS_VCORE_CTRL4 0x05 217 #define MENELAUS_VCORE_CTRL5 0x06 218 #define MENELAUS_DCDC_CTRL1 0x07 219 #define MENELAUS_DCDC_CTRL2 0x08 220 #define MENELAUS_DCDC_CTRL3 0x09 221 #define MENELAUS_LDO_CTRL1 0x0a 222 #define MENELAUS_LDO_CTRL2 0x0b 223 #define MENELAUS_LDO_CTRL3 0x0c 224 #define MENELAUS_LDO_CTRL4 0x0d 225 #define MENELAUS_LDO_CTRL5 0x0e 226 #define MENELAUS_LDO_CTRL6 0x0f 227 #define MENELAUS_LDO_CTRL7 0x10 228 #define MENELAUS_LDO_CTRL8 0x11 229 #define MENELAUS_SLEEP_CTRL1 0x12 230 #define MENELAUS_SLEEP_CTRL2 0x13 231 #define MENELAUS_DEVICE_OFF 0x14 232 #define MENELAUS_OSC_CTRL 0x15 233 #define MENELAUS_DETECT_CTRL 0x16 234 #define MENELAUS_INT_MASK1 0x17 235 #define MENELAUS_INT_MASK2 0x18 236 #define MENELAUS_INT_STATUS1 0x19 237 #define MENELAUS_INT_STATUS2 0x1a 238 #define MENELAUS_INT_ACK1 0x1b 239 #define MENELAUS_INT_ACK2 0x1c 240 #define MENELAUS_GPIO_CTRL 0x1d 241 #define MENELAUS_GPIO_IN 0x1e 242 #define MENELAUS_GPIO_OUT 0x1f 243 #define MENELAUS_BBSMS 0x20 244 #define MENELAUS_RTC_CTRL 0x21 245 #define MENELAUS_RTC_UPDATE 0x22 246 #define MENELAUS_RTC_SEC 0x23 247 #define MENELAUS_RTC_MIN 0x24 248 #define MENELAUS_RTC_HR 0x25 249 #define MENELAUS_RTC_DAY 0x26 250 #define MENELAUS_RTC_MON 0x27 251 #define MENELAUS_RTC_YR 0x28 252 #define MENELAUS_RTC_WKDAY 0x29 253 #define MENELAUS_RTC_AL_SEC 0x2a 254 #define MENELAUS_RTC_AL_MIN 0x2b 255 #define MENELAUS_RTC_AL_HR 0x2c 256 #define MENELAUS_RTC_AL_DAY 0x2d 257 #define MENELAUS_RTC_AL_MON 0x2e 258 #define MENELAUS_RTC_AL_YR 0x2f 259 #define MENELAUS_RTC_COMP_MSB 0x30 260 #define MENELAUS_RTC_COMP_LSB 0x31 261 #define MENELAUS_S1_PULL_EN 0x32 262 #define MENELAUS_S1_PULL_DIR 0x33 263 #define MENELAUS_S2_PULL_EN 0x34 264 #define MENELAUS_S2_PULL_DIR 0x35 265 #define MENELAUS_MCT_CTRL1 0x36 266 #define MENELAUS_MCT_CTRL2 0x37 267 #define MENELAUS_MCT_CTRL3 0x38 268 #define MENELAUS_MCT_PIN_ST 0x39 269 #define MENELAUS_DEBOUNCE1 0x3a 270 271 static uint8_t menelaus_read(void *opaque, uint8_t addr) 272 { 273 MenelausState *s = (MenelausState *) opaque; 274 int reg = 0; 275 276 switch (addr) { 277 case MENELAUS_REV: 278 return 0x22; 279 280 case MENELAUS_VCORE_CTRL5: reg ++; 281 case MENELAUS_VCORE_CTRL4: reg ++; 282 case MENELAUS_VCORE_CTRL3: reg ++; 283 case MENELAUS_VCORE_CTRL2: reg ++; 284 case MENELAUS_VCORE_CTRL1: 285 return s->vcore[reg]; 286 287 case MENELAUS_DCDC_CTRL3: reg ++; 288 case MENELAUS_DCDC_CTRL2: reg ++; 289 case MENELAUS_DCDC_CTRL1: 290 return s->dcdc[reg]; 291 292 case MENELAUS_LDO_CTRL8: reg ++; 293 case MENELAUS_LDO_CTRL7: reg ++; 294 case MENELAUS_LDO_CTRL6: reg ++; 295 case MENELAUS_LDO_CTRL5: reg ++; 296 case MENELAUS_LDO_CTRL4: reg ++; 297 case MENELAUS_LDO_CTRL3: reg ++; 298 case MENELAUS_LDO_CTRL2: reg ++; 299 case MENELAUS_LDO_CTRL1: 300 return s->ldo[reg]; 301 302 case MENELAUS_SLEEP_CTRL2: reg ++; 303 case MENELAUS_SLEEP_CTRL1: 304 return s->sleep[reg]; 305 306 case MENELAUS_DEVICE_OFF: 307 return 0; 308 309 case MENELAUS_OSC_CTRL: 310 return s->osc | (1 << 7); /* CLK32K_GOOD */ 311 312 case MENELAUS_DETECT_CTRL: 313 return s->detect; 314 315 case MENELAUS_INT_MASK1: 316 return (s->mask >> 0) & 0xff; 317 case MENELAUS_INT_MASK2: 318 return (s->mask >> 8) & 0xff; 319 320 case MENELAUS_INT_STATUS1: 321 return (s->status >> 0) & 0xff; 322 case MENELAUS_INT_STATUS2: 323 return (s->status >> 8) & 0xff; 324 325 case MENELAUS_INT_ACK1: 326 case MENELAUS_INT_ACK2: 327 return 0; 328 329 case MENELAUS_GPIO_CTRL: 330 return s->dir; 331 case MENELAUS_GPIO_IN: 332 return s->inputs | (~s->dir & s->outputs); 333 case MENELAUS_GPIO_OUT: 334 return s->outputs; 335 336 case MENELAUS_BBSMS: 337 return s->bbsms; 338 339 case MENELAUS_RTC_CTRL: 340 return s->rtc.ctrl; 341 case MENELAUS_RTC_UPDATE: 342 return 0x00; 343 case MENELAUS_RTC_SEC: 344 menelaus_rtc_update(s); 345 return to_bcd(s->rtc.tm.tm_sec); 346 case MENELAUS_RTC_MIN: 347 menelaus_rtc_update(s); 348 return to_bcd(s->rtc.tm.tm_min); 349 case MENELAUS_RTC_HR: 350 menelaus_rtc_update(s); 351 if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */ 352 return to_bcd((s->rtc.tm.tm_hour % 12) + 1) | 353 (!!(s->rtc.tm.tm_hour >= 12) << 7); /* PM_nAM */ 354 else 355 return to_bcd(s->rtc.tm.tm_hour); 356 case MENELAUS_RTC_DAY: 357 menelaus_rtc_update(s); 358 return to_bcd(s->rtc.tm.tm_mday); 359 case MENELAUS_RTC_MON: 360 menelaus_rtc_update(s); 361 return to_bcd(s->rtc.tm.tm_mon + 1); 362 case MENELAUS_RTC_YR: 363 menelaus_rtc_update(s); 364 return to_bcd(s->rtc.tm.tm_year - 2000); 365 case MENELAUS_RTC_WKDAY: 366 menelaus_rtc_update(s); 367 return to_bcd(s->rtc.tm.tm_wday); 368 case MENELAUS_RTC_AL_SEC: 369 return to_bcd(s->rtc.alm.tm_sec); 370 case MENELAUS_RTC_AL_MIN: 371 return to_bcd(s->rtc.alm.tm_min); 372 case MENELAUS_RTC_AL_HR: 373 if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */ 374 return to_bcd((s->rtc.alm.tm_hour % 12) + 1) | 375 (!!(s->rtc.alm.tm_hour >= 12) << 7);/* AL_PM_nAM */ 376 else 377 return to_bcd(s->rtc.alm.tm_hour); 378 case MENELAUS_RTC_AL_DAY: 379 return to_bcd(s->rtc.alm.tm_mday); 380 case MENELAUS_RTC_AL_MON: 381 return to_bcd(s->rtc.alm.tm_mon + 1); 382 case MENELAUS_RTC_AL_YR: 383 return to_bcd(s->rtc.alm.tm_year - 2000); 384 case MENELAUS_RTC_COMP_MSB: 385 return (s->rtc.comp >> 8) & 0xff; 386 case MENELAUS_RTC_COMP_LSB: 387 return (s->rtc.comp >> 0) & 0xff; 388 389 case MENELAUS_S1_PULL_EN: 390 return s->pull[0]; 391 case MENELAUS_S1_PULL_DIR: 392 return s->pull[1]; 393 case MENELAUS_S2_PULL_EN: 394 return s->pull[2]; 395 case MENELAUS_S2_PULL_DIR: 396 return s->pull[3]; 397 398 case MENELAUS_MCT_CTRL3: reg ++; 399 case MENELAUS_MCT_CTRL2: reg ++; 400 case MENELAUS_MCT_CTRL1: 401 return s->mmc_ctrl[reg]; 402 case MENELAUS_MCT_PIN_ST: 403 /* TODO: return the real Card Detect */ 404 return 0; 405 case MENELAUS_DEBOUNCE1: 406 return s->mmc_debounce; 407 408 default: 409 #ifdef VERBOSE 410 printf("%s: unknown register %02x\n", __func__, addr); 411 #endif 412 break; 413 } 414 return 0; 415 } 416 417 static void menelaus_write(void *opaque, uint8_t addr, uint8_t value) 418 { 419 MenelausState *s = (MenelausState *) opaque; 420 int line; 421 int reg = 0; 422 struct tm tm; 423 424 switch (addr) { 425 case MENELAUS_VCORE_CTRL1: 426 s->vcore[0] = (value & 0xe) | MIN(value & 0x1f, 0x12); 427 break; 428 case MENELAUS_VCORE_CTRL2: 429 s->vcore[1] = value; 430 break; 431 case MENELAUS_VCORE_CTRL3: 432 s->vcore[2] = MIN(value & 0x1f, 0x12); 433 break; 434 case MENELAUS_VCORE_CTRL4: 435 s->vcore[3] = MIN(value & 0x1f, 0x12); 436 break; 437 case MENELAUS_VCORE_CTRL5: 438 s->vcore[4] = value & 3; 439 /* XXX 440 * auto set to 3 on M_Active, nRESWARM 441 * auto set to 0 on M_WaitOn, M_Backup 442 */ 443 break; 444 445 case MENELAUS_DCDC_CTRL1: 446 s->dcdc[0] = value & 0x3f; 447 break; 448 case MENELAUS_DCDC_CTRL2: 449 s->dcdc[1] = value & 0x07; 450 /* XXX 451 * auto set to 3 on M_Active, nRESWARM 452 * auto set to 0 on M_WaitOn, M_Backup 453 */ 454 break; 455 case MENELAUS_DCDC_CTRL3: 456 s->dcdc[2] = value & 0x07; 457 break; 458 459 case MENELAUS_LDO_CTRL1: 460 s->ldo[0] = value; 461 break; 462 case MENELAUS_LDO_CTRL2: 463 s->ldo[1] = value & 0x7f; 464 /* XXX 465 * auto set to 0x7e on M_WaitOn, M_Backup 466 */ 467 break; 468 case MENELAUS_LDO_CTRL3: 469 s->ldo[2] = value & 3; 470 /* XXX 471 * auto set to 3 on M_Active, nRESWARM 472 * auto set to 0 on M_WaitOn, M_Backup 473 */ 474 break; 475 case MENELAUS_LDO_CTRL4: 476 s->ldo[3] = value & 3; 477 /* XXX 478 * auto set to 3 on M_Active, nRESWARM 479 * auto set to 0 on M_WaitOn, M_Backup 480 */ 481 break; 482 case MENELAUS_LDO_CTRL5: 483 s->ldo[4] = value & 3; 484 /* XXX 485 * auto set to 3 on M_Active, nRESWARM 486 * auto set to 0 on M_WaitOn, M_Backup 487 */ 488 break; 489 case MENELAUS_LDO_CTRL6: 490 s->ldo[5] = value & 3; 491 break; 492 case MENELAUS_LDO_CTRL7: 493 s->ldo[6] = value & 3; 494 break; 495 case MENELAUS_LDO_CTRL8: 496 s->ldo[7] = value & 3; 497 break; 498 499 case MENELAUS_SLEEP_CTRL2: reg ++; 500 case MENELAUS_SLEEP_CTRL1: 501 s->sleep[reg] = value; 502 break; 503 504 case MENELAUS_DEVICE_OFF: 505 if (value & 1) { 506 menelaus_reset(I2C_SLAVE(s)); 507 } 508 break; 509 510 case MENELAUS_OSC_CTRL: 511 s->osc = value & 7; 512 break; 513 514 case MENELAUS_DETECT_CTRL: 515 s->detect = value & 0x7f; 516 break; 517 518 case MENELAUS_INT_MASK1: 519 s->mask &= 0xf00; 520 s->mask |= value << 0; 521 menelaus_update(s); 522 break; 523 case MENELAUS_INT_MASK2: 524 s->mask &= 0x0ff; 525 s->mask |= value << 8; 526 menelaus_update(s); 527 break; 528 529 case MENELAUS_INT_ACK1: 530 s->status &= ~(((uint16_t) value) << 0); 531 menelaus_update(s); 532 break; 533 case MENELAUS_INT_ACK2: 534 s->status &= ~(((uint16_t) value) << 8); 535 menelaus_update(s); 536 break; 537 538 case MENELAUS_GPIO_CTRL: 539 for (line = 0; line < 3; line ++) { 540 if (((s->dir ^ value) >> line) & 1) { 541 qemu_set_irq(s->out[line], 542 ((s->outputs & ~s->dir) >> line) & 1); 543 } 544 } 545 s->dir = value & 0x67; 546 break; 547 case MENELAUS_GPIO_OUT: 548 for (line = 0; line < 3; line ++) { 549 if ((((s->outputs ^ value) & ~s->dir) >> line) & 1) { 550 qemu_set_irq(s->out[line], (s->outputs >> line) & 1); 551 } 552 } 553 s->outputs = value & 0x07; 554 break; 555 556 case MENELAUS_BBSMS: 557 s->bbsms = 0x0d; 558 break; 559 560 case MENELAUS_RTC_CTRL: 561 if ((s->rtc.ctrl ^ value) & 1) { /* RTC_EN */ 562 if (value & 1) 563 menelaus_rtc_start(s); 564 else 565 menelaus_rtc_stop(s); 566 } 567 s->rtc.ctrl = value & 0x1f; 568 menelaus_alm_update(s); 569 break; 570 case MENELAUS_RTC_UPDATE: 571 menelaus_rtc_update(s); 572 memcpy(&tm, &s->rtc.tm, sizeof(tm)); 573 switch (value & 0xf) { 574 case 0: 575 break; 576 case 1: 577 tm.tm_sec = s->rtc.new.tm_sec; 578 break; 579 case 2: 580 tm.tm_min = s->rtc.new.tm_min; 581 break; 582 case 3: 583 if (s->rtc.new.tm_hour > 23) 584 goto rtc_badness; 585 tm.tm_hour = s->rtc.new.tm_hour; 586 break; 587 case 4: 588 if (s->rtc.new.tm_mday < 1) 589 goto rtc_badness; 590 /* TODO check range */ 591 tm.tm_mday = s->rtc.new.tm_mday; 592 break; 593 case 5: 594 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11) 595 goto rtc_badness; 596 tm.tm_mon = s->rtc.new.tm_mon; 597 break; 598 case 6: 599 tm.tm_year = s->rtc.new.tm_year; 600 break; 601 case 7: 602 /* TODO set .tm_mday instead */ 603 tm.tm_wday = s->rtc.new.tm_wday; 604 break; 605 case 8: 606 if (s->rtc.new.tm_hour > 23) 607 goto rtc_badness; 608 if (s->rtc.new.tm_mday < 1) 609 goto rtc_badness; 610 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11) 611 goto rtc_badness; 612 tm.tm_sec = s->rtc.new.tm_sec; 613 tm.tm_min = s->rtc.new.tm_min; 614 tm.tm_hour = s->rtc.new.tm_hour; 615 tm.tm_mday = s->rtc.new.tm_mday; 616 tm.tm_mon = s->rtc.new.tm_mon; 617 tm.tm_year = s->rtc.new.tm_year; 618 break; 619 rtc_badness: 620 default: 621 fprintf(stderr, "%s: bad RTC_UPDATE value %02x\n", 622 __func__, value); 623 s->status |= 1 << 10; /* RTCERR */ 624 menelaus_update(s); 625 } 626 s->rtc.sec_offset = qemu_timedate_diff(&tm); 627 break; 628 case MENELAUS_RTC_SEC: 629 s->rtc.tm.tm_sec = from_bcd(value & 0x7f); 630 break; 631 case MENELAUS_RTC_MIN: 632 s->rtc.tm.tm_min = from_bcd(value & 0x7f); 633 break; 634 case MENELAUS_RTC_HR: 635 s->rtc.tm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */ 636 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) : 637 from_bcd(value & 0x3f); 638 break; 639 case MENELAUS_RTC_DAY: 640 s->rtc.tm.tm_mday = from_bcd(value); 641 break; 642 case MENELAUS_RTC_MON: 643 s->rtc.tm.tm_mon = MAX(1, from_bcd(value)) - 1; 644 break; 645 case MENELAUS_RTC_YR: 646 s->rtc.tm.tm_year = 2000 + from_bcd(value); 647 break; 648 case MENELAUS_RTC_WKDAY: 649 s->rtc.tm.tm_mday = from_bcd(value); 650 break; 651 case MENELAUS_RTC_AL_SEC: 652 s->rtc.alm.tm_sec = from_bcd(value & 0x7f); 653 menelaus_alm_update(s); 654 break; 655 case MENELAUS_RTC_AL_MIN: 656 s->rtc.alm.tm_min = from_bcd(value & 0x7f); 657 menelaus_alm_update(s); 658 break; 659 case MENELAUS_RTC_AL_HR: 660 s->rtc.alm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */ 661 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) : 662 from_bcd(value & 0x3f); 663 menelaus_alm_update(s); 664 break; 665 case MENELAUS_RTC_AL_DAY: 666 s->rtc.alm.tm_mday = from_bcd(value); 667 menelaus_alm_update(s); 668 break; 669 case MENELAUS_RTC_AL_MON: 670 s->rtc.alm.tm_mon = MAX(1, from_bcd(value)) - 1; 671 menelaus_alm_update(s); 672 break; 673 case MENELAUS_RTC_AL_YR: 674 s->rtc.alm.tm_year = 2000 + from_bcd(value); 675 menelaus_alm_update(s); 676 break; 677 case MENELAUS_RTC_COMP_MSB: 678 s->rtc.comp &= 0xff; 679 s->rtc.comp |= value << 8; 680 break; 681 case MENELAUS_RTC_COMP_LSB: 682 s->rtc.comp &= 0xff << 8; 683 s->rtc.comp |= value; 684 break; 685 686 case MENELAUS_S1_PULL_EN: 687 s->pull[0] = value; 688 break; 689 case MENELAUS_S1_PULL_DIR: 690 s->pull[1] = value & 0x1f; 691 break; 692 case MENELAUS_S2_PULL_EN: 693 s->pull[2] = value; 694 break; 695 case MENELAUS_S2_PULL_DIR: 696 s->pull[3] = value & 0x1f; 697 break; 698 699 case MENELAUS_MCT_CTRL1: 700 s->mmc_ctrl[0] = value & 0x7f; 701 break; 702 case MENELAUS_MCT_CTRL2: 703 s->mmc_ctrl[1] = value; 704 /* TODO update Card Detect interrupts */ 705 break; 706 case MENELAUS_MCT_CTRL3: 707 s->mmc_ctrl[2] = value & 0xf; 708 break; 709 case MENELAUS_DEBOUNCE1: 710 s->mmc_debounce = value & 0x3f; 711 break; 712 713 default: 714 #ifdef VERBOSE 715 printf("%s: unknown register %02x\n", __func__, addr); 716 #endif 717 } 718 } 719 720 static int menelaus_event(I2CSlave *i2c, enum i2c_event event) 721 { 722 MenelausState *s = TWL92230(i2c); 723 724 if (event == I2C_START_SEND) 725 s->firstbyte = 1; 726 727 return 0; 728 } 729 730 static int menelaus_tx(I2CSlave *i2c, uint8_t data) 731 { 732 MenelausState *s = TWL92230(i2c); 733 734 /* Interpret register address byte */ 735 if (s->firstbyte) { 736 s->reg = data; 737 s->firstbyte = 0; 738 } else 739 menelaus_write(s, s->reg ++, data); 740 741 return 0; 742 } 743 744 static uint8_t menelaus_rx(I2CSlave *i2c) 745 { 746 MenelausState *s = TWL92230(i2c); 747 748 return menelaus_read(s, s->reg ++); 749 } 750 751 /* Save restore 32 bit int as uint16_t 752 This is a Big hack, but it is how the old state did it. 753 Or we broke compatibility in the state, or we can't use struct tm 754 */ 755 756 static int get_int32_as_uint16(QEMUFile *f, void *pv, size_t size, 757 const VMStateField *field) 758 { 759 int *v = pv; 760 *v = qemu_get_be16(f); 761 return 0; 762 } 763 764 static int put_int32_as_uint16(QEMUFile *f, void *pv, size_t size, 765 const VMStateField *field, QJSON *vmdesc) 766 { 767 int *v = pv; 768 qemu_put_be16(f, *v); 769 770 return 0; 771 } 772 773 static const VMStateInfo vmstate_hack_int32_as_uint16 = { 774 .name = "int32_as_uint16", 775 .get = get_int32_as_uint16, 776 .put = put_int32_as_uint16, 777 }; 778 779 #define VMSTATE_UINT16_HACK(_f, _s) \ 780 VMSTATE_SINGLE(_f, _s, 0, vmstate_hack_int32_as_uint16, int32_t) 781 782 783 static const VMStateDescription vmstate_menelaus_tm = { 784 .name = "menelaus_tm", 785 .version_id = 0, 786 .minimum_version_id = 0, 787 .fields = (VMStateField[]) { 788 VMSTATE_UINT16_HACK(tm_sec, struct tm), 789 VMSTATE_UINT16_HACK(tm_min, struct tm), 790 VMSTATE_UINT16_HACK(tm_hour, struct tm), 791 VMSTATE_UINT16_HACK(tm_mday, struct tm), 792 VMSTATE_UINT16_HACK(tm_min, struct tm), 793 VMSTATE_UINT16_HACK(tm_year, struct tm), 794 VMSTATE_END_OF_LIST() 795 } 796 }; 797 798 static int menelaus_pre_save(void *opaque) 799 { 800 MenelausState *s = opaque; 801 /* Should be <= 1000 */ 802 s->rtc_next_vmstate = s->rtc.next - qemu_clock_get_ms(rtc_clock); 803 804 return 0; 805 } 806 807 static int menelaus_post_load(void *opaque, int version_id) 808 { 809 MenelausState *s = opaque; 810 811 if (s->rtc.ctrl & 1) /* RTC_EN */ 812 menelaus_rtc_stop(s); 813 814 s->rtc.next = s->rtc_next_vmstate; 815 816 menelaus_alm_update(s); 817 menelaus_update(s); 818 if (s->rtc.ctrl & 1) /* RTC_EN */ 819 menelaus_rtc_start(s); 820 return 0; 821 } 822 823 static const VMStateDescription vmstate_menelaus = { 824 .name = "menelaus", 825 .version_id = 0, 826 .minimum_version_id = 0, 827 .pre_save = menelaus_pre_save, 828 .post_load = menelaus_post_load, 829 .fields = (VMStateField[]) { 830 VMSTATE_INT32(firstbyte, MenelausState), 831 VMSTATE_UINT8(reg, MenelausState), 832 VMSTATE_UINT8_ARRAY(vcore, MenelausState, 5), 833 VMSTATE_UINT8_ARRAY(dcdc, MenelausState, 3), 834 VMSTATE_UINT8_ARRAY(ldo, MenelausState, 8), 835 VMSTATE_UINT8_ARRAY(sleep, MenelausState, 2), 836 VMSTATE_UINT8(osc, MenelausState), 837 VMSTATE_UINT8(detect, MenelausState), 838 VMSTATE_UINT16(mask, MenelausState), 839 VMSTATE_UINT16(status, MenelausState), 840 VMSTATE_UINT8(dir, MenelausState), 841 VMSTATE_UINT8(inputs, MenelausState), 842 VMSTATE_UINT8(outputs, MenelausState), 843 VMSTATE_UINT8(bbsms, MenelausState), 844 VMSTATE_UINT8_ARRAY(pull, MenelausState, 4), 845 VMSTATE_UINT8_ARRAY(mmc_ctrl, MenelausState, 3), 846 VMSTATE_UINT8(mmc_debounce, MenelausState), 847 VMSTATE_UINT8(rtc.ctrl, MenelausState), 848 VMSTATE_UINT16(rtc.comp, MenelausState), 849 VMSTATE_UINT16(rtc_next_vmstate, MenelausState), 850 VMSTATE_STRUCT(rtc.new, MenelausState, 0, vmstate_menelaus_tm, 851 struct tm), 852 VMSTATE_STRUCT(rtc.alm, MenelausState, 0, vmstate_menelaus_tm, 853 struct tm), 854 VMSTATE_UINT8(pwrbtn_state, MenelausState), 855 VMSTATE_I2C_SLAVE(parent_obj, MenelausState), 856 VMSTATE_END_OF_LIST() 857 } 858 }; 859 860 static void twl92230_realize(DeviceState *dev, Error **errp) 861 { 862 MenelausState *s = TWL92230(dev); 863 864 s->rtc.hz_tm = timer_new_ms(rtc_clock, menelaus_rtc_hz, s); 865 /* Three output pins plus one interrupt pin. */ 866 qdev_init_gpio_out(dev, s->out, 4); 867 868 /* Three input pins plus one power-button pin. */ 869 qdev_init_gpio_in(dev, menelaus_gpio_set, 4); 870 871 menelaus_reset(I2C_SLAVE(dev)); 872 } 873 874 static void twl92230_class_init(ObjectClass *klass, void *data) 875 { 876 DeviceClass *dc = DEVICE_CLASS(klass); 877 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass); 878 879 dc->realize = twl92230_realize; 880 sc->event = menelaus_event; 881 sc->recv = menelaus_rx; 882 sc->send = menelaus_tx; 883 dc->vmsd = &vmstate_menelaus; 884 } 885 886 static const TypeInfo twl92230_info = { 887 .name = TYPE_TWL92230, 888 .parent = TYPE_I2C_SLAVE, 889 .instance_size = sizeof(MenelausState), 890 .class_init = twl92230_class_init, 891 }; 892 893 static void twl92230_register_types(void) 894 { 895 type_register_static(&twl92230_info); 896 } 897 898 type_init(twl92230_register_types) 899