xref: /openbmc/qemu/hw/riscv/boot.c (revision 7acafcfa)
1 /*
2  * QEMU RISC-V Boot Helper
3  *
4  * Copyright (c) 2017 SiFive, Inc.
5  * Copyright (c) 2019 Alistair Francis <alistair.francis@wdc.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms and conditions of the GNU General Public License,
9  * version 2 or later, as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qemu/units.h"
23 #include "qemu/error-report.h"
24 #include "exec/cpu-defs.h"
25 #include "hw/boards.h"
26 #include "hw/loader.h"
27 #include "hw/riscv/boot.h"
28 #include "hw/riscv/boot_opensbi.h"
29 #include "elf.h"
30 #include "sysemu/device_tree.h"
31 #include "sysemu/qtest.h"
32 
33 #include <libfdt.h>
34 
35 #if defined(TARGET_RISCV32)
36 # define KERNEL_BOOT_ADDRESS 0x80400000
37 #define fw_dynamic_info_data(__val)     cpu_to_le32(__val)
38 #else
39 # define KERNEL_BOOT_ADDRESS 0x80200000
40 #define fw_dynamic_info_data(__val)     cpu_to_le64(__val)
41 #endif
42 
43 void riscv_find_and_load_firmware(MachineState *machine,
44                                   const char *default_machine_firmware,
45                                   hwaddr firmware_load_addr,
46                                   symbol_fn_t sym_cb)
47 {
48     char *firmware_filename = NULL;
49 
50     if ((!machine->firmware) || (!strcmp(machine->firmware, "default"))) {
51         /*
52          * The user didn't specify -bios, or has specified "-bios default".
53          * That means we are going to load the OpenSBI binary included in
54          * the QEMU source.
55          */
56         firmware_filename = riscv_find_firmware(default_machine_firmware);
57     } else if (strcmp(machine->firmware, "none")) {
58         firmware_filename = riscv_find_firmware(machine->firmware);
59     }
60 
61     if (firmware_filename) {
62         /* If not "none" load the firmware */
63         riscv_load_firmware(firmware_filename, firmware_load_addr, sym_cb);
64         g_free(firmware_filename);
65     }
66 }
67 
68 char *riscv_find_firmware(const char *firmware_filename)
69 {
70     char *filename;
71 
72     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware_filename);
73     if (filename == NULL) {
74         if (!qtest_enabled()) {
75             /*
76              * We only ship plain binary bios images in the QEMU source.
77              * With Spike machine that uses ELF images as the default bios,
78              * running QEMU test will complain hence let's suppress the error
79              * report for QEMU testing.
80              */
81             error_report("Unable to load the RISC-V firmware \"%s\"",
82                          firmware_filename);
83             exit(1);
84         }
85     }
86 
87     return filename;
88 }
89 
90 target_ulong riscv_load_firmware(const char *firmware_filename,
91                                  hwaddr firmware_load_addr,
92                                  symbol_fn_t sym_cb)
93 {
94     uint64_t firmware_entry, firmware_start, firmware_end;
95 
96     if (load_elf_ram_sym(firmware_filename, NULL, NULL, NULL,
97                          &firmware_entry, &firmware_start, &firmware_end, NULL,
98                          0, EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
99         return firmware_entry;
100     }
101 
102     if (load_image_targphys_as(firmware_filename, firmware_load_addr,
103                                ram_size, NULL) > 0) {
104         return firmware_load_addr;
105     }
106 
107     error_report("could not load firmware '%s'", firmware_filename);
108     exit(1);
109 }
110 
111 target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb)
112 {
113     uint64_t kernel_entry, kernel_high;
114 
115     if (load_elf_ram_sym(kernel_filename, NULL, NULL, NULL,
116                          &kernel_entry, NULL, &kernel_high, NULL, 0,
117                          EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
118         return kernel_entry;
119     }
120 
121     if (load_uimage_as(kernel_filename, &kernel_entry, NULL, NULL,
122                        NULL, NULL, NULL) > 0) {
123         return kernel_entry;
124     }
125 
126     if (load_image_targphys_as(kernel_filename, KERNEL_BOOT_ADDRESS,
127                                ram_size, NULL) > 0) {
128         return KERNEL_BOOT_ADDRESS;
129     }
130 
131     error_report("could not load kernel '%s'", kernel_filename);
132     exit(1);
133 }
134 
135 hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size,
136                          uint64_t kernel_entry, hwaddr *start)
137 {
138     int size;
139 
140     /*
141      * We want to put the initrd far enough into RAM that when the
142      * kernel is uncompressed it will not clobber the initrd. However
143      * on boards without much RAM we must ensure that we still leave
144      * enough room for a decent sized initrd, and on boards with large
145      * amounts of RAM we must avoid the initrd being so far up in RAM
146      * that it is outside lowmem and inaccessible to the kernel.
147      * So for boards with less  than 256MB of RAM we put the initrd
148      * halfway into RAM, and for boards with 256MB of RAM or more we put
149      * the initrd at 128MB.
150      */
151     *start = kernel_entry + MIN(mem_size / 2, 128 * MiB);
152 
153     size = load_ramdisk(filename, *start, mem_size - *start);
154     if (size == -1) {
155         size = load_image_targphys(filename, *start, mem_size - *start);
156         if (size == -1) {
157             error_report("could not load ramdisk '%s'", filename);
158             exit(1);
159         }
160     }
161 
162     return *start + size;
163 }
164 
165 uint32_t riscv_load_fdt(hwaddr dram_base, uint64_t mem_size, void *fdt)
166 {
167     uint32_t temp, fdt_addr;
168     hwaddr dram_end = dram_base + mem_size;
169     int fdtsize = fdt_totalsize(fdt);
170 
171     if (fdtsize <= 0) {
172         error_report("invalid device-tree");
173         exit(1);
174     }
175 
176     /*
177      * We should put fdt as far as possible to avoid kernel/initrd overwriting
178      * its content. But it should be addressable by 32 bit system as well.
179      * Thus, put it at an aligned address that less than fdt size from end of
180      * dram or 4GB whichever is lesser.
181      */
182     temp = MIN(dram_end, 4096 * MiB);
183     fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 2 * MiB);
184 
185     fdt_pack(fdt);
186     /* copy in the device tree */
187     qemu_fdt_dumpdtb(fdt, fdtsize);
188 
189     rom_add_blob_fixed_as("fdt", fdt, fdtsize, fdt_addr,
190                           &address_space_memory);
191 
192     return fdt_addr;
193 }
194 
195 void riscv_rom_copy_firmware_info(hwaddr rom_base, hwaddr rom_size,
196                               uint32_t reset_vec_size, uint64_t kernel_entry)
197 {
198     struct fw_dynamic_info dinfo;
199     size_t dinfo_len;
200 
201     dinfo.magic = fw_dynamic_info_data(FW_DYNAMIC_INFO_MAGIC_VALUE);
202     dinfo.version = fw_dynamic_info_data(FW_DYNAMIC_INFO_VERSION);
203     dinfo.next_mode = fw_dynamic_info_data(FW_DYNAMIC_INFO_NEXT_MODE_S);
204     dinfo.next_addr = fw_dynamic_info_data(kernel_entry);
205     dinfo.options = 0;
206     dinfo.boot_hart = 0;
207     dinfo_len = sizeof(dinfo);
208 
209     /**
210      * copy the dynamic firmware info. This information is specific to
211      * OpenSBI but doesn't break any other firmware as long as they don't
212      * expect any certain value in "a2" register.
213      */
214     if (dinfo_len > (rom_size - reset_vec_size)) {
215         error_report("not enough space to store dynamic firmware info");
216         exit(1);
217     }
218 
219     rom_add_blob_fixed_as("mrom.finfo", &dinfo, dinfo_len,
220                            rom_base + reset_vec_size,
221                            &address_space_memory);
222 }
223 
224 void riscv_setup_rom_reset_vec(hwaddr start_addr, hwaddr rom_base,
225                                hwaddr rom_size, uint64_t kernel_entry,
226                                uint32_t fdt_load_addr, void *fdt)
227 {
228     int i;
229     uint32_t start_addr_hi32 = 0x00000000;
230 
231     #if defined(TARGET_RISCV64)
232     start_addr_hi32 = start_addr >> 32;
233     #endif
234     /* reset vector */
235     uint32_t reset_vec[10] = {
236         0x00000297,                  /* 1:  auipc  t0, %pcrel_hi(fw_dyn) */
237         0x02828613,                  /*     addi   a2, t0, %pcrel_lo(1b) */
238         0xf1402573,                  /*     csrr   a0, mhartid  */
239 #if defined(TARGET_RISCV32)
240         0x0202a583,                  /*     lw     a1, 32(t0) */
241         0x0182a283,                  /*     lw     t0, 24(t0) */
242 #elif defined(TARGET_RISCV64)
243         0x0202b583,                  /*     ld     a1, 32(t0) */
244         0x0182b283,                  /*     ld     t0, 24(t0) */
245 #endif
246         0x00028067,                  /*     jr     t0 */
247         start_addr,                  /* start: .dword */
248         start_addr_hi32,
249         fdt_load_addr,               /* fdt_laddr: .dword */
250         0x00000000,
251                                      /* fw_dyn: */
252     };
253 
254     /* copy in the reset vector in little_endian byte order */
255     for (i = 0; i < ARRAY_SIZE(reset_vec); i++) {
256         reset_vec[i] = cpu_to_le32(reset_vec[i]);
257     }
258     rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec),
259                           rom_base, &address_space_memory);
260     riscv_rom_copy_firmware_info(rom_base, rom_size, sizeof(reset_vec),
261                                  kernel_entry);
262 
263     return;
264 }
265