1 /* 2 * Model of Xilinx Virtex5 ML507 PPC-440 refdesign. 3 * 4 * Copyright (c) 2010 Edgar E. Iglesias. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "hw/sysbus.h" 26 #include "hw/hw.h" 27 #include "hw/char/serial.h" 28 #include "hw/block/flash.h" 29 #include "sysemu/sysemu.h" 30 #include "hw/devices.h" 31 #include "hw/boards.h" 32 #include "sysemu/device_tree.h" 33 #include "hw/loader.h" 34 #include "elf.h" 35 #include "qemu/log.h" 36 #include "exec/address-spaces.h" 37 38 #include "hw/ppc/ppc.h" 39 #include "hw/ppc/ppc4xx.h" 40 #include "ppc405.h" 41 42 #include "sysemu/blockdev.h" 43 #include "qapi/qmp/qerror.h" 44 45 #define EPAPR_MAGIC (0x45504150) 46 #define FLASH_SIZE (16 * 1024 * 1024) 47 48 #define INTC_BASEADDR 0x81800000 49 #define UART16550_BASEADDR 0x83e01003 50 #define TIMER_BASEADDR 0x83c00000 51 #define PFLASH_BASEADDR 0xfc000000 52 53 #define TIMER_IRQ 3 54 #define UART16550_IRQ 9 55 56 static struct boot_info 57 { 58 uint32_t bootstrap_pc; 59 uint32_t cmdline; 60 uint32_t fdt; 61 uint32_t ima_size; 62 void *vfdt; 63 } boot_info; 64 65 /* Create reset TLB entries for BookE, spanning the 32bit addr space. */ 66 static void mmubooke_create_initial_mapping(CPUPPCState *env, 67 target_ulong va, 68 hwaddr pa) 69 { 70 ppcemb_tlb_t *tlb = &env->tlb.tlbe[0]; 71 72 tlb->attr = 0; 73 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); 74 tlb->size = 1 << 31; /* up to 0x80000000 */ 75 tlb->EPN = va & TARGET_PAGE_MASK; 76 tlb->RPN = pa & TARGET_PAGE_MASK; 77 tlb->PID = 0; 78 79 tlb = &env->tlb.tlbe[1]; 80 tlb->attr = 0; 81 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); 82 tlb->size = 1 << 31; /* up to 0xffffffff */ 83 tlb->EPN = 0x80000000 & TARGET_PAGE_MASK; 84 tlb->RPN = 0x80000000 & TARGET_PAGE_MASK; 85 tlb->PID = 0; 86 } 87 88 static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size, 89 int do_init, 90 const char *cpu_model, 91 uint32_t sysclk) 92 { 93 PowerPCCPU *cpu; 94 CPUPPCState *env; 95 qemu_irq *irqs; 96 97 cpu = cpu_ppc_init(cpu_model); 98 if (cpu == NULL) { 99 fprintf(stderr, "Unable to initialize CPU!\n"); 100 exit(1); 101 } 102 env = &cpu->env; 103 104 ppc_booke_timers_init(cpu, sysclk, 0/* no flags */); 105 106 ppc_dcr_init(env, NULL, NULL); 107 108 /* interrupt controller */ 109 irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB); 110 irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]; 111 irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]; 112 ppcuic_init(env, irqs, 0x0C0, 0, 1); 113 return cpu; 114 } 115 116 static void main_cpu_reset(void *opaque) 117 { 118 PowerPCCPU *cpu = opaque; 119 CPUPPCState *env = &cpu->env; 120 struct boot_info *bi = env->load_info; 121 122 cpu_reset(CPU(cpu)); 123 /* Linux Kernel Parameters (passing device tree): 124 * r3: pointer to the fdt 125 * r4: 0 126 * r5: 0 127 * r6: epapr magic 128 * r7: size of IMA in bytes 129 * r8: 0 130 * r9: 0 131 */ 132 env->gpr[1] = (16<<20) - 8; 133 /* Provide a device-tree. */ 134 env->gpr[3] = bi->fdt; 135 env->nip = bi->bootstrap_pc; 136 137 /* Create a mapping for the kernel. */ 138 mmubooke_create_initial_mapping(env, 0, 0); 139 env->gpr[6] = tswap32(EPAPR_MAGIC); 140 env->gpr[7] = bi->ima_size; 141 } 142 143 #define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb" 144 static int xilinx_load_device_tree(hwaddr addr, 145 uint32_t ramsize, 146 hwaddr initrd_base, 147 hwaddr initrd_size, 148 const char *kernel_cmdline) 149 { 150 char *path; 151 int fdt_size; 152 void *fdt = NULL; 153 int r; 154 const char *dtb_filename; 155 156 dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb"); 157 if (dtb_filename) { 158 fdt = load_device_tree(dtb_filename, &fdt_size); 159 if (!fdt) { 160 error_report("Error while loading device tree file '%s'", 161 dtb_filename); 162 } 163 } else { 164 /* Try the local "ppc.dtb" override. */ 165 fdt = load_device_tree("ppc.dtb", &fdt_size); 166 if (!fdt) { 167 path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE); 168 if (path) { 169 fdt = load_device_tree(path, &fdt_size); 170 g_free(path); 171 } 172 } 173 } 174 if (!fdt) { 175 return 0; 176 } 177 r = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline); 178 if (r < 0) 179 fprintf(stderr, "couldn't set /chosen/bootargs\n"); 180 cpu_physical_memory_write(addr, fdt, fdt_size); 181 return fdt_size; 182 } 183 184 static void virtex_init(QEMUMachineInitArgs *args) 185 { 186 ram_addr_t ram_size = args->ram_size; 187 const char *cpu_model = args->cpu_model; 188 const char *kernel_filename = args->kernel_filename; 189 const char *kernel_cmdline = args->kernel_cmdline; 190 MemoryRegion *address_space_mem = get_system_memory(); 191 DeviceState *dev; 192 PowerPCCPU *cpu; 193 CPUPPCState *env; 194 hwaddr ram_base = 0; 195 DriveInfo *dinfo; 196 MemoryRegion *phys_ram = g_new(MemoryRegion, 1); 197 qemu_irq irq[32], *cpu_irq; 198 int kernel_size; 199 int i; 200 201 /* init CPUs */ 202 if (cpu_model == NULL) { 203 cpu_model = "440-Xilinx"; 204 } 205 206 cpu = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000); 207 env = &cpu->env; 208 qemu_register_reset(main_cpu_reset, cpu); 209 210 memory_region_init_ram(phys_ram, NULL, "ram", ram_size); 211 vmstate_register_ram_global(phys_ram); 212 memory_region_add_subregion(address_space_mem, ram_base, phys_ram); 213 214 dinfo = drive_get(IF_PFLASH, 0, 0); 215 pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZE, 216 dinfo ? dinfo->bdrv : NULL, (64 * 1024), 217 FLASH_SIZE >> 16, 218 1, 0x89, 0x18, 0x0000, 0x0, 1); 219 220 cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT]; 221 dev = qdev_create(NULL, "xlnx.xps-intc"); 222 qdev_prop_set_uint32(dev, "kind-of-intr", 0); 223 qdev_init_nofail(dev); 224 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); 225 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq[0]); 226 for (i = 0; i < 32; i++) { 227 irq[i] = qdev_get_gpio_in(dev, i); 228 } 229 230 serial_mm_init(address_space_mem, UART16550_BASEADDR, 2, irq[UART16550_IRQ], 231 115200, serial_hds[0], DEVICE_LITTLE_ENDIAN); 232 233 /* 2 timers at irq 2 @ 62 Mhz. */ 234 dev = qdev_create(NULL, "xlnx.xps-timer"); 235 qdev_prop_set_uint32(dev, "one-timer-only", 0); 236 qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000); 237 qdev_init_nofail(dev); 238 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); 239 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); 240 241 if (kernel_filename) { 242 uint64_t entry, low, high; 243 hwaddr boot_offset; 244 245 /* Boots a kernel elf binary. */ 246 kernel_size = load_elf(kernel_filename, NULL, NULL, 247 &entry, &low, &high, 1, ELF_MACHINE, 0); 248 boot_info.bootstrap_pc = entry & 0x00ffffff; 249 250 if (kernel_size < 0) { 251 boot_offset = 0x1200000; 252 /* If we failed loading ELF's try a raw image. */ 253 kernel_size = load_image_targphys(kernel_filename, 254 boot_offset, 255 ram_size); 256 boot_info.bootstrap_pc = boot_offset; 257 high = boot_info.bootstrap_pc + kernel_size + 8192; 258 } 259 260 boot_info.ima_size = kernel_size; 261 262 /* Provide a device-tree. */ 263 boot_info.fdt = high + (8192 * 2); 264 boot_info.fdt &= ~8191; 265 xilinx_load_device_tree(boot_info.fdt, ram_size, 0, 0, kernel_cmdline); 266 } 267 env->load_info = &boot_info; 268 } 269 270 static QEMUMachine virtex_machine = { 271 .name = "virtex-ml507", 272 .desc = "Xilinx Virtex ML507 reference design", 273 .init = virtex_init, 274 }; 275 276 static void virtex_machine_init(void) 277 { 278 qemu_register_machine(&virtex_machine); 279 } 280 281 machine_init(virtex_machine_init); 282