1 /* 2 * Model of Xilinx Virtex5 ML507 PPC-440 refdesign. 3 * 4 * Copyright (c) 2010 Edgar E. Iglesias. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "hw/sysbus.h" 26 #include "hw/hw.h" 27 #include "hw/char/serial.h" 28 #include "hw/block/flash.h" 29 #include "sysemu/sysemu.h" 30 #include "hw/devices.h" 31 #include "hw/boards.h" 32 #include "sysemu/device_tree.h" 33 #include "hw/loader.h" 34 #include "elf.h" 35 #include "qemu/log.h" 36 #include "exec/address-spaces.h" 37 38 #include "hw/ppc/ppc.h" 39 #include "hw/ppc/ppc4xx.h" 40 #include "ppc405.h" 41 42 #include "sysemu/blockdev.h" 43 #include "hw/xilinx.h" 44 45 #define EPAPR_MAGIC (0x45504150) 46 #define FLASH_SIZE (16 * 1024 * 1024) 47 48 static struct boot_info 49 { 50 uint32_t bootstrap_pc; 51 uint32_t cmdline; 52 uint32_t fdt; 53 uint32_t ima_size; 54 void *vfdt; 55 } boot_info; 56 57 /* Create reset TLB entries for BookE, spanning the 32bit addr space. */ 58 static void mmubooke_create_initial_mapping(CPUPPCState *env, 59 target_ulong va, 60 hwaddr pa) 61 { 62 ppcemb_tlb_t *tlb = &env->tlb.tlbe[0]; 63 64 tlb->attr = 0; 65 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); 66 tlb->size = 1 << 31; /* up to 0x80000000 */ 67 tlb->EPN = va & TARGET_PAGE_MASK; 68 tlb->RPN = pa & TARGET_PAGE_MASK; 69 tlb->PID = 0; 70 71 tlb = &env->tlb.tlbe[1]; 72 tlb->attr = 0; 73 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); 74 tlb->size = 1 << 31; /* up to 0xffffffff */ 75 tlb->EPN = 0x80000000 & TARGET_PAGE_MASK; 76 tlb->RPN = 0x80000000 & TARGET_PAGE_MASK; 77 tlb->PID = 0; 78 } 79 80 static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size, 81 int do_init, 82 const char *cpu_model, 83 uint32_t sysclk) 84 { 85 PowerPCCPU *cpu; 86 CPUPPCState *env; 87 qemu_irq *irqs; 88 89 cpu = cpu_ppc_init(cpu_model); 90 if (cpu == NULL) { 91 fprintf(stderr, "Unable to initialize CPU!\n"); 92 exit(1); 93 } 94 env = &cpu->env; 95 96 ppc_booke_timers_init(cpu, sysclk, 0/* no flags */); 97 98 ppc_dcr_init(env, NULL, NULL); 99 100 /* interrupt controller */ 101 irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB); 102 irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]; 103 irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]; 104 ppcuic_init(env, irqs, 0x0C0, 0, 1); 105 return cpu; 106 } 107 108 static void main_cpu_reset(void *opaque) 109 { 110 PowerPCCPU *cpu = opaque; 111 CPUPPCState *env = &cpu->env; 112 struct boot_info *bi = env->load_info; 113 114 cpu_reset(CPU(cpu)); 115 /* Linux Kernel Parameters (passing device tree): 116 * r3: pointer to the fdt 117 * r4: 0 118 * r5: 0 119 * r6: epapr magic 120 * r7: size of IMA in bytes 121 * r8: 0 122 * r9: 0 123 */ 124 env->gpr[1] = (16<<20) - 8; 125 /* Provide a device-tree. */ 126 env->gpr[3] = bi->fdt; 127 env->nip = bi->bootstrap_pc; 128 129 /* Create a mapping for the kernel. */ 130 mmubooke_create_initial_mapping(env, 0, 0); 131 env->gpr[6] = tswap32(EPAPR_MAGIC); 132 env->gpr[7] = bi->ima_size; 133 } 134 135 #define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb" 136 static int xilinx_load_device_tree(hwaddr addr, 137 uint32_t ramsize, 138 hwaddr initrd_base, 139 hwaddr initrd_size, 140 const char *kernel_cmdline) 141 { 142 char *path; 143 int fdt_size; 144 void *fdt = NULL; 145 int r; 146 const char *dtb_filename; 147 148 dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb"); 149 if (dtb_filename) { 150 fdt = load_device_tree(dtb_filename, &fdt_size); 151 if (!fdt) { 152 error_report("Error while loading device tree file '%s'", 153 dtb_filename); 154 } 155 } else { 156 /* Try the local "ppc.dtb" override. */ 157 fdt = load_device_tree("ppc.dtb", &fdt_size); 158 if (!fdt) { 159 path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE); 160 if (path) { 161 fdt = load_device_tree(path, &fdt_size); 162 g_free(path); 163 } 164 } 165 } 166 if (!fdt) { 167 return 0; 168 } 169 r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline); 170 if (r < 0) 171 fprintf(stderr, "couldn't set /chosen/bootargs\n"); 172 cpu_physical_memory_write(addr, fdt, fdt_size); 173 return fdt_size; 174 } 175 176 static void virtex_init(QEMUMachineInitArgs *args) 177 { 178 ram_addr_t ram_size = args->ram_size; 179 const char *cpu_model = args->cpu_model; 180 const char *kernel_filename = args->kernel_filename; 181 const char *kernel_cmdline = args->kernel_cmdline; 182 MemoryRegion *address_space_mem = get_system_memory(); 183 DeviceState *dev; 184 PowerPCCPU *cpu; 185 CPUPPCState *env; 186 hwaddr ram_base = 0; 187 DriveInfo *dinfo; 188 MemoryRegion *phys_ram = g_new(MemoryRegion, 1); 189 qemu_irq irq[32], *cpu_irq; 190 int kernel_size; 191 int i; 192 193 /* init CPUs */ 194 if (cpu_model == NULL) { 195 cpu_model = "440-Xilinx"; 196 } 197 198 cpu = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000); 199 env = &cpu->env; 200 qemu_register_reset(main_cpu_reset, cpu); 201 202 memory_region_init_ram(phys_ram, NULL, "ram", ram_size); 203 vmstate_register_ram_global(phys_ram); 204 memory_region_add_subregion(address_space_mem, ram_base, phys_ram); 205 206 dinfo = drive_get(IF_PFLASH, 0, 0); 207 pflash_cfi01_register(0xfc000000, NULL, "virtex.flash", FLASH_SIZE, 208 dinfo ? dinfo->bdrv : NULL, (64 * 1024), 209 FLASH_SIZE >> 16, 210 1, 0x89, 0x18, 0x0000, 0x0, 1); 211 212 cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT]; 213 dev = xilinx_intc_create(0x81800000, cpu_irq[0], 0); 214 for (i = 0; i < 32; i++) { 215 irq[i] = qdev_get_gpio_in(dev, i); 216 } 217 218 serial_mm_init(address_space_mem, 0x83e01003ULL, 2, irq[9], 115200, 219 serial_hds[0], DEVICE_LITTLE_ENDIAN); 220 221 /* 2 timers at irq 2 @ 62 Mhz. */ 222 xilinx_timer_create(0x83c00000, irq[3], 0, 62 * 1000000); 223 224 if (kernel_filename) { 225 uint64_t entry, low, high; 226 hwaddr boot_offset; 227 228 /* Boots a kernel elf binary. */ 229 kernel_size = load_elf(kernel_filename, NULL, NULL, 230 &entry, &low, &high, 1, ELF_MACHINE, 0); 231 boot_info.bootstrap_pc = entry & 0x00ffffff; 232 233 if (kernel_size < 0) { 234 boot_offset = 0x1200000; 235 /* If we failed loading ELF's try a raw image. */ 236 kernel_size = load_image_targphys(kernel_filename, 237 boot_offset, 238 ram_size); 239 boot_info.bootstrap_pc = boot_offset; 240 high = boot_info.bootstrap_pc + kernel_size + 8192; 241 } 242 243 boot_info.ima_size = kernel_size; 244 245 /* Provide a device-tree. */ 246 boot_info.fdt = high + (8192 * 2); 247 boot_info.fdt &= ~8191; 248 xilinx_load_device_tree(boot_info.fdt, ram_size, 0, 0, kernel_cmdline); 249 } 250 env->load_info = &boot_info; 251 } 252 253 static QEMUMachine virtex_machine = { 254 .name = "virtex-ml507", 255 .desc = "Xilinx Virtex ML507 reference design", 256 .init = virtex_init, 257 }; 258 259 static void virtex_machine_init(void) 260 { 261 qemu_register_machine(&virtex_machine); 262 } 263 264 machine_init(virtex_machine_init); 265