1 /* 2 * QEMU sPAPR VIO code 3 * 4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com> 5 * Based on the s390 virtio bus code: 6 * Copyright (c) 2009 Alexander Graf <agraf@suse.de> 7 * 8 * This library is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU Lesser General Public 10 * License as published by the Free Software Foundation; either 11 * version 2.1 of the License, or (at your option) any later version. 12 * 13 * This library is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * Lesser General Public License for more details. 17 * 18 * You should have received a copy of the GNU Lesser General Public 19 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "qemu/error-report.h" 24 #include "qapi/error.h" 25 #include "qapi/visitor.h" 26 #include "qemu/log.h" 27 #include "hw/loader.h" 28 #include "elf.h" 29 #include "hw/sysbus.h" 30 #include "sysemu/kvm.h" 31 #include "sysemu/device_tree.h" 32 #include "kvm_ppc.h" 33 #include "migration/vmstate.h" 34 #include "sysemu/qtest.h" 35 36 #include "hw/ppc/spapr.h" 37 #include "hw/ppc/spapr_vio.h" 38 #include "hw/ppc/fdt.h" 39 #include "trace.h" 40 41 #include <libfdt.h> 42 43 #define SPAPR_VIO_REG_BASE 0x71000000 44 45 static char *spapr_vio_get_dev_name(DeviceState *qdev) 46 { 47 SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev); 48 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 49 50 /* Device tree style name device@reg */ 51 return g_strdup_printf("%s@%x", pc->dt_name, dev->reg); 52 } 53 54 static void spapr_vio_bus_class_init(ObjectClass *klass, void *data) 55 { 56 BusClass *k = BUS_CLASS(klass); 57 58 k->get_dev_path = spapr_vio_get_dev_name; 59 k->get_fw_dev_path = spapr_vio_get_dev_name; 60 } 61 62 static const TypeInfo spapr_vio_bus_info = { 63 .name = TYPE_SPAPR_VIO_BUS, 64 .parent = TYPE_BUS, 65 .class_init = spapr_vio_bus_class_init, 66 .instance_size = sizeof(SpaprVioBus), 67 }; 68 69 SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg) 70 { 71 BusChild *kid; 72 SpaprVioDevice *dev = NULL; 73 74 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { 75 dev = (SpaprVioDevice *)kid->child; 76 if (dev->reg == reg) { 77 return dev; 78 } 79 } 80 81 return NULL; 82 } 83 84 static int vio_make_devnode(SpaprVioDevice *dev, 85 void *fdt) 86 { 87 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 88 int vdevice_off, node_off, ret; 89 char *dt_name; 90 const char *dt_compatible; 91 92 vdevice_off = fdt_path_offset(fdt, "/vdevice"); 93 if (vdevice_off < 0) { 94 return vdevice_off; 95 } 96 97 dt_name = spapr_vio_get_dev_name(DEVICE(dev)); 98 node_off = fdt_add_subnode(fdt, vdevice_off, dt_name); 99 g_free(dt_name); 100 if (node_off < 0) { 101 return node_off; 102 } 103 104 ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg); 105 if (ret < 0) { 106 return ret; 107 } 108 109 if (pc->dt_type) { 110 ret = fdt_setprop_string(fdt, node_off, "device_type", 111 pc->dt_type); 112 if (ret < 0) { 113 return ret; 114 } 115 } 116 117 if (pc->get_dt_compatible) { 118 dt_compatible = pc->get_dt_compatible(dev); 119 } else { 120 dt_compatible = pc->dt_compatible; 121 } 122 123 if (dt_compatible) { 124 ret = fdt_setprop_string(fdt, node_off, "compatible", 125 dt_compatible); 126 if (ret < 0) { 127 return ret; 128 } 129 } 130 131 if (dev->irq) { 132 uint32_t ints_prop[2]; 133 134 spapr_dt_irq(ints_prop, dev->irq, false); 135 ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop, 136 sizeof(ints_prop)); 137 if (ret < 0) { 138 return ret; 139 } 140 } 141 142 ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->tcet); 143 if (ret < 0) { 144 return ret; 145 } 146 147 if (pc->devnode) { 148 ret = (pc->devnode)(dev, fdt, node_off); 149 if (ret < 0) { 150 return ret; 151 } 152 } 153 154 return node_off; 155 } 156 157 /* 158 * CRQ handling 159 */ 160 static target_ulong h_reg_crq(PowerPCCPU *cpu, SpaprMachineState *spapr, 161 target_ulong opcode, target_ulong *args) 162 { 163 target_ulong reg = args[0]; 164 target_ulong queue_addr = args[1]; 165 target_ulong queue_len = args[2]; 166 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); 167 168 if (!dev) { 169 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); 170 return H_PARAMETER; 171 } 172 173 /* We can't grok a queue size bigger than 256M for now */ 174 if (queue_len < 0x1000 || queue_len > 0x10000000) { 175 hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx 176 ")\n", queue_len); 177 return H_PARAMETER; 178 } 179 180 /* Check queue alignment */ 181 if (queue_addr & 0xfff) { 182 hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr); 183 return H_PARAMETER; 184 } 185 186 /* Check if device supports CRQs */ 187 if (!dev->crq.SendFunc) { 188 hcall_dprintf("Device does not support CRQ\n"); 189 return H_NOT_FOUND; 190 } 191 192 /* Already a queue ? */ 193 if (dev->crq.qsize) { 194 hcall_dprintf("CRQ already registered\n"); 195 return H_RESOURCE; 196 } 197 dev->crq.qladdr = queue_addr; 198 dev->crq.qsize = queue_len; 199 dev->crq.qnext = 0; 200 201 trace_spapr_vio_h_reg_crq(reg, queue_addr, queue_len); 202 return H_SUCCESS; 203 } 204 205 static target_ulong free_crq(SpaprVioDevice *dev) 206 { 207 dev->crq.qladdr = 0; 208 dev->crq.qsize = 0; 209 dev->crq.qnext = 0; 210 211 trace_spapr_vio_free_crq(dev->reg); 212 213 return H_SUCCESS; 214 } 215 216 static target_ulong h_free_crq(PowerPCCPU *cpu, SpaprMachineState *spapr, 217 target_ulong opcode, target_ulong *args) 218 { 219 target_ulong reg = args[0]; 220 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); 221 222 if (!dev) { 223 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); 224 return H_PARAMETER; 225 } 226 227 return free_crq(dev); 228 } 229 230 static target_ulong h_send_crq(PowerPCCPU *cpu, SpaprMachineState *spapr, 231 target_ulong opcode, target_ulong *args) 232 { 233 target_ulong reg = args[0]; 234 target_ulong msg_hi = args[1]; 235 target_ulong msg_lo = args[2]; 236 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); 237 uint64_t crq_mangle[2]; 238 239 if (!dev) { 240 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); 241 return H_PARAMETER; 242 } 243 crq_mangle[0] = cpu_to_be64(msg_hi); 244 crq_mangle[1] = cpu_to_be64(msg_lo); 245 246 if (dev->crq.SendFunc) { 247 return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle); 248 } 249 250 return H_HARDWARE; 251 } 252 253 static target_ulong h_enable_crq(PowerPCCPU *cpu, SpaprMachineState *spapr, 254 target_ulong opcode, target_ulong *args) 255 { 256 target_ulong reg = args[0]; 257 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); 258 259 if (!dev) { 260 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); 261 return H_PARAMETER; 262 } 263 264 return 0; 265 } 266 267 /* Returns negative error, 0 success, or positive: queue full */ 268 int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq) 269 { 270 int rc; 271 uint8_t byte; 272 273 if (!dev->crq.qsize) { 274 error_report("spapr_vio_send_creq on uninitialized queue"); 275 return -1; 276 } 277 278 /* Maybe do a fast path for KVM just writing to the pages */ 279 rc = spapr_vio_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1); 280 if (rc) { 281 return rc; 282 } 283 if (byte != 0) { 284 return 1; 285 } 286 287 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8, 288 &crq[8], 8); 289 if (rc) { 290 return rc; 291 } 292 293 kvmppc_eieio(); 294 295 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8); 296 if (rc) { 297 return rc; 298 } 299 300 dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize; 301 302 if (dev->signal_state & 1) { 303 spapr_vio_irq_pulse(dev); 304 } 305 306 return 0; 307 } 308 309 /* "quiesce" handling */ 310 311 static void spapr_vio_quiesce_one(SpaprVioDevice *dev) 312 { 313 if (dev->tcet) { 314 device_legacy_reset(DEVICE(dev->tcet)); 315 } 316 free_crq(dev); 317 } 318 319 void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass) 320 { 321 if (!dev->tcet) { 322 return; 323 } 324 325 memory_region_set_enabled(&dev->mrbypass, bypass); 326 memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass); 327 328 dev->tcet->bypass = bypass; 329 } 330 331 static void rtas_set_tce_bypass(PowerPCCPU *cpu, SpaprMachineState *spapr, 332 uint32_t token, 333 uint32_t nargs, target_ulong args, 334 uint32_t nret, target_ulong rets) 335 { 336 SpaprVioBus *bus = spapr->vio_bus; 337 SpaprVioDevice *dev; 338 uint32_t unit, enable; 339 340 if (nargs != 2) { 341 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 342 return; 343 } 344 unit = rtas_ld(args, 0); 345 enable = rtas_ld(args, 1); 346 dev = spapr_vio_find_by_reg(bus, unit); 347 if (!dev) { 348 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 349 return; 350 } 351 352 if (!dev->tcet) { 353 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 354 return; 355 } 356 357 spapr_vio_set_bypass(dev, !!enable); 358 359 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 360 } 361 362 static void rtas_quiesce(PowerPCCPU *cpu, SpaprMachineState *spapr, 363 uint32_t token, 364 uint32_t nargs, target_ulong args, 365 uint32_t nret, target_ulong rets) 366 { 367 SpaprVioBus *bus = spapr->vio_bus; 368 BusChild *kid; 369 SpaprVioDevice *dev = NULL; 370 371 if (nargs != 0) { 372 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 373 return; 374 } 375 376 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { 377 dev = (SpaprVioDevice *)kid->child; 378 spapr_vio_quiesce_one(dev); 379 } 380 381 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 382 } 383 384 static SpaprVioDevice *reg_conflict(SpaprVioDevice *dev) 385 { 386 SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus); 387 BusChild *kid; 388 SpaprVioDevice *other; 389 390 /* 391 * Check for a device other than the given one which is already 392 * using the requested address. We have to open code this because 393 * the given dev might already be in the list. 394 */ 395 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { 396 other = VIO_SPAPR_DEVICE(kid->child); 397 398 if (other != dev && other->reg == dev->reg) { 399 return other; 400 } 401 } 402 403 return 0; 404 } 405 406 static void spapr_vio_busdev_reset(DeviceState *qdev) 407 { 408 SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev); 409 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 410 411 /* Shut down the request queue and TCEs if necessary */ 412 spapr_vio_quiesce_one(dev); 413 414 dev->signal_state = 0; 415 416 spapr_vio_set_bypass(dev, false); 417 if (pc->reset) { 418 pc->reset(dev); 419 } 420 } 421 422 /* 423 * The register property of a VIO device is defined in libvirt using 424 * 0x1000 as a base register number plus a 0x1000 increment. For the 425 * VIO tty device, the base number is changed to 0x30000000. QEMU uses 426 * a base register number of 0x71000000 and then a simple increment. 427 * 428 * The formula below tries to compute a unique index number from the 429 * register value that will be used to define the IRQ number of the 430 * VIO device. 431 * 432 * A maximum of 256 VIO devices is covered. Collisions are possible 433 * but they will be detected when the IRQ is claimed. 434 */ 435 static inline uint32_t spapr_vio_reg_to_irq(uint32_t reg) 436 { 437 uint32_t irq; 438 439 if (reg >= SPAPR_VIO_REG_BASE) { 440 /* 441 * VIO device register values when allocated by QEMU. For 442 * these, we simply mask the high bits to fit the overall 443 * range: [0x00 - 0xff]. 444 * 445 * The nvram VIO device (reg=0x71000000) is a static device of 446 * the pseries machine and so is always allocated by QEMU. Its 447 * IRQ number is 0x0. 448 */ 449 irq = reg & 0xff; 450 451 } else if (reg >= 0x30000000) { 452 /* 453 * VIO tty devices register values, when allocated by libvirt, 454 * are mapped in range [0xf0 - 0xff], gives us a maximum of 16 455 * vtys. 456 */ 457 irq = 0xf0 | ((reg >> 12) & 0xf); 458 459 } else { 460 /* 461 * Other VIO devices register values, when allocated by 462 * libvirt, should be mapped in range [0x00 - 0xef]. Conflicts 463 * will be detected when IRQ is claimed. 464 */ 465 irq = (reg >> 12) & 0xff; 466 } 467 468 return SPAPR_IRQ_VIO | irq; 469 } 470 471 static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp) 472 { 473 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); 474 SpaprVioDevice *dev = (SpaprVioDevice *)qdev; 475 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 476 char *id; 477 478 if (dev->reg != -1) { 479 /* 480 * Explicitly assigned address, just verify that no-one else 481 * is using it. other mechanism). We have to open code this 482 * rather than using spapr_vio_find_by_reg() because sdev 483 * itself is already in the list. 484 */ 485 SpaprVioDevice *other = reg_conflict(dev); 486 487 if (other) { 488 error_setg(errp, "%s and %s devices conflict at address %#x", 489 object_get_typename(OBJECT(qdev)), 490 object_get_typename(OBJECT(&other->qdev)), 491 dev->reg); 492 return; 493 } 494 } else { 495 /* Need to assign an address */ 496 SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus); 497 498 do { 499 dev->reg = bus->next_reg++; 500 } while (reg_conflict(dev)); 501 } 502 503 /* Don't overwrite ids assigned on the command line */ 504 if (!dev->qdev.id) { 505 id = spapr_vio_get_dev_name(DEVICE(dev)); 506 dev->qdev.id = id; 507 } 508 509 dev->irq = spapr_vio_reg_to_irq(dev->reg); 510 511 if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { 512 int irq = spapr_irq_findone(spapr, errp); 513 514 if (irq < 0) { 515 return; 516 } 517 dev->irq = irq; 518 } 519 520 if (spapr_irq_claim(spapr, dev->irq, false, errp) < 0) { 521 return; 522 } 523 524 if (pc->rtce_window_size) { 525 uint32_t liobn = SPAPR_VIO_LIOBN(dev->reg); 526 527 memory_region_init(&dev->mrroot, OBJECT(dev), "iommu-spapr-root", 528 ram_size); 529 memory_region_init_alias(&dev->mrbypass, OBJECT(dev), 530 "iommu-spapr-bypass", get_system_memory(), 531 0, ram_size); 532 memory_region_add_subregion_overlap(&dev->mrroot, 0, &dev->mrbypass, 1); 533 address_space_init(&dev->as, &dev->mrroot, qdev->id); 534 535 dev->tcet = spapr_tce_new_table(qdev, liobn); 536 spapr_tce_table_enable(dev->tcet, SPAPR_TCE_PAGE_SHIFT, 0, 537 pc->rtce_window_size >> SPAPR_TCE_PAGE_SHIFT); 538 dev->tcet->vdev = dev; 539 memory_region_add_subregion_overlap(&dev->mrroot, 0, 540 spapr_tce_get_iommu(dev->tcet), 2); 541 } 542 543 pc->realize(dev, errp); 544 } 545 546 static target_ulong h_vio_signal(PowerPCCPU *cpu, SpaprMachineState *spapr, 547 target_ulong opcode, 548 target_ulong *args) 549 { 550 target_ulong reg = args[0]; 551 target_ulong mode = args[1]; 552 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); 553 SpaprVioDeviceClass *pc; 554 555 if (!dev) { 556 return H_PARAMETER; 557 } 558 559 pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 560 561 if (mode & ~pc->signal_mask) { 562 return H_PARAMETER; 563 } 564 565 dev->signal_state = mode; 566 567 return H_SUCCESS; 568 } 569 570 SpaprVioBus *spapr_vio_bus_init(void) 571 { 572 SpaprVioBus *bus; 573 BusState *qbus; 574 DeviceState *dev; 575 576 /* Create bridge device */ 577 dev = qdev_new(TYPE_SPAPR_VIO_BRIDGE); 578 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 579 580 /* Create bus on bridge device */ 581 qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); 582 bus = SPAPR_VIO_BUS(qbus); 583 bus->next_reg = SPAPR_VIO_REG_BASE; 584 585 /* hcall-vio */ 586 spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal); 587 588 /* hcall-crq */ 589 spapr_register_hypercall(H_REG_CRQ, h_reg_crq); 590 spapr_register_hypercall(H_FREE_CRQ, h_free_crq); 591 spapr_register_hypercall(H_SEND_CRQ, h_send_crq); 592 spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq); 593 594 /* RTAS calls */ 595 spapr_rtas_register(RTAS_IBM_SET_TCE_BYPASS, "ibm,set-tce-bypass", 596 rtas_set_tce_bypass); 597 spapr_rtas_register(RTAS_QUIESCE, "quiesce", rtas_quiesce); 598 599 return bus; 600 } 601 602 static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data) 603 { 604 DeviceClass *dc = DEVICE_CLASS(klass); 605 606 dc->fw_name = "vdevice"; 607 } 608 609 static const TypeInfo spapr_vio_bridge_info = { 610 .name = TYPE_SPAPR_VIO_BRIDGE, 611 .parent = TYPE_SYS_BUS_DEVICE, 612 .class_init = spapr_vio_bridge_class_init, 613 }; 614 615 const VMStateDescription vmstate_spapr_vio = { 616 .name = "spapr_vio", 617 .version_id = 1, 618 .minimum_version_id = 1, 619 .fields = (VMStateField[]) { 620 /* Sanity check */ 621 VMSTATE_UINT32_EQUAL(reg, SpaprVioDevice, NULL), 622 VMSTATE_UINT32_EQUAL(irq, SpaprVioDevice, NULL), 623 624 /* General VIO device state */ 625 VMSTATE_UINT64(signal_state, SpaprVioDevice), 626 VMSTATE_UINT64(crq.qladdr, SpaprVioDevice), 627 VMSTATE_UINT32(crq.qsize, SpaprVioDevice), 628 VMSTATE_UINT32(crq.qnext, SpaprVioDevice), 629 630 VMSTATE_END_OF_LIST() 631 }, 632 }; 633 634 static void vio_spapr_device_class_init(ObjectClass *klass, void *data) 635 { 636 DeviceClass *k = DEVICE_CLASS(klass); 637 k->realize = spapr_vio_busdev_realize; 638 k->reset = spapr_vio_busdev_reset; 639 k->bus_type = TYPE_SPAPR_VIO_BUS; 640 } 641 642 static const TypeInfo spapr_vio_type_info = { 643 .name = TYPE_VIO_SPAPR_DEVICE, 644 .parent = TYPE_DEVICE, 645 .instance_size = sizeof(SpaprVioDevice), 646 .abstract = true, 647 .class_size = sizeof(SpaprVioDeviceClass), 648 .class_init = vio_spapr_device_class_init, 649 }; 650 651 static void spapr_vio_register_types(void) 652 { 653 type_register_static(&spapr_vio_bus_info); 654 type_register_static(&spapr_vio_bridge_info); 655 type_register_static(&spapr_vio_type_info); 656 } 657 658 type_init(spapr_vio_register_types) 659 660 static int compare_reg(const void *p1, const void *p2) 661 { 662 SpaprVioDevice const *dev1, *dev2; 663 664 dev1 = (SpaprVioDevice *)*(DeviceState **)p1; 665 dev2 = (SpaprVioDevice *)*(DeviceState **)p2; 666 667 if (dev1->reg < dev2->reg) { 668 return -1; 669 } 670 if (dev1->reg == dev2->reg) { 671 return 0; 672 } 673 674 /* dev1->reg > dev2->reg */ 675 return 1; 676 } 677 678 void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt) 679 { 680 DeviceState *qdev, **qdevs; 681 BusChild *kid; 682 int i, num, ret = 0; 683 int node; 684 685 _FDT(node = fdt_add_subnode(fdt, 0, "vdevice")); 686 687 _FDT(fdt_setprop_string(fdt, node, "device_type", "vdevice")); 688 _FDT(fdt_setprop_string(fdt, node, "compatible", "IBM,vdevice")); 689 _FDT(fdt_setprop_cell(fdt, node, "#address-cells", 1)); 690 _FDT(fdt_setprop_cell(fdt, node, "#size-cells", 0)); 691 _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2)); 692 _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0)); 693 694 /* Count qdevs on the bus list */ 695 num = 0; 696 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { 697 num++; 698 } 699 700 /* Copy out into an array of pointers */ 701 qdevs = g_new(DeviceState *, num); 702 num = 0; 703 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { 704 qdevs[num++] = kid->child; 705 } 706 707 /* Sort the array */ 708 qsort(qdevs, num, sizeof(qdev), compare_reg); 709 710 /* Hack alert. Give the devices to libfdt in reverse order, we happen 711 * to know that will mean they are in forward order in the tree. */ 712 for (i = num - 1; i >= 0; i--) { 713 SpaprVioDevice *dev = (SpaprVioDevice *)(qdevs[i]); 714 SpaprVioDeviceClass *vdc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 715 716 ret = vio_make_devnode(dev, fdt); 717 if (ret < 0) { 718 error_report("Couldn't create device node /vdevice/%s@%"PRIx32, 719 vdc->dt_name, dev->reg); 720 exit(1); 721 } 722 } 723 724 g_free(qdevs); 725 } 726 727 gchar *spapr_vio_stdout_path(SpaprVioBus *bus) 728 { 729 SpaprVioDevice *dev; 730 char *name, *path; 731 732 dev = spapr_vty_get_default(bus); 733 if (!dev) { 734 return NULL; 735 } 736 737 name = spapr_vio_get_dev_name(DEVICE(dev)); 738 path = g_strdup_printf("/vdevice/%s", name); 739 740 g_free(name); 741 return path; 742 } 743