1 /* 2 * QEMU sPAPR VIO code 3 * 4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com> 5 * Based on the s390 virtio bus code: 6 * Copyright (c) 2009 Alexander Graf <agraf@suse.de> 7 * 8 * This library is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU Lesser General Public 10 * License as published by the Free Software Foundation; either 11 * version 2 of the License, or (at your option) any later version. 12 * 13 * This library is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * Lesser General Public License for more details. 17 * 18 * You should have received a copy of the GNU Lesser General Public 19 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "qemu/error-report.h" 24 #include "qapi/error.h" 25 #include "qapi/visitor.h" 26 #include "hw/irq.h" 27 #include "qemu/log.h" 28 #include "hw/loader.h" 29 #include "elf.h" 30 #include "hw/sysbus.h" 31 #include "sysemu/kvm.h" 32 #include "sysemu/device_tree.h" 33 #include "kvm_ppc.h" 34 #include "migration/vmstate.h" 35 #include "sysemu/qtest.h" 36 37 #include "hw/ppc/spapr.h" 38 #include "hw/ppc/spapr_vio.h" 39 #include "hw/ppc/fdt.h" 40 #include "trace.h" 41 42 #include <libfdt.h> 43 44 #define SPAPR_VIO_REG_BASE 0x71000000 45 46 static char *spapr_vio_get_dev_name(DeviceState *qdev) 47 { 48 SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev); 49 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 50 51 /* Device tree style name device@reg */ 52 return g_strdup_printf("%s@%x", pc->dt_name, dev->reg); 53 } 54 55 static void spapr_vio_bus_class_init(ObjectClass *klass, void *data) 56 { 57 BusClass *k = BUS_CLASS(klass); 58 59 k->get_dev_path = spapr_vio_get_dev_name; 60 k->get_fw_dev_path = spapr_vio_get_dev_name; 61 } 62 63 static const TypeInfo spapr_vio_bus_info = { 64 .name = TYPE_SPAPR_VIO_BUS, 65 .parent = TYPE_BUS, 66 .class_init = spapr_vio_bus_class_init, 67 .instance_size = sizeof(SpaprVioBus), 68 }; 69 70 SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg) 71 { 72 BusChild *kid; 73 SpaprVioDevice *dev = NULL; 74 75 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { 76 dev = (SpaprVioDevice *)kid->child; 77 if (dev->reg == reg) { 78 return dev; 79 } 80 } 81 82 return NULL; 83 } 84 85 static int vio_make_devnode(SpaprVioDevice *dev, 86 void *fdt) 87 { 88 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 89 int vdevice_off, node_off, ret; 90 char *dt_name; 91 92 vdevice_off = fdt_path_offset(fdt, "/vdevice"); 93 if (vdevice_off < 0) { 94 return vdevice_off; 95 } 96 97 dt_name = spapr_vio_get_dev_name(DEVICE(dev)); 98 node_off = fdt_add_subnode(fdt, vdevice_off, dt_name); 99 g_free(dt_name); 100 if (node_off < 0) { 101 return node_off; 102 } 103 104 ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg); 105 if (ret < 0) { 106 return ret; 107 } 108 109 if (pc->dt_type) { 110 ret = fdt_setprop_string(fdt, node_off, "device_type", 111 pc->dt_type); 112 if (ret < 0) { 113 return ret; 114 } 115 } 116 117 if (pc->dt_compatible) { 118 ret = fdt_setprop_string(fdt, node_off, "compatible", 119 pc->dt_compatible); 120 if (ret < 0) { 121 return ret; 122 } 123 } 124 125 if (dev->irq) { 126 uint32_t ints_prop[2]; 127 128 spapr_dt_irq(ints_prop, dev->irq, false); 129 ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop, 130 sizeof(ints_prop)); 131 if (ret < 0) { 132 return ret; 133 } 134 } 135 136 ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->tcet); 137 if (ret < 0) { 138 return ret; 139 } 140 141 if (pc->devnode) { 142 ret = (pc->devnode)(dev, fdt, node_off); 143 if (ret < 0) { 144 return ret; 145 } 146 } 147 148 return node_off; 149 } 150 151 /* 152 * CRQ handling 153 */ 154 static target_ulong h_reg_crq(PowerPCCPU *cpu, SpaprMachineState *spapr, 155 target_ulong opcode, target_ulong *args) 156 { 157 target_ulong reg = args[0]; 158 target_ulong queue_addr = args[1]; 159 target_ulong queue_len = args[2]; 160 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); 161 162 if (!dev) { 163 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); 164 return H_PARAMETER; 165 } 166 167 /* We can't grok a queue size bigger than 256M for now */ 168 if (queue_len < 0x1000 || queue_len > 0x10000000) { 169 hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx 170 ")\n", queue_len); 171 return H_PARAMETER; 172 } 173 174 /* Check queue alignment */ 175 if (queue_addr & 0xfff) { 176 hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr); 177 return H_PARAMETER; 178 } 179 180 /* Check if device supports CRQs */ 181 if (!dev->crq.SendFunc) { 182 hcall_dprintf("Device does not support CRQ\n"); 183 return H_NOT_FOUND; 184 } 185 186 /* Already a queue ? */ 187 if (dev->crq.qsize) { 188 hcall_dprintf("CRQ already registered\n"); 189 return H_RESOURCE; 190 } 191 dev->crq.qladdr = queue_addr; 192 dev->crq.qsize = queue_len; 193 dev->crq.qnext = 0; 194 195 trace_spapr_vio_h_reg_crq(reg, queue_addr, queue_len); 196 return H_SUCCESS; 197 } 198 199 static target_ulong free_crq(SpaprVioDevice *dev) 200 { 201 dev->crq.qladdr = 0; 202 dev->crq.qsize = 0; 203 dev->crq.qnext = 0; 204 205 trace_spapr_vio_free_crq(dev->reg); 206 207 return H_SUCCESS; 208 } 209 210 static target_ulong h_free_crq(PowerPCCPU *cpu, SpaprMachineState *spapr, 211 target_ulong opcode, target_ulong *args) 212 { 213 target_ulong reg = args[0]; 214 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); 215 216 if (!dev) { 217 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); 218 return H_PARAMETER; 219 } 220 221 return free_crq(dev); 222 } 223 224 static target_ulong h_send_crq(PowerPCCPU *cpu, SpaprMachineState *spapr, 225 target_ulong opcode, target_ulong *args) 226 { 227 target_ulong reg = args[0]; 228 target_ulong msg_hi = args[1]; 229 target_ulong msg_lo = args[2]; 230 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); 231 uint64_t crq_mangle[2]; 232 233 if (!dev) { 234 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); 235 return H_PARAMETER; 236 } 237 crq_mangle[0] = cpu_to_be64(msg_hi); 238 crq_mangle[1] = cpu_to_be64(msg_lo); 239 240 if (dev->crq.SendFunc) { 241 return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle); 242 } 243 244 return H_HARDWARE; 245 } 246 247 static target_ulong h_enable_crq(PowerPCCPU *cpu, SpaprMachineState *spapr, 248 target_ulong opcode, target_ulong *args) 249 { 250 target_ulong reg = args[0]; 251 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); 252 253 if (!dev) { 254 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg); 255 return H_PARAMETER; 256 } 257 258 return 0; 259 } 260 261 /* Returns negative error, 0 success, or positive: queue full */ 262 int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq) 263 { 264 int rc; 265 uint8_t byte; 266 267 if (!dev->crq.qsize) { 268 error_report("spapr_vio_send_creq on uninitialized queue"); 269 return -1; 270 } 271 272 /* Maybe do a fast path for KVM just writing to the pages */ 273 rc = spapr_vio_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1); 274 if (rc) { 275 return rc; 276 } 277 if (byte != 0) { 278 return 1; 279 } 280 281 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8, 282 &crq[8], 8); 283 if (rc) { 284 return rc; 285 } 286 287 kvmppc_eieio(); 288 289 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8); 290 if (rc) { 291 return rc; 292 } 293 294 dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize; 295 296 if (dev->signal_state & 1) { 297 qemu_irq_pulse(spapr_vio_qirq(dev)); 298 } 299 300 return 0; 301 } 302 303 /* "quiesce" handling */ 304 305 static void spapr_vio_quiesce_one(SpaprVioDevice *dev) 306 { 307 if (dev->tcet) { 308 device_reset(DEVICE(dev->tcet)); 309 } 310 free_crq(dev); 311 } 312 313 void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass) 314 { 315 if (!dev->tcet) { 316 return; 317 } 318 319 memory_region_set_enabled(&dev->mrbypass, bypass); 320 memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass); 321 322 dev->tcet->bypass = bypass; 323 } 324 325 static void rtas_set_tce_bypass(PowerPCCPU *cpu, SpaprMachineState *spapr, 326 uint32_t token, 327 uint32_t nargs, target_ulong args, 328 uint32_t nret, target_ulong rets) 329 { 330 SpaprVioBus *bus = spapr->vio_bus; 331 SpaprVioDevice *dev; 332 uint32_t unit, enable; 333 334 if (nargs != 2) { 335 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 336 return; 337 } 338 unit = rtas_ld(args, 0); 339 enable = rtas_ld(args, 1); 340 dev = spapr_vio_find_by_reg(bus, unit); 341 if (!dev) { 342 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 343 return; 344 } 345 346 if (!dev->tcet) { 347 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 348 return; 349 } 350 351 spapr_vio_set_bypass(dev, !!enable); 352 353 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 354 } 355 356 static void rtas_quiesce(PowerPCCPU *cpu, SpaprMachineState *spapr, 357 uint32_t token, 358 uint32_t nargs, target_ulong args, 359 uint32_t nret, target_ulong rets) 360 { 361 SpaprVioBus *bus = spapr->vio_bus; 362 BusChild *kid; 363 SpaprVioDevice *dev = NULL; 364 365 if (nargs != 0) { 366 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 367 return; 368 } 369 370 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { 371 dev = (SpaprVioDevice *)kid->child; 372 spapr_vio_quiesce_one(dev); 373 } 374 375 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 376 } 377 378 static SpaprVioDevice *reg_conflict(SpaprVioDevice *dev) 379 { 380 SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus); 381 BusChild *kid; 382 SpaprVioDevice *other; 383 384 /* 385 * Check for a device other than the given one which is already 386 * using the requested address. We have to open code this because 387 * the given dev might already be in the list. 388 */ 389 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { 390 other = VIO_SPAPR_DEVICE(kid->child); 391 392 if (other != dev && other->reg == dev->reg) { 393 return other; 394 } 395 } 396 397 return 0; 398 } 399 400 static void spapr_vio_busdev_reset(DeviceState *qdev) 401 { 402 SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev); 403 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 404 405 /* Shut down the request queue and TCEs if necessary */ 406 spapr_vio_quiesce_one(dev); 407 408 dev->signal_state = 0; 409 410 spapr_vio_set_bypass(dev, false); 411 if (pc->reset) { 412 pc->reset(dev); 413 } 414 } 415 416 /* 417 * The register property of a VIO device is defined in livirt using 418 * 0x1000 as a base register number plus a 0x1000 increment. For the 419 * VIO tty device, the base number is changed to 0x30000000. QEMU uses 420 * a base register number of 0x71000000 and then a simple increment. 421 * 422 * The formula below tries to compute a unique index number from the 423 * register value that will be used to define the IRQ number of the 424 * VIO device. 425 * 426 * A maximum of 256 VIO devices is covered. Collisions are possible 427 * but they will be detected when the IRQ is claimed. 428 */ 429 static inline uint32_t spapr_vio_reg_to_irq(uint32_t reg) 430 { 431 uint32_t irq; 432 433 if (reg >= SPAPR_VIO_REG_BASE) { 434 /* 435 * VIO device register values when allocated by QEMU. For 436 * these, we simply mask the high bits to fit the overall 437 * range: [0x00 - 0xff]. 438 * 439 * The nvram VIO device (reg=0x71000000) is a static device of 440 * the pseries machine and so is always allocated by QEMU. Its 441 * IRQ number is 0x0. 442 */ 443 irq = reg & 0xff; 444 445 } else if (reg >= 0x30000000) { 446 /* 447 * VIO tty devices register values, when allocated by livirt, 448 * are mapped in range [0xf0 - 0xff], gives us a maximum of 16 449 * vtys. 450 */ 451 irq = 0xf0 | ((reg >> 12) & 0xf); 452 453 } else { 454 /* 455 * Other VIO devices register values, when allocated by 456 * livirt, should be mapped in range [0x00 - 0xef]. Conflicts 457 * will be detected when IRQ is claimed. 458 */ 459 irq = (reg >> 12) & 0xff; 460 } 461 462 return SPAPR_IRQ_VIO | irq; 463 } 464 465 static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp) 466 { 467 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); 468 SpaprVioDevice *dev = (SpaprVioDevice *)qdev; 469 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 470 char *id; 471 Error *local_err = NULL; 472 473 if (dev->reg != -1) { 474 /* 475 * Explicitly assigned address, just verify that no-one else 476 * is using it. other mechanism). We have to open code this 477 * rather than using spapr_vio_find_by_reg() because sdev 478 * itself is already in the list. 479 */ 480 SpaprVioDevice *other = reg_conflict(dev); 481 482 if (other) { 483 error_setg(errp, "%s and %s devices conflict at address %#x", 484 object_get_typename(OBJECT(qdev)), 485 object_get_typename(OBJECT(&other->qdev)), 486 dev->reg); 487 return; 488 } 489 } else { 490 /* Need to assign an address */ 491 SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus); 492 493 do { 494 dev->reg = bus->next_reg++; 495 } while (reg_conflict(dev)); 496 } 497 498 /* Don't overwrite ids assigned on the command line */ 499 if (!dev->qdev.id) { 500 id = spapr_vio_get_dev_name(DEVICE(dev)); 501 dev->qdev.id = id; 502 } 503 504 dev->irq = spapr_vio_reg_to_irq(dev->reg); 505 506 if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { 507 dev->irq = spapr_irq_findone(spapr, &local_err); 508 if (local_err) { 509 error_propagate(errp, local_err); 510 return; 511 } 512 } 513 514 spapr_irq_claim(spapr, dev->irq, false, &local_err); 515 if (local_err) { 516 error_propagate(errp, local_err); 517 return; 518 } 519 520 if (pc->rtce_window_size) { 521 uint32_t liobn = SPAPR_VIO_LIOBN(dev->reg); 522 523 memory_region_init(&dev->mrroot, OBJECT(dev), "iommu-spapr-root", 524 ram_size); 525 memory_region_init_alias(&dev->mrbypass, OBJECT(dev), 526 "iommu-spapr-bypass", get_system_memory(), 527 0, ram_size); 528 memory_region_add_subregion_overlap(&dev->mrroot, 0, &dev->mrbypass, 1); 529 address_space_init(&dev->as, &dev->mrroot, qdev->id); 530 531 dev->tcet = spapr_tce_new_table(qdev, liobn); 532 spapr_tce_table_enable(dev->tcet, SPAPR_TCE_PAGE_SHIFT, 0, 533 pc->rtce_window_size >> SPAPR_TCE_PAGE_SHIFT); 534 dev->tcet->vdev = dev; 535 memory_region_add_subregion_overlap(&dev->mrroot, 0, 536 spapr_tce_get_iommu(dev->tcet), 2); 537 } 538 539 pc->realize(dev, errp); 540 } 541 542 static target_ulong h_vio_signal(PowerPCCPU *cpu, SpaprMachineState *spapr, 543 target_ulong opcode, 544 target_ulong *args) 545 { 546 target_ulong reg = args[0]; 547 target_ulong mode = args[1]; 548 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg); 549 SpaprVioDeviceClass *pc; 550 551 if (!dev) { 552 return H_PARAMETER; 553 } 554 555 pc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 556 557 if (mode & ~pc->signal_mask) { 558 return H_PARAMETER; 559 } 560 561 dev->signal_state = mode; 562 563 return H_SUCCESS; 564 } 565 566 SpaprVioBus *spapr_vio_bus_init(void) 567 { 568 SpaprVioBus *bus; 569 BusState *qbus; 570 DeviceState *dev; 571 572 /* Create bridge device */ 573 dev = qdev_create(NULL, TYPE_SPAPR_VIO_BRIDGE); 574 qdev_init_nofail(dev); 575 576 /* Create bus on bridge device */ 577 qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); 578 bus = SPAPR_VIO_BUS(qbus); 579 bus->next_reg = SPAPR_VIO_REG_BASE; 580 581 /* hcall-vio */ 582 spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal); 583 584 /* hcall-crq */ 585 spapr_register_hypercall(H_REG_CRQ, h_reg_crq); 586 spapr_register_hypercall(H_FREE_CRQ, h_free_crq); 587 spapr_register_hypercall(H_SEND_CRQ, h_send_crq); 588 spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq); 589 590 /* RTAS calls */ 591 spapr_rtas_register(RTAS_IBM_SET_TCE_BYPASS, "ibm,set-tce-bypass", 592 rtas_set_tce_bypass); 593 spapr_rtas_register(RTAS_QUIESCE, "quiesce", rtas_quiesce); 594 595 return bus; 596 } 597 598 static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data) 599 { 600 DeviceClass *dc = DEVICE_CLASS(klass); 601 602 dc->fw_name = "vdevice"; 603 } 604 605 static const TypeInfo spapr_vio_bridge_info = { 606 .name = TYPE_SPAPR_VIO_BRIDGE, 607 .parent = TYPE_SYS_BUS_DEVICE, 608 .class_init = spapr_vio_bridge_class_init, 609 }; 610 611 const VMStateDescription vmstate_spapr_vio = { 612 .name = "spapr_vio", 613 .version_id = 1, 614 .minimum_version_id = 1, 615 .fields = (VMStateField[]) { 616 /* Sanity check */ 617 VMSTATE_UINT32_EQUAL(reg, SpaprVioDevice, NULL), 618 VMSTATE_UINT32_EQUAL(irq, SpaprVioDevice, NULL), 619 620 /* General VIO device state */ 621 VMSTATE_UINT64(signal_state, SpaprVioDevice), 622 VMSTATE_UINT64(crq.qladdr, SpaprVioDevice), 623 VMSTATE_UINT32(crq.qsize, SpaprVioDevice), 624 VMSTATE_UINT32(crq.qnext, SpaprVioDevice), 625 626 VMSTATE_END_OF_LIST() 627 }, 628 }; 629 630 static void vio_spapr_device_class_init(ObjectClass *klass, void *data) 631 { 632 DeviceClass *k = DEVICE_CLASS(klass); 633 k->realize = spapr_vio_busdev_realize; 634 k->reset = spapr_vio_busdev_reset; 635 k->bus_type = TYPE_SPAPR_VIO_BUS; 636 } 637 638 static const TypeInfo spapr_vio_type_info = { 639 .name = TYPE_VIO_SPAPR_DEVICE, 640 .parent = TYPE_DEVICE, 641 .instance_size = sizeof(SpaprVioDevice), 642 .abstract = true, 643 .class_size = sizeof(SpaprVioDeviceClass), 644 .class_init = vio_spapr_device_class_init, 645 }; 646 647 static void spapr_vio_register_types(void) 648 { 649 type_register_static(&spapr_vio_bus_info); 650 type_register_static(&spapr_vio_bridge_info); 651 type_register_static(&spapr_vio_type_info); 652 } 653 654 type_init(spapr_vio_register_types) 655 656 static int compare_reg(const void *p1, const void *p2) 657 { 658 SpaprVioDevice const *dev1, *dev2; 659 660 dev1 = (SpaprVioDevice *)*(DeviceState **)p1; 661 dev2 = (SpaprVioDevice *)*(DeviceState **)p2; 662 663 if (dev1->reg < dev2->reg) { 664 return -1; 665 } 666 if (dev1->reg == dev2->reg) { 667 return 0; 668 } 669 670 /* dev1->reg > dev2->reg */ 671 return 1; 672 } 673 674 void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt) 675 { 676 DeviceState *qdev, **qdevs; 677 BusChild *kid; 678 int i, num, ret = 0; 679 int node; 680 681 _FDT(node = fdt_add_subnode(fdt, 0, "vdevice")); 682 683 _FDT(fdt_setprop_string(fdt, node, "device_type", "vdevice")); 684 _FDT(fdt_setprop_string(fdt, node, "compatible", "IBM,vdevice")); 685 _FDT(fdt_setprop_cell(fdt, node, "#address-cells", 1)); 686 _FDT(fdt_setprop_cell(fdt, node, "#size-cells", 0)); 687 _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2)); 688 _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0)); 689 690 /* Count qdevs on the bus list */ 691 num = 0; 692 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { 693 num++; 694 } 695 696 /* Copy out into an array of pointers */ 697 qdevs = g_new(DeviceState *, num); 698 num = 0; 699 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) { 700 qdevs[num++] = kid->child; 701 } 702 703 /* Sort the array */ 704 qsort(qdevs, num, sizeof(qdev), compare_reg); 705 706 /* Hack alert. Give the devices to libfdt in reverse order, we happen 707 * to know that will mean they are in forward order in the tree. */ 708 for (i = num - 1; i >= 0; i--) { 709 SpaprVioDevice *dev = (SpaprVioDevice *)(qdevs[i]); 710 SpaprVioDeviceClass *vdc = VIO_SPAPR_DEVICE_GET_CLASS(dev); 711 712 ret = vio_make_devnode(dev, fdt); 713 if (ret < 0) { 714 error_report("Couldn't create device node /vdevice/%s@%"PRIx32, 715 vdc->dt_name, dev->reg); 716 exit(1); 717 } 718 } 719 720 g_free(qdevs); 721 } 722 723 gchar *spapr_vio_stdout_path(SpaprVioBus *bus) 724 { 725 SpaprVioDevice *dev; 726 char *name, *path; 727 728 dev = spapr_vty_get_default(bus); 729 if (!dev) { 730 return NULL; 731 } 732 733 name = spapr_vio_get_dev_name(DEVICE(dev)); 734 path = g_strdup_printf("/vdevice/%s", name); 735 736 g_free(name); 737 return path; 738 } 739