1 /* 2 * QEMU sPAPR Dynamic DMA windows support 3 * 4 * Copyright (c) 2015 Alexey Kardashevskiy, IBM Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, 9 * or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu/error-report.h" 22 #include "qemu/module.h" 23 #include "hw/ppc/spapr.h" 24 #include "hw/pci-host/spapr.h" 25 #include "trace.h" 26 27 static int spapr_phb_get_active_win_num_cb(Object *child, void *opaque) 28 { 29 SpaprTceTable *tcet; 30 31 tcet = (SpaprTceTable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE); 32 if (tcet && tcet->nb_table) { 33 ++*(unsigned *)opaque; 34 } 35 return 0; 36 } 37 38 static unsigned spapr_phb_get_active_win_num(SpaprPhbState *sphb) 39 { 40 unsigned ret = 0; 41 42 object_child_foreach(OBJECT(sphb), spapr_phb_get_active_win_num_cb, &ret); 43 44 return ret; 45 } 46 47 static int spapr_phb_get_free_liobn_cb(Object *child, void *opaque) 48 { 49 SpaprTceTable *tcet; 50 51 tcet = (SpaprTceTable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE); 52 if (tcet && !tcet->nb_table) { 53 *(uint32_t *)opaque = tcet->liobn; 54 return 1; 55 } 56 return 0; 57 } 58 59 static unsigned spapr_phb_get_free_liobn(SpaprPhbState *sphb) 60 { 61 uint32_t liobn = 0; 62 63 object_child_foreach(OBJECT(sphb), spapr_phb_get_free_liobn_cb, &liobn); 64 65 return liobn; 66 } 67 68 static uint32_t spapr_page_mask_to_query_mask(uint64_t page_mask) 69 { 70 int i; 71 uint32_t mask = 0; 72 const struct { int shift; uint32_t mask; } masks[] = { 73 { 12, RTAS_DDW_PGSIZE_4K }, 74 { 16, RTAS_DDW_PGSIZE_64K }, 75 { 21, RTAS_DDW_PGSIZE_2M }, 76 { 24, RTAS_DDW_PGSIZE_16M }, 77 { 25, RTAS_DDW_PGSIZE_32M }, 78 { 26, RTAS_DDW_PGSIZE_64M }, 79 { 27, RTAS_DDW_PGSIZE_128M }, 80 { 28, RTAS_DDW_PGSIZE_256M }, 81 { 34, RTAS_DDW_PGSIZE_16G }, 82 }; 83 84 for (i = 0; i < ARRAY_SIZE(masks); ++i) { 85 if (page_mask & (1ULL << masks[i].shift)) { 86 mask |= masks[i].mask; 87 } 88 } 89 90 return mask; 91 } 92 93 static void rtas_ibm_query_pe_dma_window(PowerPCCPU *cpu, 94 SpaprMachineState *spapr, 95 uint32_t token, uint32_t nargs, 96 target_ulong args, 97 uint32_t nret, target_ulong rets) 98 { 99 SpaprPhbState *sphb; 100 uint64_t buid; 101 uint32_t avail, addr, pgmask = 0; 102 103 if ((nargs != 3) || ((nret != 5) && (nret != 6))) { 104 goto param_error_exit; 105 } 106 107 buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2); 108 addr = rtas_ld(args, 0); 109 sphb = spapr_pci_find_phb(spapr, buid); 110 if (!sphb || !sphb->ddw_enabled) { 111 goto param_error_exit; 112 } 113 114 /* Translate page mask to LoPAPR format */ 115 pgmask = spapr_page_mask_to_query_mask(sphb->page_size_mask); 116 117 avail = SPAPR_PCI_DMA_MAX_WINDOWS - spapr_phb_get_active_win_num(sphb); 118 119 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 120 rtas_st(rets, 1, avail); 121 if (nret == 6) { 122 /* 123 * Set the Max TCE number as 1<<(58-21) = 0x20.0000.0000 124 * 1<<59 is the huge window start and 21 is 2M page shift. 125 */ 126 rtas_st(rets, 2, 0x00000020); 127 rtas_st(rets, 3, 0x00000000); 128 rtas_st(rets, 4, pgmask); 129 rtas_st(rets, 5, 0); /* DMA migration mask, not supported */ 130 } else { 131 rtas_st(rets, 2, 0x80000000); 132 rtas_st(rets, 3, pgmask); 133 rtas_st(rets, 4, 0); /* DMA migration mask, not supported */ 134 } 135 136 trace_spapr_iommu_ddw_query(buid, addr, avail, 0x80000000, pgmask); 137 return; 138 139 param_error_exit: 140 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 141 } 142 143 static void rtas_ibm_create_pe_dma_window(PowerPCCPU *cpu, 144 SpaprMachineState *spapr, 145 uint32_t token, uint32_t nargs, 146 target_ulong args, 147 uint32_t nret, target_ulong rets) 148 { 149 SpaprPhbState *sphb; 150 SpaprTceTable *tcet = NULL; 151 uint32_t addr, page_shift, window_shift, liobn; 152 uint64_t buid, win_addr; 153 int windows; 154 155 if ((nargs != 5) || (nret != 4)) { 156 goto param_error_exit; 157 } 158 159 buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2); 160 addr = rtas_ld(args, 0); 161 sphb = spapr_pci_find_phb(spapr, buid); 162 if (!sphb || !sphb->ddw_enabled) { 163 goto param_error_exit; 164 } 165 166 page_shift = rtas_ld(args, 3); 167 window_shift = rtas_ld(args, 4); 168 liobn = spapr_phb_get_free_liobn(sphb); 169 windows = spapr_phb_get_active_win_num(sphb); 170 171 if (!(sphb->page_size_mask & (1ULL << page_shift)) || 172 (window_shift < page_shift)) { 173 goto param_error_exit; 174 } 175 176 if (!liobn || !sphb->ddw_enabled || windows == SPAPR_PCI_DMA_MAX_WINDOWS) { 177 goto hw_error_exit; 178 } 179 180 tcet = spapr_tce_find_by_liobn(liobn); 181 if (!tcet) { 182 goto hw_error_exit; 183 } 184 185 win_addr = (windows == 0) ? sphb->dma_win_addr : sphb->dma64_win_addr; 186 /* 187 * We have just created a window, we know for the fact that it is empty, 188 * use a hack to avoid iterating over the table as it is quite possible 189 * to have billions of TCEs, all empty. 190 * Note that we cannot delay this to the first H_PUT_TCE as this hcall is 191 * mostly likely to be handled in KVM so QEMU just does not know if it 192 * happened. 193 */ 194 tcet->skipping_replay = true; 195 spapr_tce_table_enable(tcet, page_shift, win_addr, 196 1ULL << (window_shift - page_shift)); 197 tcet->skipping_replay = false; 198 if (!tcet->nb_table) { 199 goto hw_error_exit; 200 } 201 202 trace_spapr_iommu_ddw_create(buid, addr, 1ULL << page_shift, 203 1ULL << window_shift, tcet->bus_offset, liobn); 204 205 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 206 rtas_st(rets, 1, liobn); 207 rtas_st(rets, 2, tcet->bus_offset >> 32); 208 rtas_st(rets, 3, tcet->bus_offset & ((uint32_t) -1)); 209 210 return; 211 212 hw_error_exit: 213 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 214 return; 215 216 param_error_exit: 217 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 218 } 219 220 static void rtas_ibm_remove_pe_dma_window(PowerPCCPU *cpu, 221 SpaprMachineState *spapr, 222 uint32_t token, uint32_t nargs, 223 target_ulong args, 224 uint32_t nret, target_ulong rets) 225 { 226 SpaprPhbState *sphb; 227 SpaprTceTable *tcet; 228 uint32_t liobn; 229 bool def_win_removed; 230 231 if ((nargs != 1) || (nret != 1)) { 232 goto param_error_exit; 233 } 234 235 liobn = rtas_ld(args, 0); 236 tcet = spapr_tce_find_by_liobn(liobn); 237 if (!tcet) { 238 goto param_error_exit; 239 } 240 241 sphb = SPAPR_PCI_HOST_BRIDGE(OBJECT(tcet)->parent); 242 if (!sphb || !sphb->ddw_enabled || !tcet->nb_table) { 243 goto param_error_exit; 244 } 245 246 def_win_removed = tcet->def_win; 247 spapr_tce_table_disable(tcet); 248 trace_spapr_iommu_ddw_remove(liobn); 249 250 /* 251 * PAPR+/LoPAPR says: 252 * The platform must restore the default DMA window for the PE on a call 253 * to the ibm,remove-pe-dma-window RTAS call when all of the following 254 * are true: 255 * a. The call removes the last DMA window remaining for the PE. 256 * b. The DMA window being removed is not the default window 257 */ 258 if (spapr_phb_get_active_win_num(sphb) == 0 && !def_win_removed) { 259 spapr_phb_dma_reset(sphb); 260 trace_spapr_iommu_ddw_reset(sphb->buid, 0); 261 } 262 263 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 264 return; 265 266 param_error_exit: 267 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 268 } 269 270 static void rtas_ibm_reset_pe_dma_window(PowerPCCPU *cpu, 271 SpaprMachineState *spapr, 272 uint32_t token, uint32_t nargs, 273 target_ulong args, 274 uint32_t nret, target_ulong rets) 275 { 276 SpaprPhbState *sphb; 277 uint64_t buid; 278 uint32_t addr; 279 280 if ((nargs != 3) || (nret != 1)) { 281 goto param_error_exit; 282 } 283 284 buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2); 285 addr = rtas_ld(args, 0); 286 sphb = spapr_pci_find_phb(spapr, buid); 287 if (!sphb || !sphb->ddw_enabled) { 288 goto param_error_exit; 289 } 290 291 spapr_phb_dma_reset(sphb); 292 trace_spapr_iommu_ddw_reset(buid, addr); 293 294 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 295 296 return; 297 298 param_error_exit: 299 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 300 } 301 302 static void spapr_rtas_ddw_init(void) 303 { 304 spapr_rtas_register(RTAS_IBM_QUERY_PE_DMA_WINDOW, 305 "ibm,query-pe-dma-window", 306 rtas_ibm_query_pe_dma_window); 307 spapr_rtas_register(RTAS_IBM_CREATE_PE_DMA_WINDOW, 308 "ibm,create-pe-dma-window", 309 rtas_ibm_create_pe_dma_window); 310 spapr_rtas_register(RTAS_IBM_REMOVE_PE_DMA_WINDOW, 311 "ibm,remove-pe-dma-window", 312 rtas_ibm_remove_pe_dma_window); 313 spapr_rtas_register(RTAS_IBM_RESET_PE_DMA_WINDOW, 314 "ibm,reset-pe-dma-window", 315 rtas_ibm_reset_pe_dma_window); 316 } 317 318 type_init(spapr_rtas_ddw_init) 319