1 /* 2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 3 * 4 * Hypercall based emulated RTAS 5 * 6 * Copyright (c) 2010-2011 David Gibson, IBM Corporation. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * 26 */ 27 #include "qemu/osdep.h" 28 #include "cpu.h" 29 #include "qemu/log.h" 30 #include "qemu/error-report.h" 31 #include "sysemu/sysemu.h" 32 #include "sysemu/char.h" 33 #include "hw/qdev.h" 34 #include "sysemu/device_tree.h" 35 #include "sysemu/cpus.h" 36 #include "sysemu/kvm.h" 37 38 #include "hw/ppc/spapr.h" 39 #include "hw/ppc/spapr_vio.h" 40 #include "hw/ppc/ppc.h" 41 #include "qapi-event.h" 42 #include "hw/boards.h" 43 44 #include <libfdt.h> 45 #include "hw/ppc/spapr_drc.h" 46 #include "qemu/cutils.h" 47 48 /* #define DEBUG_SPAPR */ 49 50 #ifdef DEBUG_SPAPR 51 #define DPRINTF(fmt, ...) \ 52 do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) 53 #else 54 #define DPRINTF(fmt, ...) \ 55 do { } while (0) 56 #endif 57 58 static sPAPRConfigureConnectorState *spapr_ccs_find(sPAPRMachineState *spapr, 59 uint32_t drc_index) 60 { 61 sPAPRConfigureConnectorState *ccs = NULL; 62 63 QTAILQ_FOREACH(ccs, &spapr->ccs_list, next) { 64 if (ccs->drc_index == drc_index) { 65 break; 66 } 67 } 68 69 return ccs; 70 } 71 72 static void spapr_ccs_add(sPAPRMachineState *spapr, 73 sPAPRConfigureConnectorState *ccs) 74 { 75 g_assert(!spapr_ccs_find(spapr, ccs->drc_index)); 76 QTAILQ_INSERT_HEAD(&spapr->ccs_list, ccs, next); 77 } 78 79 static void spapr_ccs_remove(sPAPRMachineState *spapr, 80 sPAPRConfigureConnectorState *ccs) 81 { 82 QTAILQ_REMOVE(&spapr->ccs_list, ccs, next); 83 g_free(ccs); 84 } 85 86 void spapr_ccs_reset_hook(void *opaque) 87 { 88 sPAPRMachineState *spapr = opaque; 89 sPAPRConfigureConnectorState *ccs, *ccs_tmp; 90 91 QTAILQ_FOREACH_SAFE(ccs, &spapr->ccs_list, next, ccs_tmp) { 92 spapr_ccs_remove(spapr, ccs); 93 } 94 } 95 96 static void rtas_display_character(PowerPCCPU *cpu, sPAPRMachineState *spapr, 97 uint32_t token, uint32_t nargs, 98 target_ulong args, 99 uint32_t nret, target_ulong rets) 100 { 101 uint8_t c = rtas_ld(args, 0); 102 VIOsPAPRDevice *sdev = vty_lookup(spapr, 0); 103 104 if (!sdev) { 105 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 106 } else { 107 vty_putchars(sdev, &c, sizeof(c)); 108 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 109 } 110 } 111 112 static void rtas_power_off(PowerPCCPU *cpu, sPAPRMachineState *spapr, 113 uint32_t token, uint32_t nargs, target_ulong args, 114 uint32_t nret, target_ulong rets) 115 { 116 if (nargs != 2 || nret != 1) { 117 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 118 return; 119 } 120 qemu_system_shutdown_request(); 121 cpu_stop_current(); 122 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 123 } 124 125 static void rtas_system_reboot(PowerPCCPU *cpu, sPAPRMachineState *spapr, 126 uint32_t token, uint32_t nargs, 127 target_ulong args, 128 uint32_t nret, target_ulong rets) 129 { 130 if (nargs != 0 || nret != 1) { 131 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 132 return; 133 } 134 qemu_system_reset_request(); 135 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 136 } 137 138 static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_, 139 sPAPRMachineState *spapr, 140 uint32_t token, uint32_t nargs, 141 target_ulong args, 142 uint32_t nret, target_ulong rets) 143 { 144 target_ulong id; 145 PowerPCCPU *cpu; 146 147 if (nargs != 1 || nret != 2) { 148 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 149 return; 150 } 151 152 id = rtas_ld(args, 0); 153 cpu = ppc_get_vcpu_by_dt_id(id); 154 if (cpu != NULL) { 155 if (CPU(cpu)->halted) { 156 rtas_st(rets, 1, 0); 157 } else { 158 rtas_st(rets, 1, 2); 159 } 160 161 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 162 return; 163 } 164 165 /* Didn't find a matching cpu */ 166 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 167 } 168 169 /* 170 * Set the timebase offset of the CPU to that of first CPU. 171 * This helps hotplugged CPU to have the correct timebase offset. 172 */ 173 static void spapr_cpu_update_tb_offset(PowerPCCPU *cpu) 174 { 175 PowerPCCPU *fcpu = POWERPC_CPU(first_cpu); 176 177 cpu->env.tb_env->tb_offset = fcpu->env.tb_env->tb_offset; 178 } 179 180 static void spapr_cpu_set_endianness(PowerPCCPU *cpu) 181 { 182 PowerPCCPU *fcpu = POWERPC_CPU(first_cpu); 183 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(fcpu); 184 185 if (!pcc->interrupts_big_endian(fcpu)) { 186 cpu->env.spr[SPR_LPCR] |= LPCR_ILE; 187 } 188 } 189 190 static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMachineState *spapr, 191 uint32_t token, uint32_t nargs, 192 target_ulong args, 193 uint32_t nret, target_ulong rets) 194 { 195 target_ulong id, start, r3; 196 PowerPCCPU *cpu; 197 198 if (nargs != 3 || nret != 1) { 199 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 200 return; 201 } 202 203 id = rtas_ld(args, 0); 204 start = rtas_ld(args, 1); 205 r3 = rtas_ld(args, 2); 206 207 cpu = ppc_get_vcpu_by_dt_id(id); 208 if (cpu != NULL) { 209 CPUState *cs = CPU(cpu); 210 CPUPPCState *env = &cpu->env; 211 212 if (!cs->halted) { 213 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 214 return; 215 } 216 217 /* This will make sure qemu state is up to date with kvm, and 218 * mark it dirty so our changes get flushed back before the 219 * new cpu enters */ 220 kvm_cpu_synchronize_state(cs); 221 222 env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME); 223 env->nip = start; 224 env->gpr[3] = r3; 225 cs->halted = 0; 226 spapr_cpu_set_endianness(cpu); 227 spapr_cpu_update_tb_offset(cpu); 228 229 qemu_cpu_kick(cs); 230 231 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 232 return; 233 } 234 235 /* Didn't find a matching cpu */ 236 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 237 } 238 239 static void rtas_stop_self(PowerPCCPU *cpu, sPAPRMachineState *spapr, 240 uint32_t token, uint32_t nargs, 241 target_ulong args, 242 uint32_t nret, target_ulong rets) 243 { 244 CPUState *cs = CPU(cpu); 245 CPUPPCState *env = &cpu->env; 246 247 cs->halted = 1; 248 qemu_cpu_kick(cs); 249 /* 250 * While stopping a CPU, the guest calls H_CPPR which 251 * effectively disables interrupts on XICS level. 252 * However decrementer interrupts in TCG can still 253 * wake the CPU up so here we disable interrupts in MSR 254 * as well. 255 * As rtas_start_cpu() resets the whole MSR anyway, there is 256 * no need to bother with specific bits, we just clear it. 257 */ 258 env->msr = 0; 259 } 260 261 static inline int sysparm_st(target_ulong addr, target_ulong len, 262 const void *val, uint16_t vallen) 263 { 264 hwaddr phys = ppc64_phys_to_real(addr); 265 266 if (len < 2) { 267 return RTAS_OUT_SYSPARM_PARAM_ERROR; 268 } 269 stw_be_phys(&address_space_memory, phys, vallen); 270 cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen)); 271 return RTAS_OUT_SUCCESS; 272 } 273 274 static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, 275 sPAPRMachineState *spapr, 276 uint32_t token, uint32_t nargs, 277 target_ulong args, 278 uint32_t nret, target_ulong rets) 279 { 280 target_ulong parameter = rtas_ld(args, 0); 281 target_ulong buffer = rtas_ld(args, 1); 282 target_ulong length = rtas_ld(args, 2); 283 target_ulong ret; 284 285 switch (parameter) { 286 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: { 287 char *param_val = g_strdup_printf("MaxEntCap=%d," 288 "DesMem=%llu," 289 "DesProcs=%d," 290 "MaxPlatProcs=%d", 291 max_cpus, 292 current_machine->ram_size / M_BYTE, 293 smp_cpus, 294 max_cpus); 295 ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1); 296 g_free(param_val); 297 break; 298 } 299 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: { 300 uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED; 301 302 ret = sysparm_st(buffer, length, ¶m_val, sizeof(param_val)); 303 break; 304 } 305 case RTAS_SYSPARM_UUID: 306 ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid, 307 (qemu_uuid_set ? 16 : 0)); 308 break; 309 default: 310 ret = RTAS_OUT_NOT_SUPPORTED; 311 } 312 313 rtas_st(rets, 0, ret); 314 } 315 316 static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu, 317 sPAPRMachineState *spapr, 318 uint32_t token, uint32_t nargs, 319 target_ulong args, 320 uint32_t nret, target_ulong rets) 321 { 322 target_ulong parameter = rtas_ld(args, 0); 323 target_ulong ret = RTAS_OUT_NOT_SUPPORTED; 324 325 switch (parameter) { 326 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: 327 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: 328 case RTAS_SYSPARM_UUID: 329 ret = RTAS_OUT_NOT_AUTHORIZED; 330 break; 331 } 332 333 rtas_st(rets, 0, ret); 334 } 335 336 static void rtas_ibm_os_term(PowerPCCPU *cpu, 337 sPAPRMachineState *spapr, 338 uint32_t token, uint32_t nargs, 339 target_ulong args, 340 uint32_t nret, target_ulong rets) 341 { 342 target_ulong ret = 0; 343 344 qapi_event_send_guest_panicked(GUEST_PANIC_ACTION_PAUSE, &error_abort); 345 346 rtas_st(rets, 0, ret); 347 } 348 349 static void rtas_set_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr, 350 uint32_t token, uint32_t nargs, 351 target_ulong args, uint32_t nret, 352 target_ulong rets) 353 { 354 int32_t power_domain; 355 356 if (nargs != 2 || nret != 2) { 357 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 358 return; 359 } 360 361 /* we currently only use a single, "live insert" powerdomain for 362 * hotplugged/dlpar'd resources, so the power is always live/full (100) 363 */ 364 power_domain = rtas_ld(args, 0); 365 if (power_domain != -1) { 366 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); 367 return; 368 } 369 370 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 371 rtas_st(rets, 1, 100); 372 } 373 374 static void rtas_get_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr, 375 uint32_t token, uint32_t nargs, 376 target_ulong args, uint32_t nret, 377 target_ulong rets) 378 { 379 int32_t power_domain; 380 381 if (nargs != 1 || nret != 2) { 382 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 383 return; 384 } 385 386 /* we currently only use a single, "live insert" powerdomain for 387 * hotplugged/dlpar'd resources, so the power is always live/full (100) 388 */ 389 power_domain = rtas_ld(args, 0); 390 if (power_domain != -1) { 391 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); 392 return; 393 } 394 395 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 396 rtas_st(rets, 1, 100); 397 } 398 399 static bool sensor_type_is_dr(uint32_t sensor_type) 400 { 401 switch (sensor_type) { 402 case RTAS_SENSOR_TYPE_ISOLATION_STATE: 403 case RTAS_SENSOR_TYPE_DR: 404 case RTAS_SENSOR_TYPE_ALLOCATION_STATE: 405 return true; 406 } 407 408 return false; 409 } 410 411 static void rtas_set_indicator(PowerPCCPU *cpu, sPAPRMachineState *spapr, 412 uint32_t token, uint32_t nargs, 413 target_ulong args, uint32_t nret, 414 target_ulong rets) 415 { 416 uint32_t sensor_type; 417 uint32_t sensor_index; 418 uint32_t sensor_state; 419 uint32_t ret = RTAS_OUT_SUCCESS; 420 sPAPRDRConnector *drc; 421 sPAPRDRConnectorClass *drck; 422 423 if (nargs != 3 || nret != 1) { 424 ret = RTAS_OUT_PARAM_ERROR; 425 goto out; 426 } 427 428 sensor_type = rtas_ld(args, 0); 429 sensor_index = rtas_ld(args, 1); 430 sensor_state = rtas_ld(args, 2); 431 432 if (!sensor_type_is_dr(sensor_type)) { 433 goto out_unimplemented; 434 } 435 436 /* if this is a DR sensor we can assume sensor_index == drc_index */ 437 drc = spapr_dr_connector_by_index(sensor_index); 438 if (!drc) { 439 DPRINTF("rtas_set_indicator: invalid sensor/DRC index: %xh\n", 440 sensor_index); 441 ret = RTAS_OUT_PARAM_ERROR; 442 goto out; 443 } 444 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); 445 446 switch (sensor_type) { 447 case RTAS_SENSOR_TYPE_ISOLATION_STATE: 448 /* if the guest is configuring a device attached to this 449 * DRC, we should reset the configuration state at this 450 * point since it may no longer be reliable (guest released 451 * device and needs to start over, or unplug occurred so 452 * the FDT is no longer valid) 453 */ 454 if (sensor_state == SPAPR_DR_ISOLATION_STATE_ISOLATED) { 455 sPAPRConfigureConnectorState *ccs = spapr_ccs_find(spapr, 456 sensor_index); 457 if (ccs) { 458 spapr_ccs_remove(spapr, ccs); 459 } 460 } 461 ret = drck->set_isolation_state(drc, sensor_state); 462 break; 463 case RTAS_SENSOR_TYPE_DR: 464 ret = drck->set_indicator_state(drc, sensor_state); 465 break; 466 case RTAS_SENSOR_TYPE_ALLOCATION_STATE: 467 ret = drck->set_allocation_state(drc, sensor_state); 468 break; 469 default: 470 goto out_unimplemented; 471 } 472 473 out: 474 rtas_st(rets, 0, ret); 475 return; 476 477 out_unimplemented: 478 /* currently only DR-related sensors are implemented */ 479 DPRINTF("rtas_set_indicator: sensor/indicator not implemented: %d\n", 480 sensor_type); 481 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); 482 } 483 484 static void rtas_get_sensor_state(PowerPCCPU *cpu, sPAPRMachineState *spapr, 485 uint32_t token, uint32_t nargs, 486 target_ulong args, uint32_t nret, 487 target_ulong rets) 488 { 489 uint32_t sensor_type; 490 uint32_t sensor_index; 491 uint32_t sensor_state = 0; 492 sPAPRDRConnector *drc; 493 sPAPRDRConnectorClass *drck; 494 uint32_t ret = RTAS_OUT_SUCCESS; 495 496 if (nargs != 2 || nret != 2) { 497 ret = RTAS_OUT_PARAM_ERROR; 498 goto out; 499 } 500 501 sensor_type = rtas_ld(args, 0); 502 sensor_index = rtas_ld(args, 1); 503 504 if (sensor_type != RTAS_SENSOR_TYPE_ENTITY_SENSE) { 505 /* currently only DR-related sensors are implemented */ 506 DPRINTF("rtas_get_sensor_state: sensor/indicator not implemented: %d\n", 507 sensor_type); 508 ret = RTAS_OUT_NOT_SUPPORTED; 509 goto out; 510 } 511 512 drc = spapr_dr_connector_by_index(sensor_index); 513 if (!drc) { 514 DPRINTF("rtas_get_sensor_state: invalid sensor/DRC index: %xh\n", 515 sensor_index); 516 ret = RTAS_OUT_PARAM_ERROR; 517 goto out; 518 } 519 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); 520 ret = drck->entity_sense(drc, &sensor_state); 521 522 out: 523 rtas_st(rets, 0, ret); 524 rtas_st(rets, 1, sensor_state); 525 } 526 527 /* configure-connector work area offsets, int32_t units for field 528 * indexes, bytes for field offset/len values. 529 * 530 * as documented by PAPR+ v2.7, 13.5.3.5 531 */ 532 #define CC_IDX_NODE_NAME_OFFSET 2 533 #define CC_IDX_PROP_NAME_OFFSET 2 534 #define CC_IDX_PROP_LEN 3 535 #define CC_IDX_PROP_DATA_OFFSET 4 536 #define CC_VAL_DATA_OFFSET ((CC_IDX_PROP_DATA_OFFSET + 1) * 4) 537 #define CC_WA_LEN 4096 538 539 static void configure_connector_st(target_ulong addr, target_ulong offset, 540 const void *buf, size_t len) 541 { 542 cpu_physical_memory_write(ppc64_phys_to_real(addr + offset), 543 buf, MIN(len, CC_WA_LEN - offset)); 544 } 545 546 static void rtas_ibm_configure_connector(PowerPCCPU *cpu, 547 sPAPRMachineState *spapr, 548 uint32_t token, uint32_t nargs, 549 target_ulong args, uint32_t nret, 550 target_ulong rets) 551 { 552 uint64_t wa_addr; 553 uint64_t wa_offset; 554 uint32_t drc_index; 555 sPAPRDRConnector *drc; 556 sPAPRDRConnectorClass *drck; 557 sPAPRConfigureConnectorState *ccs; 558 sPAPRDRCCResponse resp = SPAPR_DR_CC_RESPONSE_CONTINUE; 559 int rc; 560 const void *fdt; 561 562 if (nargs != 2 || nret != 1) { 563 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 564 return; 565 } 566 567 wa_addr = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 0); 568 569 drc_index = rtas_ld(wa_addr, 0); 570 drc = spapr_dr_connector_by_index(drc_index); 571 if (!drc) { 572 DPRINTF("rtas_ibm_configure_connector: invalid DRC index: %xh\n", 573 drc_index); 574 rc = RTAS_OUT_PARAM_ERROR; 575 goto out; 576 } 577 578 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); 579 fdt = drck->get_fdt(drc, NULL); 580 if (!fdt) { 581 DPRINTF("rtas_ibm_configure_connector: Missing FDT for DRC index: %xh\n", 582 drc_index); 583 rc = SPAPR_DR_CC_RESPONSE_NOT_CONFIGURABLE; 584 goto out; 585 } 586 587 ccs = spapr_ccs_find(spapr, drc_index); 588 if (!ccs) { 589 ccs = g_new0(sPAPRConfigureConnectorState, 1); 590 (void)drck->get_fdt(drc, &ccs->fdt_offset); 591 ccs->drc_index = drc_index; 592 spapr_ccs_add(spapr, ccs); 593 } 594 595 do { 596 uint32_t tag; 597 const char *name; 598 const struct fdt_property *prop; 599 int fdt_offset_next, prop_len; 600 601 tag = fdt_next_tag(fdt, ccs->fdt_offset, &fdt_offset_next); 602 603 switch (tag) { 604 case FDT_BEGIN_NODE: 605 ccs->fdt_depth++; 606 name = fdt_get_name(fdt, ccs->fdt_offset, NULL); 607 608 /* provide the name of the next OF node */ 609 wa_offset = CC_VAL_DATA_OFFSET; 610 rtas_st(wa_addr, CC_IDX_NODE_NAME_OFFSET, wa_offset); 611 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1); 612 resp = SPAPR_DR_CC_RESPONSE_NEXT_CHILD; 613 break; 614 case FDT_END_NODE: 615 ccs->fdt_depth--; 616 if (ccs->fdt_depth == 0) { 617 /* done sending the device tree, don't need to track 618 * the state anymore 619 */ 620 drck->set_configured(drc); 621 spapr_ccs_remove(spapr, ccs); 622 ccs = NULL; 623 resp = SPAPR_DR_CC_RESPONSE_SUCCESS; 624 } else { 625 resp = SPAPR_DR_CC_RESPONSE_PREV_PARENT; 626 } 627 break; 628 case FDT_PROP: 629 prop = fdt_get_property_by_offset(fdt, ccs->fdt_offset, 630 &prop_len); 631 name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff)); 632 633 /* provide the name of the next OF property */ 634 wa_offset = CC_VAL_DATA_OFFSET; 635 rtas_st(wa_addr, CC_IDX_PROP_NAME_OFFSET, wa_offset); 636 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1); 637 638 /* provide the length and value of the OF property. data gets 639 * placed immediately after NULL terminator of the OF property's 640 * name string 641 */ 642 wa_offset += strlen(name) + 1, 643 rtas_st(wa_addr, CC_IDX_PROP_LEN, prop_len); 644 rtas_st(wa_addr, CC_IDX_PROP_DATA_OFFSET, wa_offset); 645 configure_connector_st(wa_addr, wa_offset, prop->data, prop_len); 646 resp = SPAPR_DR_CC_RESPONSE_NEXT_PROPERTY; 647 break; 648 case FDT_END: 649 resp = SPAPR_DR_CC_RESPONSE_ERROR; 650 default: 651 /* keep seeking for an actionable tag */ 652 break; 653 } 654 if (ccs) { 655 ccs->fdt_offset = fdt_offset_next; 656 } 657 } while (resp == SPAPR_DR_CC_RESPONSE_CONTINUE); 658 659 rc = resp; 660 out: 661 rtas_st(rets, 0, rc); 662 } 663 664 static struct rtas_call { 665 const char *name; 666 spapr_rtas_fn fn; 667 } rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE]; 668 669 target_ulong spapr_rtas_call(PowerPCCPU *cpu, sPAPRMachineState *spapr, 670 uint32_t token, uint32_t nargs, target_ulong args, 671 uint32_t nret, target_ulong rets) 672 { 673 if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) { 674 struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE); 675 676 if (call->fn) { 677 call->fn(cpu, spapr, token, nargs, args, nret, rets); 678 return H_SUCCESS; 679 } 680 } 681 682 /* HACK: Some Linux early debug code uses RTAS display-character, 683 * but assumes the token value is 0xa (which it is on some real 684 * machines) without looking it up in the device tree. This 685 * special case makes this work */ 686 if (token == 0xa) { 687 rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets); 688 return H_SUCCESS; 689 } 690 691 hcall_dprintf("Unknown RTAS token 0x%x\n", token); 692 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 693 return H_PARAMETER; 694 } 695 696 void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn) 697 { 698 assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)); 699 700 token -= RTAS_TOKEN_BASE; 701 702 assert(!rtas_table[token].name); 703 704 rtas_table[token].name = name; 705 rtas_table[token].fn = fn; 706 } 707 708 int spapr_rtas_device_tree_setup(void *fdt, hwaddr rtas_addr, 709 hwaddr rtas_size) 710 { 711 int ret; 712 int i; 713 uint32_t lrdr_capacity[5]; 714 MachineState *machine = MACHINE(qdev_get_machine()); 715 sPAPRMachineState *spapr = SPAPR_MACHINE(machine); 716 uint64_t max_hotplug_addr = spapr->hotplug_memory.base + 717 memory_region_size(&spapr->hotplug_memory.mr); 718 719 ret = fdt_add_mem_rsv(fdt, rtas_addr, rtas_size); 720 if (ret < 0) { 721 error_report("Couldn't add RTAS reserve entry: %s", 722 fdt_strerror(ret)); 723 return ret; 724 } 725 726 ret = qemu_fdt_setprop_cell(fdt, "/rtas", "linux,rtas-base", 727 rtas_addr); 728 if (ret < 0) { 729 error_report("Couldn't add linux,rtas-base property: %s", 730 fdt_strerror(ret)); 731 return ret; 732 } 733 734 ret = qemu_fdt_setprop_cell(fdt, "/rtas", "linux,rtas-entry", 735 rtas_addr); 736 if (ret < 0) { 737 error_report("Couldn't add linux,rtas-entry property: %s", 738 fdt_strerror(ret)); 739 return ret; 740 } 741 742 ret = qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-size", 743 rtas_size); 744 if (ret < 0) { 745 error_report("Couldn't add rtas-size property: %s", 746 fdt_strerror(ret)); 747 return ret; 748 } 749 750 for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) { 751 struct rtas_call *call = &rtas_table[i]; 752 753 if (!call->name) { 754 continue; 755 } 756 757 ret = qemu_fdt_setprop_cell(fdt, "/rtas", call->name, 758 i + RTAS_TOKEN_BASE); 759 if (ret < 0) { 760 error_report("Couldn't add rtas token for %s: %s", 761 call->name, fdt_strerror(ret)); 762 return ret; 763 } 764 765 } 766 767 lrdr_capacity[0] = cpu_to_be32(max_hotplug_addr >> 32); 768 lrdr_capacity[1] = cpu_to_be32(max_hotplug_addr & 0xffffffff); 769 lrdr_capacity[2] = 0; 770 lrdr_capacity[3] = cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE); 771 lrdr_capacity[4] = cpu_to_be32(max_cpus/smp_threads); 772 ret = qemu_fdt_setprop(fdt, "/rtas", "ibm,lrdr-capacity", lrdr_capacity, 773 sizeof(lrdr_capacity)); 774 if (ret < 0) { 775 error_report("Couldn't add ibm,lrdr-capacity rtas property"); 776 return ret; 777 } 778 779 return 0; 780 } 781 782 static void core_rtas_register_types(void) 783 { 784 spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character", 785 rtas_display_character); 786 spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off); 787 spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot", 788 rtas_system_reboot); 789 spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state", 790 rtas_query_cpu_stopped_state); 791 spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu); 792 spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self); 793 spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER, 794 "ibm,get-system-parameter", 795 rtas_ibm_get_system_parameter); 796 spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER, 797 "ibm,set-system-parameter", 798 rtas_ibm_set_system_parameter); 799 spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term", 800 rtas_ibm_os_term); 801 spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level", 802 rtas_set_power_level); 803 spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level", 804 rtas_get_power_level); 805 spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator", 806 rtas_set_indicator); 807 spapr_rtas_register(RTAS_GET_SENSOR_STATE, "get-sensor-state", 808 rtas_get_sensor_state); 809 spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector", 810 rtas_ibm_configure_connector); 811 } 812 813 type_init(core_rtas_register_types) 814