1 /* 2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 3 * 4 * Hypercall based emulated RTAS 5 * 6 * Copyright (c) 2010-2011 David Gibson, IBM Corporation. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * 26 */ 27 28 #include "qemu/osdep.h" 29 #include "cpu.h" 30 #include "qemu/log.h" 31 #include "qemu/error-report.h" 32 #include "sysemu/sysemu.h" 33 #include "sysemu/device_tree.h" 34 #include "sysemu/cpus.h" 35 #include "sysemu/hw_accel.h" 36 #include "sysemu/runstate.h" 37 #include "kvm_ppc.h" 38 39 #include "hw/ppc/spapr.h" 40 #include "hw/ppc/spapr_vio.h" 41 #include "hw/ppc/spapr_rtas.h" 42 #include "hw/ppc/spapr_cpu_core.h" 43 #include "hw/ppc/ppc.h" 44 #include "hw/boards.h" 45 46 #include <libfdt.h> 47 #include "hw/ppc/spapr_drc.h" 48 #include "qemu/cutils.h" 49 #include "trace.h" 50 #include "hw/ppc/fdt.h" 51 #include "target/ppc/mmu-hash64.h" 52 #include "target/ppc/mmu-book3s-v3.h" 53 #include "migration/blocker.h" 54 55 static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr, 56 uint32_t token, uint32_t nargs, 57 target_ulong args, 58 uint32_t nret, target_ulong rets) 59 { 60 uint8_t c = rtas_ld(args, 0); 61 SpaprVioDevice *sdev = vty_lookup(spapr, 0); 62 63 if (!sdev) { 64 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 65 } else { 66 vty_putchars(sdev, &c, sizeof(c)); 67 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 68 } 69 } 70 71 static void rtas_power_off(PowerPCCPU *cpu, SpaprMachineState *spapr, 72 uint32_t token, uint32_t nargs, target_ulong args, 73 uint32_t nret, target_ulong rets) 74 { 75 if (nargs != 2 || nret != 1) { 76 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 77 return; 78 } 79 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 80 cpu_stop_current(); 81 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 82 } 83 84 static void rtas_system_reboot(PowerPCCPU *cpu, SpaprMachineState *spapr, 85 uint32_t token, uint32_t nargs, 86 target_ulong args, 87 uint32_t nret, target_ulong rets) 88 { 89 if (nargs != 0 || nret != 1) { 90 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 91 return; 92 } 93 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 94 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 95 } 96 97 static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_, 98 SpaprMachineState *spapr, 99 uint32_t token, uint32_t nargs, 100 target_ulong args, 101 uint32_t nret, target_ulong rets) 102 { 103 target_ulong id; 104 PowerPCCPU *cpu; 105 106 if (nargs != 1 || nret != 2) { 107 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 108 return; 109 } 110 111 id = rtas_ld(args, 0); 112 cpu = spapr_find_cpu(id); 113 if (cpu != NULL) { 114 if (CPU(cpu)->halted) { 115 rtas_st(rets, 1, 0); 116 } else { 117 rtas_st(rets, 1, 2); 118 } 119 120 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 121 return; 122 } 123 124 /* Didn't find a matching cpu */ 125 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 126 } 127 128 static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr, 129 uint32_t token, uint32_t nargs, 130 target_ulong args, 131 uint32_t nret, target_ulong rets) 132 { 133 target_ulong id, start, r3; 134 PowerPCCPU *newcpu; 135 CPUPPCState *env; 136 PowerPCCPUClass *pcc; 137 target_ulong lpcr; 138 139 if (nargs != 3 || nret != 1) { 140 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 141 return; 142 } 143 144 id = rtas_ld(args, 0); 145 start = rtas_ld(args, 1); 146 r3 = rtas_ld(args, 2); 147 148 newcpu = spapr_find_cpu(id); 149 if (!newcpu) { 150 /* Didn't find a matching cpu */ 151 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 152 return; 153 } 154 155 env = &newcpu->env; 156 pcc = POWERPC_CPU_GET_CLASS(newcpu); 157 158 if (!CPU(newcpu)->halted) { 159 rtas_st(rets, 0, RTAS_OUT_HW_ERROR); 160 return; 161 } 162 163 cpu_synchronize_state(CPU(newcpu)); 164 165 env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME); 166 167 /* Enable Power-saving mode Exit Cause exceptions for the new CPU */ 168 lpcr = env->spr[SPR_LPCR]; 169 if (!pcc->interrupts_big_endian(callcpu)) { 170 lpcr |= LPCR_ILE; 171 } 172 if (env->mmu_model == POWERPC_MMU_3_00) { 173 /* 174 * New cpus are expected to start in the same radix/hash mode 175 * as the existing CPUs 176 */ 177 if (ppc64_v3_radix(callcpu)) { 178 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 179 } else { 180 lpcr &= ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR); 181 } 182 env->spr[SPR_PSSCR] &= ~PSSCR_EC; 183 } 184 ppc_store_lpcr(newcpu, lpcr); 185 186 /* 187 * Set the timebase offset of the new CPU to that of the invoking 188 * CPU. This helps hotplugged CPU to have the correct timebase 189 * offset. 190 */ 191 newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset; 192 193 spapr_cpu_set_entry_state(newcpu, start, r3); 194 195 qemu_cpu_kick(CPU(newcpu)); 196 197 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 198 } 199 200 static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr, 201 uint32_t token, uint32_t nargs, 202 target_ulong args, 203 uint32_t nret, target_ulong rets) 204 { 205 CPUState *cs = CPU(cpu); 206 CPUPPCState *env = &cpu->env; 207 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); 208 209 /* Disable Power-saving mode Exit Cause exceptions for the CPU. 210 * This could deliver an interrupt on a dying CPU and crash the 211 * guest. 212 * For the same reason, set PSSCR_EC. 213 */ 214 ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm); 215 env->spr[SPR_PSSCR] |= PSSCR_EC; 216 cs->halted = 1; 217 kvmppc_set_reg_ppc_online(cpu, 0); 218 qemu_cpu_kick(cs); 219 } 220 221 static void rtas_ibm_suspend_me(PowerPCCPU *cpu, SpaprMachineState *spapr, 222 uint32_t token, uint32_t nargs, 223 target_ulong args, 224 uint32_t nret, target_ulong rets) 225 { 226 CPUState *cs; 227 228 if (nargs != 0 || nret != 1) { 229 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 230 return; 231 } 232 233 CPU_FOREACH(cs) { 234 PowerPCCPU *c = POWERPC_CPU(cs); 235 CPUPPCState *e = &c->env; 236 if (c == cpu) { 237 continue; 238 } 239 240 /* See h_join */ 241 if (!cs->halted || (e->msr & (1ULL << MSR_EE))) { 242 rtas_st(rets, 0, H_MULTI_THREADS_ACTIVE); 243 return; 244 } 245 } 246 247 qemu_system_suspend_request(); 248 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 249 } 250 251 static inline int sysparm_st(target_ulong addr, target_ulong len, 252 const void *val, uint16_t vallen) 253 { 254 hwaddr phys = ppc64_phys_to_real(addr); 255 256 if (len < 2) { 257 return RTAS_OUT_SYSPARM_PARAM_ERROR; 258 } 259 stw_be_phys(&address_space_memory, phys, vallen); 260 cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen)); 261 return RTAS_OUT_SUCCESS; 262 } 263 264 static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, 265 SpaprMachineState *spapr, 266 uint32_t token, uint32_t nargs, 267 target_ulong args, 268 uint32_t nret, target_ulong rets) 269 { 270 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); 271 MachineState *ms = MACHINE(spapr); 272 target_ulong parameter = rtas_ld(args, 0); 273 target_ulong buffer = rtas_ld(args, 1); 274 target_ulong length = rtas_ld(args, 2); 275 target_ulong ret; 276 277 switch (parameter) { 278 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: { 279 char *param_val = g_strdup_printf("MaxEntCap=%d," 280 "DesMem=%" PRIu64 "," 281 "DesProcs=%d," 282 "MaxPlatProcs=%d", 283 ms->smp.max_cpus, 284 ms->ram_size / MiB, 285 ms->smp.cpus, 286 ms->smp.max_cpus); 287 if (pcc->n_host_threads > 0) { 288 char *hostthr_val, *old = param_val; 289 290 /* 291 * Add HostThrs property. This property is not present in PAPR but 292 * is expected by some guests to communicate the number of physical 293 * host threads per core on the system so that they can scale 294 * information which varies based on the thread configuration. 295 */ 296 hostthr_val = g_strdup_printf(",HostThrs=%d", pcc->n_host_threads); 297 param_val = g_strconcat(param_val, hostthr_val, NULL); 298 g_free(hostthr_val); 299 g_free(old); 300 } 301 ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1); 302 g_free(param_val); 303 break; 304 } 305 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: { 306 uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED; 307 308 ret = sysparm_st(buffer, length, ¶m_val, sizeof(param_val)); 309 break; 310 } 311 case RTAS_SYSPARM_UUID: 312 ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid, 313 (qemu_uuid_set ? 16 : 0)); 314 break; 315 default: 316 ret = RTAS_OUT_NOT_SUPPORTED; 317 } 318 319 rtas_st(rets, 0, ret); 320 } 321 322 static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu, 323 SpaprMachineState *spapr, 324 uint32_t token, uint32_t nargs, 325 target_ulong args, 326 uint32_t nret, target_ulong rets) 327 { 328 target_ulong parameter = rtas_ld(args, 0); 329 target_ulong ret = RTAS_OUT_NOT_SUPPORTED; 330 331 switch (parameter) { 332 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: 333 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: 334 case RTAS_SYSPARM_UUID: 335 ret = RTAS_OUT_NOT_AUTHORIZED; 336 break; 337 } 338 339 rtas_st(rets, 0, ret); 340 } 341 342 static void rtas_ibm_os_term(PowerPCCPU *cpu, 343 SpaprMachineState *spapr, 344 uint32_t token, uint32_t nargs, 345 target_ulong args, 346 uint32_t nret, target_ulong rets) 347 { 348 qemu_system_guest_panicked(NULL); 349 350 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 351 } 352 353 static void rtas_set_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr, 354 uint32_t token, uint32_t nargs, 355 target_ulong args, uint32_t nret, 356 target_ulong rets) 357 { 358 int32_t power_domain; 359 360 if (nargs != 2 || nret != 2) { 361 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 362 return; 363 } 364 365 /* we currently only use a single, "live insert" powerdomain for 366 * hotplugged/dlpar'd resources, so the power is always live/full (100) 367 */ 368 power_domain = rtas_ld(args, 0); 369 if (power_domain != -1) { 370 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); 371 return; 372 } 373 374 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 375 rtas_st(rets, 1, 100); 376 } 377 378 static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr, 379 uint32_t token, uint32_t nargs, 380 target_ulong args, uint32_t nret, 381 target_ulong rets) 382 { 383 int32_t power_domain; 384 385 if (nargs != 1 || nret != 2) { 386 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 387 return; 388 } 389 390 /* we currently only use a single, "live insert" powerdomain for 391 * hotplugged/dlpar'd resources, so the power is always live/full (100) 392 */ 393 power_domain = rtas_ld(args, 0); 394 if (power_domain != -1) { 395 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); 396 return; 397 } 398 399 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 400 rtas_st(rets, 1, 100); 401 } 402 403 static void rtas_ibm_nmi_register(PowerPCCPU *cpu, 404 SpaprMachineState *spapr, 405 uint32_t token, uint32_t nargs, 406 target_ulong args, 407 uint32_t nret, target_ulong rets) 408 { 409 hwaddr rtas_addr; 410 411 if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_OFF) { 412 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); 413 return; 414 } 415 416 rtas_addr = spapr_get_rtas_addr(); 417 if (!rtas_addr) { 418 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); 419 return; 420 } 421 422 spapr->guest_machine_check_addr = rtas_ld(args, 1); 423 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 424 } 425 426 static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu, 427 SpaprMachineState *spapr, 428 uint32_t token, uint32_t nargs, 429 target_ulong args, 430 uint32_t nret, target_ulong rets) 431 { 432 if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_OFF) { 433 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); 434 return; 435 } 436 437 if (spapr->guest_machine_check_addr == -1) { 438 /* NMI register not called */ 439 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 440 return; 441 } 442 443 if (spapr->mc_status != cpu->vcpu_id) { 444 /* The vCPU that hit the NMI should invoke "ibm,nmi-interlock" */ 445 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 446 return; 447 } 448 449 /* 450 * vCPU issuing "ibm,nmi-interlock" is done with NMI handling, 451 * hence unset mc_status. 452 */ 453 spapr->mc_status = -1; 454 qemu_cond_signal(&spapr->mc_delivery_cond); 455 rtas_st(rets, 0, RTAS_OUT_SUCCESS); 456 migrate_del_blocker(spapr->fwnmi_migration_blocker); 457 } 458 459 static struct rtas_call { 460 const char *name; 461 spapr_rtas_fn fn; 462 } rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE]; 463 464 target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *spapr, 465 uint32_t token, uint32_t nargs, target_ulong args, 466 uint32_t nret, target_ulong rets) 467 { 468 if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) { 469 struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE); 470 471 if (call->fn) { 472 call->fn(cpu, spapr, token, nargs, args, nret, rets); 473 return H_SUCCESS; 474 } 475 } 476 477 /* HACK: Some Linux early debug code uses RTAS display-character, 478 * but assumes the token value is 0xa (which it is on some real 479 * machines) without looking it up in the device tree. This 480 * special case makes this work */ 481 if (token == 0xa) { 482 rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets); 483 return H_SUCCESS; 484 } 485 486 hcall_dprintf("Unknown RTAS token 0x%x\n", token); 487 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); 488 return H_PARAMETER; 489 } 490 491 uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args, 492 uint32_t nret, uint64_t rets) 493 { 494 int token; 495 496 for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) { 497 if (strcmp(cmd, rtas_table[token].name) == 0) { 498 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); 499 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 500 501 rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE, 502 nargs, args, nret, rets); 503 return H_SUCCESS; 504 } 505 } 506 return H_PARAMETER; 507 } 508 509 void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn) 510 { 511 assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)); 512 513 token -= RTAS_TOKEN_BASE; 514 515 assert(!name || !rtas_table[token].name); 516 517 rtas_table[token].name = name; 518 rtas_table[token].fn = fn; 519 } 520 521 void spapr_dt_rtas_tokens(void *fdt, int rtas) 522 { 523 int i; 524 525 for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) { 526 struct rtas_call *call = &rtas_table[i]; 527 528 if (!call->name) { 529 continue; 530 } 531 532 _FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE)); 533 } 534 } 535 536 hwaddr spapr_get_rtas_addr(void) 537 { 538 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); 539 int rtas_node; 540 const fdt32_t *rtas_data; 541 void *fdt = spapr->fdt_blob; 542 543 /* fetch rtas addr from fdt */ 544 rtas_node = fdt_path_offset(fdt, "/rtas"); 545 if (rtas_node < 0) { 546 return 0; 547 } 548 549 rtas_data = fdt_getprop(fdt, rtas_node, "linux,rtas-base", NULL); 550 if (!rtas_data) { 551 return 0; 552 } 553 554 /* 555 * We assume that the OS called RTAS instantiate-rtas, but some other 556 * OS might call RTAS instantiate-rtas-64 instead. This fine as of now 557 * as SLOF only supports 32-bit variant. 558 */ 559 return (hwaddr)fdt32_to_cpu(*rtas_data); 560 } 561 562 static void core_rtas_register_types(void) 563 { 564 spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character", 565 rtas_display_character); 566 spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off); 567 spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot", 568 rtas_system_reboot); 569 spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state", 570 rtas_query_cpu_stopped_state); 571 spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu); 572 spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self); 573 spapr_rtas_register(RTAS_IBM_SUSPEND_ME, "ibm,suspend-me", 574 rtas_ibm_suspend_me); 575 spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER, 576 "ibm,get-system-parameter", 577 rtas_ibm_get_system_parameter); 578 spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER, 579 "ibm,set-system-parameter", 580 rtas_ibm_set_system_parameter); 581 spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term", 582 rtas_ibm_os_term); 583 spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level", 584 rtas_set_power_level); 585 spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level", 586 rtas_get_power_level); 587 spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register", 588 rtas_ibm_nmi_register); 589 spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock", 590 rtas_ibm_nmi_interlock); 591 } 592 593 type_init(core_rtas_register_types) 594