xref: /openbmc/qemu/hw/ppc/spapr_pci_vfio.c (revision da34e65c)
1 /*
2  * QEMU sPAPR PCI host for VFIO
3  *
4  * Copyright (c) 2011-2014 Alexey Kardashevskiy, IBM Corporation.
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License,
9  *  or (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qapi/error.h"
22 #include "hw/ppc/spapr.h"
23 #include "hw/pci-host/spapr.h"
24 #include "hw/pci/msix.h"
25 #include "linux/vfio.h"
26 #include "hw/vfio/vfio.h"
27 #include "qemu/error-report.h"
28 
29 #define TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE "spapr-pci-vfio-host-bridge"
30 
31 #define SPAPR_PCI_VFIO_HOST_BRIDGE(obj) \
32     OBJECT_CHECK(sPAPRPHBVFIOState, (obj), TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE)
33 
34 typedef struct sPAPRPHBVFIOState sPAPRPHBVFIOState;
35 
36 struct sPAPRPHBVFIOState {
37     sPAPRPHBState phb;
38 
39     int32_t iommugroupid;
40 };
41 
42 static Property spapr_phb_vfio_properties[] = {
43     DEFINE_PROP_INT32("iommu", sPAPRPHBVFIOState, iommugroupid, -1),
44     DEFINE_PROP_END_OF_LIST(),
45 };
46 
47 static void spapr_phb_vfio_instance_init(Object *obj)
48 {
49     error_report("spapr-pci-vfio-host-bridge is deprecated");
50 }
51 
52 bool spapr_phb_eeh_available(sPAPRPHBState *sphb)
53 {
54     return vfio_eeh_as_ok(&sphb->iommu_as);
55 }
56 
57 static void spapr_phb_vfio_eeh_reenable(sPAPRPHBState *sphb)
58 {
59     vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_ENABLE);
60 }
61 
62 void spapr_phb_vfio_reset(DeviceState *qdev)
63 {
64     /*
65      * The PE might be in frozen state. To reenable the EEH
66      * functionality on it will clean the frozen state, which
67      * ensures that the contained PCI devices will work properly
68      * after reboot.
69      */
70     spapr_phb_vfio_eeh_reenable(SPAPR_PCI_HOST_BRIDGE(qdev));
71 }
72 
73 int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb,
74                                   unsigned int addr, int option)
75 {
76     uint32_t op;
77     int ret;
78 
79     switch (option) {
80     case RTAS_EEH_DISABLE:
81         op = VFIO_EEH_PE_DISABLE;
82         break;
83     case RTAS_EEH_ENABLE: {
84         PCIHostState *phb;
85         PCIDevice *pdev;
86 
87         /*
88          * The EEH functionality is enabled on basis of PCI device,
89          * instead of PE. We need check the validity of the PCI
90          * device address.
91          */
92         phb = PCI_HOST_BRIDGE(sphb);
93         pdev = pci_find_device(phb->bus,
94                                (addr >> 16) & 0xFF, (addr >> 8) & 0xFF);
95         if (!pdev || !object_dynamic_cast(OBJECT(pdev), "vfio-pci")) {
96             return RTAS_OUT_PARAM_ERROR;
97         }
98 
99         op = VFIO_EEH_PE_ENABLE;
100         break;
101     }
102     case RTAS_EEH_THAW_IO:
103         op = VFIO_EEH_PE_UNFREEZE_IO;
104         break;
105     case RTAS_EEH_THAW_DMA:
106         op = VFIO_EEH_PE_UNFREEZE_DMA;
107         break;
108     default:
109         return RTAS_OUT_PARAM_ERROR;
110     }
111 
112     ret = vfio_eeh_as_op(&sphb->iommu_as, op);
113     if (ret < 0) {
114         return RTAS_OUT_HW_ERROR;
115     }
116 
117     return RTAS_OUT_SUCCESS;
118 }
119 
120 int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, int *state)
121 {
122     int ret;
123 
124     ret = vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_GET_STATE);
125     if (ret < 0) {
126         return RTAS_OUT_PARAM_ERROR;
127     }
128 
129     *state = ret;
130     return RTAS_OUT_SUCCESS;
131 }
132 
133 static void spapr_phb_vfio_eeh_clear_dev_msix(PCIBus *bus,
134                                               PCIDevice *pdev,
135                                               void *opaque)
136 {
137     /* Check if the device is VFIO PCI device */
138     if (!object_dynamic_cast(OBJECT(pdev), "vfio-pci")) {
139         return;
140     }
141 
142     /*
143      * The MSIx table will be cleaned out by reset. We need
144      * disable it so that it can be reenabled properly. Also,
145      * the cached MSIx table should be cleared as it's not
146      * reflecting the contents in hardware.
147      */
148     if (msix_enabled(pdev)) {
149         uint16_t flags;
150 
151         flags = pci_host_config_read_common(pdev,
152                                             pdev->msix_cap + PCI_MSIX_FLAGS,
153                                             pci_config_size(pdev), 2);
154         flags &= ~PCI_MSIX_FLAGS_ENABLE;
155         pci_host_config_write_common(pdev,
156                                      pdev->msix_cap + PCI_MSIX_FLAGS,
157                                      pci_config_size(pdev), flags, 2);
158     }
159 
160     msix_reset(pdev);
161 }
162 
163 static void spapr_phb_vfio_eeh_clear_bus_msix(PCIBus *bus, void *opaque)
164 {
165        pci_for_each_device(bus, pci_bus_num(bus),
166                            spapr_phb_vfio_eeh_clear_dev_msix, NULL);
167 }
168 
169 static void spapr_phb_vfio_eeh_pre_reset(sPAPRPHBState *sphb)
170 {
171        PCIHostState *phb = PCI_HOST_BRIDGE(sphb);
172 
173        pci_for_each_bus(phb->bus, spapr_phb_vfio_eeh_clear_bus_msix, NULL);
174 }
175 
176 int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option)
177 {
178     uint32_t op;
179     int ret;
180 
181     switch (option) {
182     case RTAS_SLOT_RESET_DEACTIVATE:
183         op = VFIO_EEH_PE_RESET_DEACTIVATE;
184         break;
185     case RTAS_SLOT_RESET_HOT:
186         spapr_phb_vfio_eeh_pre_reset(sphb);
187         op = VFIO_EEH_PE_RESET_HOT;
188         break;
189     case RTAS_SLOT_RESET_FUNDAMENTAL:
190         spapr_phb_vfio_eeh_pre_reset(sphb);
191         op = VFIO_EEH_PE_RESET_FUNDAMENTAL;
192         break;
193     default:
194         return RTAS_OUT_PARAM_ERROR;
195     }
196 
197     ret = vfio_eeh_as_op(&sphb->iommu_as, op);
198     if (ret < 0) {
199         return RTAS_OUT_HW_ERROR;
200     }
201 
202     return RTAS_OUT_SUCCESS;
203 }
204 
205 int spapr_phb_vfio_eeh_configure(sPAPRPHBState *sphb)
206 {
207     int ret;
208 
209     ret = vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_CONFIGURE);
210     if (ret < 0) {
211         return RTAS_OUT_PARAM_ERROR;
212     }
213 
214     return RTAS_OUT_SUCCESS;
215 }
216 
217 static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data)
218 {
219     DeviceClass *dc = DEVICE_CLASS(klass);
220 
221     dc->props = spapr_phb_vfio_properties;
222 }
223 
224 static const TypeInfo spapr_phb_vfio_info = {
225     .name          = TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE,
226     .parent        = TYPE_SPAPR_PCI_HOST_BRIDGE,
227     .instance_size = sizeof(sPAPRPHBVFIOState),
228     .instance_init = spapr_phb_vfio_instance_init,
229     .class_init    = spapr_phb_vfio_class_init,
230 };
231 
232 static void spapr_pci_vfio_register_types(void)
233 {
234     type_register_static(&spapr_phb_vfio_info);
235 }
236 
237 type_init(spapr_pci_vfio_register_types)
238