1 /* 2 * QEMU sPAPR PCI host for VFIO 3 * 4 * Copyright (c) 2011-2014 Alexey Kardashevskiy, IBM Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, 9 * or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include <linux/vfio.h> 22 #include "hw/ppc/spapr.h" 23 #include "hw/pci-host/spapr.h" 24 #include "hw/pci/msix.h" 25 #include "hw/vfio/vfio.h" 26 #include "qemu/error-report.h" 27 28 bool spapr_phb_eeh_available(SpaprPhbState *sphb) 29 { 30 return vfio_eeh_as_ok(&sphb->iommu_as); 31 } 32 33 static void spapr_phb_vfio_eeh_reenable(SpaprPhbState *sphb) 34 { 35 vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_ENABLE); 36 } 37 38 void spapr_phb_vfio_reset(DeviceState *qdev) 39 { 40 /* 41 * The PE might be in frozen state. To reenable the EEH 42 * functionality on it will clean the frozen state, which 43 * ensures that the contained PCI devices will work properly 44 * after reboot. 45 */ 46 spapr_phb_vfio_eeh_reenable(SPAPR_PCI_HOST_BRIDGE(qdev)); 47 } 48 49 int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb, 50 unsigned int addr, int option) 51 { 52 uint32_t op; 53 int ret; 54 55 switch (option) { 56 case RTAS_EEH_DISABLE: 57 op = VFIO_EEH_PE_DISABLE; 58 break; 59 case RTAS_EEH_ENABLE: { 60 PCIHostState *phb; 61 PCIDevice *pdev; 62 63 /* 64 * The EEH functionality is enabled on basis of PCI device, 65 * instead of PE. We need check the validity of the PCI 66 * device address. 67 */ 68 phb = PCI_HOST_BRIDGE(sphb); 69 pdev = pci_find_device(phb->bus, 70 (addr >> 16) & 0xFF, (addr >> 8) & 0xFF); 71 if (!pdev || !object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { 72 return RTAS_OUT_PARAM_ERROR; 73 } 74 75 op = VFIO_EEH_PE_ENABLE; 76 break; 77 } 78 case RTAS_EEH_THAW_IO: 79 op = VFIO_EEH_PE_UNFREEZE_IO; 80 break; 81 case RTAS_EEH_THAW_DMA: 82 op = VFIO_EEH_PE_UNFREEZE_DMA; 83 break; 84 default: 85 return RTAS_OUT_PARAM_ERROR; 86 } 87 88 ret = vfio_eeh_as_op(&sphb->iommu_as, op); 89 if (ret < 0) { 90 return RTAS_OUT_HW_ERROR; 91 } 92 93 return RTAS_OUT_SUCCESS; 94 } 95 96 int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state) 97 { 98 int ret; 99 100 ret = vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_GET_STATE); 101 if (ret < 0) { 102 return RTAS_OUT_PARAM_ERROR; 103 } 104 105 *state = ret; 106 return RTAS_OUT_SUCCESS; 107 } 108 109 static void spapr_phb_vfio_eeh_clear_dev_msix(PCIBus *bus, 110 PCIDevice *pdev, 111 void *opaque) 112 { 113 /* Check if the device is VFIO PCI device */ 114 if (!object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { 115 return; 116 } 117 118 /* 119 * The MSIx table will be cleaned out by reset. We need 120 * disable it so that it can be reenabled properly. Also, 121 * the cached MSIx table should be cleared as it's not 122 * reflecting the contents in hardware. 123 */ 124 if (msix_enabled(pdev)) { 125 uint16_t flags; 126 127 flags = pci_host_config_read_common(pdev, 128 pdev->msix_cap + PCI_MSIX_FLAGS, 129 pci_config_size(pdev), 2); 130 flags &= ~PCI_MSIX_FLAGS_ENABLE; 131 pci_host_config_write_common(pdev, 132 pdev->msix_cap + PCI_MSIX_FLAGS, 133 pci_config_size(pdev), flags, 2); 134 } 135 136 msix_reset(pdev); 137 } 138 139 static void spapr_phb_vfio_eeh_clear_bus_msix(PCIBus *bus, void *opaque) 140 { 141 pci_for_each_device(bus, pci_bus_num(bus), 142 spapr_phb_vfio_eeh_clear_dev_msix, NULL); 143 } 144 145 static void spapr_phb_vfio_eeh_pre_reset(SpaprPhbState *sphb) 146 { 147 PCIHostState *phb = PCI_HOST_BRIDGE(sphb); 148 149 pci_for_each_bus(phb->bus, spapr_phb_vfio_eeh_clear_bus_msix, NULL); 150 } 151 152 int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option) 153 { 154 uint32_t op; 155 int ret; 156 157 switch (option) { 158 case RTAS_SLOT_RESET_DEACTIVATE: 159 op = VFIO_EEH_PE_RESET_DEACTIVATE; 160 break; 161 case RTAS_SLOT_RESET_HOT: 162 spapr_phb_vfio_eeh_pre_reset(sphb); 163 op = VFIO_EEH_PE_RESET_HOT; 164 break; 165 case RTAS_SLOT_RESET_FUNDAMENTAL: 166 spapr_phb_vfio_eeh_pre_reset(sphb); 167 op = VFIO_EEH_PE_RESET_FUNDAMENTAL; 168 break; 169 default: 170 return RTAS_OUT_PARAM_ERROR; 171 } 172 173 ret = vfio_eeh_as_op(&sphb->iommu_as, op); 174 if (ret < 0) { 175 return RTAS_OUT_HW_ERROR; 176 } 177 178 return RTAS_OUT_SUCCESS; 179 } 180 181 int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) 182 { 183 int ret; 184 185 ret = vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_CONFIGURE); 186 if (ret < 0) { 187 return RTAS_OUT_PARAM_ERROR; 188 } 189 190 return RTAS_OUT_SUCCESS; 191 } 192