1 /* 2 * QEMU PAPR Storage Class Memory Interfaces 3 * 4 * Copyright (c) 2019-2020, IBM Corporation. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 #include "qemu/osdep.h" 25 #include "qapi/error.h" 26 #include "hw/ppc/spapr_drc.h" 27 #include "hw/ppc/spapr_nvdimm.h" 28 #include "hw/mem/nvdimm.h" 29 #include "qemu/nvdimm-utils.h" 30 #include "qemu/option.h" 31 #include "hw/ppc/fdt.h" 32 #include "qemu/range.h" 33 #include "sysemu/sysemu.h" 34 #include "hw/ppc/spapr_numa.h" 35 36 bool spapr_nvdimm_validate(HotplugHandler *hotplug_dev, NVDIMMDevice *nvdimm, 37 uint64_t size, Error **errp) 38 { 39 const MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev); 40 const MachineState *ms = MACHINE(hotplug_dev); 41 const char *nvdimm_opt = qemu_opt_get(qemu_get_machine_opts(), "nvdimm"); 42 g_autofree char *uuidstr = NULL; 43 QemuUUID uuid; 44 int ret; 45 46 if (!mc->nvdimm_supported) { 47 error_setg(errp, "NVDIMM hotplug not supported for this machine"); 48 return false; 49 } 50 51 /* 52 * NVDIMM support went live in 5.1 without considering that, in 53 * other archs, the user needs to enable NVDIMM support with the 54 * 'nvdimm' machine option and the default behavior is NVDIMM 55 * support disabled. It is too late to roll back to the standard 56 * behavior without breaking 5.1 guests. What we can do is to 57 * ensure that, if the user sets nvdimm=off, we error out 58 * regardless of being 5.1 or newer. 59 */ 60 if (!ms->nvdimms_state->is_enabled && nvdimm_opt) { 61 error_setg(errp, "nvdimm device found but 'nvdimm=off' was set"); 62 return false; 63 } 64 65 if (object_property_get_int(OBJECT(nvdimm), NVDIMM_LABEL_SIZE_PROP, 66 &error_abort) == 0) { 67 error_setg(errp, "PAPR requires NVDIMM devices to have label-size set"); 68 return false; 69 } 70 71 if (size % SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 72 error_setg(errp, "PAPR requires NVDIMM memory size (excluding label)" 73 " to be a multiple of %" PRIu64 "MB", 74 SPAPR_MINIMUM_SCM_BLOCK_SIZE / MiB); 75 return false; 76 } 77 78 uuidstr = object_property_get_str(OBJECT(nvdimm), NVDIMM_UUID_PROP, 79 &error_abort); 80 ret = qemu_uuid_parse(uuidstr, &uuid); 81 g_assert(!ret); 82 83 if (qemu_uuid_is_null(&uuid)) { 84 error_setg(errp, "NVDIMM device requires the uuid to be set"); 85 return false; 86 } 87 88 return true; 89 } 90 91 92 void spapr_add_nvdimm(DeviceState *dev, uint64_t slot) 93 { 94 SpaprDrc *drc; 95 bool hotplugged = spapr_drc_hotplugged(dev); 96 97 drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 98 g_assert(drc); 99 100 /* 101 * pc_dimm_get_free_slot() provided a free slot at pre-plug. The 102 * corresponding DRC is thus assumed to be attachable. 103 */ 104 spapr_drc_attach(drc, dev, &error_abort); 105 106 if (hotplugged) { 107 spapr_hotplug_req_add_by_index(drc); 108 } 109 } 110 111 static int spapr_dt_nvdimm(SpaprMachineState *spapr, void *fdt, 112 int parent_offset, NVDIMMDevice *nvdimm) 113 { 114 int child_offset; 115 char *buf; 116 SpaprDrc *drc; 117 uint32_t drc_idx; 118 uint32_t node = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_NODE_PROP, 119 &error_abort); 120 uint64_t slot = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_SLOT_PROP, 121 &error_abort); 122 uint64_t lsize = nvdimm->label_size; 123 uint64_t size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 124 NULL); 125 126 drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 127 g_assert(drc); 128 129 drc_idx = spapr_drc_index(drc); 130 131 buf = g_strdup_printf("ibm,pmemory@%x", drc_idx); 132 child_offset = fdt_add_subnode(fdt, parent_offset, buf); 133 g_free(buf); 134 135 _FDT(child_offset); 136 137 _FDT((fdt_setprop_cell(fdt, child_offset, "reg", drc_idx))); 138 _FDT((fdt_setprop_string(fdt, child_offset, "compatible", "ibm,pmemory"))); 139 _FDT((fdt_setprop_string(fdt, child_offset, "device_type", "ibm,pmemory"))); 140 141 spapr_numa_write_associativity_dt(spapr, fdt, child_offset, node); 142 143 buf = qemu_uuid_unparse_strdup(&nvdimm->uuid); 144 _FDT((fdt_setprop_string(fdt, child_offset, "ibm,unit-guid", buf))); 145 g_free(buf); 146 147 _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,my-drc-index", drc_idx))); 148 149 _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,block-size", 150 SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 151 _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,number-of-blocks", 152 size / SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 153 _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,metadata-size", lsize))); 154 155 _FDT((fdt_setprop_string(fdt, child_offset, "ibm,pmem-application", 156 "operating-system"))); 157 _FDT(fdt_setprop(fdt, child_offset, "ibm,cache-flush-required", NULL, 0)); 158 159 return child_offset; 160 } 161 162 int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, 163 void *fdt, int *fdt_start_offset, Error **errp) 164 { 165 NVDIMMDevice *nvdimm = NVDIMM(drc->dev); 166 167 *fdt_start_offset = spapr_dt_nvdimm(spapr, fdt, 0, nvdimm); 168 169 return 0; 170 } 171 172 void spapr_dt_persistent_memory(SpaprMachineState *spapr, void *fdt) 173 { 174 int offset = fdt_subnode_offset(fdt, 0, "persistent-memory"); 175 GSList *iter, *nvdimms = nvdimm_get_device_list(); 176 177 if (offset < 0) { 178 offset = fdt_add_subnode(fdt, 0, "persistent-memory"); 179 _FDT(offset); 180 _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0x1))); 181 _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0x0))); 182 _FDT((fdt_setprop_string(fdt, offset, "device_type", 183 "ibm,persistent-memory"))); 184 } 185 186 /* Create DT entries for cold plugged NVDIMM devices */ 187 for (iter = nvdimms; iter; iter = iter->next) { 188 NVDIMMDevice *nvdimm = iter->data; 189 190 spapr_dt_nvdimm(spapr, fdt, offset, nvdimm); 191 } 192 g_slist_free(nvdimms); 193 194 return; 195 } 196 197 static target_ulong h_scm_read_metadata(PowerPCCPU *cpu, 198 SpaprMachineState *spapr, 199 target_ulong opcode, 200 target_ulong *args) 201 { 202 uint32_t drc_index = args[0]; 203 uint64_t offset = args[1]; 204 uint64_t len = args[2]; 205 SpaprDrc *drc = spapr_drc_by_index(drc_index); 206 NVDIMMDevice *nvdimm; 207 NVDIMMClass *ddc; 208 uint64_t data = 0; 209 uint8_t buf[8] = { 0 }; 210 211 if (!drc || !drc->dev || 212 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 213 return H_PARAMETER; 214 } 215 216 if (len != 1 && len != 2 && 217 len != 4 && len != 8) { 218 return H_P3; 219 } 220 221 nvdimm = NVDIMM(drc->dev); 222 if ((offset + len < offset) || 223 (nvdimm->label_size < len + offset)) { 224 return H_P2; 225 } 226 227 ddc = NVDIMM_GET_CLASS(nvdimm); 228 ddc->read_label_data(nvdimm, buf, len, offset); 229 230 switch (len) { 231 case 1: 232 data = ldub_p(buf); 233 break; 234 case 2: 235 data = lduw_be_p(buf); 236 break; 237 case 4: 238 data = ldl_be_p(buf); 239 break; 240 case 8: 241 data = ldq_be_p(buf); 242 break; 243 default: 244 g_assert_not_reached(); 245 } 246 247 args[0] = data; 248 249 return H_SUCCESS; 250 } 251 252 static target_ulong h_scm_write_metadata(PowerPCCPU *cpu, 253 SpaprMachineState *spapr, 254 target_ulong opcode, 255 target_ulong *args) 256 { 257 uint32_t drc_index = args[0]; 258 uint64_t offset = args[1]; 259 uint64_t data = args[2]; 260 uint64_t len = args[3]; 261 SpaprDrc *drc = spapr_drc_by_index(drc_index); 262 NVDIMMDevice *nvdimm; 263 NVDIMMClass *ddc; 264 uint8_t buf[8] = { 0 }; 265 266 if (!drc || !drc->dev || 267 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 268 return H_PARAMETER; 269 } 270 271 if (len != 1 && len != 2 && 272 len != 4 && len != 8) { 273 return H_P4; 274 } 275 276 nvdimm = NVDIMM(drc->dev); 277 if ((offset + len < offset) || 278 (nvdimm->label_size < len + offset)) { 279 return H_P2; 280 } 281 282 switch (len) { 283 case 1: 284 if (data & 0xffffffffffffff00) { 285 return H_P2; 286 } 287 stb_p(buf, data); 288 break; 289 case 2: 290 if (data & 0xffffffffffff0000) { 291 return H_P2; 292 } 293 stw_be_p(buf, data); 294 break; 295 case 4: 296 if (data & 0xffffffff00000000) { 297 return H_P2; 298 } 299 stl_be_p(buf, data); 300 break; 301 case 8: 302 stq_be_p(buf, data); 303 break; 304 default: 305 g_assert_not_reached(); 306 } 307 308 ddc = NVDIMM_GET_CLASS(nvdimm); 309 ddc->write_label_data(nvdimm, buf, len, offset); 310 311 return H_SUCCESS; 312 } 313 314 static target_ulong h_scm_bind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 315 target_ulong opcode, target_ulong *args) 316 { 317 uint32_t drc_index = args[0]; 318 uint64_t starting_idx = args[1]; 319 uint64_t no_of_scm_blocks_to_bind = args[2]; 320 uint64_t target_logical_mem_addr = args[3]; 321 uint64_t continue_token = args[4]; 322 uint64_t size; 323 uint64_t total_no_of_scm_blocks; 324 SpaprDrc *drc = spapr_drc_by_index(drc_index); 325 hwaddr addr; 326 NVDIMMDevice *nvdimm; 327 328 if (!drc || !drc->dev || 329 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 330 return H_PARAMETER; 331 } 332 333 /* 334 * Currently continue token should be zero qemu has already bound 335 * everything and this hcall doesnt return H_BUSY. 336 */ 337 if (continue_token > 0) { 338 return H_P5; 339 } 340 341 /* Currently qemu assigns the address. */ 342 if (target_logical_mem_addr != 0xffffffffffffffff) { 343 return H_OVERLAP; 344 } 345 346 nvdimm = NVDIMM(drc->dev); 347 348 size = object_property_get_uint(OBJECT(nvdimm), 349 PC_DIMM_SIZE_PROP, &error_abort); 350 351 total_no_of_scm_blocks = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 352 353 if (starting_idx > total_no_of_scm_blocks) { 354 return H_P2; 355 } 356 357 if (((starting_idx + no_of_scm_blocks_to_bind) < starting_idx) || 358 ((starting_idx + no_of_scm_blocks_to_bind) > total_no_of_scm_blocks)) { 359 return H_P3; 360 } 361 362 addr = object_property_get_uint(OBJECT(nvdimm), 363 PC_DIMM_ADDR_PROP, &error_abort); 364 365 addr += starting_idx * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 366 367 /* Already bound, Return target logical address in R5 */ 368 args[1] = addr; 369 args[2] = no_of_scm_blocks_to_bind; 370 371 return H_SUCCESS; 372 } 373 374 static target_ulong h_scm_unbind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 375 target_ulong opcode, target_ulong *args) 376 { 377 uint32_t drc_index = args[0]; 378 uint64_t starting_scm_logical_addr = args[1]; 379 uint64_t no_of_scm_blocks_to_unbind = args[2]; 380 uint64_t continue_token = args[3]; 381 uint64_t size_to_unbind; 382 Range blockrange = range_empty; 383 Range nvdimmrange = range_empty; 384 SpaprDrc *drc = spapr_drc_by_index(drc_index); 385 NVDIMMDevice *nvdimm; 386 uint64_t size, addr; 387 388 if (!drc || !drc->dev || 389 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 390 return H_PARAMETER; 391 } 392 393 /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 394 if (continue_token > 0) { 395 return H_P4; 396 } 397 398 /* Check if starting_scm_logical_addr is block aligned */ 399 if (!QEMU_IS_ALIGNED(starting_scm_logical_addr, 400 SPAPR_MINIMUM_SCM_BLOCK_SIZE)) { 401 return H_P2; 402 } 403 404 size_to_unbind = no_of_scm_blocks_to_unbind * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 405 if (no_of_scm_blocks_to_unbind == 0 || no_of_scm_blocks_to_unbind != 406 size_to_unbind / SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 407 return H_P3; 408 } 409 410 nvdimm = NVDIMM(drc->dev); 411 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 412 &error_abort); 413 addr = object_property_get_int(OBJECT(nvdimm), PC_DIMM_ADDR_PROP, 414 &error_abort); 415 416 range_init_nofail(&nvdimmrange, addr, size); 417 range_init_nofail(&blockrange, starting_scm_logical_addr, size_to_unbind); 418 419 if (!range_contains_range(&nvdimmrange, &blockrange)) { 420 return H_P3; 421 } 422 423 args[1] = no_of_scm_blocks_to_unbind; 424 425 /* let unplug take care of actual unbind */ 426 return H_SUCCESS; 427 } 428 429 #define H_UNBIND_SCOPE_ALL 0x1 430 #define H_UNBIND_SCOPE_DRC 0x2 431 432 static target_ulong h_scm_unbind_all(PowerPCCPU *cpu, SpaprMachineState *spapr, 433 target_ulong opcode, target_ulong *args) 434 { 435 uint64_t target_scope = args[0]; 436 uint32_t drc_index = args[1]; 437 uint64_t continue_token = args[2]; 438 NVDIMMDevice *nvdimm; 439 uint64_t size; 440 uint64_t no_of_scm_blocks_unbound = 0; 441 442 /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 443 if (continue_token > 0) { 444 return H_P4; 445 } 446 447 if (target_scope == H_UNBIND_SCOPE_DRC) { 448 SpaprDrc *drc = spapr_drc_by_index(drc_index); 449 450 if (!drc || !drc->dev || 451 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 452 return H_P2; 453 } 454 455 nvdimm = NVDIMM(drc->dev); 456 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 457 &error_abort); 458 459 no_of_scm_blocks_unbound = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 460 } else if (target_scope == H_UNBIND_SCOPE_ALL) { 461 GSList *list, *nvdimms; 462 463 nvdimms = nvdimm_get_device_list(); 464 for (list = nvdimms; list; list = list->next) { 465 nvdimm = list->data; 466 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 467 &error_abort); 468 469 no_of_scm_blocks_unbound += size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 470 } 471 g_slist_free(nvdimms); 472 } else { 473 return H_PARAMETER; 474 } 475 476 args[1] = no_of_scm_blocks_unbound; 477 478 /* let unplug take care of actual unbind */ 479 return H_SUCCESS; 480 } 481 482 static void spapr_scm_register_types(void) 483 { 484 /* qemu/scm specific hcalls */ 485 spapr_register_hypercall(H_SCM_READ_METADATA, h_scm_read_metadata); 486 spapr_register_hypercall(H_SCM_WRITE_METADATA, h_scm_write_metadata); 487 spapr_register_hypercall(H_SCM_BIND_MEM, h_scm_bind_mem); 488 spapr_register_hypercall(H_SCM_UNBIND_MEM, h_scm_unbind_mem); 489 spapr_register_hypercall(H_SCM_UNBIND_ALL, h_scm_unbind_all); 490 } 491 492 type_init(spapr_scm_register_types) 493